tree f441f1c0d40303fd780d2f2b2ceed2c629337ad2
parent e4ab5e5b08e896fd33041ed44b87bcb43af0b499
author Chris Packham <chris.packham@alliedtelesis.co.nz> 1590543090 +1200
committer Stefan Roese <sr@denx.de> 1594270184 +0200

mv_ddr: ddr3: Update {min,max}_read_sample calculation

Measurements on actual hardware shown that the read ODT is early by 3
clocks. Adjust the calculation to avoid this.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[upstream https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/22]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>