tree 537eb3eb31207ffe61a8f3d74cc1e21088b0ea8b
parent 902df1d13836dc0e494434dbf991363bb1c36d3f
author Takahiro Kuwano <Takahiro.Kuwano@infineon.com> 1624946459 +0900
committer Jagan Teki <jagan@amarulasolutions.com> 1624974414 +0530

mtd: spi-nor-core: Add support for volatile QE bit

Some of Spansion/Cypress chips support volatile version of configuration
registers and it is recommended to update volatile registers in the field
application due to a risk of the non-volatile registers corruption by
power interrupt. This patch adds a function to set Quad Enable bit in CFR1
volatile.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>