commit ee2708b2319b33922ed11927ef28f226bddb67ea
author Yangbo Lu <yangbo.lu@nxp.com> Tue Oct 20 11:04:51 2020 +0800
committer Peng Fan <peng.fan@nxp.com> Sat Nov 28 10:39:44 2020 +0800
tree ba219eb810f896950f258a61ed1fb9e2898f3d99
parent 8632509e9a392bff94ae1a2b2d9295d83882715b

mmc: fsl_esdhc: set sysctl register for clock initialization

The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

drivers/mmc/fsl_esdhc.c

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 642784e..68130ee 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -715,7 +715,7 @@
 	esdhc_setbits32(&regs->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
 
 	/* Set the initial clock speed */
-	mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE);
+	set_sysctl(priv, mmc, 400000);
 
 	/* Disable the BRR and BWR bits in IRQSTAT */
 	esdhc_clrbits32(&regs->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);