tree b0550850214891149050109b60ff9b0ed1839353
parent 02df4e6021add4f4e52aec4888fe572e8f3f5973
author Paul Burton <paul.burton@imgtec.com> 1422494879 +0000
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> 1422532501 +0100

MIPS: refactor L1 cache config reads to a macro

Reduce duplication between reading the configuration of the L1 dcache &
icache by performing both using a macro which calculates the appropriate
line & cache sizes from the coprocessor 0 Config1 register.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>