Merge branch '2023-03-29-assorted-platform-updates' into next
- Assorted TI, Apple M1, and mpc83xx improvements / cleanups.
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c160e884..b25570d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1259,7 +1259,10 @@
k3-am6528-iot2050-basic.dtb \
k3-am6528-iot2050-basic-pg2.dtb \
k3-am6548-iot2050-advanced.dtb \
- k3-am6548-iot2050-advanced-pg2.dtb
+ k3-am6548-iot2050-advanced-pg2.dtb \
+ k3-am6548-iot2050-advanced-m2.dtb \
+ k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \
+ k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
k3-j721e-r5-common-proc-board.dtb \
k3-j7200-common-proc-board.dtb \
diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
index 2705837..03ccc54 100644
--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (c) Siemens AG, 2020-2021
+ * Copyright (c) Siemens AG, 2020-2022
*
* Authors:
* Jan Kiszka <jan.kiszka@siemens.com>
@@ -14,21 +14,27 @@
filename = "flash.bin";
pad-byte = <0xff>;
size = <0x8c0000>;
+ allow-repack;
blob-ext@0x000000 {
offset = <0x000000>;
- filename = "tiboot3.bin";
+#ifdef CONFIG_TARGET_IOT2050_A53_PG1
+ filename = "seboot_pg1.bin";
+#else
+ filename = "seboot_pg2.bin";
+#endif
missing-msg = "iot2050-seboot";
};
- blob@0x080000 {
- offset = <0x080000>;
+ blob@0x180000 {
+ offset = <0x180000>;
filename = "tispl.bin";
};
- fit@0x280000 {
+ fit@0x380000 {
description = "U-Boot for IOT2050";
- offset = <0x280000>;
+ fit,fdt-list = "of-list";
+ offset = <0x380000>;
images {
u-boot {
description = "U-Boot";
@@ -40,47 +46,50 @@
entry = <0x80800000>;
u-boot-nodtb {
};
- };
-
- fdt-iot2050-basic {
- description = "k3-am6528-iot2050-basic.dtb";
- type = "flat_dt";
- arch = "arm64";
- compression = "none";
- blob {
- filename = "arch/arm/dts/k3-am6528-iot2050-basic.dtb";
+ hash {
+ algo = "sha256";
};
};
- fdt-iot2050-basic-pg2 {
- description = "k3-am6528-iot2050-basic-pg2.dtb";
+ @fdt-SEQ {
+ description = "fdt-NAME";
type = "flat_dt";
arch = "arm64";
compression = "none";
- blob {
- filename = "arch/arm/dts/k3-am6528-iot2050-basic-pg2.dtb";
+ hash {
+ algo = "sha256";
};
};
- fdt-iot2050-advanced {
- description = "k3-am6548-iot2050-advanced.dtb";
- type = "flat_dt";
+#ifdef CONFIG_TARGET_IOT2050_A53_PG2
+ bkey-usb3-overlay {
+ description = "M.2-bkey-usb3-overlay";
+ type = "blob";
+ load = <0x82100000>;
arch = "arm64";
compression = "none";
- blob {
- filename = "arch/arm/dts/k3-am6548-iot2050-advanced.dtb";
+ blob-ext {
+ filename = "k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo";
+ };
+ hash {
+ algo = "sha256";
};
};
- fdt-iot2050-advanced-pg2 {
- description = "k3-am6548-iot2050-advanced-pg2.dtb";
- type = "flat_dt";
+ bkey-ekey-pcie-overlay {
+ description = "M.2-bkey-ekey-pcie-overlay";
+ type = "blob";
+ load = <0x82110000>;
arch = "arm64";
compression = "none";
- blob {
- filename = "arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dtb";
+ blob-ext {
+ filename = "k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo";
+ };
+ hash {
+ algo = "sha256";
};
};
+#endif
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
k3-rti-wdt-firmware {
@@ -92,51 +101,38 @@
filename = CONFIG_WDT_K3_RTI_FW_FILE;
missing-msg = "k3-rti-wdt-firmware";
};
+ hash {
+ algo = "sha256";
+ };
};
#endif
};
configurations {
- default = "conf-iot2050-basic";
-
- conf-iot2050-basic {
- description = "iot2050-basic";
- firmware = "u-boot";
- fdt = "fdt-iot2050-basic";
-#ifdef CONFIG_WDT_K3_RTI_FW_FILE
- loadables = "k3-rti-wdt-firmware";
-#endif
- };
-
- conf-iot2050-basic-pg2 {
- description = "iot2050-basic-pg2";
+ default = "@config-DEFAULT-SEQ";
+ @config-SEQ {
+ description = "NAME";
firmware = "u-boot";
- fdt = "fdt-iot2050-basic-pg2";
-#ifdef CONFIG_WDT_K3_RTI_FW_FILE
- loadables = "k3-rti-wdt-firmware";
+ fdt = "fdt-SEQ";
+ loadables =
+#ifdef CONFIG_TARGET_IOT2050_A53_PG2
+ "bkey-usb3-overlay",
+ "bkey-ekey-pcie-overlay",
#endif
- };
-
- conf-iot2050-advanced {
- description = "iot2050-advanced";
- firmware = "u-boot";
- fdt = "fdt-iot2050-advanced";
-#ifdef CONFIG_WDT_K3_RTI_FW_FILE
- loadables = "k3-rti-wdt-firmware";
-#endif
- };
-
- conf-iot2050-advanced-pg2 {
- description = "iot2050-advanced-pg2";
- firmware = "u-boot";
- fdt = "fdt-iot2050-advanced-pg2";
#ifdef CONFIG_WDT_K3_RTI_FW_FILE
- loadables = "k3-rti-wdt-firmware";
+ "k3-rti-wdt-firmware",
#endif
+ <>;
+ signature {
+ sign-images = "firmware", "fdt", "loadables";
+ };
};
};
};
+ fdtmap {
+ };
+
/* primary env */
fill@0x680000 {
offset = <0x680000>;
@@ -150,29 +146,20 @@
fill-byte = [00];
};
- /* PG1 sysfw, basic variant */
+ /* OTP update command block */
+#if CONFIG_IOT2050_EMBED_OTPCMD
blob-ext@0x6c0000 {
offset = <0x6c0000>;
- filename = "sysfw.itb";
- missing-msg = "iot2050-sysfw";
+ size = <0x010000>;
+ filename = "otpcmd.bin";
+ missing-msg = "iot2050-otpcmd";
};
- /* PG1 sysfw, advanced variant */
- blob-ext@0x740000 {
- offset = <0x740000>;
- filename = "sysfw.itb_HS";
- missing-msg = "iot2050-sysfw";
- };
- /* PG2 sysfw, basic variant */
- blob-ext@0x7c0000 {
- offset = <0x7c0000>;
- filename = "sysfw_sr2.itb";
- missing-msg = "iot2050-sysfw";
- };
- /* PG2 sysfw, advanced variant */
- blob-ext@0x840000 {
- offset = <0x840000>;
- filename = "sysfw_sr2.itb_HS";
- missing-msg = "iot2050-sysfw";
+#else
+ fill@0x6c0000 {
+ offset = <0x6c0000>;
+ size = <0x010000>;
+ fill-byte = [ff];
};
+#endif
};
};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts
new file mode 100644
index 0000000..c9e7360
--- /dev/null
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dts
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * IOT2050 M.2 variant, overlay for B-key PCIE0_LANE0 + E-key PCIE1_LANE0
+ * Copyright (c) Siemens AG, 2022
+ *
+ * Authors:
+ * Chao Zeng <chao.zeng@siemens.com>
+ * Jan Kiszka <jan.kiszka@siemens.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&pcie0_rc {
+ num-lanes = <1>;
+ phys = <&serdes0 PHY_TYPE_PCIE 1>;
+ phy-names = "pcie-phy0";
+ reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pcie1_rc {
+ status = "okay";
+};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts
new file mode 100644
index 0000000..72fc011
--- /dev/null
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dts
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * IOT2050 M.2 variant, overlay for B-key USB3.0 + E-key PCIE1_LANE0
+ * Copyright (c) Siemens AG, 2022
+ *
+ * Authors:
+ * Chao Zeng <chao.zeng@siemens.com>
+ * Jan Kiszka <jan.kiszka@siemens.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&serdes0 {
+ assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
+};
+
+&pcie0_rc {
+ status = "disabled";
+};
+
+&pcie1_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&minipcie_pins_default>;
+
+ num-lanes = <1>;
+ phys = <&serdes1 PHY_TYPE_PCIE 0>;
+ phy-names = "pcie-phy0";
+ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&dwc3_0 {
+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
+ <&k3_clks 151 8>; /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
+ phys = <&serdes0 PHY_TYPE_USB3 0>;
+ phy-names = "usb3-phy";
+};
+
+&usb0 {
+ maximum-speed = "super-speed";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+};
diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts
new file mode 100644
index 0000000..9400e35
--- /dev/null
+++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) Siemens AG, 2018-2023
+ *
+ * Authors:
+ * Chao Zeng <chao.zeng@siemens.com>
+ * Jan Kiszka <jan.kiszka@siemens.com>
+ *
+ * AM6548-based (quad-core) IOT2050 M.2 variant (based on Advanced Product
+ * Generation 2), 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
+ *
+ * Product homepage:
+ * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
+ */
+
+#include "k3-am6548-iot2050-advanced-common.dtsi"
+#include "k3-am65-iot2050-common-pg2.dtsi"
+
+/ {
+ compatible = "siemens,iot2050-advanced-m2", "ti,am654";
+ model = "SIMATIC IOT2050 Advanced M2";
+};
+
+&mcu_r5fss0 {
+ /* lock-step mode not supported on this board */
+ ti,cluster-mode = <0>;
+};
+
+&main_pmx0 {
+ main_m2_enable_pins_default: main-m2-enable-pins-default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */
+ >;
+ };
+
+ main_bkey_pcie_reset: main-bkey-pcie-reset {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */
+ >;
+ };
+
+ main_pmx0_m2_config_pins_default: main-pmx0-m2-config-pins-default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */
+ AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */
+ >;
+ };
+
+ main_m2_pcie_mux_control: main-m2-pcie-mux-control {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */
+ AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */
+ AM65X_IOPAD(0x0164, PIN_INPUT_PULLUP, 7) /* (AF19) GPIO0_89 */
+ >;
+ };
+};
+
+&main_pmx1 {
+ main_pmx1_m2_config_pins_default: main-pmx1-m2-config-pins-default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */
+ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */
+ >;
+ };
+};
+
+&main_gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &main_m2_pcie_mux_control
+ &arduino_io_d4_to_d9_pins_default
+ >;
+};
+
+&main_gpio1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <
+ &main_m2_enable_pins_default
+ &main_pmx0_m2_config_pins_default
+ &main_pmx1_m2_config_pins_default
+ &cp2102n_reset_pin_default
+ >;
+};
+
+/*
+ * Base configuration for B-key slot with PCIe x2, E-key with USB 2.0 only.
+ * Firmware switches to other modes via device tree overlays.
+ */
+
+&serdes0 {
+ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
+ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
+};
+
+&pcie0_rc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_bkey_pcie_reset>;
+
+ num-lanes = <2>;
+ phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
+ phy-names = "pcie-phy0","pcie-phy1";
+ reset-gpios = <&main_gpio1 15 GPIO_ACTIVE_HIGH>;
+ status = "okay";
+};
+
+&pcie1_rc {
+ status = "disabled";
+};
+
+&dwc3_0 {
+ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
+ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
+ /delete-property/ phys;
+ /delete-property/ phy-names;
+};
+
+&usb0 {
+ maximum-speed = "high-speed";
+ /delete-property/ snps,dis-u1-entry-quirk;
+ /delete-property/ snps,dis-u2-entry-quirk;
+};
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index a8c3a59..7edbac2 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -187,6 +187,11 @@
help
SWRV for X509 certificate used for boot images
+config K3_BOARD_DETECT
+ bool "Support for Board detection"
+ help
+ Support for board detection.
+
source "board/ti/am65x/Kconfig"
source "board/ti/am64x/Kconfig"
source "board/ti/am62x/Kconfig"
diff --git a/arch/arm/mach-k3/am642_init.c b/arch/arm/mach-k3/am642_init.c
index 96f292e..1bf7e16 100644
--- a/arch/arm/mach-k3/am642_init.c
+++ b/arch/arm/mach-k3/am642_init.c
@@ -100,7 +100,7 @@
{
int ret, rescan;
- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT))
do_board_detect();
/*
diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c
index 768fdd6..70059ed 100644
--- a/arch/arm/mach-k3/am654_init.c
+++ b/arch/arm/mach-k3/am654_init.c
@@ -245,8 +245,7 @@
/* Output System Firmware version info */
k3_sysfw_print_ver();
- /* Perform EEPROM-based board detection */
- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT))
do_board_detect();
#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 276cbb5..9cae3ac 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -140,7 +140,7 @@
int ret, rescan, mmc_dev = -1;
static struct mmc *mmc;
- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT))
do_board_detect();
/*
@@ -267,8 +267,7 @@
/* Output System Firmware version info */
k3_sysfw_print_ver();
- /* Perform EEPROM-based board detection */
- if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
+ if (IS_ENABLED(CONFIG_K3_BOARD_DETECT))
do_board_detect();
#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 2af5c89..f5cb000 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -227,30 +227,6 @@
im->sysconf.lblaw[3].bar = CFG_SYS_LBLAWBAR3_PRELIM;
im->sysconf.lblaw[3].ar = CFG_SYS_LBLAWAR3_PRELIM;
#endif
-#if defined(CONFIG_SYS_LBLAWBAR4_PRELIM) && defined(CONFIG_SYS_LBLAWAR4_PRELIM)
- im->sysconf.lblaw[4].bar = CONFIG_SYS_LBLAWBAR4_PRELIM;
- im->sysconf.lblaw[4].ar = CONFIG_SYS_LBLAWAR4_PRELIM;
-#endif
-#if defined(CONFIG_SYS_LBLAWBAR5_PRELIM) && defined(CONFIG_SYS_LBLAWAR5_PRELIM)
- im->sysconf.lblaw[5].bar = CONFIG_SYS_LBLAWBAR5_PRELIM;
- im->sysconf.lblaw[5].ar = CONFIG_SYS_LBLAWAR5_PRELIM;
-#endif
-#if defined(CONFIG_SYS_LBLAWBAR6_PRELIM) && defined(CONFIG_SYS_LBLAWAR6_PRELIM)
- im->sysconf.lblaw[6].bar = CONFIG_SYS_LBLAWBAR6_PRELIM;
- im->sysconf.lblaw[6].ar = CONFIG_SYS_LBLAWAR6_PRELIM;
-#endif
-#if defined(CONFIG_SYS_LBLAWBAR7_PRELIM) && defined(CONFIG_SYS_LBLAWAR7_PRELIM)
- im->sysconf.lblaw[7].bar = CONFIG_SYS_LBLAWBAR7_PRELIM;
- im->sysconf.lblaw[7].ar = CONFIG_SYS_LBLAWAR7_PRELIM;
-#endif
-#ifdef CONFIG_SYS_GPIO1_PRELIM
- im->gpio[0].dat = CONFIG_SYS_GPIO1_DAT;
- im->gpio[0].dir = CONFIG_SYS_GPIO1_DIR;
-#endif
-#ifdef CONFIG_SYS_GPIO2_PRELIM
- im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT;
- im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR;
-#endif
}
int cpu_init_r (void)
diff --git a/board/siemens/iot2050/Kconfig b/board/siemens/iot2050/Kconfig
index 063142a..e66b242 100644
--- a/board/siemens/iot2050/Kconfig
+++ b/board/siemens/iot2050/Kconfig
@@ -1,20 +1,40 @@
# SPDX-License-Identifier: GPL-2.0+
#
-# Copyright (c) Siemens AG, 2018-2021
+# Copyright (c) Siemens AG, 2018-2022
#
# Authors:
# Le Jin <le.jin@siemens.com>
# Jan Kiszka <jan.kiszka@siemens.com>
-config TARGET_IOT2050_A53
- bool "IOT2050 running on A53"
+choice
+ prompt "Siemens SIMATIC IOT2050 boards"
+ optional
+
+config TARGET_IOT2050_A53_PG1
+ bool "IOT2050 PG1 running on A53"
+ select IOT2050_A53_COMMON
+ help
+ This builds U-Boot for the Product Generation 1 (PG1) of the IOT2050
+ devices.
+
+config TARGET_IOT2050_A53_PG2
+ bool "IOT2050 PG2 running on A53"
+ select IOT2050_A53_COMMON
+ help
+ This builds U-Boot for the Product Generation 2 (PG2) of the IOT2050
+ devices.
+
+endchoice
+
+config IOT2050_A53_COMMON
+ bool
select ARM64
select SOC_K3_AM654
select BOARD_LATE_INIT
select SYS_DISABLE_DCACHE_OPS
select BINMAN
-if TARGET_IOT2050_A53
+if IOT2050_A53_COMMON
config SYS_BOARD
default "iot2050"
@@ -29,4 +49,11 @@
bool "Disable eMMC boot via USER button (Advanced version only)"
default y
+config IOT2050_EMBED_OTPCMD
+ bool "Embed OTP programming data"
+ help
+ Embed signed OTP programming data 'otpcmd.bin' into the firmware
+ image. This data will be evaluated and executed on first boot of the
+ device.
+
endif
diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index 8f4b0ea..df705b7 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Board specific initialization for IOT2050
- * Copyright (c) Siemens AG, 2018-2021
+ * Copyright (c) Siemens AG, 2018-2022
*
* Authors:
* Le Jin <le.jin@siemens.com>
@@ -11,9 +11,11 @@
#include <common.h>
#include <bootstage.h>
#include <dm.h>
+#include <fdt_support.h>
#include <i2c.h>
#include <led.h>
#include <malloc.h>
+#include <mapmem.h>
#include <net.h>
#include <phy.h>
#include <spl.h>
@@ -47,20 +49,120 @@
DECLARE_GLOBAL_DATA_PTR;
-static bool board_is_advanced(void)
+struct gpio_config {
+ const char *gpio_name;
+ const char *label;
+};
+
+enum m2_connector_mode {
+ BKEY_PCIEX2 = 0,
+ BKEY_PCIE_EKEY_PCIE,
+ BKEY_USB30_EKEY_PCIE,
+ CONNECTOR_MODE_INVALID
+};
+
+struct m2_config_pins {
+ int config[4];
+};
+
+struct serdes_mux_control {
+ int ctrl_usb30_pcie0_lane0;
+ int ctrl_pcie1_pcie0;
+ int ctrl_usb30_pcie0_lane1;
+};
+
+struct m2_config_table {
+ struct m2_config_pins config_pins;
+ enum m2_connector_mode mode;
+};
+
+static const struct gpio_config serdes_mux_ctl_pin_info[] = {
+ {"gpio@600000_88", "CTRL_USB30_PCIE0_LANE0"},
+ {"gpio@600000_82", "CTRL_PCIE1_PCIE0"},
+ {"gpio@600000_89", "CTRL_USB30_PCIE0_LANE1"},
+};
+
+static const struct gpio_config m2_bkey_cfg_pin_info[] = {
+ {"gpio@601000_18", "KEY_CONFIG_0"},
+ {"gpio@601000_19", "KEY_CONFIG_1"},
+ {"gpio@601000_88", "KEY_CONFIG_2"},
+ {"gpio@601000_89", "KEY_CONFIG_3"},
+};
+
+static const struct m2_config_table m2_config_table[] = {
+ {{{0, 1, 0, 0}}, BKEY_PCIEX2},
+ {{{0, 0, 1, 0}}, BKEY_PCIE_EKEY_PCIE},
+ {{{0, 1, 1, 0}}, BKEY_PCIE_EKEY_PCIE},
+ {{{1, 0, 0, 1}}, BKEY_PCIE_EKEY_PCIE},
+ {{{1, 1, 0, 1}}, BKEY_PCIE_EKEY_PCIE},
+ {{{0, 0, 0, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{0, 1, 0, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{0, 0, 1, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{0, 1, 1, 1}}, BKEY_USB30_EKEY_PCIE},
+ {{{1, 0, 1, 1}}, BKEY_USB30_EKEY_PCIE},
+};
+
+static const struct serdes_mux_control serdes_mux_ctrl[] = {
+ [BKEY_PCIEX2] = {0, 0, 1},
+ [BKEY_PCIE_EKEY_PCIE] = {0, 1, 0},
+ [BKEY_USB30_EKEY_PCIE] = {1, 1, 0},
+};
+
+static const char *m2_connector_mode_name[] = {
+ [BKEY_PCIEX2] = "PCIe x2 (key B)",
+ [BKEY_PCIE_EKEY_PCIE] = "PCIe (key B) / PCIe (key E)",
+ [BKEY_USB30_EKEY_PCIE] = "USB 3.0 (key B) / PCIe (key E)",
+};
+
+static enum m2_connector_mode connector_mode;
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+static void *connector_overlay;
+static u32 connector_overlay_size;
+#endif
+
+static int get_pinvalue(const char *gpio_name, const char *label)
+{
+ struct gpio_desc gpio;
+
+ if (dm_gpio_lookup_name(gpio_name, &gpio) < 0 ||
+ dm_gpio_request(&gpio, label) < 0 ||
+ dm_gpio_set_dir_flags(&gpio, GPIOD_IS_IN) < 0) {
+ pr_err("Cannot get pin %s for M.2 configuration\n", gpio_name);
+ return 0;
+ }
+
+ return dm_gpio_get_value(&gpio);
+}
+
+static void set_pinvalue(const char *gpio_name, const char *label, int value)
+{
+ struct gpio_desc gpio;
+
+ if (dm_gpio_lookup_name(gpio_name, &gpio) < 0 ||
+ dm_gpio_request(&gpio, label) < 0 ||
+ dm_gpio_set_dir_flags(&gpio, GPIOD_IS_OUT) < 0) {
+ pr_err("Cannot set pin %s for M.2 configuration\n", gpio_name);
+ return;
+ }
+ dm_gpio_set_value(&gpio, value);
+}
+
+static bool board_is_m2(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
- return info->magic == IOT2050_INFO_MAGIC &&
- strstr((char *)info->name, "IOT2050-ADVANCED") != NULL;
+ return IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG2) &&
+ info->magic == IOT2050_INFO_MAGIC &&
+ strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0;
}
-static bool board_is_sr1(void)
+static bool board_is_advanced(void)
{
struct iot2050_info *info = IOT2050_INFO_DATA;
return info->magic == IOT2050_INFO_MAGIC &&
- !strstr((char *)info->name, "-PG2");
+ strstr((char *)info->name, "IOT2050-ADVANCED") != NULL;
}
static void remove_mmc1_target(void)
@@ -109,12 +211,14 @@
}
if (board_is_advanced()) {
- if (board_is_sr1())
+ if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1))
fdtfile = "ti/k3-am6548-iot2050-advanced.dtb";
+ else if(board_is_m2())
+ fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb";
else
fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb";
} else {
- if (board_is_sr1())
+ if (IS_ENABLED(CONFIG_TARGET_IOT2050_A53_PG1))
fdtfile = "ti/k3-am6528-iot2050-basic.dtb";
else
fdtfile = "ti/k3-am6528-iot2050-basic-pg2.dtb";
@@ -126,6 +230,101 @@
env_save();
}
+static void m2_overlay_prepare(void)
+{
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+ const char *overlay_path;
+ void *overlay;
+ u64 loadaddr;
+ ofnode node;
+ int ret;
+
+ if (connector_mode == BKEY_PCIEX2)
+ return;
+
+ if (connector_mode == BKEY_PCIE_EKEY_PCIE)
+ overlay_path = "/fit-images/bkey-ekey-pcie-overlay";
+ else
+ overlay_path = "/fit-images/bkey-usb3-overlay";
+
+ node = ofnode_path(overlay_path);
+ if (!ofnode_valid(node))
+ goto fit_error;
+
+ ret = ofnode_read_u64(node, "load", &loadaddr);
+ if (ret)
+ goto fit_error;
+
+ ret = ofnode_read_u32(node, "size", &connector_overlay_size);
+ if (ret)
+ goto fit_error;
+
+ overlay = map_sysmem(loadaddr, connector_overlay_size);
+
+ connector_overlay = malloc(connector_overlay_size);
+ if (!connector_overlay)
+ goto fit_error;
+
+ memcpy(connector_overlay, overlay, connector_overlay_size);
+ return;
+
+fit_error:
+ pr_err("M.2 device tree overlay %s not available,\n", overlay_path);
+#endif
+}
+
+static void m2_connector_setup(void)
+{
+ ulong m2_manual_config = env_get_ulong("m2_manual_config", 10,
+ CONNECTOR_MODE_INVALID);
+ const char *mode_info = "";
+ struct m2_config_pins config_pins;
+ unsigned int n;
+
+ /* enable M.2 connector power */
+ set_pinvalue("gpio@601000_17", "P3V3_M2_EN", 1);
+ udelay(4 * 100);
+
+ if (m2_manual_config < CONNECTOR_MODE_INVALID) {
+ mode_info = " [manual mode]";
+ connector_mode = m2_manual_config;
+ } else { /* auto detection */
+ for (n = 0; n < ARRAY_SIZE(config_pins.config); n++)
+ config_pins.config[n] =
+ get_pinvalue(m2_bkey_cfg_pin_info[n].gpio_name,
+ m2_bkey_cfg_pin_info[n].label);
+ connector_mode = CONNECTOR_MODE_INVALID;
+ for (n = 0; n < ARRAY_SIZE(m2_config_table); n++) {
+ if (!memcmp(config_pins.config,
+ m2_config_table[n].config_pins.config,
+ sizeof(config_pins.config))) {
+ connector_mode = m2_config_table[n].mode;
+ break;
+ }
+ }
+ if (connector_mode == CONNECTOR_MODE_INVALID) {
+ mode_info = " [fallback, card unknown/unsupported]";
+ connector_mode = BKEY_USB30_EKEY_PCIE;
+ }
+ }
+
+ printf("M.2: %s%s\n", m2_connector_mode_name[connector_mode],
+ mode_info);
+
+ /* configure serdes mux */
+ set_pinvalue(serdes_mux_ctl_pin_info[0].gpio_name,
+ serdes_mux_ctl_pin_info[0].label,
+ serdes_mux_ctrl[connector_mode].ctrl_usb30_pcie0_lane0);
+ set_pinvalue(serdes_mux_ctl_pin_info[1].gpio_name,
+ serdes_mux_ctl_pin_info[1].label,
+ serdes_mux_ctrl[connector_mode].ctrl_pcie1_pcie0);
+ set_pinvalue(serdes_mux_ctl_pin_info[2].gpio_name,
+ serdes_mux_ctl_pin_info[2].label,
+ serdes_mux_ctrl[connector_mode].ctrl_usb30_pcie0_lane1);
+
+ m2_overlay_prepare();
+}
+
int board_init(void)
{
return 0;
@@ -162,6 +361,9 @@
struct iot2050_info *info = IOT2050_INFO_DATA;
char upper_name[32];
+ /* skip the prefix "k3-am65x8-" */
+ name += 10;
+
if (info->magic != IOT2050_INFO_MAGIC ||
strlen(name) >= sizeof(upper_name))
return -1;
@@ -188,7 +390,7 @@
memset(&gpio, 0, sizeof(gpio));
- if (dm_gpio_lookup_name("25", &gpio) < 0 ||
+ if (dm_gpio_lookup_name("gpio@42110000_25", &gpio) < 0 ||
dm_gpio_request(&gpio, "USER button") < 0 ||
dm_gpio_set_dir_flags(&gpio, GPIOD_IS_IN) < 0)
return false;
@@ -220,6 +422,9 @@
/* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */
writel(0x3, SERDES0_LANE_SELECT);
+ if (board_is_m2())
+ m2_connector_setup();
+
set_board_info_env();
/* remove the eMMC if requested via button */
@@ -231,6 +436,50 @@
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+static void m2_fdt_fixup(void *blob)
+{
+ void *overlay_copy = NULL;
+ void *fdt_copy = NULL;
+ u32 fdt_size;
+ int err;
+
+ if (!connector_overlay)
+ return;
+
+ /*
+ * We need to work with temporary copies here because fdt_overlay_apply
+ * is destructive to the overlay and also to the target blob, even if
+ * application fails.
+ */
+ fdt_size = fdt_totalsize(blob);
+ fdt_copy = malloc(fdt_size);
+ if (!fdt_copy)
+ goto fixup_error;
+
+ memcpy(fdt_copy, blob, fdt_size);
+
+ overlay_copy = malloc(connector_overlay_size);
+ if (!overlay_copy)
+ goto fixup_error;
+
+ memcpy(overlay_copy, connector_overlay, connector_overlay_size);
+
+ err = fdt_overlay_apply_verbose(fdt_copy, overlay_copy);
+ if (err)
+ goto fixup_error;
+
+ memcpy(blob, fdt_copy, fdt_size);
+
+cleanup:
+ free(fdt_copy);
+ free(overlay_copy);
+ return;
+
+fixup_error:
+ pr_err("Could not apply M.2 device tree overlay\n");
+ goto cleanup;
+}
+
int ft_board_setup(void *blob, struct bd_info *bd)
{
int ret;
@@ -242,6 +491,9 @@
if (ret)
pr_err("%s: fixing up msmc ram failed %d\n", __func__, ret);
+ if (board_is_m2())
+ m2_fdt_fixup(blob);
+
return ret;
}
#endif
diff --git a/board/siemens/iot2050/iot2050.env b/board/siemens/iot2050/iot2050.env
new file mode 100644
index 0000000..0295879
--- /dev/null
+++ b/board/siemens/iot2050/iot2050.env
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) Siemens AG, 2023
+ *
+ * Authors:
+ * Jan Kiszka <jan.kiszka@siemens.com>
+ */
+
+usb_pgood_delay=900
+
+watchdog_timeout_ms=CONFIG_WATCHDOG_TIMEOUT_MSECS
+start_watchdog=
+ if test ${watchdog_timeout_ms} -gt 0; then
+ wdt dev watchdog@40610000;
+ wdt start ${watchdog_timeout_ms};
+ echo Watchdog started, timeout ${watchdog_timeout_ms} ms;
+ fi
diff --git a/board/ti/am62ax/Kconfig b/board/ti/am62ax/Kconfig
index 2c18cd4..9b868e4 100644
--- a/board/ti/am62ax/Kconfig
+++ b/board/ti/am62ax/Kconfig
@@ -10,7 +10,6 @@
config TARGET_AM62A7_A53_EVM
bool "TI K3 based AM62A7 EVM running on A53"
select ARM64
- select SOC_K3_AM62A7
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
@@ -20,7 +19,6 @@
select CPU_V7R
select SYS_THUMB_BUILD
select K3_LOAD_SYSFW
- select SOC_K3_AM62A7
select RAM
select SPL_RAM
select K3_DDRSS
diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env
new file mode 100644
index 0000000..8c1c26e
--- /dev/null
+++ b/board/ti/am62ax/am62ax.env
@@ -0,0 +1,33 @@
+#include <environment/ti/ti_armv7_common.env>
+#include <environment/ti/mmc.env>
+
+default_device_tree=k3-am62a7-sk.dtb
+findfdt=
+ setenv name_fdt ${default_device_tree};
+ setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
+init_mmc=run args_all args_mmc
+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
+get_overlay_mmc=
+ fdt address ${fdtaddr};
+ fdt resize 0x100000;
+ for overlay in $name_overlays;
+ do;
+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
+ fdt apply ${dtboaddr};
+ done;
+get_kern_mmc=load mmc ${bootpart} ${loadaddr}
+ ${bootdir}/${name_kern}
+get_fit_mmc=load mmc ${bootpart} ${addr_fit}
+ ${bootdir}/${name_fit}
+partitions=name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
diff --git a/board/ti/am62x/Kconfig b/board/ti/am62x/Kconfig
index 87fed44..5e8dfa3 100644
--- a/board/ti/am62x/Kconfig
+++ b/board/ti/am62x/Kconfig
@@ -10,14 +10,12 @@
config TARGET_AM625_A53_EVM
bool "TI K3 based AM625 EVM running on A53"
select ARM64
- select SOC_K3_AM625
config TARGET_AM625_R5_EVM
bool "TI K3 based AM625 EVM running on R5"
select CPU_V7R
select SYS_THUMB_BUILD
select K3_LOAD_SYSFW
- select SOC_K3_AM625
select RAM
select SPL_RAM
select K3_DDRSS
diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env
index c9a3b3d..e4e64fa 100644
--- a/board/ti/am62x/am62x.env
+++ b/board/ti/am62x/am62x.env
@@ -1,75 +1,5 @@
-loadaddr=0x82000000
-kernel_addr_r=0x82000000
-fdtaddr=0x88000000
-dtboaddr=0x89000000
-fdt_addr_r=0x88000000
-fdtoverlay_addr_r=0x89000000
-rdaddr=0x88080000
-ramdisk_addr_r=0x88080000
-scriptaddr=0x80000000
-pxefile_addr_r=0x80100000
-bootm_size=0x10000000
-boot_fdt=try
-
-mmcrootfstype=ext4 rootwait
-finduuid=part uuid ${boot} ${bootpart} uuid
-args_mmc=run finduuid;setenv bootargs console=${console}
- ${optargs}
- root=PARTUUID=${uuid} rw
- rootfstype=${mmcrootfstype}
-loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
-bootscript=echo Running bootscript from mmc${mmcdev} ...;
- source ${loadaddr}
-bootenvfile=uEnv.txt
-importbootenv=echo Importing environment from mmc${mmcdev} ...;
- env import -t ${loadaddr} ${filesize}
-loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
-loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
-loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
-envboot=mmc dev ${mmcdev};
- if mmc rescan; then
- echo SD/MMC found on device ${mmcdev};
- if run loadbootscript; then
- run bootscript;
- else
- if run loadbootenv; then
- echo Loaded env from ${bootenvfile};
- run importbootenv;
- fi;
- if test -n $uenvcmd; then
- echo Running uenvcmd ...;
- run uenvcmd;
- fi;
- fi;
- fi;
-mmcloados=
- if test ${boot_fdt} = yes || test ${boot_fdt} = try; then
- if run loadfdt; then
- bootz ${loadaddr} - ${fdtaddr};
- else
- if test ${boot_fdt} = try; then
- bootz;
- else
- echo WARN: Cannot load the DT;
- fi;
- fi;
- else
- bootz;
- fi;
-mmcboot=mmc dev ${mmcdev};
- devnum=${mmcdev};
- devtype=mmc;
- if mmc rescan; then
- echo SD/MMC found on device ${mmcdev};
- if run loadimage; then
- run args_mmc;
- if test ${boot_fit} -eq 1; then
- run run_fit;
- else
- run mmcloados;
- fi;
- fi;
- fi;
+#include <environment/ti/ti_armv7_common.env>
+#include <environment/ti/mmc.env>
default_device_tree=k3-am625-sk.dtb
findfdt=
diff --git a/board/ti/am64x/Kconfig b/board/ti/am64x/Kconfig
index 8036947..afb54f8 100644
--- a/board/ti/am64x/Kconfig
+++ b/board/ti/am64x/Kconfig
@@ -9,7 +9,6 @@
config TARGET_AM642_A53_EVM
bool "TI K3 based AM642 EVM running on A53"
select ARM64
- select SOC_K3_AM642
imply BOARD
imply SPL_BOARD
imply TI_I2C_BOARD_DETECT
@@ -19,7 +18,6 @@
select CPU_V7R
select SYS_THUMB_BUILD
select K3_LOAD_SYSFW
- select SOC_K3_AM642
select RAM
select SPL_RAM
select K3_DDRSS
diff --git a/board/ti/am65x/Kconfig b/board/ti/am65x/Kconfig
index 4765b13..220dd02 100644
--- a/board/ti/am65x/Kconfig
+++ b/board/ti/am65x/Kconfig
@@ -10,7 +10,6 @@
config TARGET_AM654_A53_EVM
bool "TI K3 based AM654 EVM running on A53"
select ARM64
- select SOC_K3_AM654
select SYS_DISABLE_DCACHE_OPS
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
@@ -19,7 +18,6 @@
bool "TI K3 based AM654 EVM running on R5"
select CPU_V7R
select SYS_THUMB_BUILD
- select SOC_K3_AM654
select K3_LOAD_SYSFW
select K3_AM654_DDRSS
imply SYS_K3_SPL_ATF
diff --git a/board/ti/am65x/am65x.env b/board/ti/am65x/am65x.env
new file mode 100644
index 0000000..a048b47
--- /dev/null
+++ b/board/ti/am65x/am65x.env
@@ -0,0 +1,47 @@
+#include <environment/ti/ti_armv7_common.env>
+#include <environment/ti/mmc.env>
+#include <environment/ti/k3_dfu.env>
+#if CONFIG_CMD_REMOTEPROC
+#include <environment/ti/k3_rproc.env>
+#endif
+
+findfdt=
+ setenv name_fdt k3-am654-base-board.dtb;
+ setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x02800000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
+init_mmc=run args_all args_mmc
+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
+get_overlay_mmc=
+ fdt address ${fdtaddr};
+ fdt resize 0x100000;
+ for overlay in $name_overlays;
+ do;
+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
+ fdt apply ${dtboaddr};
+ done;
+get_kern_mmc=load mmc ${bootpart} ${loadaddr}
+ ${bootdir}/${name_kern}
+get_fit_mmc=load mmc ${bootpart} ${addr_fit}
+ ${bootdir}/${name_fit}
+partitions=name=root,start=0,size=-,uuid=${uuid_gpt_rootfs}
+
+init_ubi=
+ run args_all args_ubi;
+ sf probe;
+ ubi part ospi.rootfs;
+ ubifsmount ubi:rootfs;
+get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}
+get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}
+args_ubi=setenv bootargs console=${console} ${optargs}
+rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs
+
diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig
index 49edd98..f03357c 100644
--- a/board/ti/common/Kconfig
+++ b/board/ti/common/Kconfig
@@ -1,5 +1,6 @@
config TI_I2C_BOARD_DETECT
bool "Support for Board detection for TI platforms"
+ select K3_BOARD_DETECT if ARCH_K3
help
Support for detection board information on Texas Instrument's
Evaluation Boards which have I2C based EEPROM detection
diff --git a/board/ti/j721e/Kconfig b/board/ti/j721e/Kconfig
index d19d30d..84bca32 100644
--- a/board/ti/j721e/Kconfig
+++ b/board/ti/j721e/Kconfig
@@ -10,7 +10,6 @@
config TARGET_J721E_A72_EVM
bool "TI K3 based J721E EVM running on A72"
select ARM64
- select SOC_K3_J721E
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
@@ -19,7 +18,6 @@
bool "TI K3 based J721E EVM running on R5"
select CPU_V7R
select SYS_THUMB_BUILD
- select SOC_K3_J721E
select K3_LOAD_SYSFW
select RAM
select SPL_RAM
@@ -30,7 +28,6 @@
config TARGET_J7200_A72_EVM
bool "TI K3 based J7200 EVM running on A72"
select ARM64
- select SOC_K3_J721E
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
@@ -39,7 +36,6 @@
bool "TI K3 based J7200 EVM running on R5"
select CPU_V7R
select SYS_THUMB_BUILD
- select SOC_K3_J721E
select K3_LOAD_SYSFW
select RAM
select SPL_RAM
@@ -60,6 +56,9 @@
config SYS_CONFIG_NAME
default "j721e_evm"
+config ENV_SOURCE_FILE
+ default "j721e"
+
source "board/ti/common/Kconfig"
endif
@@ -75,6 +74,9 @@
config SYS_CONFIG_NAME
default "j721e_evm"
+config ENV_SOURCE_FILE
+ default "j721e"
+
source "board/ti/common/Kconfig"
endif
@@ -90,6 +92,9 @@
config SYS_CONFIG_NAME
default "j721e_evm"
+config ENV_SOURCE_FILE
+ default "j721e"
+
source "board/ti/common/Kconfig"
endif
@@ -105,6 +110,9 @@
config SYS_CONFIG_NAME
default "j721e_evm"
+config ENV_SOURCE_FILE
+ default "j721e"
+
source "board/ti/common/Kconfig"
endif
diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env
new file mode 100644
index 0000000..446395a
--- /dev/null
+++ b/board/ti/j721e/j721e.env
@@ -0,0 +1,82 @@
+#include <environment/ti/ti_armv7_common.env>
+#include <environment/ti/mmc.env>
+#include <environment/ti/ufs.env>
+#include <environment/ti/k3_dfu.env>
+
+#if CONFIG_CMD_REMOTEPROC
+#include <environment/ti/k3_rproc.env>
+#endif
+
+default_device_tree=k3-j721e-common-proc-board.dtb
+findfdt=
+ setenv name_fdt ${default_device_tree};
+ if test $board_name = j721e; then
+ setenv name_fdt k3-j721e-common-proc-board.dtb; fi;
+ if test $board_name = j721e-eaik || test $board_name = j721e-sk; then
+ setenv name_fdt k3-j721e-sk.dtb; fi;
+ setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+#if CONFIG_SYS_K3_SPL_ATF
+#if CONFIG_TARGET_J721E_R5_EVM
+addr_mcur5f0_0load=0x89000000
+name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
+#elif CONFIG_TARGET_J7200_R5_EVM
+addr_mcur5f0_0load=0x89000000
+name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw
+#endif
+#endif
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
+init_mmc=run args_all args_mmc
+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
+get_overlay_mmc=
+ fdt address ${fdtaddr};
+ fdt resize 0x100000;
+ for overlay in $name_overlays;
+ do;
+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
+ fdt apply ${dtboaddr};
+ done;
+partitions=uuid_disk=${uuid_gpt_disk};
+ name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
+get_kern_mmc=load mmc ${bootpart} ${loadaddr}
+ ${bootdir}/${name_kern}
+get_fit_mmc=load mmc ${bootpart} ${addr_fit}
+ ${bootdir}/${name_fit}
+
+#if CONFIG_TARGET_J7200_A72_EVM
+do_main_cpsw0_qsgmii_phyinit=1
+init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;
+ gpio clear gpio@22_16
+main_cpsw0_qsgmii_phyinit=
+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then
+ run init_main_cpsw0_qsgmii_phy;
+ fi;
+#elif CONFIG_TARGET_J721E_A72_EVM
+init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;
+ gpio clear gpio@22_16
+main_cpsw0_qsgmii_phyinit=
+ if test $board_name = J721EX-PM1-SOM || test $board_name = J721EX-PM2-SOM || test $board_name = j721e; then
+ do_main_cpsw0_qsgmii_phyinit=1; else
+ do_main_cpsw0_qsgmii_phyinit=0; fi;
+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then
+ run init_main_cpsw0_qsgmii_phy; \
+ fi;
+#endif
+
+#if CONFIG_TARGET_J721E_A72_EVM
+rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
+#endif
+
+#if CONFIG_TARGET_J7200_A72_EVM
+rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
+#endif
diff --git a/board/ti/j721s2/Kconfig b/board/ti/j721s2/Kconfig
index 6141798..a24641f 100644
--- a/board/ti/j721s2/Kconfig
+++ b/board/ti/j721s2/Kconfig
@@ -10,7 +10,6 @@
config TARGET_J721S2_A72_EVM
bool "TI K3 based J721S2 EVM running on A72"
select ARM64
- select SOC_K3_J721S2
select BOARD_LATE_INIT
imply TI_I2C_BOARD_DETECT
select SYS_DISABLE_DCACHE_OPS
@@ -19,7 +18,6 @@
bool "TI K3 based J721S2 EVM running on R5"
select CPU_V7R
select SYS_THUMB_BUILD
- select SOC_K3_J721S2
select K3_LOAD_SYSFW
select RAM
select SPL_RAM
@@ -40,6 +38,9 @@
config SYS_CONFIG_NAME
default "j721s2_evm"
+config ENV_SOURCE_FILE
+ default "j721s2"
+
source "board/ti/common/Kconfig"
endif
@@ -55,6 +56,9 @@
config SYS_CONFIG_NAME
default "j721s2_evm"
+config ENV_SOURCE_FILE
+ default "j721s2"
+
source "board/ti/common/Kconfig"
endif
diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env
new file mode 100644
index 0000000..2152f88
--- /dev/null
+++ b/board/ti/j721s2/j721s2.env
@@ -0,0 +1,56 @@
+#include <environment/ti/ti_armv7_common.env>
+#include <environment/ti/mmc.env>
+#include <environment/ti/ufs.env>
+#include <environment/ti/k3_dfu.env>
+
+#if CONFIG_CMD_REMOTEPROC
+#include <environment/ti/k3_rproc.env>
+#endif
+
+default_device_tree=k3-j721s2-common-proc-board.dtb
+findfdt=
+ setenv name_fdt ${default_device_tree};
+ if test $board_name = j721s2; then \
+ setenv name_fdt k3-j721s2-common-proc-board.dtb; fi;
+ if test $board_name = am68-sk; then
+ setenv name_fdt k3-am68-sk-base-board.dtb; fi;
+ setenv fdtfile ${name_fdt}
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+#if CONFIG_SYS_K3_SPL_ATF
+#if CONFIG_TARGET_J721S2_R5_EVM
+addr_mcur5f0_0load=0x89000000
+name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
+#endif
+#endif
+rd_spec=-
+init_mmc=run args_all args_mmc
+get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}
+get_overlay_mmc=
+ fdt address ${fdtaddr};
+ fdt resize 0x100000;
+ for overlay in $name_overlays;
+ do;
+ load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
+ fdt apply ${dtboaddr};
+ done;
+partitions=uuid_disk=${uuid_gpt_disk};
+ name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
+get_kern_mmc=load mmc ${bootpart} ${loadaddr}
+ ${bootdir}/${name_kern}
+get_fit_mmc=load mmc ${bootpart} ${addr_fit}
+ ${bootdir}/${name_fit}
+partitions=uuid_disk=${uuid_gpt_disk};
+ name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}
+
+rproc_fw_binaries= 2 /lib/firmware/j721s2-main-r5f0_0-fw 3 /lib/firmware/j721s2-main-r5f0_1-fw 4 /lib/firmware/j721s2-main-r5f1_0-fw 5 /lib/firmware/j721s2-main-r5f1_1-fw 6 /lib/firmware/j721s2-c71_0-fw 7 /lib/firmware/j721s2-c71_1-fw
+
+
diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig
index 8b48f5e..46a95a6 100644
--- a/configs/am62ax_evm_a53_defconfig
+++ b/configs/am62ax_evm_a53_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig
index fac48fb..e5bee14 100644
--- a/configs/am62ax_evm_r5_defconfig
+++ b/configs/am62ax_evm_r5_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_K3=y
+CONFIG_TI_SECURE_DEVICE=y
CONFIG_SYS_MALLOC_F_LEN=0x9000
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
@@ -52,6 +53,7 @@
CONFIG_SPL_RAM_DEVICE=y
CONFIG_SPL_REMOTEPROC=y
CONFIG_SPL_THERMAL=y
+CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig
index b4ecf73..7555609 100644
--- a/configs/apple_m1_defconfig
+++ b/configs/apple_m1_defconfig
@@ -21,3 +21,4 @@
CONFIG_NO_FB_CLEAR=y
CONFIG_VIDEO_SIMPLE=y
# CONFIG_GENERATE_SMBIOS_TABLE is not set
+CONFIG_LMB_MAX_REGIONS=64
diff --git a/configs/iot2050_defconfig b/configs/iot2050_pg1_defconfig
similarity index 92%
rename from configs/iot2050_defconfig
rename to configs/iot2050_pg1_defconfig
index 57387ed..b027696 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_pg1_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SOC_K3_AM654=y
-CONFIG_TARGET_IOT2050_A53=y
+CONFIG_TARGET_IOT2050_A53_PG1=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000
CONFIG_ENV_SIZE=0x20000
@@ -32,6 +32,7 @@
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_SPL_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0x58000
@@ -52,7 +53,7 @@
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x380000
CONFIG_SYS_MAXARGS=64
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_ASKENV=y
@@ -69,6 +70,7 @@
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIST="k3-am6528-iot2050-basic k3-am6548-iot2050-advanced"
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
@@ -139,7 +141,9 @@
CONFIG_USB_KEYBOARD=y
# CONFIG_WATCHDOG is not set
# CONFIG_WATCHDOG_AUTOSTART is not set
+CONFIG_WATCHDOG_TIMEOUT_MSECS=0
CONFIG_WDT=y
CONFIG_WDT_K3_RTI=y
CONFIG_WDT_K3_RTI_LOAD_FW=y
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y
diff --git a/configs/iot2050_defconfig b/configs/iot2050_pg2_defconfig
similarity index 90%
copy from configs/iot2050_defconfig
copy to configs/iot2050_pg2_defconfig
index 57387ed..b206677 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_pg2_defconfig
@@ -8,7 +8,7 @@
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SOC_K3_AM654=y
-CONFIG_TARGET_IOT2050_A53=y
+CONFIG_TARGET_IOT2050_A53_PG2=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000
CONFIG_ENV_SIZE=0x20000
@@ -16,22 +16,22 @@
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
-CONFIG_DEFAULT_DEVICE_TREE="k3-am6528-iot2050-basic"
+CONFIG_DEFAULT_DEVICE_TREE="k3-am6528-iot2050-basic-pg2"
CONFIG_SPL_TEXT_BASE=0x80080000
CONFIG_SYS_PROMPT="IOT2050> "
-CONFIG_DM_RESET=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x82000000
CONFIG_ENV_OFFSET_REDUND=0x6a0000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
+CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_OF_BOARD_SETUP=y
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_SPL_SHOW_BOOT_PROGRESS=y
+CONFIG_BOOTCOMMAND="run start_watchdog; run distro_bootcmd"
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_MAX_SIZE=0x58000
@@ -52,7 +52,7 @@
# CONFIG_SPL_SPI_FLASH_TINY is not set
CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x380000
CONFIG_SYS_MAXARGS=64
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_ASKENV=y
@@ -69,6 +69,7 @@
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIST="k3-am6528-iot2050-basic-pg2 k3-am6548-iot2050-advanced-pg2 k3-am6548-iot2050-advanced-m2"
CONFIG_SPL_MULTI_DTB_FIT=y
CONFIG_SPL_OF_LIST="k3-am65-iot2050-spl"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
@@ -120,6 +121,7 @@
CONFIG_POWER_DOMAIN=y
CONFIG_TI_SCI_POWER_DOMAIN=y
CONFIG_REMOTEPROC_TI_K3_R5F=y
+CONFIG_DM_RESET=y
CONFIG_RESET_TI_SCI=y
CONFIG_DM_SERIAL=y
CONFIG_SOC_DEVICE=y
@@ -139,7 +141,9 @@
CONFIG_USB_KEYBOARD=y
# CONFIG_WATCHDOG is not set
# CONFIG_WATCHDOG_AUTOSTART is not set
+CONFIG_WATCHDOG_TIMEOUT_MSECS=0
CONFIG_WDT=y
CONFIG_WDT_K3_RTI=y
CONFIG_WDT_K3_RTI_LOAD_FW=y
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_SCROLL_ON_CLEAR_SCREEN=y
diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst
index 7e97f81..074d6aa 100644
--- a/doc/board/siemens/iot2050.rst
+++ b/doc/board/siemens/iot2050.rst
@@ -6,7 +6,9 @@
The SIMATIC IOT2050 is an open industrial IoT gateway that is using the TI
AM6528 GP (Basic variant) or the AM6548 HS (Advanced variant). The Advanced
-variant is prepared for secure boot.
+variant is prepared for secure boot. M.2 Variant also uses the AM6548 HS.
+Instead of a MiniPCI connector, it comes with two M.2 connectors and can
+support 5G/WIFI/BT applications or connect an SSD.
The IOT2050 starts only from OSPI. It loads a Siemens-provided bootloader
called SE-Boot for the MCU domain (R5F cores), then hands over to ATF and
@@ -24,11 +26,20 @@
https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild.
The following binaries from that source need to be present in the build folder:
- - tiboot3.bin
- - sysfw.itb
- - sysfw.itb_HS
- - sysfw_sr2.itb
- - sysfw_sr2.itb_HS
+ - seboot_pg1.bin
+ - seboot_pg2.bin
+
+When using the watchdog, a related firmware for the R5 core(s) is needed, e.g.
+https://github.com/siemens/k3-rti-wdt. The name and location of the image is
+configured via CONFIG_WDT_K3_RTI_FW_FILE.
+
+For building an image containing the OTP key provisioning data, below binary
+needs to be present in the build folder:
+
+ - otpcmd.bin
+
+Regarding how to generating this otpcmd.bin, please refer to:
+https://github.com/siemens/meta-iot2050/tree/master/recipes-bsp/secure-boot-otp-provisioning/files/make-otpcmd.sh
Building
--------
@@ -57,7 +68,13 @@
$ export ATF=/path/to/bl31.bin
$ export TEE=/path/to/tee-pager_v2.bin
- $ make iot2050_defconfig
+
+ # configure for PG1
+ $ make iot2050_pg1_defconfig
+
+ # or configure for PG2 or the M.2 variant
+ $ make iot2050_pg2_defconfig
+
$ make
Flashing
@@ -76,3 +93,73 @@
.. code-block:: text
$ dpcmd --vcc 2 -v -u flash.bin
+
+Signing (optional)
+------------------
+
+To enable verified boot for the firmware artifacts after the Siemens-managed
+first-stage loader (seboot_pg*.bin), the following steps need to be taken
+before and after the build:
+
+Generate dtsi holding the public key
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. code-block:: text
+
+ tools/key2dtsi.py -c -s key.pem public-key.dtsi
+
+This will be used to embed the public key into U-Boot SPL and main so that each
+step can validate signatures of the succeeding one.
+
+Adjust U-Boot configuration
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+Enabled at least the following options in U-Boot:
+
+.. code-block:: text
+
+ CONFIG_SPL_FIT_SIGNATURE=y
+ CONFIG_DEVICE_TREE_INCLUDES="/path/to/public-key.dtsi"
+ CONFIG_RSA=y
+
+Note that there are more configuration changes needed in order to lock-down
+the command line and the boot process of U-Boot for secure scenarios. These are
+not in scope here.
+
+Build U-Boot
+^^^^^^^^^^^^
+
+See related section above.
+
+Sign flash.bin
+^^^^^^^^^^^^^^
+
+In the build folder still containing artifacts from step 3, invoke:
+
+.. code-block:: text
+
+ tools/iot2050-sign-fw.sh /path/to/key.pem
+
+Flash signed flash.bin
+^^^^^^^^^^^^^^^^^^^^^^
+
+The signing has happen in-place in flash.bin, thus the flashing procedure
+described above.
+
+M.2 slot configuration
+----------------------
+
+The M.2 variant of the IOT2050 comes with one B-keyed and one E-keyed slot.
+These are configured by U-Boot depending on the detected usage (auto
+configuration). The device tree loaded later on for the OS will be fixed up
+by U-Boot according to this configuration.
+
+For the case auto configuration does not work reliably, it is possible to set
+the U-Boot environment variable "m2_manual_config" to select the mode manually:
+
+"0" - B-key: PCIe x2, USB 2.0
+ E-key: USB 2.0
+"1" - B-key: PCIe, USB 2.0
+ E-key: PCIe, USB 2.0
+"2" - B-key: USB 3.0,
+ E-key: PCIe, USB 2.0
diff --git a/drivers/pci/pcie_apple.c b/drivers/pci/pcie_apple.c
index 9b08e1e..b934fdb 100644
--- a/drivers/pci/pcie_apple.c
+++ b/drivers/pci/pcie_apple.c
@@ -315,6 +315,8 @@
for (of_port = ofnode_first_subnode(dev_ofnode(dev));
ofnode_valid(of_port);
of_port = ofnode_next_subnode(of_port)) {
+ if (!ofnode_is_enabled(of_port))
+ continue;
ret = apple_pcie_setup_port(pcie, of_port);
if (ret) {
dev_err(pcie->dev, "Port %d setup fail: %d\n", i, ret);
diff --git a/drivers/phy/ti/phy-j721e-wiz.c b/drivers/phy/ti/phy-j721e-wiz.c
index 6646b15..2339717 100644
--- a/drivers/phy/ti/phy-j721e-wiz.c
+++ b/drivers/phy/ti/phy-j721e-wiz.c
@@ -39,6 +39,7 @@
#define WIZ_DIV_NUM_CLOCKS_10G 1
#define WIZ_SERDES_TYPEC_LN10_SWAP BIT(30)
+#define WIZ_SERDES_TYPEC_LN23_SWAP BIT(31)
enum wiz_lane_standard_mode {
LANE_MODE_GEN1,
@@ -65,6 +66,14 @@
WIZ_EXT_REFCLK1,
};
+/*
+ * List of master lanes used for lane swapping
+ */
+enum wiz_typec_master_lane {
+ LANE0 = 0,
+ LANE2 = 2,
+};
+
static const struct reg_field por_en = REG_FIELD(WIZ_SERDES_CTRL, 31, 31);
static const struct reg_field phy_reset_n = REG_FIELD(WIZ_SERDES_RST, 31, 31);
static const struct reg_field pll1_refclk_mux_sel =
@@ -329,6 +338,7 @@
u32 num_lanes;
struct gpio_desc *gpio_typec_dir;
u32 lane_phy_type[WIZ_MAX_LANES];
+ u32 master_lane_num[WIZ_MAX_LANES];
struct clk *input_clks[WIZ_MAX_INPUT_CLOCKS];
unsigned int id;
const struct wiz_data *data;
@@ -586,14 +596,42 @@
return ret;
/* if typec-dir gpio was specified, set LN10 SWAP bit based on that */
- if (id == 0 && wiz->gpio_typec_dir) {
- if (dm_gpio_get_value(wiz->gpio_typec_dir)) {
- regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
- WIZ_SERDES_TYPEC_LN10_SWAP,
- WIZ_SERDES_TYPEC_LN10_SWAP);
- } else {
- regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
- WIZ_SERDES_TYPEC_LN10_SWAP, 0);
+ if (id == 0) {
+ if (wiz->gpio_typec_dir) {
+ if (dm_gpio_get_value(wiz->gpio_typec_dir)) {
+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
+ WIZ_SERDES_TYPEC_LN10_SWAP,
+ WIZ_SERDES_TYPEC_LN10_SWAP);
+ } else {
+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
+ WIZ_SERDES_TYPEC_LN10_SWAP, 0);
+ }
+ }
+ } else {
+ /* if no typec-dir gpio was specified and PHY type is
+ * USB3 with master lane number is '0', set LN10 SWAP
+ * bit to '1'
+ */
+ u32 num_lanes = wiz->num_lanes;
+ int i;
+
+ for (i = 0; i < num_lanes; i++) {
+ if (wiz->lane_phy_type[i] == PHY_TYPE_USB3) {
+ switch (wiz->master_lane_num[i]) {
+ case LANE0:
+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
+ WIZ_SERDES_TYPEC_LN10_SWAP,
+ WIZ_SERDES_TYPEC_LN10_SWAP);
+ break;
+ case LANE2:
+ regmap_update_bits(wiz->regmap, WIZ_SERDES_TYPEC,
+ WIZ_SERDES_TYPEC_LN23_SWAP,
+ WIZ_SERDES_TYPEC_LN23_SWAP);
+ break;
+ default:
+ break;
+ }
+ }
}
}
@@ -1100,8 +1138,10 @@
dev_dbg(dev, "%s: Lanes %u-%u have phy-type %u\n", __func__,
reg, reg + num_lanes - 1, phy_type);
- for (i = reg; i < reg + num_lanes; i++)
+ for (i = reg; i < reg + num_lanes; i++) {
wiz->lane_phy_type[i] = phy_type;
+ wiz->master_lane_num[i] = reg;
+ }
}
return 0;
diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h
index a18b157..d8ef250 100644
--- a/include/configs/am62ax_evm.h
+++ b/include/configs/am62ax_evm.h
@@ -85,9 +85,6 @@
/* Incorporate settings into the U-Boot environment */
#define CFG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- DEFAULT_FIT_TI_ARGS \
- EXTRA_ENV_AM62A7_BOARD_SETTINGS \
BOOTENV
/* Now for the remaining common defines */
diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h
index 33dd6cf..c549573 100644
--- a/include/configs/am65x_evm.h
+++ b/include/configs/am65x_evm.h
@@ -17,66 +17,6 @@
/* DDR Configuration */
#define CFG_SYS_SDRAM_BASE1 0x880000000
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
-
-/* U-Boot general configuration */
-#define EXTRA_ENV_AM65X_BOARD_SETTINGS \
- "findfdt=" \
- "setenv name_fdt k3-am654-base-board.dtb;" \
- "setenv fdtfile ${name_fdt}\0" \
- "name_kern=Image\0" \
- "console=ttyS2,115200n8\0" \
- "stdin=serial,usbkbd\0" \
- "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \
- "${mtdparts}\0" \
- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
-
-/* U-Boot MMC-specific configuration */
-#define EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \
- "boot=mmc\0" \
- "mmcdev=1\0" \
- "bootpart=1:2\0" \
- "bootdir=/boot\0" \
- "rd_spec=-\0" \
- "init_mmc=run args_all args_mmc\0" \
- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
- "get_overlay_mmc=" \
- "fdt address ${fdtaddr};" \
- "fdt resize 0x100000;" \
- "for overlay in $name_overlays;" \
- "do;" \
- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay};" \
- "fdt apply ${dtboaddr};" \
- "done;\0" \
- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
- "${bootdir}/${name_kern}\0" \
- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
- "${bootdir}/${name_fit}\0" \
- "partitions=" PARTS_DEFAULT
-
-#ifdef DEFAULT_RPROCS
-#undef DEFAULT_RPROCS
-#endif
-#define DEFAULT_RPROCS "" \
- "0 /lib/firmware/am65x-mcu-r5f0_0-fw " \
- "1 /lib/firmware/am65x-mcu-r5f0_1-fw "
-
-#define EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \
- "init_ubi=run args_all args_ubi; sf probe; " \
- "ubi part ospi.rootfs; ubifsmount ubi:rootfs;\0" \
- "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \
- "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \
- "args_ubi=setenv bootargs console=${console} ${optargs} " \
- "rootfstype=ubifs root=ubi0:rootfs rw ubi.mtd=ospi.rootfs\0"
-
-#define EXTRA_ENV_DFUARGS \
- DFU_ALT_INFO_MMC \
- DFU_ALT_INFO_RAM \
- DFU_ALT_INFO_EMMC \
- DFU_ALT_INFO_OSPI
-
#ifdef CONFIG_TARGET_AM654_A53_EVM
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
@@ -89,14 +29,6 @@
/* Incorporate settings into the U-Boot environment */
#define CFG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- DEFAULT_MMC_TI_ARGS \
- DEFAULT_FIT_TI_ARGS \
- EXTRA_ENV_AM65X_BOARD_SETTINGS \
- EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \
- EXTRA_ENV_AM65X_BOARD_SETTINGS_UBI \
- EXTRA_ENV_RPROC_SETTINGS \
- EXTRA_ENV_DFUARGS \
BOOTENV
/* Now for the remaining common defines */
diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h
index cfff46c..82174b8 100644
--- a/include/configs/iot2050.h
+++ b/include/configs/iot2050.h
@@ -13,12 +13,6 @@
#include <linux/sizes.h>
-/* SPL Loader Configuration */
-
-/* U-Boot general configuration */
-#define EXTRA_ENV_IOT2050_BOARD_SETTINGS \
- "usb_pgood_delay=900\0"
-
#if IS_ENABLED(CONFIG_CMD_USB)
# define BOOT_TARGET_USB(func) \
func(USB, usb, 0) \
@@ -40,11 +34,18 @@
#include <config_distro_bootcmd.h>
-#define CFG_EXTRA_ENV_SETTINGS \
+#define CFG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
- BOOTENV \
- EXTRA_ENV_IOT2050_BOARD_SETTINGS
+ BOOTENV
#include <configs/ti_armv7_common.h>
+#ifdef CONFIG_ENV_WRITEABLE_LIST
+#define CFG_ENV_FLAGS_LIST_STATIC \
+ "board_uuid:sw,board_name:sw,board_serial:sw,board_a5e:sw," \
+ "mlfb:sw,fw_version:sw,seboot_version:sw," \
+ "m2_manuel_config:sw," \
+ "eth1addr:mw,eth2addr:mw,watchdog_timeout_ms:dw,boot_targets:sw"
+#endif
+
#endif /* __CONFIG_IOT2050_H */
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index 48b1cea..de92cd4 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -10,10 +10,6 @@
#define __CONFIG_J721E_EVM_H
#include <linux/sizes.h>
-#include <environment/ti/mmc.h>
-#include <environment/ti/k3_rproc.h>
-#include <environment/ti/ufs.h>
-#include <environment/ti/k3_dfu.h>
/* DDR Configuration */
#define CFG_SYS_SDRAM_BASE1 0x880000000
@@ -28,127 +24,6 @@
#define CFG_SYS_UBOOT_BASE 0x50080000
#endif
-/* HyperFlash related configuration */
-
-/* U-Boot general configuration */
-#define EXTRA_ENV_J721E_BOARD_SETTINGS \
- "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
- "findfdt=" \
- "setenv name_fdt ${default_device_tree};" \
- "if test $board_name = j721e; then " \
- "setenv name_fdt k3-j721e-common-proc-board.dtb; fi;" \
- "if test $board_name = j721e-eaik || test $board_name = j721e-sk; then " \
- "setenv name_fdt k3-j721e-sk.dtb; fi;" \
- "setenv fdtfile ${name_fdt}\0" \
- "name_kern=Image\0" \
- "console=ttyS2,115200n8\0" \
- "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \
- "${mtdparts}\0" \
- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
-
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
-
-#ifdef CONFIG_SYS_K3_SPL_ATF
-#if defined(CONFIG_TARGET_J721E_R5_EVM)
-#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "addr_mcur5f0_0load=0x89000000\0" \
- "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
-#elif defined(CONFIG_TARGET_J7200_R5_EVM)
-#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "addr_mcur5f0_0load=0x89000000\0" \
- "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
-#endif /* CONFIG_TARGET_J721E_R5_EVM */
-#else
-#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
-#endif /* CONFIG_SYS_K3_SPL_ATF */
-
-/* U-Boot MMC-specific configuration */
-#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
- "boot=mmc\0" \
- "mmcdev=1\0" \
- "bootpart=1:2\0" \
- "bootdir=/boot\0" \
- EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "rd_spec=-\0" \
- "init_mmc=run args_all args_mmc\0" \
- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
- "get_overlay_mmc=" \
- "fdt address ${fdtaddr};" \
- "fdt resize 0x100000;" \
- "for overlay in $name_overlays;" \
- "do;" \
- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
- "fdt apply ${dtboaddr};" \
- "done;\0" \
- "partitions=" PARTS_DEFAULT \
- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
- "${bootdir}/${name_kern}\0" \
- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
- "${bootdir}/${name_fit}\0" \
- "partitions=" PARTS_DEFAULT
-
-/* Set the default list of remote processors to boot */
-#if defined(CONFIG_TARGET_J7200_A72_EVM)
-#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
- "do_main_cpsw0_qsgmii_phyinit=1\0" \
- "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
- "gpio clear gpio@22_16\0" \
- "main_cpsw0_qsgmii_phyinit=" \
- "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
- "test ${boot} = mmc; then " \
- "run init_main_cpsw0_qsgmii_phy;" \
- "fi;\0"
-#ifdef DEFAULT_RPROCS
-#undef DEFAULT_RPROCS
-#endif
-#elif defined(CONFIG_TARGET_J721E_A72_EVM)
-#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
- "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
- "gpio clear gpio@22_16\0" \
- "main_cpsw0_qsgmii_phyinit=" \
- "if test $board_name = J721EX-PM1-SOM || test $board_name = J721EX-PM2-SOM " \
- "|| test $board_name = j721e; then " \
- "do_main_cpsw0_qsgmii_phyinit=1; else " \
- "do_main_cpsw0_qsgmii_phyinit=0; fi;" \
- "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
- "test ${boot} = mmc; then " \
- "run init_main_cpsw0_qsgmii_phy;" \
- "fi;\0"
-#ifdef DEFAULT_RPROCS
-#undef DEFAULT_RPROCS
-#endif
-#endif
-
-#ifdef CONFIG_TARGET_J721E_A72_EVM
-#define DEFAULT_RPROCS "" \
- "2 /lib/firmware/j7-main-r5f0_0-fw " \
- "3 /lib/firmware/j7-main-r5f0_1-fw " \
- "4 /lib/firmware/j7-main-r5f1_0-fw " \
- "5 /lib/firmware/j7-main-r5f1_1-fw " \
- "6 /lib/firmware/j7-c66_0-fw " \
- "7 /lib/firmware/j7-c66_1-fw " \
- "8 /lib/firmware/j7-c71_0-fw "
-#endif /* CONFIG_TARGET_J721E_A72_EVM */
-
-#ifdef CONFIG_TARGET_J7200_A72_EVM
-#define DEFAULT_RPROCS "" \
- "2 /lib/firmware/j7200-main-r5f0_0-fw " \
- "3 /lib/firmware/j7200-main-r5f0_1-fw "
-#endif /* CONFIG_TARGET_J7200_A72_EVM */
-
-#ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
-#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
-#endif
-
-#define EXTRA_ENV_DFUARGS \
- DFU_ALT_INFO_MMC \
- DFU_ALT_INFO_EMMC \
- DFU_ALT_INFO_RAM \
- DFU_ALT_INFO_OSPI
-
#if CONFIG_IS_ENABLED(CMD_PXE)
# define BOOT_TARGET_PXE(func) func(PXE, pxe, na)
#else
@@ -178,15 +53,6 @@
/* Incorporate settings into the U-Boot environment */
#define CFG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- DEFAULT_MMC_TI_ARGS \
- DEFAULT_FIT_TI_ARGS \
- EXTRA_ENV_J721E_BOARD_SETTINGS \
- EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
- EXTRA_ENV_RPROC_SETTINGS \
- EXTRA_ENV_DFUARGS \
- DEFAULT_UFS_TI_ARGS \
- EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
BOOTENV
/* Now for the remaining common defines */
diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h
index bfada9e..2fa93b7 100644
--- a/include/configs/j721s2_evm.h
+++ b/include/configs/j721s2_evm.h
@@ -11,10 +11,6 @@
#include <linux/sizes.h>
#include <config_distro_bootcmd.h>
-#include <environment/ti/mmc.h>
-#include <environment/ti/k3_rproc.h>
-#include <environment/ti/ufs.h>
-#include <environment/ti/k3_dfu.h>
/* DDR Configuration */
#define CFG_SYS_SDRAM_BASE1 0x880000000
@@ -27,120 +23,8 @@
#define CFG_SYS_UBOOT_BASE 0x50080000
#endif
-/* U-Boot general configuration */
-#define EXTRA_ENV_J721S2_BOARD_SETTINGS \
- "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
- "findfdt=" \
- "setenv name_fdt ${default_device_tree};" \
- "if test $board_name = j721s2; then " \
- "setenv name_fdt k3-j721s2-common-proc-board.dtb; fi;" \
- "if test $board_name = am68-sk; then " \
- "setenv name_fdt k3-am68-sk-base-board.dtb; fi;"\
- "setenv fdtfile ${name_fdt}\0" \
- "name_kern=Image\0" \
- "console=ttyS2,115200n8\0" \
- "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02880000 " \
- "${mtdparts}\0" \
- "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
-
-#define PARTS_DEFAULT \
- /* Linux partitions */ \
- "uuid_disk=${uuid_gpt_disk};" \
- "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
-
-#ifdef CONFIG_SYS_K3_SPL_ATF
-#if defined(CONFIG_TARGET_J721S2_R5_EVM)
-#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "addr_mcur5f0_0load=0x89000000\0" \
- "name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw\0"
-#elif defined(CONFIG_TARGET_J7200_R5_EVM)
-#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "addr_mcur5f0_0load=0x89000000\0" \
- "name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw\0"
-#endif /* CONFIG_TARGET_J721S2_R5_EVM */
-#else
-#define EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC ""
-#endif /* CONFIG_SYS_K3_SPL_ATF */
-
-/* U-Boot MMC-specific configuration */
-#define EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
- "boot=mmc\0" \
- "mmcdev=1\0" \
- "bootpart=1:2\0" \
- "bootdir=/boot\0" \
- EXTRA_ENV_R5_SPL_RPROC_FW_ARGS_MMC \
- "rd_spec=-\0" \
- "init_mmc=run args_all args_mmc\0" \
- "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
- "get_overlay_mmc=" \
- "fdt address ${fdtaddr};" \
- "fdt resize 0x100000;" \
- "for overlay in $name_overlays;" \
- "do;" \
- "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \
- "fdt apply ${dtboaddr};" \
- "done;\0" \
- "partitions=" PARTS_DEFAULT \
- "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
- "${bootdir}/${name_kern}\0" \
- "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
- "${bootdir}/${name_fit}\0" \
- "partitions=" PARTS_DEFAULT
-
-/* Set the default list of remote processors to boot */
-#if defined(CONFIG_TARGET_J721S2_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
-#ifdef DEFAULT_RPROCS
-#undef DEFAULT_RPROCS
-#endif
-#endif
-
-#ifdef CONFIG_TARGET_J721S2_A72_EVM
-#define DEFAULT_RPROCS "" \
- "2 /lib/firmware/j721s2-main-r5f0_0-fw " \
- "3 /lib/firmware/j721s2-main-r5f0_1-fw " \
- "4 /lib/firmware/j721s2-main-r5f1_0-fw " \
- "5 /lib/firmware/j721s2-main-r5f1_1-fw " \
- "6 /lib/firmware/j721s2-c71_0-fw " \
- "7 /lib/firmware/j721s2-c71_1-fw "
-#endif /* CONFIG_TARGET_J721S2_A72_EVM */
-
-#ifdef CONFIG_TARGET_J7200_A72_EVM
-#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \
- "do_main_cpsw0_qsgmii_phyinit=1\0" \
- "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \
- "gpio clear gpio@22_16\0" \
- "main_cpsw0_qsgmii_phyinit=" \
- "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \
- "test ${boot} = mmc; then " \
- "run init_main_cpsw0_qsgmii_phy;" \
- "fi;\0"
-#define DEFAULT_RPROCS "" \
- "2 /lib/firmware/j7200-main-r5f0_0-fw " \
- "3 /lib/firmware/j7200-main-r5f0_1-fw "
-#endif /* CONFIG_TARGET_J7200_A72_EVM */
-
-#ifndef EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
-#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
-#endif
-
-/* set default dfu_bufsiz to 128KB (sector size of OSPI) */
-#define EXTRA_ENV_DFUARGS \
- DFU_ALT_INFO_MMC \
- DFU_ALT_INFO_EMMC \
- DFU_ALT_INFO_RAM \
- DFU_ALT_INFO_OSPI
-
/* Incorporate settings into the U-Boot environment */
-#define CFG_EXTRA_ENV_SETTINGS \
- DEFAULT_LINUX_BOOT_ENV \
- DEFAULT_MMC_TI_ARGS \
- DEFAULT_FIT_TI_ARGS \
- EXTRA_ENV_J721S2_BOARD_SETTINGS \
- EXTRA_ENV_J721S2_BOARD_SETTINGS_MMC \
- EXTRA_ENV_RPROC_SETTINGS \
- EXTRA_ENV_DFUARGS \
- DEFAULT_UFS_TI_ARGS \
- EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY
+#define CFG_EXTRA_ENV_SETTINGS
/* Now for the remaining common defines */
#include <configs/ti_armv7_common.h>
diff --git a/include/environment/ti/k3_dfu.env b/include/environment/ti/k3_dfu.env
new file mode 100644
index 0000000..2015296
--- /dev/null
+++ b/include/environment/ti/k3_dfu.env
@@ -0,0 +1,30 @@
+dfu_alt_info_mmc=
+ boot part 1 1;
+ rootfs part 1 2;
+ tiboot3.bin fat 1 1;
+ tispl.bin fat 1 1;
+ u-boot.img fat 1 1;
+ uEnv.txt fat 1 1;
+ sysfw.itb fat 1 1
+
+dfu_alt_info_emmc=
+ rawemmc raw 0 0x800000 mmcpart 1;
+ rootfs part 0 1 mmcpart 0;
+ tiboot3.bin.raw raw 0x0 0x400 mmcpart 1;
+ tispl.bin.raw raw 0x400 0x1000 mmcpart 1;
+ u-boot.img.raw raw 0x1400 0x2000 mmcpart 1;
+ u-env.raw raw 0x3400 0x100 mmcpart 1;
+ sysfw.itb.raw raw 0x3600 0x800 mmcpart 1
+
+dfu_alt_info_ospi=
+ tiboot3.bin raw 0x0 0x080000;
+ tispl.bin raw 0x080000 0x200000;
+ u-boot.img raw 0x280000 0x400000;
+ u-boot-env raw 0x680000 0x020000;
+ sysfw.itb raw 0x6c0000 0x100000;
+ rootfs raw 0x800000 0x3800000
+
+dfu_alt_info_ram=
+ tispl.bin ram 0x80080000 0x200000;
+ u-boot.img ram 0x81000000 0x400000
+
diff --git a/include/environment/ti/k3_rproc.env b/include/environment/ti/k3_rproc.env
new file mode 100644
index 0000000..21dad7b
--- /dev/null
+++ b/include/environment/ti/k3_rproc.env
@@ -0,0 +1,26 @@
+dorprocboot=0
+boot_rprocs=
+ if test ${dorprocboot} -eq 1 && test ${boot} = mmc; then
+ rproc init;
+ run boot_rprocs_mmc;
+ fi;
+rproc_load_and_boot_one=
+ if load mmc ${bootpart} $loadaddr ${rproc_fw}; then
+ if rproc load ${rproc_id} ${loadaddr} ${filesize}; then
+ rproc start ${rproc_id}
+ fi;
+ fi
+boot_rprocs_mmc=
+ env set rproc_id;
+ env set rproc_fw;
+ for i in ${rproc_fw_binaries} ; do
+ if test -z ${rproc_id} ; then
+ env set rproc_id $i;
+ else
+ env set rproc_fw $i;
+ run rproc_load_and_boot_one;
+ env set rproc_id;
+ env set rproc_fw;
+ fi;
+ done
+
diff --git a/include/environment/ti/mmc.env b/include/environment/ti/mmc.env
new file mode 100644
index 0000000..5677d05
--- /dev/null
+++ b/include/environment/ti/mmc.env
@@ -0,0 +1,61 @@
+mmcdev=0
+mmcrootfstype=ext4 rootwait
+finduuid=part uuid ${boot} ${bootpart} uuid
+args_mmc=run finduuid;setenv bootargs console=${console}
+ ${optargs}
+ root=PARTUUID=${uuid} rw
+ rootfstype=${mmcrootfstype}
+loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr
+bootscript=echo Running bootscript from mmc${mmcdev} ...;
+ source ${loadaddr}
+bootenvfile=uEnv.txt
+importbootenv=echo Importing environment from mmc${mmcdev} ...;
+ env import -t ${loadaddr} ${filesize}
+loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile}
+loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}
+loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
+envboot=mmc dev ${mmcdev};
+ if mmc rescan; then
+ echo SD/MMC found on device ${mmcdev};
+ if run loadbootscript; then
+ run bootscript;
+ else
+ if run loadbootenv; then
+ echo Loaded env from ${bootenvfile};
+ run importbootenv;
+ fi;
+ if test -n $uenvcmd; then
+ echo Running uenvcmd ...;
+ run uenvcmd;
+ fi;
+ fi;
+ fi;
+mmcloados=
+ if test ${boot_fdt} = yes || test ${boot_fdt} = try; then
+ if run loadfdt; then
+ bootz ${loadaddr} - ${fdtaddr};
+ else
+ if test ${boot_fdt} = try; then
+ bootz;
+ else
+ echo WARN: Cannot load the DT;
+ fi;
+ fi;
+ else
+ bootz;
+ fi;
+mmcboot=mmc dev ${mmcdev};
+ devnum=${mmcdev};
+ devtype=mmc;
+ if mmc rescan; then
+ echo SD/MMC found on device ${mmcdev};
+ if run loadimage; then
+ run args_mmc;
+ if test ${boot_fit} -eq 1; then
+ run run_fit;
+ else
+ run mmcloados;
+ fi;
+ fi;
+fi;
+
diff --git a/include/environment/ti/nand.env b/include/environment/ti/nand.env
new file mode 100644
index 0000000..4e185c1
--- /dev/null
+++ b/include/environment/ti/nand.env
@@ -0,0 +1,14 @@
+mtdids=nor0=47040000.spi.0,nor0=47034000.hyperbus
+mtdparts=mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs)
+nandargs=setenv bootargs console=${console}
+ ${optargs}
+ root=${nandroot}
+ rootfstype=${nandrootfstype}
+nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048
+nandrootfstype=ubifs rootwait
+nandboot=echo Booting from nand ...;
+ run nandargs;
+ nand read ${fdtaddr} NAND.u-boot-spl-os;
+ nand read ${loadaddr} NAND.kernel;
+ bootz ${loadaddr} - ${fdtaddr}
+
diff --git a/include/environment/ti/ti_armv7_common.env b/include/environment/ti/ti_armv7_common.env
new file mode 100644
index 0000000..4d33464
--- /dev/null
+++ b/include/environment/ti/ti_armv7_common.env
@@ -0,0 +1,24 @@
+loadaddr=0x82000000
+kernel_addr_r=0x82000000
+fdtaddr=0x88000000
+dtboaddr=0x89000000
+fdt_addr_r=0x88000000
+fdtoverlay_addr_r=0x89000000
+rdaddr=0x88080000
+ramdisk_addr_r=0x88080000
+scriptaddr=0x80000000
+pxefile_addr_r=0x80100000
+bootm_size=0x10000000
+boot_fdt=try
+
+boot_fit=0
+addr_fit=0x90000000
+name_fit=fitImage
+update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}
+get_overlaystring=
+ for overlay in $name_overlays;
+ do;
+ setenv overlaystring ${overlaystring}'#'${overlay};
+ done;
+run_fit=bootm ${addr_fit}#conf-${fdtfile}${overlaystring}
+
diff --git a/include/environment/ti/ufs.env b/include/environment/ti/ufs.env
new file mode 100644
index 0000000..509a87b
--- /dev/null
+++ b/include/environment/ti/ufs.env
@@ -0,0 +1,22 @@
+scsirootfstype=ext4 rootwait
+ufs_finduuid=part uuid scsi ${bootpart} uuid
+args_ufs=setenv devtype scsi;setenv bootpart 1:1;
+ run ufs_finduuid;
+ setenv bootargs console = ${console}
+ ${optargs}
+ root=PARTUUID=${uuid} rw
+ rootfstype=${scsirootfstype};
+ setenv devtype scsi;
+ setenv bootpart 1:1
+init_ufs=ufs init; scsi scan; run args_ufs
+get_kern_ufs=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${name_kern}
+get_fdt_ufs=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}
+get_overlay_ufs=
+ fdt address ${fdtaddr};
+ fdt resize 0x100000;
+ for overlay in $name_overlays;
+ do;
+ load scsi ${bootpart} ${dtboaddr} ${bootdir}/${overlay} &&
+ fdt apply ${dtboaddr};
+ done;
+
diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help
index f3a44d0..f013367 100644
--- a/tools/binman/missing-blob-help
+++ b/tools/binman/missing-blob-help
@@ -21,13 +21,15 @@
iot2050-seboot:
See the documentation for IOT2050 board. Your image is missing SEBoot
which is mandatory for board startup. Prebuilt SEBoot located at
-meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild/tiboot3.bin.
+meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild/seboot_pg*.bin.
-iot2050-sysfw:
-See the documentation for IOT2050 board. Your image is missing system
-firmware which is mandatory for board startup. Prebuilt system firmware
-located at meta-iot2050/tree/master/recipes-bsp/u-boot/files/prebuild/
-with sysfw prefix.
+iot2050-otpcmd:
+See the documentation for IOT2050 board. Your image is missing OTP command data
+block which is used for provisioning the customer keys to the board.
+Please refer to
+meta-iot2050/tree/master/recipes-bsp/secure-boot-otp-provisioning/files/make-otpcmd.sh
+for how to generate this binary. If you are not using secure boot or do not
+intend to provision the keys, disable CONFIG_IOT2050_EMBED_OTPCMD.
k3-rti-wdt-firmware:
If CONFIG_WDT_K3_RTI_LOAD_FW is enabled, a firmware image is needed for
diff --git a/tools/iot2050-sign-fw.sh b/tools/iot2050-sign-fw.sh
new file mode 100755
index 0000000..4d1d794
--- /dev/null
+++ b/tools/iot2050-sign-fw.sh
@@ -0,0 +1,51 @@
+#!/bin/sh
+
+if [ -z "$1" ]; then
+ echo "Usage: $0 KEY"
+ exit 1
+fi
+
+TEMP_X509=$(mktemp XXXXXXXX.temp)
+
+REVISION=${2:-0}
+SHA_VAL=$(openssl dgst -sha512 -hex tispl.bin | sed -e "s/^.*= //g")
+BIN_SIZE=$(stat -c %s tispl.bin)
+
+cat <<EOF >$TEMP_X509
+[ req ]
+distinguished_name = req_distinguished_name
+x509_extensions = v3_ca
+prompt = no
+dirstring_type = nobmp
+
+[ req_distinguished_name ]
+CN = IOT2050 Firmware Signature
+
+[ v3_ca ]
+basicConstraints = CA:true
+1.3.6.1.4.1.294.1.3 = ASN1:SEQUENCE:swrv
+1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity
+
+[ swrv ]
+swrv = INTEGER:$REVISION
+
+[ sysfw_image_integrity ]
+shaType = OID:2.16.840.1.101.3.4.2.3
+shaValue = FORMAT:HEX,OCT:$SHA_VAL
+imageSize = INTEGER:$BIN_SIZE
+EOF
+
+CERT_X509=$(mktemp XXXXXXXX.crt)
+
+openssl req -new -x509 -key $1 -nodes -outform DER -out $CERT_X509 -config $TEMP_X509 -sha512
+cat $CERT_X509 tispl.bin > tispl.bin_signed
+# currently broken in upstream
+#source/tools/binman/binman replace -i flash.bin -f tispl.bin_signed blob@0x180000
+dd if=tispl.bin_signed of=flash.bin bs=$((0x1000)) seek=$((0x180000/0x1000)) conv=notrunc
+
+rm $TEMP_X509 $CERT_X509
+
+tools/mkimage -G $1 -r -o sha256,rsa4096 -F fit@0x380000.fit
+# currently broken in upstream
+#source/tools/binman/binman replace -i flash.bin -f fit@0x380000.fit fit@0x380000
+dd if=fit@0x380000.fit of=flash.bin bs=$((0x1000)) seek=$((0x380000/0x1000)) conv=notrunc
diff --git a/tools/key2dtsi.py b/tools/key2dtsi.py
new file mode 100755
index 0000000..1dbb2cc
--- /dev/null
+++ b/tools/key2dtsi.py
@@ -0,0 +1,64 @@
+#!/usr/bin/env python3
+# SPDX-License-Identifier: GPL-2.0-only
+#
+# Public key to dtsi converter.
+#
+# Copyright (c) Siemens AG, 2022
+#
+
+from argparse import ArgumentParser, FileType
+from os.path import basename, splitext
+from Cryptodome.PublicKey import RSA
+from Cryptodome.Util.number import inverse
+
+def int_to_bytestr(n, length=None):
+ if not length:
+ length = (n.bit_length() + 7) // 8
+ byte_array = n.to_bytes(length, 'big')
+ return ' '.join(['{:02x}'.format(byte) for byte in byte_array])
+
+ap = ArgumentParser(description='Public key to dtsi converter')
+
+ap.add_argument('--hash', '-H', default='sha256',
+ help='hash to be used with key (default: sha256)')
+ap.add_argument('--required-conf', '-c', action='store_true',
+ help='mark key required for configuration')
+ap.add_argument('--required-image', '-i', action='store_true',
+ help='mark key required for image')
+ap.add_argument('--spl', '-s', action='store_true',
+ help='mark key for usage in SPL')
+ap.add_argument('key_file', metavar='KEY_FILE', type=FileType('r'),
+ help='key file (formats: X.509, PKCS#1, OpenSSH)')
+ap.add_argument('dtsi_file', metavar='DTSI_FILE', type=FileType('w'),
+ help='dtsi output file')
+
+args = ap.parse_args()
+
+key_name, _ = splitext(basename(args.key_file.name))
+
+key_data = args.key_file.read()
+key = RSA.importKey(key_data)
+
+r_squared = (2**key.size_in_bits())**2 % key.n
+n0_inverse = 2**32 - inverse(key.n, 2**32)
+
+out = args.dtsi_file
+out.write('/ {\n')
+out.write('\tsignature {\n')
+out.write('\t\tkey-{} {{\n'.format(key_name))
+out.write('\t\t\tkey-name-hint = "{}";\n'.format(key_name))
+out.write('\t\t\talgo = "{},rsa{}";\n'.format(args.hash, key.size_in_bits()))
+out.write('\t\t\trsa,num-bits = <{}>;\n'.format(key.size_in_bits()))
+out.write('\t\t\trsa,modulus = [{}];\n'.format(int_to_bytestr(key.n)))
+out.write('\t\t\trsa,exponent = [{}];\n'.format(int_to_bytestr(key.e, 8)))
+out.write('\t\t\trsa,r-squared = [{}];\n'.format(int_to_bytestr(r_squared)))
+out.write('\t\t\trsa,n0-inverse = <0x{:x}>;\n'.format(n0_inverse))
+if args.required_conf:
+ out.write('\t\t\trequired = "conf";\n')
+elif args.required_image:
+ out.write('\t\t\trequired = "image";\n')
+if args.spl:
+ out.write('\t\t\tu-boot,dm-spl;\n')
+out.write('\t\t};\n')
+out.write('\t};\n')
+out.write('};\n')