Merge tag 'i2cupdates-for-v2024-10-next' of https://source.denx.de/u-boot/custodians/u-boot-i2c into next
i2c updates for v2024.10 next
- DM_I2C conversion for some remaining boards
from Anatolij
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index 59628ce..1f9dc2d 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -34,6 +34,7 @@
#include <asm/emif.h>
#include <asm/gpio.h>
#include <i2c.h>
+#include <i2c_eeprom.h>
#include <miiphy.h>
#include <cpsw.h>
#include <linux/delay.h>
@@ -51,21 +52,21 @@
/*
* Read header information from EEPROM into global structure.
*/
-#define EEPROM_ADDR 0x50
static int read_eeprom(void)
{
+ struct udevice *dev;
+ int ret;
+
/* Check if baseboard eeprom is available */
- if (i2c_probe(EEPROM_ADDR)) {
- puts("Could not probe the EEPROM; something fundamentally wrong on the I2C bus.\n");
- return -ENODEV;
+ ret = uclass_first_device_err(UCLASS_I2C_EEPROM, &dev);
+ if (ret) {
+ puts("Could not find EEPROM.\n");
+ return ret;
}
- /* read the eeprom using i2c */
- if (i2c_read(EEPROM_ADDR, 0, 2, (uchar *)&header,
- sizeof(header))) {
- puts("Could not read the EEPROM; something fundamentally wrong on the I2C bus.\n");
- return -EIO;
- }
+ ret = i2c_eeprom_read(dev, 0, (uint8_t *)&header, sizeof(header));
+ if (ret)
+ return ret;
if (header.magic != HDR_MAGIC) {
printf("Incorrect magic number (0x%x) in EEPROM\n",
@@ -445,7 +446,6 @@
#if defined(CONFIG_HW_WATCHDOG)
hw_watchdog_init();
#endif
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
if (read_eeprom() < 0)
puts("EEPROM Content Invalid.\n");
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index c6d33c3..40047cf 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -14,6 +14,7 @@
#include <env.h>
#include <fsl_esdhc_imx.h>
#include <init.h>
+#include <i2c.h>
#include <miiphy.h>
#include <mtd_node.h>
#include <net.h>
@@ -256,7 +257,7 @@
{
int ret;
- ret = setup_i2c(busnum, CONFIG_SYS_I2C_SPEED, 0x7f, pads);
+ ret = setup_i2c(busnum, I2C_SPEED_STANDARD_RATE, 0x7f, pads);
if (ret)
printf("Warning: I2C%d setup failed: %d\n", busnum, ret);
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
index 1815819..983991e 100644
--- a/board/compulab/cm_t43/cm_t43.c
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -48,8 +48,6 @@
gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
set_i2c_pin_mux();
- i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- i2c_probe(TPS65218_CHIP_PM);
return 0;
}
diff --git a/board/compulab/common/Makefile b/board/compulab/common/Makefile
index 7c8226e..c7b2237 100644
--- a/board/compulab/common/Makefile
+++ b/board/compulab/common/Makefile
@@ -4,6 +4,12 @@
#
# Author: Igor Grinberg <grinberg@compulab.co.il>
+CL_EEPROM=y
+
+ifdef CONFIG_TARGET_TRIMSLICE
+CL_EEPROM=
+endif
+
obj-y += common.o
-obj-$(CONFIG_$(SPL_)SYS_I2C_LEGACY) += eeprom.o
+obj-$(CL_EEPROM) += eeprom.o
obj-$(CONFIG_SMC911X) += omap3_smc911x.o
diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c
index efdaf34..1b12d09 100644
--- a/board/compulab/common/eeprom.c
+++ b/board/compulab/common/eeprom.c
@@ -34,19 +34,15 @@
static int cl_eeprom_read(uint offset, uchar *buf, int len)
{
+ struct udevice *eeprom;
int res;
- unsigned int current_i2c_bus = i2c_get_bus_num();
- res = i2c_set_bus_num(cl_eeprom_bus);
- if (res < 0)
+ res = i2c_get_chip_for_busnum(cl_eeprom_bus, CONFIG_SYS_I2C_EEPROM_ADDR,
+ CONFIG_SYS_I2C_EEPROM_ADDR_LEN, &eeprom);
+ if (res)
return res;
- res = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, offset,
- CONFIG_SYS_I2C_EEPROM_ADDR_LEN, buf, len);
-
- i2c_set_bus_num(current_i2c_bus);
-
- return res;
+ return dm_i2c_read(eeprom, offset, (uint8_t *)buf, len);
}
static int cl_eeprom_setup(uint eeprom_bus)
diff --git a/board/compulab/common/eeprom.h b/board/compulab/common/eeprom.h
index 9bd7604..0a44926 100644
--- a/board/compulab/common/eeprom.h
+++ b/board/compulab/common/eeprom.h
@@ -10,7 +10,7 @@
#define _EEPROM_
#include <errno.h>
-#if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
+#if !CONFIG_IS_ENABLED(TARGET_TRIMSLICE)
int cl_eeprom_read_mac_addr(uchar *buf, uint eeprom_bus);
u32 cl_eeprom_get_board_rev(uint eeprom_bus);
int cl_eeprom_get_product_name(uchar *buf, uint eeprom_bus);
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index 3220727..f65551e 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -137,23 +137,23 @@
int misc_init_r(void)
{
struct novena_eeprom_data data;
- uchar *datap = (uchar *)&data;
+ uint8_t *datap = (uint8_t *)&data;
const char *signature = "Novena";
+ struct udevice *eeprom;
int ret;
/* If 'ethaddr' is already set, do nothing. */
if (env_get("ethaddr"))
return 0;
- /* EEPROM is at bus 2. */
- ret = i2c_set_bus_num(2);
+ /* EEPROM is at bus 2, address 0x56 */
+ ret = i2c_get_chip_for_busnum(2, 0x56, 1, &eeprom);
if (ret) {
puts("Cannot select EEPROM I2C bus.\n");
return 0;
}
- /* EEPROM is at address 0x56. */
- ret = eeprom_read(0x56, 0, datap, sizeof(data));
+ ret = dm_i2c_read(eeprom, 0, datap, sizeof(data));
if (ret) {
puts("Cannot read I2C EEPROM.\n");
return 0;
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
index be5a737..67f9843 100644
--- a/board/kosagi/novena/video.c
+++ b/board/kosagi/novena/video.c
@@ -58,28 +58,29 @@
#define IT6521_RETRY_MAX 20
+static struct udevice *it6251_chip;
+static struct udevice *it6251_lvds;
+
static int it6251_is_stable(void)
{
- const unsigned int caddr = NOVENA_IT6251_CHIPADDR;
- const unsigned int laddr = NOVENA_IT6251_LVDSADDR;
int status;
int clkcnt;
int rpclkcnt;
int refstate;
- rpclkcnt = (i2c_reg_read(caddr, 0x13) & 0xff) |
- ((i2c_reg_read(caddr, 0x14) << 8) & 0x0f00);
+ rpclkcnt = (dm_i2c_reg_read(it6251_chip, 0x13) & 0xff) |
+ ((dm_i2c_reg_read(it6251_chip, 0x14) << 8) & 0x0f00);
debug("RPCLKCnt: %d\n", rpclkcnt);
- status = i2c_reg_read(caddr, IT6251_SYSTEM_STATUS);
+ status = dm_i2c_reg_read(it6251_chip, IT6251_SYSTEM_STATUS);
debug("System status: 0x%02x\n", status);
- clkcnt = (i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_LOW) & 0xff) |
- ((i2c_reg_read(laddr, IT6251_REG_PCLK_CNT_HIGH) << 8) &
+ clkcnt = (dm_i2c_reg_read(it6251_lvds, IT6251_REG_PCLK_CNT_LOW) & 0xff) |
+ ((dm_i2c_reg_read(it6251_lvds, IT6251_REG_PCLK_CNT_HIGH) << 8) &
0x0f00);
debug("Clock: 0x%02x\n", clkcnt);
- refstate = i2c_reg_read(laddr, IT6251_REF_STATE);
+ refstate = dm_i2c_reg_read(it6251_lvds, IT6251_REF_STATE);
debug("Ref Link State: 0x%02x\n", refstate);
if ((refstate & 0x1f) != 0)
@@ -97,16 +98,14 @@
static int it6251_ready(void)
{
- const unsigned int caddr = NOVENA_IT6251_CHIPADDR;
-
/* Test if the IT6251 came out of reset by reading ID regs. */
- if (i2c_reg_read(caddr, IT6251_VENDOR_ID_LOW) != 0x15)
+ if (dm_i2c_reg_read(it6251_chip, IT6251_VENDOR_ID_LOW) != 0x15)
return 0;
- if (i2c_reg_read(caddr, IT6251_VENDOR_ID_HIGH) != 0xca)
+ if (dm_i2c_reg_read(it6251_chip, IT6251_VENDOR_ID_HIGH) != 0xca)
return 0;
- if (i2c_reg_read(caddr, IT6251_DEVICE_ID_LOW) != 0x51)
+ if (dm_i2c_reg_read(it6251_chip, IT6251_DEVICE_ID_LOW) != 0x51)
return 0;
- if (i2c_reg_read(caddr, IT6251_DEVICE_ID_HIGH) != 0x62)
+ if (dm_i2c_reg_read(it6251_chip, IT6251_DEVICE_ID_HIGH) != 0x62)
return 0;
return 1;
@@ -114,116 +113,112 @@
static void it6251_program_regs(void)
{
- const unsigned int caddr = NOVENA_IT6251_CHIPADDR;
- const unsigned int laddr = NOVENA_IT6251_LVDSADDR;
-
- i2c_reg_write(caddr, 0x05, 0x00);
+ dm_i2c_reg_write(it6251_chip, 0x05, 0x00);
mdelay(1);
/* set LVDSRX address, and enable */
- i2c_reg_write(caddr, 0xfd, 0xbc);
- i2c_reg_write(caddr, 0xfe, 0x01);
+ dm_i2c_reg_write(it6251_chip, 0xfd, 0xbc);
+ dm_i2c_reg_write(it6251_chip, 0xfe, 0x01);
/*
* LVDSRX
*/
/* This write always fails, because the chip goes into reset */
/* reset LVDSRX */
- i2c_reg_write(laddr, 0x05, 0xff);
- i2c_reg_write(laddr, 0x05, 0x00);
+ dm_i2c_reg_write(it6251_lvds, 0x05, 0xff);
+ dm_i2c_reg_write(it6251_lvds, 0x05, 0x00);
/* reset LVDSRX PLL */
- i2c_reg_write(laddr, 0x3b, 0x42);
- i2c_reg_write(laddr, 0x3b, 0x43);
+ dm_i2c_reg_write(it6251_lvds, 0x3b, 0x42);
+ dm_i2c_reg_write(it6251_lvds, 0x3b, 0x43);
/* something with SSC PLL */
- i2c_reg_write(laddr, 0x3c, 0x08);
+ dm_i2c_reg_write(it6251_lvds, 0x3c, 0x08);
/* don't swap links, but writing reserved registers */
- i2c_reg_write(laddr, 0x0b, 0x88);
+ dm_i2c_reg_write(it6251_lvds, 0x0b, 0x88);
/* JEIDA, 8-bit depth 0x11, orig 0x42 */
- i2c_reg_write(laddr, 0x2c, 0x01);
+ dm_i2c_reg_write(it6251_lvds, 0x2c, 0x01);
/* "reserved" */
- i2c_reg_write(laddr, 0x32, 0x04);
+ dm_i2c_reg_write(it6251_lvds, 0x32, 0x04);
/* "reserved" */
- i2c_reg_write(laddr, 0x35, 0xe0);
+ dm_i2c_reg_write(it6251_lvds, 0x35, 0xe0);
/* "reserved" + clock delay */
- i2c_reg_write(laddr, 0x2b, 0x24);
+ dm_i2c_reg_write(it6251_lvds, 0x2b, 0x24);
/* reset LVDSRX pix clock */
- i2c_reg_write(laddr, 0x05, 0x02);
- i2c_reg_write(laddr, 0x05, 0x00);
+ dm_i2c_reg_write(it6251_lvds, 0x05, 0x02);
+ dm_i2c_reg_write(it6251_lvds, 0x05, 0x00);
/*
* DPTX
*/
/* set for two lane mode, normal op, no swapping, no downspread */
- i2c_reg_write(caddr, 0x16, 0x02);
+ dm_i2c_reg_write(it6251_chip, 0x16, 0x02);
/* some AUX channel EDID magic */
- i2c_reg_write(caddr, 0x23, 0x40);
+ dm_i2c_reg_write(it6251_chip, 0x23, 0x40);
/* power down lanes 3-0 */
- i2c_reg_write(caddr, 0x5c, 0xf3);
+ dm_i2c_reg_write(it6251_chip, 0x5c, 0xf3);
/* enable DP scrambling, change EQ CR phase */
- i2c_reg_write(caddr, 0x5f, 0x06);
+ dm_i2c_reg_write(it6251_chip, 0x5f, 0x06);
/* color mode RGB, pclk/2 */
- i2c_reg_write(caddr, 0x60, 0x02);
+ dm_i2c_reg_write(it6251_chip, 0x60, 0x02);
/* dual pixel input mode, no EO swap, no RGB swap */
- i2c_reg_write(caddr, 0x61, 0x04);
+ dm_i2c_reg_write(it6251_chip, 0x61, 0x04);
/* M444B24 video format */
- i2c_reg_write(caddr, 0x62, 0x01);
+ dm_i2c_reg_write(it6251_chip, 0x62, 0x01);
/* vesa range / not interlace / vsync high / hsync high */
- i2c_reg_write(caddr, 0xa0, 0x0F);
+ dm_i2c_reg_write(it6251_chip, 0xa0, 0x0F);
/* hpd event timer set to 1.6-ish ms */
- i2c_reg_write(caddr, 0xc9, 0xf5);
+ dm_i2c_reg_write(it6251_chip, 0xc9, 0xf5);
/* more reserved magic */
- i2c_reg_write(caddr, 0xca, 0x4d);
- i2c_reg_write(caddr, 0xcb, 0x37);
+ dm_i2c_reg_write(it6251_chip, 0xca, 0x4d);
+ dm_i2c_reg_write(it6251_chip, 0xcb, 0x37);
/* enhanced framing mode, auto video fifo reset, video mute disable */
- i2c_reg_write(caddr, 0xd3, 0x03);
+ dm_i2c_reg_write(it6251_chip, 0xd3, 0x03);
/* "vidstmp" and some reserved stuff */
- i2c_reg_write(caddr, 0xd4, 0x45);
+ dm_i2c_reg_write(it6251_chip, 0xd4, 0x45);
/* queue number -- reserved */
- i2c_reg_write(caddr, 0xe7, 0xa0);
+ dm_i2c_reg_write(it6251_chip, 0xe7, 0xa0);
/* info frame packets and reserved */
- i2c_reg_write(caddr, 0xe8, 0x33);
+ dm_i2c_reg_write(it6251_chip, 0xe8, 0x33);
/* more AVI stuff */
- i2c_reg_write(caddr, 0xec, 0x00);
+ dm_i2c_reg_write(it6251_chip, 0xec, 0x00);
/* select PC master reg for aux channel? */
- i2c_reg_write(caddr, 0x23, 0x42);
+ dm_i2c_reg_write(it6251_chip, 0x23, 0x42);
/* send PC request commands */
- i2c_reg_write(caddr, 0x24, 0x00);
- i2c_reg_write(caddr, 0x25, 0x00);
- i2c_reg_write(caddr, 0x26, 0x00);
+ dm_i2c_reg_write(it6251_chip, 0x24, 0x00);
+ dm_i2c_reg_write(it6251_chip, 0x25, 0x00);
+ dm_i2c_reg_write(it6251_chip, 0x26, 0x00);
/* native aux read */
- i2c_reg_write(caddr, 0x2b, 0x00);
+ dm_i2c_reg_write(it6251_chip, 0x2b, 0x00);
/* back to internal */
- i2c_reg_write(caddr, 0x23, 0x40);
+ dm_i2c_reg_write(it6251_chip, 0x23, 0x40);
/* voltage swing level 3 */
- i2c_reg_write(caddr, 0x19, 0xff);
+ dm_i2c_reg_write(it6251_chip, 0x19, 0xff);
/* pre-emphasis level 3 */
- i2c_reg_write(caddr, 0x1a, 0xff);
+ dm_i2c_reg_write(it6251_chip, 0x1a, 0xff);
/* start link training */
- i2c_reg_write(caddr, 0x17, 0x01);
+ dm_i2c_reg_write(it6251_chip, 0x17, 0x01);
}
static int it6251_init(void)
{
- const unsigned int caddr = NOVENA_IT6251_CHIPADDR;
int reg;
int tries, retries = 0;
@@ -233,7 +228,7 @@
/* Wait for video stable. */
for (tries = 0; tries < 100; tries++) {
- reg = i2c_reg_read(caddr, 0x17);
+ reg = dm_i2c_reg_read(it6251_chip, 0x17);
/* Test Link CFG, STS, LCS read done. */
if ((reg & 0xe0) != 0xe0) {
/* Not yet, wait a bit more. */
@@ -285,10 +280,14 @@
enable_lvds(dev);
- ret = i2c_set_bus_num(NOVENA_IT6251_I2C_BUS);
- if (ret) {
- puts("Cannot select IT6251 I2C bus.\n");
- return 0;
+ if (!it6251_chip) {
+ ret = i2c_get_chip_for_busnum(NOVENA_IT6251_I2C_BUS,
+ NOVENA_IT6251_CHIPADDR,
+ 1, &it6251_chip);
+ if (ret) {
+ puts("Cannot select IT6251 I2C bus.\n");
+ return 0;
+ }
}
/* Wait up-to ~250 mS for the LVDS to come up. */
@@ -435,9 +434,20 @@
{
int ret;
+ if (!it6251_chip) {
+ ret = i2c_get_chip_for_busnum(NOVENA_IT6251_I2C_BUS,
+ NOVENA_IT6251_CHIPADDR,
+ 1, &it6251_chip);
+ if (ret) {
+ puts("Cannot select LVDS-to-eDP I2C bus.\n");
+ return;
+ }
+ }
+
- ret = i2c_set_bus_num(NOVENA_IT6251_I2C_BUS);
+ ret = i2c_get_chip_for_busnum(NOVENA_IT6251_I2C_BUS,
+ NOVENA_IT6251_LVDSADDR, 1, &it6251_lvds);
if (ret) {
- puts("Cannot select LVDS-to-eDP I2C bus.\n");
+ puts("Cannot find IT6251 LVDS bus.\n");
return;
}
diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c
index a0dbf97..bd430cf 100644
--- a/board/softing/vining_2000/vining_2000.c
+++ b/board/softing/vining_2000/vining_2000.c
@@ -18,7 +18,6 @@
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/io.h>
-#include <asm/mach-imx/mxc_i2c.h>
#include <asm/sections.h>
#include <env.h>
#include <linux/bitops.h>
@@ -27,7 +26,6 @@
#include <config.h>
#include <fsl_esdhc_imx.h>
#include <mmc.h>
-#include <i2c.h>
#include <miiphy.h>
#include <netdev.h>
#include <power/pmic.h>
@@ -53,10 +51,6 @@
PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_HIGH | \
PAD_CTL_SRE_FAST)
-#define I2C_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | \
- PAD_CTL_PKE | PAD_CTL_ODE | PAD_CTL_SPEED_MED | \
- PAD_CTL_DSE_40ohm)
-
#define USDHC_CLK_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST)
@@ -120,21 +114,6 @@
return ret;
}
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-/* I2C1 for PMIC */
-static struct i2c_pads_info i2c_pad_info1 = {
- .scl = {
- .i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC,
- .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC,
- .gp = IMX_GPIO_NR(1, 0),
- },
- .sda = {
- .i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC,
- .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC,
- .gp = IMX_GPIO_NR(1, 1),
- },
-};
-
static struct pmic *pfuze_init(unsigned char i2cbus)
{
struct pmic *p;
@@ -400,10 +379,6 @@
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-#ifdef CONFIG_SYS_I2C_MXC
- setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-#endif
-
return board_net_init();
}
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index ef4d866..1994388 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -74,7 +74,7 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index 8fb6e1a..72933ba 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -65,10 +65,12 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_SLAVE=0x1
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_HSMMC2_8BIT=y
CONFIG_PHY_ADDR_ENABLE=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index b9f5db2..b8a3227 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -63,10 +63,12 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_SLAVE=0x1
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_HSMMC2_8BIT=y
CONFIG_PHY_ADDR_ENABLE=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 5c42bf4..b25a4de 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -66,10 +66,12 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_SLAVE=0x1
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_HSMMC2_8BIT=y
CONFIG_PHY_ADDR_ENABLE=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index 9375bc9..8486ccb 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -65,10 +65,12 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_NET_RETRY_COUNT=10
CONFIG_BOOTP_SEND_HOSTNAME=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_SLAVE=0x1
CONFIG_SYS_I2C_SPEED=400000
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_OMAP_HS=y
CONFIG_HSMMC2_8BIT=y
CONFIG_PHY_ADDR_ENABLE=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index 894a59f..7444e55 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -65,7 +65,7 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_EEPROM_ADDR=0x50
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index 9877898..8cb6b34 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -52,7 +52,7 @@
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_BE=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MISC=y
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 386616c..81a39f7 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -80,7 +80,7 @@
CONFIG_DWC_AHSATA=y
# CONFIG_DWC_AHSATA_AHCI is not set
CONFIG_LBA48=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_SYS_MXC_I2C3_SPEED=400000
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index e860388..eabeee8 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -36,6 +36,7 @@
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x480
CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_I2C=y
+# CONFIG_SPL_DM_I2C is not set
CONFIG_SPL_MTD=y
# CONFIG_SPL_NAND_SUPPORT is not set
CONFIG_SPL_NAND_DRIVERS=y
@@ -70,7 +71,7 @@
CONFIG_VERSION_VARIABLE=y
CONFIG_BOOTP_SEND_HOSTNAME=y
CONFIG_SYS_RX_ETH_BUFFER=64
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_MMC_OMAP_HS=y
CONFIG_HSMMC2_8BIT=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 322689e..dd3541b 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -67,7 +67,7 @@
CONFIG_BOUNCE_BUFFER=y
CONFIG_DWC_AHSATA=y
CONFIG_LBA48=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_USDHC=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 93d182a..2bcbdd6 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -88,7 +88,7 @@
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DFU_NAND=y
CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_MMC_OMAP_HS=y
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index af889ec..7713454 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -47,7 +47,7 @@
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VYBRID_GPIO=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index c50afc4..2cef898 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -48,7 +48,7 @@
CONFIG_ENV_RANGE=0x80000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_VYBRID_GPIO=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_FSL_ESDHC_IMX=y
CONFIG_MTD=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index c39597c..e5c9c28 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -70,7 +70,7 @@
CONFIG_USE_ETHPRIME=y
CONFIG_ETHPRIME="FEC"
CONFIG_BOUNCE_BUFFER=y
-CONFIG_SYS_I2C_LEGACY=y
+CONFIG_DM_I2C=y
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_RPMB=y