Coding Style cleanup: replace leading SPACEs by TABs
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index d0cf43f..bdabcf4 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -17,7 +17,7 @@
LDFLAGS_FINAL += --gc-sections
PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
- -fno-common -ffixed-r9 -msoft-float
+ -fno-common -ffixed-r9 -msoft-float
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y
diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index fc7c767..25fadf6 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -31,10 +31,10 @@
/* reconfigure L2 cache aux control reg */
ldr r0, =0xC0 | /* tag RAM */ \
- 0x4 | /* data RAM */ \
- 1 << 24 | /* disable write allocate delay */ \
- 1 << 23 | /* disable write allocate combine */ \
- 1 << 22 /* disable write allocate */
+ 0x4 | /* data RAM */ \
+ 1 << 24 | /* disable write allocate delay */ \
+ 1 << 23 | /* disable write allocate combine */ \
+ 1 << 22 /* disable write allocate */
#if defined(CONFIG_MX51)
ldr r3, [r4, #ROM_SI_REV]
@@ -290,20 +290,20 @@
setup_pll PLL1_BASE_ADDR, 800
- setup_pll PLL3_BASE_ADDR, 400
+ setup_pll PLL3_BASE_ADDR, 400
- /* Switch peripheral to PLL3 */
- ldr r0, =CCM_BASE_ADDR
- ldr r1, =0x00015154
- str r1, [r0, #CLKCTL_CBCMR]
- ldr r1, =0x02898945
- str r1, [r0, #CLKCTL_CBCDR]
- /* make sure change is effective */
+ /* Switch peripheral to PLL3 */
+ ldr r0, =CCM_BASE_ADDR
+ ldr r1, =0x00015154
+ str r1, [r0, #CLKCTL_CBCMR]
+ ldr r1, =0x02898945
+ str r1, [r0, #CLKCTL_CBCDR]
+ /* make sure change is effective */
1: ldr r1, [r0, #CLKCTL_CDHIPR]
- cmp r1, #0x0
- bne 1b
+ cmp r1, #0x0
+ bne 1b
- setup_pll PLL2_BASE_ADDR, 400
+ setup_pll PLL2_BASE_ADDR, 400
/* Switch peripheral to PLL2 */
ldr r0, =CCM_BASE_ADDR
@@ -324,7 +324,7 @@
cmp r1, #0x0
bne 1b
- setup_pll PLL3_BASE_ADDR, 216
+ setup_pll PLL3_BASE_ADDR, 216
setup_pll PLL4_BASE_ADDR, 455
@@ -358,13 +358,13 @@
str r1, [r0, #CLKCTL_CCGR6]
str r1, [r0, #CLKCTL_CCGR7]
- mov r1, #0x00000
- str r1, [r0, #CLKCTL_CCDR]
+ mov r1, #0x00000
+ str r1, [r0, #CLKCTL_CCDR]
- /* for cko - for ARM div by 8 */
- mov r1, #0x000A0000
- add r1, r1, #0x00000F0
- str r1, [r0, #CLKCTL_CCOSR]
+ /* for cko - for ARM div by 8 */
+ mov r1, #0x000A0000
+ add r1, r1, #0x00000F0
+ str r1, [r0, #CLKCTL_CCOSR]
#endif /* CONFIG_MX53 */
.endm
diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 1c5474f..44cbb5a 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -140,7 +140,7 @@
reg = <0x12d40000 0x30>;
clock-frequency = <50000000>;
interrupts = <0 70 0>;
- };
+ };
spi@131a0000 {
#address-cells = <1>;
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index a62a556..8035251 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -66,9 +66,9 @@
/* ARMv4- don't know bx lr but the assembler fails to see that */
#ifdef __ARM_ARCH_4__
- mov pc, lr
+ mov pc, lr
#else
- bx lr
+ bx lr
#endif
ENDPROC(relocate_code)
diff --git a/arch/blackfin/cpu/traps.c b/arch/blackfin/cpu/traps.c
index 20aeab8..10f72f8 100644
--- a/arch/blackfin/cpu/traps.c
+++ b/arch/blackfin/cpu/traps.c
@@ -261,7 +261,7 @@
if (!address)
sprintf(buf, "<0x%p> /* Maybe null pointer? */", paddr);
else if (address >= CONFIG_SYS_MONITOR_BASE &&
- address < CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
+ address < CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
sprintf(buf, "<0x%p> /* somewhere in u-boot */", paddr);
else
sprintf(buf, "<0x%p> /* unknown address */", paddr);
diff --git a/arch/blackfin/include/asm/mach-common/bits/lockbox.h b/arch/blackfin/include/asm/mach-common/bits/lockbox.h
index 77f849e..17d22ab 100644
--- a/arch/blackfin/include/asm/mach-common/bits/lockbox.h
+++ b/arch/blackfin/include/asm/mach-common/bits/lockbox.h
@@ -16,7 +16,7 @@
unsigned long ulMessageSize; /* message length in bytes */
unsigned long ulSFEntryPoint; /* entry point of secure function */
unsigned long ulMessagePtr; /* pointer to the buffer containing
- the digital signature and message */
+ the digital signature and message */
unsigned long ulReserved1; /* reserved */
unsigned long ulReserved2; /* reserved */
} tSESR_args;
diff --git a/arch/m68k/lib/traps.c b/arch/m68k/lib/traps.c
index 55bf0c2..cbd410c 100644
--- a/arch/m68k/lib/traps.c
+++ b/arch/m68k/lib/traps.c
@@ -20,7 +20,7 @@
static void show_frame(struct pt_regs *fp)
{
printf ("Vector Number: %d Format: %02x Fault Status: %01x\n\n", (fp->vector & 0x3fc) >> 2,
- fp->format, (fp->vector & 0x3) | ((fp->vector & 0xc00) >> 8));
+ fp->format, (fp->vector & 0x3) | ((fp->vector & 0xc00) >> 8));
printf ("PC: %08lx SR: %08lx SP: %08lx\n", fp->pc, (long) fp->sr, (long) fp);
printf ("D0: %08lx D1: %08lx D2: %08lx D3: %08lx\n",
fp->d0, fp->d1, fp->d2, fp->d3);
diff --git a/arch/nios2/cpu/epcs.c b/arch/nios2/cpu/epcs.c
index c83f5ee..9758552 100644
--- a/arch/nios2/cpu/epcs.c
+++ b/arch/nios2/cpu/epcs.c
@@ -475,7 +475,7 @@
printf ("status: 0x%02x (WIP:%d, WEL:%d, PROT:%s)\n",
stat,
(stat & EPCS_STATUS_WIP) ? 1 : 0,
- (stat & EPCS_STATUS_WEL) ? 1 : 0,
+ (stat & EPCS_STATUS_WEL) ? 1 : 0,
(stat & dev->prot_mask) ? "on" : "off" );
/* Configuration */
diff --git a/arch/nios2/lib/libgcc.c b/arch/nios2/lib/libgcc.c
index 3caee19..cf1b836 100644
--- a/arch/nios2/lib/libgcc.c
+++ b/arch/nios2/lib/libgcc.c
@@ -548,7 +548,7 @@
while (cnt)
{
if (cnt & 1)
- {
+ {
res += b;
}
b <<= 1;
diff --git a/arch/openrisc/cpu/cpu.c b/arch/openrisc/cpu/cpu.c
index f238fe4..272656a 100644
--- a/arch/openrisc/cpu/cpu.c
+++ b/arch/openrisc/cpu/cpu.c
@@ -138,8 +138,8 @@
/* Code the jump to __reset here as the compiler is prone to
emitting a bad jump instruction if the function is in flash */
__asm__("l.movhi r1,hi(__reset); \
- l.ori r1,r1,lo(__reset); \
- l.jr r1");
+ l.ori r1,r1,lo(__reset); \
+ l.jr r1");
/* not reached, __reset does not return */
return 0;
}
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index d568f88..0e9ddb8 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -425,15 +425,15 @@
};
int etype = (gd->arch.arbiter_event_attributes & AEATR_EVENT)
- >> AEATR_EVENT_SHIFT;
+ >> AEATR_EVENT_SHIFT;
int mstr_id = (gd->arch.arbiter_event_attributes & AEATR_MSTR_ID)
- >> AEATR_MSTR_ID_SHIFT;
+ >> AEATR_MSTR_ID_SHIFT;
int tbst = (gd->arch.arbiter_event_attributes & AEATR_TBST)
- >> AEATR_TBST_SHIFT;
+ >> AEATR_TBST_SHIFT;
int tsize = (gd->arch.arbiter_event_attributes & AEATR_TSIZE)
- >> AEATR_TSIZE_SHIFT;
+ >> AEATR_TSIZE_SHIFT;
int ttype = (gd->arch.arbiter_event_attributes & AEATR_TTYPE)
- >> AEATR_TTYPE_SHIFT;
+ >> AEATR_TTYPE_SHIFT;
if (!force && !gd->arch.arbiter_event_address)
return 0;
diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index e073c90..30606fb 100644
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -67,7 +67,7 @@
pci_ctrl->pibar1 = 0;
pci_ctrl->piebar1 = 0;
pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
- PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size - 1));
i = hose->region_count++;
hose->regions[i].bus_start = 0;
@@ -79,7 +79,7 @@
hose->last_busno = 0xff;
pci_setup_indirect(hose, CONFIG_SYS_IMMR + 0x8300 + bus * 0x80,
- CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
+ CONFIG_SYS_IMMR + 0x8304 + bus * 0x80);
pci_register_hose(hose);
diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
index 08781a1..33dc725 100644
--- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c
+++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c
@@ -143,14 +143,14 @@
ptmla_str = getenv("ptm1la");
ptmms_str = getenv("ptm1ms");
if(NULL != ptmla_str && NULL != ptmms_str ) {
- ptmla[0] = simple_strtoul (ptmla_str, NULL, 16);
+ ptmla[0] = simple_strtoul (ptmla_str, NULL, 16);
ptmms[0] = simple_strtoul (ptmms_str, NULL, 16);
}
ptmla_str = getenv("ptm2la");
ptmms_str = getenv("ptm2ms");
if(NULL != ptmla_str && NULL != ptmms_str ) {
- ptmla[1] = simple_strtoul (ptmla_str, NULL, 16);
+ ptmla[1] = simple_strtoul (ptmla_str, NULL, 16);
ptmms[1] = simple_strtoul (ptmms_str, NULL, 16);
}
#endif