commit eb088baccf310731eda792febe6e14916476e1b9
author Marek Vasut <marex@denx.de> Sat Nov 13 03:27:37 2021 +0100
committer Patrice Chotard <patrice.chotard@foss.st.com> Mon Dec 13 14:34:11 2021 +0100
tree efdf85ccf7554d6e57eb551f25b29c12a9043217
parent 4bd7a5a6f751205a2180090543eb28950ae46635

ARM: dts: stm32: Add custom PHY reset bindings on AV96

The ethernet PHY must be reset on AV96, however DWMAC currently does
not support the MDIO-bus PHY GPIO reset bindings and the ethernet MAC
PHY reset property is going away on next DT sync. Add PHY specific
reset bindings to trigger the PHY reset and fix sporadic ethernet
malfunctions, until the next DT sync.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi

diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
index 8b275e4..4b1dbf0 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
@@ -19,6 +19,17 @@
 	};
 };
 
+
+&ethernet0 {
+	mdio0 {
+		ethernet-phy@7 {
+			reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+			reset-assert-us = <11000>;
+			reset-deassert-us = <1000>;
+		};
+	};
+};
+
 &sdmmc1 {
 	u-boot,dm-spl;
 };