tree 13a736479f6684d4af4d7d585640c9a44307b3ce
parent a0d086ac6512425371001a1d430839df9238db2a
author Pratyush Yadav <p.yadav@ti.com> 1717481350 +0530
committer Tom Rini <trini@konsulko.com> 1718239237 -0600

mtd: spi-nor-core: Do not start or end writes at odd address in DTR mode

On DTR capable flashes like Micron Xcella the writes cannot start or end
at an odd address in DTR mode. Extra 0xff bytes need to be prepended or
appended respectively to make sure both the start and end addresses are
even.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>