diff --git a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
index 1ca1042..82e2bd0 100644
--- a/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
+++ b/arch/arm/dts/uniphier-ph1-pro4-sanji.dts
@@ -95,6 +95,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&mio {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
 	u-boot,dm-pre-reloc;
 };
@@ -102,3 +110,7 @@
 &pinctrl_uart0 {
 	u-boot,dm-pre-reloc;
 };
+
+&pinctrl_emmc {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/uniphier-proxstream2-gentil.dts b/arch/arm/dts/uniphier-proxstream2-gentil.dts
index c3551fe..eb1d2bc 100644
--- a/arch/arm/dts/uniphier-proxstream2-gentil.dts
+++ b/arch/arm/dts/uniphier-proxstream2-gentil.dts
@@ -75,6 +75,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&mio {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
 	u-boot,dm-pre-reloc;
 };
@@ -82,3 +90,7 @@
 &pinctrl_uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&pinctrl_emmc {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/uniphier-proxstream2-vodka.dts b/arch/arm/dts/uniphier-proxstream2-vodka.dts
index d61e0b6..e7d5db8 100644
--- a/arch/arm/dts/uniphier-proxstream2-vodka.dts
+++ b/arch/arm/dts/uniphier-proxstream2-vodka.dts
@@ -60,6 +60,14 @@
 	u-boot,dm-pre-reloc;
 };
 
+&mio {
+	u-boot,dm-pre-reloc;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+};
+
 &pinctrl {
 	u-boot,dm-pre-reloc;
 };
@@ -67,3 +75,7 @@
 &pinctrl_uart2 {
 	u-boot,dm-pre-reloc;
 };
+
+&pinctrl_emmc {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
index 935e551..2f2e45d 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <mmc.h>
 #include <spl.h>
 
 #include "../sbc/sbc-regs.h"
@@ -52,3 +53,27 @@
 
 	return ret == BOOT_DEVICE_USB ? BOOT_DEVICE_NOR : ret;
 }
+
+u32 spl_boot_mode(void)
+{
+	struct mmc *mmc;
+
+	/*
+	 * work around a bug in the Boot ROM of PH1-sLD3, LD4, Pro4, and sLD8:
+	 *
+	 * The boot ROM in these SoCs breaks the PARTITION_CONFIG [179] of
+	 * Extended CSD register; when switching to the Boot Partition 1, the
+	 * Boot ROM should issue the SWITCH command (CMD6) with Set Bits for
+	 * the Access Bits, but in fact it uses Write Byte for the Access Bits.
+	 * As a result, the BOOT_PARTITION_ENABLE field of the PARTITION_CONFIG
+	 * is lost.  This bug was fixed for PH1-Pro5 and later SoCs.
+	 *
+	 * Fixup mmc->part_config here because it is used to determine the
+	 * partition which the U-Boot image is read from.
+	 */
+	mmc = find_mmc_device(0);
+	mmc->part_config &= ~EXT_CSD_BOOT_PART_NUM(PART_ACCESS_MASK);
+	mmc->part_config |= EXT_CSD_BOOT_PARTITION_ENABLE;
+
+	return MMCSD_MODE_EMMCBOOT;
+}
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 9d14155..19dbfbb 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -148,6 +148,7 @@
 
 /* SD/MMC */
 #define CONFIG_CMD_MMC
+#define CONFIG_SUPPORT_EMMC_BOOT
 #define CONFIG_GENERIC_MMC
 
 /* memtest works on */
@@ -263,6 +264,7 @@
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT	/* for mem_malloc_init */
 #define CONFIG_SPL_LIBGENERIC_SUPPORT
@@ -270,6 +272,7 @@
 #define CONFIG_SPL_BOARD_INIT
 
 #define CONFIG_SYS_NAND_U_BOOT_OFFS		0x10000
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x80
 
 #define CONFIG_SPL_MAX_FOOTPRINT		0x10000