tree bf7cb0658f5ec1fb716ae9e12190ca58155a5017
parent fb7bd338013a533c89ec52a06d3526021e7f6281
author Jesse Taube <mr.bossman075@gmail.com> 1644625954 -0500
committer Andre Przywara <andre.przywara@arm.com> 1646270646 +0000

mach-sunxi: Add SPL SPI boot for SUNIV

The SUNIV SoCs come with a sun6i-style SPI controller at the base address
of sun4i SPI controller. The module clock of the SPI controller is
missing which leaves us running directly from the AHB clock, which is
set to 200MHz.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Icenowy: Original implementation]
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: adaptation to Upstream U-Boot]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>