imx: scu_api: update to version 1.16 and add more APIs
Upgrade SCFW API to 1.16
Add more APIs:
sc_misc_get_button_status
sc_pm_reboot
sc_seco_v2x_build_info
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/include/firmware/imx/sci/svc/misc/api.h b/include/firmware/imx/sci/svc/misc/api.h
index 3629eb6..a4b92b8 100644
--- a/include/firmware/imx/sci/svc/misc/api.h
+++ b/include/firmware/imx/sci/svc/misc/api.h
@@ -5,27 +5,45 @@
#ifndef SC_MISC_API_H
#define SC_MISC_API_H
+/* Defines for type widths */
+#define SC_MISC_DMA_GRP_W 5U /* Width of sc_misc_dma_group_t */
+/* Max DMA channel priority group */
+#define SC_MISC_DMA_GRP_MAX 31U
/* Defines for sc_misc_boot_status_t */
#define SC_MISC_BOOT_STATUS_SUCCESS 0U /* Success */
#define SC_MISC_BOOT_STATUS_SECURITY 1U /* Security violation */
-/* Defines for sc_misc_seco_auth_cmd_t */
-#define SC_MISC_SECO_AUTH_SECO_FW 0U /* SECO Firmware */
-#define SC_MISC_SECO_AUTH_HDMI_TX_FW 1U /* HDMI TX Firmware */
-#define SC_MISC_SECO_AUTH_HDMI_RX_FW 2U /* HDMI RX Firmware */
-
/* Defines for sc_misc_temp_t */
-#define SC_MISC_TEMP 0U /* Temp sensor */
-#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */
-#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */
+#define SC_MISC_TEMP 0U /* Temp sensor */
+#define SC_MISC_TEMP_HIGH 1U /* Temp high alarm */
+#define SC_MISC_TEMP_LOW 2U /* Temp low alarm */
-/* Defines for sc_misc_seco_auth_cmd_t */
-#define SC_MISC_AUTH_CONTAINER 0U /* Authenticate container */
-#define SC_MISC_VERIFY_IMAGE 1U /* Verify image */
-#define SC_MISC_REL_CONTAINER 2U /* Release container */
+/* Defines for sc_misc_bt_t */
+#define SC_MISC_BT_PRIMARY 0U /* Primary boot */
+#define SC_MISC_BT_SECONDARY 1U /* Secondary boot */
+#define SC_MISC_BT_RECOVERY 2U /* Recovery boot */
+#define SC_MISC_BT_MANUFACTURE 3U /* Manufacture boot */
+#define SC_MISC_BT_SERIAL 4U /* Serial boot */
+/* Types */
+/*
+ * This type is used to store a DMA channel priority group.
+ */
+typedef u8 sc_misc_dma_group_t;
+
+/*
+ * This type is used report boot status.
+ */
typedef u8 sc_misc_boot_status_t;
+
+/*
+ * This type is used report boot status.
+ */
typedef u8 sc_misc_temp_t;
+/*
+ * This type is used report the boot type.
+ */
+typedef u8 sc_misc_bt_t;
#endif /* SC_MISC_API_H */
diff --git a/include/firmware/imx/sci/svc/pm/api.h b/include/firmware/imx/sci/svc/pm/api.h
index 9008b85..d1b085d 100644
--- a/include/firmware/imx/sci/svc/pm/api.h
+++ b/include/firmware/imx/sci/svc/pm/api.h
@@ -6,6 +6,14 @@
#ifndef SC_PM_API_H
#define SC_PM_API_H
+#include <firmware/imx/sci/types.h>
+/* Defines for type widths */
+#define SC_PM_POWER_MODE_W 2U /* Width of sc_pm_power_mode_t */
+#define SC_PM_CLOCK_MODE_W 3U /* Width of sc_pm_clock_mode_t */
+#define SC_PM_RESET_TYPE_W 2U /* Width of sc_pm_reset_type_t */
+#define SC_PM_RESET_REASON_W 4U /* Width of sc_pm_reset_reason_t */
+/* Defines for ALL parameters */
+#define SC_PM_CLK_ALL ((sc_pm_clk_t)UINT8_MAX) /* All clocks */
/* Defines for sc_pm_power_mode_t */
#define SC_PM_PW_MODE_OFF 0U /* Power off */
#define SC_PM_PW_MODE_STBY 1U /* Power in standby */
@@ -35,10 +43,96 @@
#define SC_PM_CLK_MODE_AUTOGATE_HW 4U /* Clock is in HW autogate mode */
#define SC_PM_CLK_MODE_AUTOGATE_SW_HW 5U /* Clock is in SW-HW autogate mode */
+/* Defines for sc_pm_clk_parent_t */
+#define SC_PM_PARENT_XTAL 0U /*!< Parent is XTAL. */
+#define SC_PM_PARENT_PLL0 1U /*!< Parent is PLL0 */
+#define SC_PM_PARENT_PLL1 2U /*!< Parent is PLL1 or PLL0/2 */
+#define SC_PM_PARENT_PLL2 3U /*!< Parent in PLL2 or PLL0/4 */
+#define SC_PM_PARENT_BYPS 4U /*!< Parent is a bypass clock. */
+
+/* Defines for sc_pm_reset_type_t */
+#define SC_PM_RESET_TYPE_COLD 0U /* Cold reset */
+#define SC_PM_RESET_TYPE_WARM 1U /* Warm reset */
+#define SC_PM_RESET_TYPE_BOARD 2U /* Board reset */
+
+/* Defines for sc_pm_reset_reason_t */
+#define SC_PM_RESET_REASON_POR 0U /* Power on reset */
+#define SC_PM_RESET_REASON_JTAG 1U /* JTAG reset */
+#define SC_PM_RESET_REASON_SW 2U /* Software reset */
+#define SC_PM_RESET_REASON_WDOG 3U /* Partition watchdog reset */
+#define SC_PM_RESET_REASON_LOCKUP 4U /* SCU lockup reset */
+#define SC_PM_RESET_REASON_SNVS 5U /* SNVS reset */
+#define SC_PM_RESET_REASON_TEMP 6U /* Temp panic reset */
+#define SC_PM_RESET_REASON_MSI 7U /* MSI reset */
+#define SC_PM_RESET_REASON_UECC 8U /* ECC reset */
+#define SC_PM_RESET_REASON_SCFW_WDOG 9U /* SCFW watchdog reset */
+#define SC_PM_RESET_REASON_ROM_WDOG 10U /* SCU ROM watchdog reset */
+#define SC_PM_RESET_REASON_SECO 11U /* SECO reset */
+#define SC_PM_RESET_REASON_SCFW_FAULT 12U /* SCFW fault reset */
+
+/* Defines for sc_pm_sys_if_t */
+#define SC_PM_SYS_IF_INTERCONNECT 0U /* System interconnect */
+#define SC_PM_SYS_IF_MU 1U /* AP -> SCU message units */
+#define SC_PM_SYS_IF_OCMEM 2U /* On-chip memory (ROM/OCRAM) */
+#define SC_PM_SYS_IF_DDR 3U /* DDR memory */
+
+/* Defines for sc_pm_wake_src_t */
+/* No wake source, used for self-kill */
+#define SC_PM_WAKE_SRC_NONE 0U
+/* Wakeup from SCU to resume CPU (IRQSTEER & GIC powered down) */
+#define SC_PM_WAKE_SRC_SCU 1U
+/* Wakeup from IRQSTEER to resume CPU (GIC powered down) */
+#define SC_PM_WAKE_SRC_IRQSTEER 2U
+/* Wakeup from IRQSTEER+GIC to wake CPU (GIC clock gated) */
+#define SC_PM_WAKE_SRC_IRQSTEER_GIC 3U
+/* Wakeup from GIC to wake CPU */
+#define SC_PM_WAKE_SRC_GIC 4U
+/* Types */
+
+/*
+ * This type is used to declare a power mode. Note resources only use
+ * SC_PM_PW_MODE_OFF and SC_PM_PW_MODE_ON. The other modes are used only
+ * as system power modes.
+ */
typedef u8 sc_pm_power_mode_t;
+
+/*
+ * This type is used to declare a clock.
+ */
typedef u8 sc_pm_clk_t;
+
+/*
+ * This type is used to declare a clock mode.
+ */
typedef u8 sc_pm_clk_mode_t;
+
+/*
+ * This type is used to declare the clock parent.
+ */
typedef u8 sc_pm_clk_parent_t;
+
+/*
+ * This type is used to declare clock rates.
+ */
typedef u32 sc_pm_clock_rate_t;
+/*
+ * This type is used to declare a desired reset type.
+ */
+typedef u8 sc_pm_reset_type_t;
+
+/*
+ * This type is used to declare a reason for a reset.
+ */
+typedef u8 sc_pm_reset_reason_t;
+
+/*
+ * This type is used to specify a system-level interface to be power managed.
+ */
+typedef u8 sc_pm_sys_if_t;
+
+/*
+ * This type is used to specify a wake source for CPU resources.
+ */
+typedef u8 sc_pm_wake_src_t;
#endif /* SC_PM_API_H */
diff --git a/include/firmware/imx/sci/svc/rm/api.h b/include/firmware/imx/sci/svc/rm/api.h
index 163d814..f4e9abc 100644
--- a/include/firmware/imx/sci/svc/rm/api.h
+++ b/include/firmware/imx/sci/svc/rm/api.h
@@ -38,32 +38,36 @@
/* Types */
-/*!
+/*
* This type is used to declare a resource partition.
*/
typedef u8 sc_rm_pt_t;
-/*!
+/*
* This type is used to declare a memory region.
*/
typedef u8 sc_rm_mr_t;
-/*!
+/*
* This type is used to declare a resource domain ID used by the
* isolation HW.
*/
typedef u8 sc_rm_did_t;
-/*!
+/*
* This type is used to declare an SMMU StreamID.
*/
typedef u16 sc_rm_sid_t;
-/*!
+/*
* This type is a used to declare master transaction attributes.
*/
typedef u8 sc_rm_spa_t;
+/*
+ * This type is used to declare a resource/memory region access permission.
+ * Refer to the XRDC2 Block Guide for more information.
+ */
typedef u8 sc_rm_perm_t;
#endif /* SC_RM_API_H */
diff --git a/include/firmware/imx/sci/svc/seco/api.h b/include/firmware/imx/sci/svc/seco/api.h
index 6e9c302..7d4b6b9 100644
--- a/include/firmware/imx/sci/svc/seco/api.h
+++ b/include/firmware/imx/sci/svc/seco/api.h
@@ -17,6 +17,7 @@
#define SC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */
#define SC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */
#define SC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */
+#define SC_SECO_EVERIFY_IMAGE 6U /* Enhanced verify image */
#define SC_SECO_RNG_STAT_UNAVAILABLE 0U /* Unable to initialize the RNG */
#define SC_SECO_RNG_STAT_INPROGRESS 1U /* Initialization is on-going */
@@ -24,12 +25,12 @@
/* Types */
-/*!
+/*
* This type is used to issue SECO authenticate commands.
*/
typedef u8 sc_seco_auth_cmd_t;
-/*!
+/*
* This type is used to return the RNG initialization status.
*/
typedef u32 sc_seco_rng_stat_t;
diff --git a/include/firmware/imx/sci/svc/timer/api.h b/include/firmware/imx/sci/svc/timer/api.h
new file mode 100644
index 0000000..c2fe34a
--- /dev/null
+++ b/include/firmware/imx/sci/svc/timer/api.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018-2019 NXP
+ */
+
+#ifndef SC_TIMER_API_H
+#define SC_TIMER_API_H
+
+/* Defines */
+
+/* Defines for type widths */
+#define SC_TIMER_ACTION_W 3U /* Width of sc_timer_wdog_action_t */
+
+/* Defines for sc_timer_wdog_action_t */
+#define SC_TIMER_WDOG_ACTION_PARTITION 0U /* Reset partition */
+#define SC_TIMER_WDOG_ACTION_WARM 1U /* Warm reset system */
+#define SC_TIMER_WDOG_ACTION_COLD 2U /* Cold reset system */
+#define SC_TIMER_WDOG_ACTION_BOARD 3U /* Reset board */
+#define SC_TIMER_WDOG_ACTION_IRQ 4U /* Only generate IRQs */
+
+/* Types */
+
+/*
+ * This type is used to configure the watchdog action.
+ */
+typedef u8 sc_timer_wdog_action_t;
+
+/*
+ * This type is used to declare a watchdog time value in milliseconds.
+ */
+typedef u32 sc_timer_wdog_time_t;
+
+#endif /* SC_TIMER_API_H */