diff --git a/CHANGELOG b/CHANGELOG
index 2397191..fef629a 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,31 @@
+commit fa1df308926a6f70e3504c57514ef27ac31fd13a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date:	Wed Jul 11 20:11:07 2007 +0200
+
+    CM1.QP1: Support for the Schindler CM1.QP1 board.
+
+    Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+    Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 96e1d75be8193ca79e4215a368bf9d7f2362450f
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date:	Wed Jul 11 18:39:11 2007 +0200
+
+    [PCS440EP]	- Show on the DIAG LEDs, if the SHA1 check failed
+		- now the Flash ST M29W040B is supported (not tested)
+		- fix the "led" command
+		- fix compile error, if BUILD_DIR is used
+
+    Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 4ef218f6fdf8d747f4589da5252b004e7d2c2876
+Author: Wolfgang Denk <wd@denx.de>
+Date:	Tue Jul 10 00:01:28 2007 +0200
+
+    Coding style cleanup; update CHANGELOG.
+
+    Signed-off-by: Wolfgang Denk <wd@denx.de>
+
 commit f1152f8c28db4a22087c21c618a3f7baa48e9a4f
 Author: Wolfgang Denk <wd@denx.de>
 Date:	Fri Jul 6 02:50:19 2007 +0200
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c
index 8c18d0f..6d6fba1 100644
--- a/cpu/ppc4xx/44x_spd_ddr.c
+++ b/cpu/ppc4xx/44x_spd_ddr.c
@@ -1017,7 +1017,7 @@
 			 */
 			for (i = 0; i < NUMMEMTESTS; i++) {
 				for (j = 0; j < NUMMEMWORDS; j++) {
-//printf("bank enabled base:%x\n", &membase[j]);
+					/* printf("bank enabled base:%x\n", &membase[j]); */
 					membase[j] = test[i][j];
 					ppcDcbf((unsigned long)&(membase[j]));
 				}
diff --git a/doc/README.sha1 b/doc/README.sha1
index 92dc8ff..7992f7f 100644
--- a/doc/README.sha1
+++ b/doc/README.sha1
@@ -34,11 +34,11 @@
 
 b) Initialize the SHA1 sum in the Image with 0x00
    The SHA1 sum is stored in Flash at:
-                           CFG_MONITOR_BASE + CFG_MONITOR_LEN + SHA1_SUM_POS
-   for the pcs440ep Flash:       0xfffa0000 +         0x60000 +        -0x20
-                            = 0xffffffe0
-   for the example in RAM:         0x300000 +         0x60000 +        -0x20
-                            = 0x35ffe0
+			   CFG_MONITOR_BASE + CFG_MONITOR_LEN + SHA1_SUM_POS
+   for the pcs440ep Flash:	 0xfffa0000 +	      0x60000 +        -0x20
+			    = 0xffffffe0
+   for the example in RAM:	   0x300000 +	      0x60000 +        -0x20
+			    = 0x35ffe0
 
    note: a SHA1 checksum is 20 bytes long.