ppc4xx: Add PCIe endpoint support on Kilauea (405EX)
This patch adds endpoint support for the AMCC Kilauea eval board. It can
be tested by connecting a reworked PCIe cable (only 1x lane singles
connected) to another root-complex.
In this test setup, a 64MB inbound window is configured at BAR0 which maps
to 0 on the PLB side. So accessing this BAR0 from the root-complex will
access the first 64MB of the SDRAM on the PPC side.
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/include/asm-ppc/4xx_pcie.h b/include/asm-ppc/4xx_pcie.h
index 1830c6a..ffe0770 100644
--- a/include/asm-ppc/4xx_pcie.h
+++ b/include/asm-ppc/4xx_pcie.h
@@ -218,7 +218,8 @@
#define PECFG_BAR0LMPA 0x210
#define PECFG_BAR0HMPA 0x214
#define PECFG_BAR1MPA 0x218
-#define PECFG_BAR2MPA 0x220
+#define PECFG_BAR2LMPA 0x220
+#define PECFG_BAR2HMPA 0x224
#define PECFG_PIMEN 0x33c
#define PECFG_PIM0LAL 0x340
@@ -259,9 +260,13 @@
*/
static inline int is_end_point(int port)
{
- static char s[10], *tk;
+ char s[10], *tk;
+ char *pcie_mode = getenv("pcie_mode");
+
+ if (pcie_mode == NULL)
+ return 0;
- strcpy(s, getenv("pcie_mode"));
+ strcpy(s, pcie_mode);
tk = strtok(s, ":");
switch (port) {