ddr: imx93: Add 625M bypass clock support
Add 625M bypass clock that may be used DRAM 625M
bypass mode support.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/arch/arm/mach-imx/imx9/clock.c b/arch/arm/mach-imx/imx9/clock.c
index 957f80f..a7eccca 100644
--- a/arch/arm/mach-imx/imx9/clock.c
+++ b/arch/arm/mach-imx/imx9/clock.c
@@ -648,6 +648,9 @@
void dram_enable_bypass(ulong clk_val)
{
switch (clk_val) {
+ case MHZ(625):
+ ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD2, 1);
+ break;
case MHZ(400):
ccm_clk_root_cfg(DRAM_ALT_CLK_ROOT, SYS_PLL_PFD1, 2);
break;
diff --git a/drivers/ddr/imx/phy/ddrphy_utils.c b/drivers/ddr/imx/phy/ddrphy_utils.c
index 6a8b6be..fd8b411 100644
--- a/drivers/ddr/imx/phy/ddrphy_utils.c
+++ b/drivers/ddr/imx/phy/ddrphy_utils.c
@@ -148,6 +148,9 @@
dram_pll_init(MHZ(167));
dram_disable_bypass();
break;
+ case 625:
+ dram_enable_bypass(MHZ(625));
+ break;
case 400:
dram_enable_bypass(MHZ(400));
break;