clk: rockchip: clk_rk3368: Implement "assign-clock-parent"
Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 5f6a5fb..6a6fe47 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -95,6 +95,13 @@
CLK_SARADC_DIV_CON_WIDTH = 8,
/* CLKSEL43_CON */
+ GMAC_DIV_CON_SHIFT = 0x0,
+ GMAC_DIV_CON_MASK = GENMASK(4, 0),
+ GMAC_PLL_SHIFT = 6,
+ GMAC_PLL_MASK = GENMASK(7, 6),
+ GMAC_PLL_SELECT_NEW = (0x0 << GMAC_PLL_SHIFT),
+ GMAC_PLL_SELECT_CODEC = (0x1 << GMAC_PLL_SHIFT),
+ GMAC_PLL_SELECT_GENERAL = (0x2 << GMAC_PLL_SHIFT),
GMAC_MUX_SEL_EXTCLK = BIT(8),
/* CLKSEL51_CON */