commit e674b8311911b3e6435c90ec0449e5ce234297a9
author Ed Swarthout <Ed.Swarthout@freescale.com> Tue Feb 24 02:37:59 2009 -0600
committer Andy Fleming <afleming@freescale.com> Mon Mar 09 17:46:09 2009 -0500
tree f1d7d76e4cf6c382bb00d4d7f1c3a845908b4b7d
parent d6b082f1f89dc60ee24ae4e99c0714f1849400b5

Fix mpc85xx ddr-gen3 ddr_sdram_cfg.

Commit e1be0d25, "32bit BUg fix for DDR2 on 8572" prevented other
sdram_cfg bits (such as ecc and self_refresh_in_sleep) from being set.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>

cpu/mpc85xx/ddr-gen3.c

diff --git a/cpu/mpc85xx/ddr-gen3.c b/cpu/mpc85xx/ddr-gen3.c
index 8dc2b3a..99c325a 100644
--- a/cpu/mpc85xx/ddr-gen3.c
+++ b/cpu/mpc85xx/ddr-gen3.c
@@ -79,8 +79,8 @@
 	out_be32(&ddr->ddr_sdram_rcw_1, regs->ddr_sdram_rcw_1);
 	out_be32(&ddr->ddr_sdram_rcw_2, regs->ddr_sdram_rcw_2);
 
-	/* Do not enable the memory */
-	temp_sdram_cfg = in_be32(&ddr->sdram_cfg);
+	/* Set, but do not enable the memory */
+	temp_sdram_cfg = regs->ddr_sdram_cfg;
 	temp_sdram_cfg &= ~(SDRAM_CFG_MEM_EN);
 	out_be32(&ddr->sdram_cfg, temp_sdram_cfg);
 	/*