| commit | 7f5dd94ec7603c905af3ffc268e7dc00025548a7 | [log] [tgz] |
|---|---|---|
| author | Ye Li <ye.li@nxp.com> | Fri Oct 29 09:46:34 2021 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Sat Feb 05 13:38:39 2022 +0100 |
| tree | 36c6c2964be77be493cdee15253c2479efcae9fb | |
| parent | 9cac6e28d8f2eec6675b292fc4f689844c235c44 [diff] |
imx8ulp: ddr: Fix DDR frequency request issue After acking the requested frequency, should wait the ack bit clear by DDR controller and check the DFS interrupt for next request polling. Otherwise, the next polling of request bit will get previous value that DDR controller have not cleared it, so a wrong request frequency is used. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>