armv7: ls102xa: Correct endianness of SCFG_SPARECR8 read
The patch corrects endianness of register SCFG_SPARECR8 read
in_le32 -> in_be32
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
index bb169aa..00b6ad4 100644
--- a/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
+++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_psci.c
@@ -72,7 +72,7 @@
* returns zero, so its value is saved to a scrachpad register to be
* read, that is why we don't read it from register ippdexpcr1 itself.
*/
- ippdexpcr1 = in_le32(&scfg->sparecr[7]);
+ ippdexpcr1 = in_be32(&scfg->sparecr[7]);
out_be32(&rcpm->ippdexpcr1, ippdexpcr1);
if (ippdexpcr0 & RCPM_IPPDEXPCR0_ETSEC)