diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7706b41..641510c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -22,6 +22,7 @@
 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-firefly.dtb \
 	rk3288-jerry.dtb \
+	rk3288-rock2-square.dtb \
 	rk3036-sdk.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c
index 9fdd37d..6a54368 100644
--- a/arch/arm/mach-rockchip/rk3288-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3288-board-spl.c
@@ -114,6 +114,7 @@
 #ifdef CONFIG_SPL_MMC_SUPPORT
 static int configure_emmc(struct udevice *pinctrl)
 {
+#ifndef CONFIG_TARGET_ROCK2
 	struct gpio_desc desc;
 	int ret;
 
@@ -143,6 +144,7 @@
 		debug("gpio value ret=%d\n", ret);
 		return ret;
 	}
+#endif
 
 	return 0;
 }
diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig
index ed89c3e..7215624 100644
--- a/arch/arm/mach-rockchip/rk3288/Kconfig
+++ b/arch/arm/mach-rockchip/rk3288/Kconfig
@@ -16,6 +16,14 @@
 	  WiFi. It includes a Chrome OS EC (Cortex-M3) to provide access to
 	  the keyboard and battery functions.
 
+config TARGET_ROCK2
+	bool "Radxa Rock 2"
+	help
+	  Rock 2 is a SOM and base-board combination based on RK3288. It
+	  includes Ethernet, HDMI, 3 USB, micro-SD, audio, SATA, WiFi and
+	  space for a real-time-clock battery. There is also an expansion
+	  interface which provides access to many pins.
+
 config ROCKCHIP_FAST_SPL
 	bool "Change the CPU to full speed in SPL"
 	depends on TARGET_CHROMEBOOK_JERRY
@@ -35,4 +43,6 @@
 
 source "board/firefly/firefly-rk3288/Kconfig"
 
+source "board/radxa/rock2/Kconfig"
+
 endif
diff --git a/board/radxa/rock2/Kconfig b/board/radxa/rock2/Kconfig
new file mode 100644
index 0000000..c2ff9e9
--- /dev/null
+++ b/board/radxa/rock2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_ROCK2
+
+config SYS_BOARD
+	default "rock2"
+
+config SYS_VENDOR
+	default "radxa"
+
+config SYS_CONFIG_NAME
+	default "rock2"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/radxa/rock2/MAINTAINERS b/board/radxa/rock2/MAINTAINERS
new file mode 100644
index 0000000..a697e68
--- /dev/null
+++ b/board/radxa/rock2/MAINTAINERS
@@ -0,0 +1,6 @@
+FIREFLY
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+F:	board/radxa/rock2
+F:	include/configs/rock2.h
+F:	configs/rock2_defconfig
diff --git a/board/radxa/rock2/Makefile b/board/radxa/rock2/Makefile
new file mode 100644
index 0000000..caa305b
--- /dev/null
+++ b/board/radxa/rock2/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Google, Inc
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y	+= rock2.o
diff --git a/board/radxa/rock2/rock2.c b/board/radxa/rock2/rock2.c
new file mode 100644
index 0000000..5119e95
--- /dev/null
+++ b/board/radxa/rock2/rock2.c
@@ -0,0 +1,7 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
new file mode 100644
index 0000000..2563775
--- /dev/null
+++ b/configs/rock2_defconfig
@@ -0,0 +1,53 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_ROCKCHIP_RK3288=y
+CONFIG_TARGET_ROCK2=y
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square"
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent"
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+# CONFIG_SPL_SIMPLE_BUS is not set
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_RESET=y
+CONFIG_DM_MMC=y
+CONFIG_ROCKCHIP_DWMMC=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
+CONFIG_ROCKCHIP_PINCTRL=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_PMIC_ACT8846=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_REGULATOR_ACT8846=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xff690000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_ROTATION=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_CMD_DHRYSTONE=y
+CONFIG_ERRNO_STR=y
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 7be5a13..364affd 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -39,7 +39,7 @@
 At present three RK3288 boards are supported:
 
    - Firefly RK3288 - use firefly-rk3288 configuration
-   - Radxa Rock 2 - also uses firefly-rk3288 configuration
+   - Radxa Rock 2 - use rock2 configuration
    - Haier Chromebook - use chromebook_jerry configuration
 
 one RK3036 board is support:
@@ -52,11 +52,6 @@
 
 (or you can use another cross compiler if you prefer)
 
-Note that the Radxa Rock 2 uses the Firefly configuration for now as
-device tree files are not yet available for the Rock 2. Clearly the two
-have hardware differences, so this approach will break down as more drivers
-are added.
-
 
 Writing to the board with USB
 =============================
diff --git a/include/configs/rock2.h b/include/configs/rock2.h
new file mode 100644
index 0000000..d6423e7
--- /dev/null
+++ b/include/configs/rock2.h
@@ -0,0 +1,31 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdin=serial,cros-ec-keyb\0" \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#include <configs/rk3288_common.h>
+
+#define CONFIG_SPL_MMC_SUPPORT
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+/* SPL @ 32k for ~36k
+ * ENV @ 96k
+ * u-boot @ 128K
+ */
+#define CONFIG_ENV_OFFSET (96 * 1024)
+
+#define CONFIG_I2C_EDID
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_CONSOLE_SCROLL_LINES		10
+
+#endif