armv8/fsl_lsch2: Add fsl_lsch2 SoC
Freescale LayerScape with Chassis Generation 2 is a set of SoCs with
ARMv8 cores and 2rd generation of Chassis.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 73e48a7..637853d 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -76,6 +76,23 @@
init_early_memctl_regs(); /* tighten IFC timing */
erratum_a009203();
}
+
+#elif defined(CONFIG_LS1043A)
+void fsl_lsch2_early_init_f(void)
+{
+ struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
+
+#ifdef CONFIG_FSL_IFC
+ init_early_memctl_regs(); /* tighten IFC timing */
+#endif
+
+ /*
+ * Enable snoop requests and DVM message requests for
+ * Slave insterface S4 (A53 core cluster)
+ */
+ out_le32(&cci->slave[4].snoop_ctrl,
+ CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
+}
#endif
#ifdef CONFIG_BOARD_LATE_INIT