mips: cache: Make invalidate_dcache_range() weak to enable overwrite
This patch adds __weak to invalidate_dcache_range() in lib/cache.c. This
makes it possible to overwrite this function by a platforms specific
version, which will be done for Octeon.
Signed-off-by: Stefan Roese <sr@denx.de>
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index ad37f05..cf29994 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -159,7 +159,7 @@
sync();
}
-void invalidate_dcache_range(ulong start_addr, ulong stop)
+void __weak invalidate_dcache_range(ulong start_addr, ulong stop)
{
unsigned long lsize = dcache_line_size();
unsigned long slsize = scache_line_size();