commit e422adcd8b48c824f0c4afc4a4beb73fecc6a87c
author Chris Packham <judge.packham@gmail.com> Thu Jan 30 12:50:44 2020 +1300
committer Stefan Roese <sr@denx.de> Tue Apr 14 08:59:44 2020 +0200
tree af7271c3b37a41b1731e2c56f06178e6f5d6043d
parent f282d765970f0e5aca970c86462dc82d43c68335

ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter

For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.

Signed-off-by: Chris Packham <judge.packham@gmail.com>

drivers/ddr/marvell/a38x/ddr3_init.c

diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c b/drivers/ddr/marvell/a38x/ddr3_init.c
index 22c8f9c..a971cc1 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -106,8 +106,10 @@
 	struct tune_train_params params;
 	int status;
 	u32 cs_num;
+	int ck_delay;
 
 	cs_num = mv_ddr_cs_num_get();
+	ck_delay = mv_ddr_ck_delay_get();
 
 	/* NOTE: do not remove any field initilization */
 	params.ck_delay = TUNE_TRAINING_PARAMS_CK_DELAY;
@@ -131,6 +133,9 @@
 		params.g_odt_config = TUNE_TRAINING_PARAMS_ODT_CONFIG_2CS;
 	}
 
+	if (ck_delay > 0)
+		params.ck_delay = ck_delay;
+
 	status = ddr3_tip_tune_training_params(dev_num, &params);
 	if (MV_OK != status) {
 		printf("%s Training Sequence - FAILED\n", ddr_type);