commit e3051d9a35cee347d81ee616fb13bcd9589aef0e
author Francois Retief <fgretief@spaceteq.co.za> Wed Oct 28 14:29:32 2015 +0200
committer Francois Retief <fgretief@spaceteq.co.za> Thu Dec 03 13:15:48 2015 +0200
tree 3d6c2fe4a6deb1c4b1f1dfac50482b15e710b726
parent 21ffc1f320ee69da3f8b5ee8e20e24acc2334a2e

sparc: Initial ground work for generic board initialization

Initial ground work in preperation for generic board initialization
code for the SPARC architecture.

Signed-off-by: Francois Retief <fgretief@spaceteq.co.za>

arch/sparc/cpu/leon2/cpu.c

diff --git a/arch/sparc/cpu/leon2/cpu.c b/arch/sparc/cpu/leon2/cpu.c
index 380c397..22e63e3 100644
--- a/arch/sparc/cpu/leon2/cpu.c
+++ b/arch/sparc/cpu/leon2/cpu.c
@@ -1,7 +1,7 @@
 /* CPU specific code for the LEON2 CPU
  *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
+ * (C) Copyright 2007, 2015
+ * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */

arch/sparc/cpu/leon2/cpu_init.c

diff --git a/arch/sparc/cpu/leon2/cpu_init.c b/arch/sparc/cpu/leon2/cpu_init.c
index 695ee02..581f057 100644
--- a/arch/sparc/cpu/leon2/cpu_init.c
+++ b/arch/sparc/cpu/leon2/cpu_init.c
@@ -1,8 +1,8 @@
 /* Initializes CPU and basic hardware such as memory
  * controllers, IRQ controller and system timer 0.
  *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
+ * (C) Copyright 2007, 2015
+ * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -18,14 +18,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* reset CPU (jump to 0, without reset) */
-void start(void);
-
-struct {
-	gd_t gd_area;
-	bd_t bd;
-} global_data;
-
 /*
  * Breath some life into the CPU...
  *
@@ -66,7 +58,16 @@
 
 void cpu_init_f2(void)
 {
+
+}
+
+int arch_cpu_init(void)
+{
+	gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
+	gd->bus_clk = CONFIG_SYS_CLK_FREQ;
+	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
+	return 0;
 }
 
 /*

arch/sparc/cpu/leon3/cpu.c

diff --git a/arch/sparc/cpu/leon3/cpu.c b/arch/sparc/cpu/leon3/cpu.c
index 8ab3150..d57bf2f 100644
--- a/arch/sparc/cpu/leon3/cpu.c
+++ b/arch/sparc/cpu/leon3/cpu.c
@@ -1,7 +1,7 @@
 /* CPU specific code for the LEON3 CPU
  *
- * (C) Copyright 2007
- * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com
+ * (C) Copyright 2007, 2015
+ * Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */

arch/sparc/cpu/leon3/cpu_init.c

diff --git a/arch/sparc/cpu/leon3/cpu_init.c b/arch/sparc/cpu/leon3/cpu_init.c
index b140da3..a0526cd 100644
--- a/arch/sparc/cpu/leon3/cpu_init.c
+++ b/arch/sparc/cpu/leon3/cpu_init.c
@@ -27,19 +27,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/* reset CPU (jump to 0, without reset) */
-void start(void);
-
 ambapp_dev_irqmp *irqmp = NULL;
 ambapp_dev_gptimer *gptimer = NULL;
 unsigned int gptimer_irq = 0;
 int leon3_snooping_avail = 0;
 
-struct {
-	gd_t gd_area;
-	bd_t bd;
-} global_data;
-
 /*
  * Breath some life into the CPU...
  *
@@ -71,6 +63,15 @@
 	ambapp_bus_init(CONFIG_AMBAPP_IOAREA, CONFIG_SYS_CLK_FREQ, &ambapp_plb);
 }
 
+int arch_cpu_init(void)
+{
+	gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
+	gd->bus_clk = CONFIG_SYS_CLK_FREQ;
+	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+	return 0;
+}
+
 /*
  * initialize higher level parts of CPU like time base and timers
  */