Merge branch 'master' of git://git.denx.de/u-boot-mips
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index a3e14a8..8fa57ec 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -107,6 +107,7 @@
# instruction. Relocation is not supported for that case, so disable
# such usage by requiring word relocations.
PLATFORM_CPPFLAGS += $(call cc-option, -mword-relocations)
+PLATFORM_CPPFLAGS += $(call cc-option, -fno-pic)
endif
# limit ourselves to the sections we want in the .bin.
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index a5aa4fa..94ff488 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -16,6 +16,23 @@
#define ARMV7_DCACHE_CLEAN_INVAL_RANGE 4
#ifndef CONFIG_SYS_DCACHE_OFF
+static int check_cache_range(unsigned long start, unsigned long stop)
+{
+ int ok = 1;
+
+ if (start & (CONFIG_SYS_CACHELINE_SIZE - 1))
+ ok = 0;
+
+ if (stop & (CONFIG_SYS_CACHELINE_SIZE - 1))
+ ok = 0;
+
+ if (!ok)
+ debug("CACHE: Misaligned operation at range [%08lx, %08lx]\n",
+ start, stop);
+
+ return ok;
+}
+
/*
* Write the level and type you want to Cache Size Selection Register(CSSELR)
* to get size details from Current Cache Size ID Register(CCSIDR)
@@ -257,6 +274,8 @@
*/
void invalidate_dcache_range(unsigned long start, unsigned long stop)
{
+ check_cache_range(start, stop);
+
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE);
v7_outer_cache_inval_range(start, stop);
@@ -269,6 +288,8 @@
*/
void flush_dcache_range(unsigned long start, unsigned long stop)
{
+ check_cache_range(start, stop);
+
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_CLEAN_INVAL_RANGE);
v7_outer_cache_flush_range(start, stop);
diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index d48a905..e148ab7 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -14,23 +14,24 @@
ENTRY(_start)
SECTIONS
{
+#if defined(CONFIG_ARMV7_SECURE_BASE) && defined(CONFIG_ARMV7_NONSEC)
/*
- * Discard the relocation entries for secure text.
- * The secure code is bundled with u-boot image, so there will
- * be relocations entries for the secure code, since we use
- * "-mword-relocations" to compile and "-pie" to link into the
- * final image. We do not need the relocation entries for secure
- * code, because secure code will not be relocated, it only needs
- * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
- * which is the linking and running address for secure code.
- * If keep the relocation entries in .rel.dyn section,
- * "relocation offset + linking address" may locates into an
- * address that is reserved by SoC, then will trigger data abort.
+ * If CONFIG_ARMV7_SECURE_BASE is true, secure code will not
+ * bundle with u-boot, and code offsets are fixed. Secure zone
+ * only needs to be copied from the loading address to
+ * CONFIG_ARMV7_SECURE_BASE, which is the linking and running
+ * address for secure code.
*
- * The reason that move .rel._secure at the beginning, is to
- * avoid hole in the final image.
+ * If CONFIG_ARMV7_SECURE_BASE is undefined, the secure zone will
+ * be included in u-boot address space, and some absolute address
+ * were used in secure code. The absolute addresses of the secure
+ * code also needs to be relocated along with the accompanying u-boot
+ * code.
+ *
+ * So DISCARD is only for CONFIG_ARMV7_SECURE_BASE.
*/
/DISCARD/ : { *(.rel._secure*) }
+#endif
. = 0x00000000;
. = ALIGN(4);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 67cbbc2..026e7ef 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -259,7 +259,7 @@
isb();
}
-#ifdef CONFIG_ARMV7
+#ifdef CONFIG_CPU_V7
/* Short-Descriptor Translation Table Level 1 Bits */
#define TTB_SECT_NS_MASK (1 << 19)
#define TTB_SECT_NG_MASK (1 << 17)
@@ -274,8 +274,7 @@
/* options available for data cache on each page */
enum dcache_option {
- DCACHE_OFF = TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
- TTB_SECT_XN_MASK | TTB_SECT,
+ DCACHE_OFF = TTB_SECT_DOMAIN(0) | TTB_SECT_XN_MASK | TTB_SECT,
DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
@@ -296,7 +295,7 @@
MMU_SECTION_SIZE = 1 << MMU_SECTION_SHIFT,
};
-#ifdef CONFIG_ARMV7
+#ifdef CONFIG_CPU_V7
/* TTBR0 bits */
#define TTBR0_BASE_ADDR_MASK 0xFFFFC000
#define TTBR0_RGN_NC (0 << 3)
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index c65e068..8e18538 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -96,7 +96,7 @@
dram_bank_mmu_setup(i);
}
-#ifdef CONFIG_ARMV7
+#ifdef CONFIG_CPU_V7
/* Set TTBR0 */
reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK;
#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 4ed8e00..3cc2874 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -13,6 +13,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
*/
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 23457d6..4547d7f 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -13,6 +13,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
*/
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index 9db4a4f..d692106 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -12,6 +12,8 @@
#include <asm/hardware.h>
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
#define CONFIG_SYS_TEXT_BASE 0x26f00000
/* ARM asynchronous clock */
diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h
index 305864f..1d4869b 100644
--- a/include/configs/bcm_ep_board.h
+++ b/include/configs/bcm_ep_board.h
@@ -11,6 +11,7 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_CACHELINE_SIZE 64
/*
* Memory configuration
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 2dc745e..24ae14d 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -17,6 +17,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
*/
diff --git a/include/configs/cm_t3517.h b/include/configs/cm_t3517.h
index 0aefec8..7a07de4 100644
--- a/include/configs/cm_t3517.h
+++ b/include/configs/cm_t3517.h
@@ -10,6 +10,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
*/
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index 5aed3a5..dd44462 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -12,6 +12,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
#include <asm/arch/imx-regs.h>
#define CONFIG_VF610
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 94b0f03..d5cbb33 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -10,6 +10,8 @@
#undef DEBUG
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
#define CONFIG_SH73A0
#define CONFIG_KZM_A9_GT
#define CONFIG_RMOBILE_BOARD_STRING "KMC KZM-A9-GT"
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index b11e43a..5c41405 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -19,6 +19,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
*/
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 5f0a230..d5f517c 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -110,11 +110,12 @@
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
+#define CONFIG_SYS_SPD_BUS_NUM 0
/* I2C EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
-#define CONFIG_SYS_SPD_BUS_NUM 2
+#define CONFIG_SYS_I2C_EEPROM_BUS 2
#endif
/* MMC Configs */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 891bdb0..2628dfa 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -9,6 +9,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
#include <asm/arch/imx-regs.h>
#define CONFIG_VF610
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index f0a3a18..f750b53 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -9,6 +9,8 @@
#ifndef __RCAR_GEN2_COMMON_H
#define __RCAR_GEN2_COMMON_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#include <asm/arch/rmobile.h>
#define CONFIG_CMD_DFL
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index d22ea74..368d046 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -6,6 +6,8 @@
#ifndef __CONFIG_RK3036_COMMON_H
#define __CONFIG_RK3036_COMMON_H
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
#include <asm/arch/hardware.h>
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index ebf1ab0..427ac4b 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -7,6 +7,8 @@
#ifndef __CONFIG_RK3288_COMMON_H
#define __CONFIG_RK3288_COMMON_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#include <asm/arch/hardware.h>
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 8f65d7e..f92c23d 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -17,6 +17,8 @@
#define CONFIG_S5PC110 1 /* which is in a S5PC110 */
#define CONFIG_MACH_GONI 1 /* working with Goni */
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#include <linux/sizes.h>
#include <asm/arch/cpu.h> /* get chip and board defs */
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index c36e444..db79e54 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -12,6 +12,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
* (easy to change)
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index c1bd179..d5aba70 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -13,6 +13,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/*
* High Level Configuration Options
*/
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index e726040..3d0498d 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -16,6 +16,8 @@
#ifndef __CONFIG_TI814X_EVM_H
#define __CONFIG_TI814X_EVM_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#define CONFIG_TI81XX
#define CONFIG_TI814X
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index ba652ca..533fae7 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -10,6 +10,8 @@
#ifndef __CONFIG_TI816X_EVM_H
#define __CONFIG_TI816X_EVM_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#define CONFIG_TI81XX
#define CONFIG_TI816X
#define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 02fdcdc..6a4868c 100644
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -14,6 +14,11 @@
#ifndef __CONFIG_TI_OMAP3_COMMON_H__
#define __CONFIG_TI_OMAP3_COMMON_H__
+/*
+ * High Level Configuration Options
+ */
+
+#define CONFIG_SYS_CACHELINE_SIZE 64
#include <asm/arch/cpu.h>
#include <asm/arch/omap.h>
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index f5f5324..2ec2f01 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -16,6 +16,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
/* High Level Configuration Options */
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_OMAP /* in a TI OMAP core */
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index cec510c..d78ca0b 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -118,6 +118,8 @@
#define CONFIG_SYS_MEMTEST_START V2M_BASE
#define CONFIG_SYS_MEMTEST_END 0x20000000
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_SYS_L2CACHE_OFF 1
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index dcfafaf..d100f73 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -9,6 +9,8 @@
#ifndef __CONFIG_H
#define __CONFIG_H
+#define CONFIG_SYS_CACHELINE_SIZE 32
+
#include <asm/arch/imx-regs.h>
#define CONFIG_VF610