tree 8be8c29aed216748488cdbbea7f578cd77a148a2
parent 8804877efe306e40fe29b06920edfc1d66dd73cb
author Icenowy Zheng <icenowy@aosc.xyz> 1496481020 +0800
committer Jagan Teki <jagan@amarulasolutions.com> 1496941675 +0530

sunxi: add support for the DDR2 in V3s SoC

Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its
timing param.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>