tree a6437c10a20ac1e0bfef9ef24e8af6e5953ab398
parent 9148fa90bd40abdfc5f43e693ed4aa8948c9d638
author Ravi Babu <ravibabu@ti.com> 1458083354 -0500
committer Tom Rini <trini@konsulko.com> 1459084334 -0400

board: ti: DRA72: revC evm: Update sdram timing configuration for SR2.0

DDR configuration has changes from SR1.1 based Rev-A/B version of evm
to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher
density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB.

Update the DDR configuration based on data from EMIF configuration
tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the
configuration.

Tested-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>