commit | 25269c05aa269c2474c62fc62cf788914b4357e2 | [log] [tgz] |
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author | Pragnesh Patel <pragnesh.patel@sifive.com> | Fri May 29 11:33:34 2020 +0530 |
committer | Andes <uboot@andestech.com> | Thu Jun 04 09:44:09 2020 +0800 |
tree | df338133e8def1152c763175f6c428442fee873f | |
parent | 01ec498071189bf36bba70a21b507586467fce8d [diff] |
riscv: cpu: fu540: Add support for cpu fu540 Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>