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git01.mediatek.com / filogic / uboot / df41fc634d9e2e7899dc1023a7390708e6d8b886 / . / dts / upstream / Bindings / fpga
tree: 112f7ba8ead75a320d97323d4a271848a4db5e10 [path history] [tgz]
  1. altera-passive-serial.txt
  2. altera-pr-ip.txt
  3. altera-socfpga-a10-fpga-mgr.txt
  4. altera-socfpga-fpga-mgr.txt
  5. altr,freeze-bridge-controller.yaml
  6. altr,socfpga-fpga2sdram-bridge.yaml
  7. altr,socfpga-hps2fpga-bridge.yaml
  8. fpga-bridge.yaml
  9. fpga-region.yaml
  10. intel-stratix10-soc-fpga-mgr.txt
  11. lattice,sysconfig.yaml
  12. lattice-ice40-fpga-mgr.txt
  13. lattice-machxo2-spi.txt
  14. microchip,mpf-spi-fpga-mgr.yaml
  15. xilinx-zynq-fpga-mgr.yaml
  16. xlnx,fpga-slave-serial.yaml
  17. xlnx,pr-decoupler.yaml
  18. xlnx,versal-fpga.yaml
  19. xlnx,zynqmp-pcap-fpga.yaml