diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c
index 28db96c..bbbca13b 100644
--- a/drivers/video/tegra124/display.c
+++ b/drivers/video/tegra124/display.c
@@ -363,9 +363,9 @@
 		return ret;
 	}
 
-	dc_ctlr = (struct dc_ctlr *)fdtdec_get_addr(blob, dev->of_offset,
+	dc_ctlr = (struct dc_ctlr *)fdtdec_get_addr(blob, dev_of_offset(dev),
 						    "reg");
-	if (fdtdec_decode_display_timing(blob, dev->of_offset, 0, timing)) {
+	if (fdtdec_decode_display_timing(blob, dev_of_offset(dev), 0, timing)) {
 		debug("%s: Failed to decode display timing\n", __func__);
 		return -EINVAL;
 	}
diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c
index e5cea51..5e4140f 100644
--- a/drivers/video/tegra124/sor.c
+++ b/drivers/video/tegra124/sor.c
@@ -757,7 +757,7 @@
 
 	/* Use the first display controller */
 	debug("%s\n", __func__);
-	node = dc_dev->of_offset;
+	node = dev_of_offset(dc_dev);
 	disp_ctrl = (struct dc_ctlr *)fdtdec_get_addr(blob, node, "reg");
 
 	tegra_dc_sor_enable_dc(disp_ctrl);
@@ -973,7 +973,7 @@
 
 	debug("%s\n", __func__);
 	/* Use the first display controller */
-	node = dc_dev->of_offset;
+	node = dev_of_offset(dc_dev);
 	disp_ctrl = (struct dc_ctlr *)fdtdec_get_addr(blob, node, "reg");
 
 	/* Sleep mode */
@@ -1045,7 +1045,7 @@
 	int node;
 	int ret;
 
-	priv->base = (void *)fdtdec_get_addr(blob, dev->of_offset, "reg");
+	priv->base = (void *)fdtdec_get_addr(blob, dev_of_offset(dev), "reg");
 
 	node = fdtdec_next_compatible(blob, 0, COMPAT_NVIDIA_TEGRA124_PMC);
 	if (node < 0) {