| commit | dcd580b85ed0bcc56f915505bd3f9b9877163d37 | [log] [tgz] |
|---|---|---|
| author | Andy Fleming <afleming@freescale.com> | Sat Feb 24 01:08:13 2007 -0600 |
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | Wed May 02 15:50:13 2007 -0500 |
| tree | 3dcae45bdac750bb7a7cb377a975f0dbd5b70b3a | |
| parent | 71706df03a59d5a3b85c2229283a2143a8e0b2b4 [diff] |
Cleaned up some 85xx PCI bugs * Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>