i.MX6Q: icore: Add SPL_OF_CONTROL support

Add OF_CONTROL support for SPL code.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi
index 8b9d5b4..65cbf5a 100644
--- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi
@@ -100,6 +100,7 @@
 };
 
 &usdhc3 {
+	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc3>;
 	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
@@ -165,6 +166,7 @@
 	};
 
 	pinctrl_usdhc3: usdhc3grp {
+		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17070
 			MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10070
diff --git a/arch/arm/dts/imx6qdl-icore.dtsi b/arch/arm/dts/imx6qdl-icore.dtsi
index a485c3e..06d9bc3 100644
--- a/arch/arm/dts/imx6qdl-icore.dtsi
+++ b/arch/arm/dts/imx6qdl-icore.dtsi
@@ -118,6 +118,7 @@
 };
 
 &usdhc1 {
+	u-boot,dm-spl;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
 	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
@@ -208,6 +209,7 @@
 	};
 
 	pinctrl_usdhc1: usdhc1grp {
+		u-boot,dm-spl;
 		fsl,pins = <
 			MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17070
 			MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10070
diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi
index b13b0b2..e04b570 100644
--- a/arch/arm/dts/imx6qdl.dtsi
+++ b/arch/arm/dts/imx6qdl.dtsi
@@ -77,6 +77,7 @@
 		compatible = "simple-bus";
 		interrupt-parent = <&gpc>;
 		ranges;
+		u-boot,dm-spl;
 
 		dma_apbh: dma-apbh@00110000 {
 			compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
@@ -225,6 +226,7 @@
 			#size-cells = <1>;
 			reg = <0x02000000 0x100000>;
 			ranges;
+			u-boot,dm-spl;
 
 			spba-bus@02000000 {
 				compatible = "fsl,spba-bus", "simple-bus";
@@ -516,6 +518,7 @@
 				#gpio-cells = <2>;
 				interrupt-controller;
 				#interrupt-cells = <2>;
+				u-boot,dm-spl;
 			};
 
 			gpio2: gpio@020a0000 {
@@ -805,6 +808,7 @@
 			iomuxc: iomuxc@020e0000 {
 				compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
 				reg = <0x020e0000 0x4000>;
+				u-boot,dm-spl;
 			};
 
 			ldb: ldb@020e0008 {
@@ -889,6 +893,7 @@
 			#size-cells = <1>;
 			reg = <0x02100000 0x100000>;
 			ranges;
+			u-boot,dm-spl;
 
 			crypto: caam@2100000 {
 				compatible = "fsl,sec-v4.0";
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index 6f5a92a..b78ebc1 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -219,6 +219,10 @@
 	select DM_THERMAL
 	select SUPPORT_SPL
 	select SPL_LOAD_FIT
+	select SPL_DM if SPL
+	select SPL_OF_CONTROL if SPL
+	select SPL_SEPARATE_BSS if SPL
+	select SPL_PINCTRL if SPL
 
 config TARGET_MX6Q_ICORE_RQS
 	bool "Support Engicam i.Core RQS"
@@ -234,6 +238,10 @@
 	select DM_THERMAL
 	select SUPPORT_SPL
 	select SPL_LOAD_FIT
+	select SPL_DM if SPL
+	select SPL_OF_CONTROL if SPL
+	select SPL_SEPARATE_BSS if SPL
+	select SPL_PINCTRL if SPL
 
 config TARGET_MX6SABREAUTO
 	bool "mx6sabreauto"