commit dc40f0219c4a8129a0edcfecff810a116b466928
author Álvaro Fernández Rojas <noltari@gmail.com> Sun Feb 04 21:10:18 2018 +0100
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Wed Mar 21 23:23:13 2018 +0100
tree 7aec233044de8151a38f4fa20e83d77643cbfc1f
parent 56821ff334da5ff9539d3a1c3a5cdf17d650f76f

mips: bmips: add support for bcm6362 usb

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

arch/mips/dts/brcm,bcm6362.dtsi

diff --git a/arch/mips/dts/brcm,bcm6362.dtsi b/arch/mips/dts/brcm,bcm6362.dtsi
index 012a675..f695ec3 100644
--- a/arch/mips/dts/brcm,bcm6362.dtsi
+++ b/arch/mips/dts/brcm,bcm6362.dtsi
@@ -177,6 +177,36 @@
 			#power-domain-cells = <1>;
 		};
 
+		ehci: usb-controller@10002500 {
+			compatible = "brcm,bcm6362-ehci", "generic-ehci";
+			reg = <0x10002500 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		ohci: usb-controller@10002600 {
+			compatible = "brcm,bcm6362-ohci", "generic-ohci";
+			reg = <0x10002600 0x100>;
+			phys = <&usbh>;
+			big-endian;
+
+			status = "disabled";
+		};
+
+		usbh: usb-phy@10002700 {
+			compatible = "brcm,bcm6368-usbh";
+			reg = <0x10002700 0x38>;
+			#phy-cells = <0>;
+			clocks = <&periph_clk BCM6362_CLK_USBH>;
+			clock-names = "usbh";
+			power-domains = <&periph_pwr BCM6362_PWR_USBH>;
+			resets = <&periph_rst BCM6362_RST_USBH>;
+
+			status = "disabled";
+		};
+
 		memory-controller@10003000 {
 			compatible = "brcm,bcm6328-mc";
 			reg = <0x10003000 0x864>;

include/configs/bmips_bcm6362.h

diff --git a/include/configs/bmips_bcm6362.h b/include/configs/bmips_bcm6362.h
index 5fd22c3..2f92ac1 100644
--- a/include/configs/bmips_bcm6362.h
+++ b/include/configs/bmips_bcm6362.h
@@ -14,6 +14,13 @@
 #define CONFIG_NR_DRAM_BANKS		1
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
+/* USB */
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_SYS_OHCI_SWAP_REG_ACCESS
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_OHCI_NEW
+
 /* U-Boot */
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE + 0x100000