diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
index 7e8c015..19d5724 100644
--- a/drivers/ddr/altera/sdram_arria10.c
+++ b/drivers/ddr/altera/sdram_arria10.c
@@ -18,6 +18,7 @@
 #include <asm/arch/misc.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/sdram.h>
+#include <linux/delay.h>
 #include <linux/kernel.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c
index abe8c11..629ba67 100644
--- a/drivers/ddr/fsl/arm_ddr_gen3.c
+++ b/drivers/ddr/fsl/arm_ddr_gen3.c
@@ -13,6 +13,7 @@
 #include <fsl_immap.h>
 #include <fsl_ddr.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 2b8475f..eab5b82 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -16,6 +16,7 @@
 	defined(CONFIG_ARM)
 #include <asm/arch/clock.h>
 #endif
+#include <linux/delay.h>
 
 #define CTLR_INTLV_MASK	0x20000000
 
diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c
index 0828512..cbd625b 100644
--- a/drivers/ddr/fsl/fsl_mmdc.c
+++ b/drivers/ddr/fsl/fsl_mmdc.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <fsl_mmdc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits)
 {
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index 4b39b17..572f370 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -7,6 +7,7 @@
 #include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
index 54c10a8..d7b8064 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index c6e983b..ab8d2de 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/processor.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/mpc86xx_ddr.c b/drivers/ddr/fsl/mpc86xx_ddr.c
index 737a879..43ed1ba 100644
--- a/drivers/ddr/fsl/mpc86xx_ddr.c
+++ b/drivers/ddr/fsl/mpc86xx_ddr.c
@@ -7,6 +7,7 @@
 #include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index 7d6e08d..ac4f8d2 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -8,6 +8,7 @@
 #include <asm/fsl_law.h>
 #endif
 #include <div64.h>
+#include <linux/delay.h>
 
 #include <fsl_ddr.h>
 #include <fsl_immap.h>
diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c
index 8d7ac79..34cc170 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training.c
@@ -8,6 +8,7 @@
 #include "mv_ddr_training_db.h"
 #include "mv_ddr_regs.h"
 #include <log.h>
+#include <linux/delay.h>
 
 #define GET_CS_FROM_MASK(mask)	(cs_mask2_num[mask])
 #define CS_CBE_VALUE(cs_num)	(cs_cbe_reg[cs_num])
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c b/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
index 1eababe..979f353 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
@@ -7,6 +7,7 @@
 #include "mv_ddr_regs.h"
 #include "ddr_training_ip_db.h"
 #include <image.h>
+#include <linux/delay.h>
 
 #define PATTERN_1	0x55555555
 #define PATTERN_2	0xaaaaaaaa
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c
index 7f7df67..dadb06b 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c
@@ -7,6 +7,7 @@
 #include "mv_ddr_training_db.h"
 #include "ddr_training_ip_db.h"
 #include "mv_ddr_regs.h"
+#include <linux/delay.h>
 
 #define WL_ITERATION_NUM	10
 
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
index cc7942d..72f0dfb 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
@@ -7,6 +7,7 @@
 #include "mv_ddr_training_db.h"
 #include "mv_ddr_regs.h"
 #include "mv_ddr_sys_env_lib.h"
+#include <linux/delay.h>
 
 #define DDR_INTERFACES_NUM		1
 #define DDR_INTERFACE_OCTETS_NUM	5
diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c
index ba89959..b58c0fe 100644
--- a/drivers/ddr/marvell/axp/ddr3_dfs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dfs.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_hw_training.h"
 
diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.c b/drivers/ddr/marvell/axp/ddr3_hw_training.c
index 9dc911c..35d98fa 100644
--- a/drivers/ddr/marvell/axp/ddr3_hw_training.c
+++ b/drivers/ddr/marvell/axp/ddr3_hw_training.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_init.h"
 #include "ddr3_hw_training.h"
diff --git a/drivers/ddr/marvell/axp/ddr3_init.c b/drivers/ddr/marvell/axp/ddr3_init.c
index 8e6d447..607f3e1 100644
--- a/drivers/ddr/marvell/axp/ddr3_init.c
+++ b/drivers/ddr/marvell/axp/ddr3_init.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_init.h"
 
diff --git a/drivers/ddr/marvell/axp/ddr3_pbs.c b/drivers/ddr/marvell/axp/ddr3_pbs.c
index e44f08d..069a42fb 100644
--- a/drivers/ddr/marvell/axp/ddr3_pbs.c
+++ b/drivers/ddr/marvell/axp/ddr3_pbs.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_hw_training.h"
 
diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
index 2061489..d4add44 100644
--- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_hw_training.h"