| commit | 192189920df1935c936f4e03d61505b7497de73b | [log] [tgz] |
|---|---|---|
| author | Mingkai Hu <Mingkai.Hu@freescale.com> | Wed Nov 11 17:58:34 2015 +0800 |
| committer | York Sun <yorksun@freescale.com> | Mon Nov 30 09:11:10 2015 -0800 |
| tree | deb74cf668e12399f6fbf08a4e48434c6d3e3e85 | |
| parent | 77f7ded1200ad554b8d700e358982a7b46a71b60 [diff] |
pci/layerscape: add support for LS1043A PCIe LUT register access The endian and base address of PEX LUT register region is different between Chassis 2 and Chassis 3, so move the base address definition to chassis specific header file and add pex_lut_* functions to access LUT register. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>