commit | d959bfc4b671f014e79069339326bb65b31b9688 | [log] [tgz] |
---|---|---|
author | Michal Simek <michal.simek@xilinx.com> | Fri Oct 15 14:48:20 2021 +0200 |
committer | Michal Simek <michal.simek@xilinx.com> | Thu Oct 21 08:52:30 2021 +0200 |
tree | c9aa15607f4d718abecc9d72a42e9f612b09dd8b | |
parent | 278a53843c3e30cb56d27255ffd31e2f214ffa26 [diff] |
arm64: zynqmp: Fix sgmii clock input freq for p-a2197 Input frequency for sgmii is 125MHz on all Xilinx designs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/87153c59cc526f5955b3bff3db11027b5848c042.1634302099.git.michal.simek@xilinx.com
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index c893aaa..5d21795 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -46,7 +46,7 @@ si5332_1: si5332_1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <33333333>; /* FIXME */ + clock-frequency = <125000000>; }; si5332_2: si5332_2 { /* clk1_usb - u142 */