Merge tag 'u-boot-imx-master-20240405' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/20228
- Convert imx8mp-beacon and verdin-imx8mm/verdin-imx8mp to OF_UPSTREAM.
- Enable PCIe NVMe support on imx8mp_beacon.
- Fix Ethernet and board detection on mx6cuboxi.
- Fix signature_block_hdr struct fields.
- Fix imx9_probe_mu prototype and make it to get called in
EVT_DM_POST_INIT_R.
- Test whether ethernet node is enabled before reading MAC EEPROM on
DHSOM SoMs.
diff --git a/.mailmap b/.mailmap
index 59f8471..932bd4d 100644
--- a/.mailmap
+++ b/.mailmap
@@ -30,6 +30,7 @@
Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharat.kumar.gogada@xilinx.com>
Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> <bharatku@xilinx.com>
Bhargava Sreekantappa Gayathri <bhargava.sreekantappa-gayathri@amd.com> <bhargava.sreekantappa-gayathri@xilinx.com>
+Bhupesh Sharma <bhupesh.linux@gmail.com> <bhupesh.sharma@linaro.org>
Bin Meng <bmeng.cn@gmail.com> <bin.meng@windriver.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a0842e1..4cdf08d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1078,6 +1078,7 @@
select DM_GPIO
select DM_SERIAL
select DM_RESET
+ select POWER_DOMAIN
select GPIO_EXTRA_HEADER
select MSM_SMEM
select OF_CONTROL
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 78aeba5..2634bb4 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -47,33 +47,7 @@
dtb-$(CONFIG_ARCH_KIRKWOOD) += \
kirkwood-atl-sbx81lifkw.dtb \
- kirkwood-atl-sbx81lifxcat.dtb \
- kirkwood-blackarmor-nas220.dtb \
- kirkwood-d2net.dtb \
- kirkwood-dns325.dtb \
- kirkwood-dockstar.dtb \
- kirkwood-dreamplug.dtb \
- kirkwood-ds109.dtb \
- kirkwood-goflexnet.dtb \
- kirkwood-guruplug-server-plus.dtb \
- kirkwood-ib62x0.dtb \
- kirkwood-iconnect.dtb \
- kirkwood-is2.dtb \
- kirkwood-lsxhl.dtb \
- kirkwood-lschlv2.dtb \
- kirkwood-net2big.dtb \
- kirkwood-ns2.dtb \
- kirkwood-ns2lite.dtb \
- kirkwood-ns2max.dtb \
- kirkwood-ns2mini.dtb \
- kirkwood-nsa310s.dtb \
- kirkwood-nsa325.dtb \
- kirkwood-openrd-base.dtb \
- kirkwood-openrd-client.dtb \
- kirkwood-openrd-ultimate.dtb \
- kirkwood-pogo_e02.dtb \
- kirkwood-pogoplug-series-4.dtb \
- kirkwood-sheevaplug.dtb
+ kirkwood-atl-sbx81lifxcat.dtb
dtb-$(CONFIG_MACH_S900) += \
bubblegum_96.dtb
@@ -219,40 +193,8 @@
s5p4418-nanopi2.dtb
dtb-$(CONFIG_ARCH_MESON) += \
- meson-a1-ad401.dtb \
- meson-axg-s400.dtb \
- meson-axg-jethome-jethub-j100.dtb \
- meson-gxl-s805x-libretech-ac.dtb \
- meson-gxl-s905d-libretech-pc.dtb \
- meson-gxl-s905w-jethome-jethub-j80.dtb \
- meson-gxl-s905x-khadas-vim.dtb \
- meson-gxl-s905x-libretech-cc.dtb \
- meson-gxl-s905x-libretech-cc-v2.dtb \
- meson-gxl-s905x-p212.dtb \
- meson-gxm-gt1-ultimate.dtb \
- meson-gxm-khadas-vim2.dtb \
- meson-gxm-s912-libretech-pc.dtb \
- meson-gxm-wetek-core2.dtb \
- meson-g12a-radxa-zero.dtb \
- meson-g12a-sei510.dtb \
- meson-g12a-u200.dtb \
- meson-g12b-a311d-bananapi-m2s.dtb \
- meson-g12b-a311d-khadas-vim3.dtb \
- meson-g12b-bananapi-cm4-cm4io.dtb \
- meson-g12b-gsking-x.dtb \
- meson-g12b-gtking.dtb \
- meson-g12b-gtking-pro.dtb \
- meson-g12b-odroid-go-ultra.dtb \
- meson-g12b-odroid-n2.dtb \
- meson-g12b-odroid-n2l.dtb \
- meson-g12b-odroid-n2-plus.dtb \
- meson-g12b-radxa-zero2.dtb \
- meson-sm1-bananapi-m2-pro.dtb \
- meson-sm1-bananapi-m5.dtb \
- meson-sm1-khadas-vim3l.dtb \
- meson-sm1-odroid-c4.dtb \
- meson-sm1-odroid-hc4.dtb \
- meson-sm1-sei610.dtb
+ meson-a1-ad401.dtb
+
dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/kirkwood-6192.dtsi b/arch/arm/dts/kirkwood-6192.dtsi
deleted file mode 100644
index 396bcba..0000000
--- a/arch/arm/dts/kirkwood-6192.dtsi
+++ /dev/null
@@ -1,88 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
- };
- };
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- compatible = "marvell,88f6192-pinctrl";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp5", "mpp21", "mpp23";
- marvell,function = "sata0";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp4", "mpp20", "mpp22";
- marvell,function = "sata1";
- };
- pmx_sdio: pmx-sdio {
- marvell,pins = "mpp12", "mpp13", "mpp14",
- "mpp15", "mpp16", "mpp17";
- marvell,function = "sdio";
- };
- };
-
- rtc: rtc@10300 {
- compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <53>;
- clocks = <&gate_clk 7>;
- };
-
- sata: sata@80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <21>;
- clocks = <&gate_clk 14>, <&gate_clk 15>;
- clock-names = "0", "1";
- phys = <&sata_phy0>, <&sata_phy1>;
- phy-names = "port0", "port1";
- status = "disabled";
- };
-
- sdio: mvsdio@90000 {
- compatible = "marvell,orion-sdio";
- reg = <0x90000 0x200>;
- interrupts = <28>;
- clocks = <&gate_clk 4>;
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-6281.dtsi b/arch/arm/dts/kirkwood-6281.dtsi
deleted file mode 100644
index faa0584..0000000
--- a/arch/arm/dts/kirkwood-6281.dtsi
+++ /dev/null
@@ -1,90 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
- };
- };
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- compatible = "marvell,88f6281-pinctrl";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp5", "mpp21", "mpp23";
- marvell,function = "sata0";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp4", "mpp20", "mpp22";
- marvell,function = "sata1";
- };
- pmx_sdio: pmx-sdio {
- marvell,pins = "mpp12", "mpp13", "mpp14",
- "mpp15", "mpp16", "mpp17";
- marvell,function = "sdio";
- };
- };
-
- rtc: rtc@10300 {
- compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <53>;
- clocks = <&gate_clk 7>;
- };
-
- sata: sata@80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <21>;
- clocks = <&gate_clk 14>, <&gate_clk 15>;
- clock-names = "0", "1";
- phys = <&sata_phy0>, <&sata_phy1>;
- phy-names = "port0", "port1";
- status = "disabled";
- };
-
- sdio: mvsdio@90000 {
- compatible = "marvell,orion-sdio";
- reg = <0x90000 0x200>;
- interrupts = <28>;
- clocks = <&gate_clk 4>;
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-6282.dtsi b/arch/arm/dts/kirkwood-6282.dtsi
deleted file mode 100644
index e732c50..0000000
--- a/arch/arm/dts/kirkwood-6282.dtsi
+++ /dev/null
@@ -1,161 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
- 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
- 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
- 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-names = "intx", "error";
- interrupts = <9>, <44>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie0_intc 0>,
- <0 0 0 2 &pcie0_intc 1>,
- <0 0 0 3 &pcie0_intc 2>,
- <0 0 0 4 &pcie0_intc 3>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
-
- pcie0_intc: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- };
- };
-
- pcie1: pcie@2,0 {
- device_type = "pci";
- assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
- reg = <0x1000 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
- 0x81000000 0 0 0x81000000 0x2 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-names = "intx", "error";
- interrupts = <10>, <45>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie1_intc 0>,
- <0 0 0 2 &pcie1_intc 1>,
- <0 0 0 3 &pcie1_intc 2>,
- <0 0 0 4 &pcie1_intc 3>;
- marvell,pcie-port = <1>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 18>;
- status = "disabled";
-
- pcie1_intc: interrupt-controller {
- interrupt-controller;
- #interrupt-cells = <1>;
- };
- };
- };
- };
- ocp@f1000000 {
-
- pinctrl: pin-controller@10000 {
- compatible = "marvell,88f6282-pinctrl";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp5", "mpp21", "mpp23";
- marvell,function = "sata0";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp4", "mpp20", "mpp22";
- marvell,function = "sata1";
- };
-
- /*
- * Default I2C1 pinctrl setting on mpp36/mpp37,
- * overwrite marvell,pins on board level if required.
- */
- pmx_twsi1: pmx-twsi1 {
- marvell,pins = "mpp36", "mpp37";
- marvell,function = "twsi1";
- };
-
- pmx_sdio: pmx-sdio {
- marvell,pins = "mpp12", "mpp13", "mpp14",
- "mpp15", "mpp16", "mpp17";
- marvell,function = "sdio";
- };
- };
-
- thermal: thermal@10078 {
- compatible = "marvell,kirkwood-thermal";
- reg = <0x10078 0x4>;
- status = "okay";
- };
-
- rtc: rtc@10300 {
- compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
- reg = <0x10300 0x20>;
- interrupts = <53>;
- clocks = <&gate_clk 7>;
- };
-
- i2c1: i2c@11100 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11100 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <32>;
- clock-frequency = <100000>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_twsi1>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- sata: sata@80000 {
- compatible = "marvell,orion-sata";
- reg = <0x80000 0x5000>;
- interrupts = <21>;
- clocks = <&gate_clk 14>, <&gate_clk 15>;
- clock-names = "0", "1";
- phys = <&sata_phy0>, <&sata_phy1>;
- phy-names = "port0", "port1";
- status = "disabled";
- };
-
- sdio: mvsdio@90000 {
- compatible = "marvell,orion-sdio";
- reg = <0x90000 0x200>;
- interrupts = <28>;
- clocks = <&gate_clk 4>;
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- bus-width = <4>;
- cap-sdio-irq;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-98dx4122.dtsi b/arch/arm/dts/kirkwood-98dx4122.dtsi
deleted file mode 100644
index 299c147..0000000
--- a/arch/arm/dts/kirkwood-98dx4122.dtsi
+++ /dev/null
@@ -1,53 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/ {
- mbus@f1000000 {
- pciec: pcie@82000000 {
- compatible = "marvell,kirkwood-pcie";
- status = "disabled";
- device_type = "pci";
-
- #address-cells = <3>;
- #size-cells = <2>;
-
- bus-range = <0x00 0xff>;
-
- ranges =
- <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
- 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
- 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
-
- pcie0: pcie@1,0 {
- device_type = "pci";
- assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
- reg = <0x0800 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- #interrupt-cells = <1>;
- ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
- 0x81000000 0 0 0x81000000 0x1 0 1 0>;
- bus-range = <0x00 0xff>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &intc 9>;
- marvell,pcie-port = <0>;
- marvell,pcie-lane = <0>;
- clocks = <&gate_clk 2>;
- status = "disabled";
- };
- };
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- compatible = "marvell,98dx4122-pinctrl";
-
- };
- };
-};
-
-&sata_phy0 {
- status = "disabled";
-};
-
-&sata_phy1 {
- status = "disabled";
-};
diff --git a/arch/arm/dts/kirkwood-blackarmor-nas220.dts b/arch/arm/dts/kirkwood-blackarmor-nas220.dts
deleted file mode 100644
index 07fbfca..0000000
--- a/arch/arm/dts/kirkwood-blackarmor-nas220.dts
+++ /dev/null
@@ -1,172 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Device Tree file for Seagate Blackarmor NAS220
- *
- * Copyright (C) 2014 Evgeni Dobrev <evgeni@studio-punkt.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include "kirkwood.dtsi"
-#include "kirkwood-6192.dtsi"
-
-/ {
- model = "Seagate Blackarmor NAS220";
- compatible = "seagate,blackarmor-nas220","marvell,kirkwood-88f6192",
- "marvell,kirkwood";
-
- memory { /* 128 MB */
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
-
- reset {
- label = "Reset";
- linux,code = <KEY_POWER>;
- gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
-
- button {
- label = "Power";
- linux,code = <KEY_SLEEP>;
- gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- blue-power {
- label = "nas220:blue:power";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-on";
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
- pinctrl-names = "default";
-
- sata0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "SATA0 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
-
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 28 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-/*
- * Serial port routed to connector CN5
- *
- * pin 1 - TX (CPU's TX)
- * pin 4 - RX (CPU's RX)
- * pin 6 - GND
- */
-&uart0 {
- status = "okay";
-};
-
-&pinctrl {
- pinctrl-0 = <&pmx_button_reset &pmx_button_power>;
- pinctrl-names = "default";
-
- pmx_act_sata0: pmx-act-sata0 {
- marvell,pins = "mpp15";
- marvell,function = "sata0";
- };
-
- pmx_act_sata1: pmx-act-sata1 {
- marvell,pins = "mpp16";
- marvell,function = "sata1";
- };
-
- pmx_power_sata0: pmx-power-sata0 {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-
- pmx_power_sata1: pmx-power-sata1 {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_button_power: pmx-button-power {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
-};
-
-&sata {
- status = "okay";
- nr-ports = <2>;
-};
-
-&i2c0 {
- status = "okay";
-
- adt7476: thermal@2e {
- compatible = "adi,adt7476";
- reg = <0x2e>;
- };
-};
-
-&nand {
- status = "okay";
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
-
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-d2net.dts b/arch/arm/dts/kirkwood-d2net.dts
deleted file mode 100644
index bd3b266..0000000
--- a/arch/arm/dts/kirkwood-d2net.dts
+++ /dev/null
@@ -1,45 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree file for d2 Network v2
- *
- * Copyright (C) 2014 Simon Guinot <simon.guinot@sequanux.org>
- *
-*/
-
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-netxbig.dtsi"
-
-/ {
- model = "LaCie d2 Network v2";
- compatible = "lacie,d2net_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "d2net_v2:blue:sata";
- slow-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- cmd-gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- red-fail {
- label = "d2net_v2:red:fail";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-dns325.dts b/arch/arm/dts/kirkwood-dns325.dts
deleted file mode 100644
index 94d9c06..0000000
--- a/arch/arm/dts/kirkwood-dns325.dts
+++ /dev/null
@@ -1,63 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-dnskw.dtsi"
-
-/ {
- model = "D-Link DNS-325 NAS (Rev A1)";
- compatible = "dlink,dns-325-a1", "dlink,dns-325", "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_power &pmx_led_red_usb_325
- &pmx_led_red_left_hdd &pmx_led_red_right_hdd
- &pmx_led_white_usb>;
- pinctrl-names = "default";
-
- white-power {
- label = "dns325:white:power";
- gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- white-usb {
- label = "dns325:white:usb";
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; /* GPIO 43 */
- };
- red-l_hdd {
- label = "dns325:red:l_hdd";
- gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
- };
- red-r_hdd {
- label = "dns325:red:r_hdd";
- gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
- };
- red-usb {
- label = "dns325:red:usb";
- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- };
- };
-
- ocp@f1000000 {
- i2c@11000 {
- status = "okay";
-
- lm75: lm75@48 {
- compatible = "national,lm75";
- reg = <0x48>;
- };
- };
- serial@12000 {
- status = "okay";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-dnskw.dtsi b/arch/arm/dts/kirkwood-dnskw.dtsi
deleted file mode 100644
index cbaf06f..0000000
--- a/arch/arm/dts/kirkwood-dnskw.dtsi
+++ /dev/null
@@ -1,235 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "D-Link DNS NASes (kirkwood-based)";
- compatible = "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_power &pmx_button_unmount
- &pmx_button_reset>;
- pinctrl-names = "default";
-
- power {
- label = "Power button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
- };
- eject {
- label = "USB unmount button";
- linux,code = <KEY_EJECTCD>;
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- reset {
- label = "Reset button";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio_fan {
- /* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fan_high_speed &pmx_fan_low_speed>;
- pinctrl-names = "default";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW
- &gpio1 13 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map = <0 0
- 3000 1
- 6000 2>;
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_power_off>;
- pinctrl-names = "default";
- gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
-
- pinctrl-0 = <&pmx_power_back_on &pmx_present_sata0
- &pmx_present_sata1 &pmx_fan_tacho
- &pmx_temp_alarm>;
- pinctrl-names = "default";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp20";
- marvell,function = "sata1";
- };
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp21";
- marvell,function = "sata0";
- };
- pmx_led_power: pmx-led-power {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
- pmx_led_red_right_hdd: pmx-led-red-right-hdd {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
- pmx_led_red_left_hdd: pmx-led-red-left-hdd {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
- pmx_led_red_usb_325: pmx-led-red-usb-325 {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_button_power: pmx-button-power {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
- pmx_led_red_usb_320: pmx-led-red-usb-320 {
- marvell,pins = "mpp35";
- marvell,function = "gpio";
- };
- pmx_power_off: pmx-power-off {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
- pmx_power_back_on: pmx-power-back-on {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
- pmx_power_sata0: pmx-power-sata0 {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
- pmx_power_sata1: pmx-power-sata1 {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- pmx_present_sata0: pmx-present-sata0 {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_present_sata1: pmx-present-sata1 {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_led_white_usb: pmx-led-white-usb {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_fan_tacho: pmx-fan-tacho {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_fan_high_speed: pmx-fan-high-speed {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- pmx_fan_low_speed: pmx-fan-low-speed {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_button_unmount: pmx-button-unmount {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- pmx_temp_alarm: pmx-temp-alarm {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- };
- sata@80000 {
- pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_power_sata0 &pmx_power_sata1>;
- pinctrl-names = "default";
-
- sata0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "SATA0 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio1 7 0>;
- };
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio1 8 0>;
- };
- };
-};
-
-&nand {
- status = "okay";
- chip-delay = <35>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x500000>;
- };
-
- partition@600000 {
- label = "ramdisk";
- reg = <0x0600000 0x500000>;
- };
-
- partition@b00000 {
- label = "image";
- reg = <0x0b00000 0x6600000>;
- };
-
- partition@7100000 {
- label = "mini firmware";
- reg = <0x7100000 0xa00000>;
- };
-
- partition@7b00000 {
- label = "config";
- reg = <0x7b00000 0x500000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-dockstar.dts b/arch/arm/dts/kirkwood-dockstar.dts
deleted file mode 100644
index 6a3f1bf..0000000
--- a/arch/arm/dts/kirkwood-dockstar.dts
+++ /dev/null
@@ -1,110 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Seagate FreeAgent Dockstar";
- compatible = "seagate,dockstar", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_led_green: pmx-led-green {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_orange: pmx-led-orange {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
- };
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_green &pmx_led_orange>;
- pinctrl-names = "default";
-
- health {
- label = "status:green:health";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- fault {
- label = "status:orange:fault";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- };
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 0>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "data";
- reg = <0x0500000 0xfb00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- compatible = "marvell,88e1116";
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi b/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
new file mode 100644
index 0000000..59f19a2
--- /dev/null
+++ b/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ aliases {
+ spi0 = &spi0;
+ };
+};
diff --git a/arch/arm/dts/kirkwood-dreamplug.dts b/arch/arm/dts/kirkwood-dreamplug.dts
deleted file mode 100644
index e9eea22..0000000
--- a/arch/arm/dts/kirkwood-dreamplug.dts
+++ /dev/null
@@ -1,131 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Globalscale Technologies Dreamplug";
- compatible = "globalscale,dreamplug-003-ds2001", "globalscale,dreamplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- aliases {
- spi0 = &spi0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_led_bluetooth: pmx-led-bluetooth {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_led_wifi: pmx-led-wifi {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- pmx_led_wifi_ap: pmx-led-wifi-ap {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
-
- spi@10600 {
- status = "okay";
-
- m25p40@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25l1606e", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <50000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x80000>;
- label = "u-boot";
- };
-
- partition@100000 {
- reg = <0x100000 0x10000>;
- label = "u-boot env";
- };
-
- partition@180000 {
- reg = <0x180000 0x10000>;
- label = "dtb";
- };
- };
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- mvsdio@90000 {
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- status = "okay";
- /* No CD or WP GPIOs */
- broken-cd;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_bluetooth &pmx_led_wifi
- &pmx_led_wifi_ap >;
- pinctrl-names = "default";
-
- bluetooth {
- label = "dreamplug:blue:bluetooth";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- wifi {
- label = "dreamplug:green:wifi";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- wifi-ap {
- label = "dreamplug:green:wifi_ap";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-ds109.dts b/arch/arm/dts/kirkwood-ds109.dts
deleted file mode 100644
index 29982e7..0000000
--- a/arch/arm/dts/kirkwood-ds109.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Andrew Lunn <andrew@lunn.ch>
- * Ben Peddell <klightspeed@killerwolves.net>
- *
- */
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-#include "kirkwood-synology.dtsi"
-
-/ {
- model = "Synology DS109, DS110, DS110jv20";
- compatible = "synology,ds109", "synology,ds110jv20",
- "synology,ds110", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- gpio-fan-150-32-35 {
- status = "okay";
- };
-
- gpio-leds-hdd-21-1 {
- status = "okay";
- };
-};
-
-&rs5c372 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-goflexnet.dts b/arch/arm/dts/kirkwood-goflexnet.dts
deleted file mode 100644
index 02d87e0..0000000
--- a/arch/arm/dts/kirkwood-goflexnet.dts
+++ /dev/null
@@ -1,190 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Seagate GoFlex Net";
- compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_0: pmx-led_right_cap_0 {
- marvell,pins = "mpp38";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_1: pmx-led_right_cap_1 {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_2: pmx-led_right_cap_2 {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- pmx_led_right_cap_3: pmx-led_right_cap_3 {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_0: pmx-led_left_cap_0 {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_1: pmx-led_left_cap_1 {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_2: pmx-led_left_cap_2 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_led_left_cap_3: pmx-led_left_cap_3 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- pmx_led_green: pmx-led_green {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_orange: pmx-led_orange {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
-
- };
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = < &pmx_led_orange
- &pmx_led_left_cap_0 &pmx_led_left_cap_1
- &pmx_led_left_cap_2 &pmx_led_left_cap_3
- &pmx_led_right_cap_0 &pmx_led_right_cap_1
- &pmx_led_right_cap_2 &pmx_led_right_cap_3
- >;
- pinctrl-names = "default";
-
- health {
- label = "status:green:health";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- fault {
- label = "status:orange:fault";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- left0 {
- label = "status:white:left0";
- gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- };
- left1 {
- label = "status:white:left1";
- gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
- };
- left2 {
- label = "status:white:left2";
- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
- left3 {
- label = "status:white:left3";
- gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- right0 {
- label = "status:white:right0";
- gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
- };
- right1 {
- label = "status:white:right1";
- gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
- };
- right2 {
- label = "status:white:right2";
- gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
- };
- right3 {
- label = "status:white:right3";
- gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- };
- };
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&nand {
- chip-delay = <40>;
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
- };
-
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0xd800000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/dts/kirkwood-guruplug-server-plus.dts
deleted file mode 100644
index ff1260e..0000000
--- a/arch/arm/dts/kirkwood-guruplug-server-plus.dts
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Globalscale Technologies Guruplug Server Plus";
- compatible = "globalscale,guruplug-server-plus", "globalscale,guruplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_led_health_r: pmx-led-health-r {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_health_g: pmx-led-health-g {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_led_wmode_r: pmx-led-wmode-r {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- pmx_led_wmode_g: pmx-led-wmode-g {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "ok";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- /* AzureWave AW-GH381 WiFi/BT */
- mvsdio@90000 {
- status = "okay";
- non-removable;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g
- &pmx_led_wmode_r &pmx_led_wmode_g >;
- pinctrl-names = "default";
-
- health-r {
- label = "guruplug:red:health";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- };
- health-g {
- label = "guruplug:green:health";
- gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
- };
- wmode-r {
- label = "guruplug:red:wmode";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- wmode-g {
- label = "guruplug:green:wmode";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x00100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x00100000 0x00400000>;
- };
-
- partition@500000 {
- label = "data";
- reg = <0x00500000 0x1fb00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- /* Marvell 88E1121R */
- compatible = "ethernet-phy-id0141.0cb0",
- "ethernet-phy-ieee802.3-c22";
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@1 {
- /* Marvell 88E1121R */
- compatible = "ethernet-phy-id0141.0cb0",
- "ethernet-phy-ieee802.3-c22";
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- phy-connection-type = "rgmii-id";
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- phy-connection-type = "rgmii-id";
- };
-};
diff --git a/arch/arm/dts/kirkwood-ib62x0.dts b/arch/arm/dts/kirkwood-ib62x0.dts
deleted file mode 100644
index 962a910..0000000
--- a/arch/arm/dts/kirkwood-ib62x0.dts
+++ /dev/null
@@ -1,146 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_led_os_red: pmx-led-os-red {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
- pmx_power_off: pmx-power-off {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
- pmx_led_os_green: pmx-led-os-green {
- marvell,pins = "mpp25";
- marvell,function = "gpio";
- };
- pmx_led_usb_transfer: pmx-led-usb-transfer {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
- pmx_button_usb_copy: pmx-button-usb-copy {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_reset &pmx_button_usb_copy>;
- pinctrl-names = "default";
-
- copy {
- label = "USB Copy";
- linux,code = <KEY_COPY>;
- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- };
- reset {
- label = "Reset";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_os_red &pmx_led_os_green
- &pmx_led_usb_transfer>;
- pinctrl-names = "default";
-
- green-os {
- label = "ib62x0:green:os";
- gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
- };
- red-os {
- label = "ib62x0:red:os";
- gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
- };
- usb-copy {
- label = "ib62x0:red:usb_copy";
- gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_power_off>;
- pinctrl-names = "default";
- gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0xe0000>;
- };
-
- partition@e0000 {
- label = "u-boot environment";
- reg = <0xe0000 0x20000>;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x600000>;
- };
-
- partition@700000 {
- label = "root";
- reg = <0x0700000 0xf900000>;
- };
-
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
-
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-iconnect.dts b/arch/arm/dts/kirkwood-iconnect.dts
deleted file mode 100644
index 4a512d8..0000000
--- a/arch/arm/dts/kirkwood-iconnect.dts
+++ /dev/null
@@ -1,195 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Iomega Iconnect";
- compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- linux,initrd-start = <0x4500040>;
- linux,initrd-end = <0x4800000>;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_button_reset: pmx-button-reset {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
- pmx_button_otb: pmx-button-otb {
- marvell,pins = "mpp35";
- marvell,function = "gpio";
- };
- pmx_led_level: pmx-led-level {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_led_power_blue: pmx-led-power-blue {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_led_power_red: pmx-power-red {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_led_usb1: pmx-led-usb1 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_led_usb2: pmx-led-usb2 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- pmx_led_usb3: pmx-led-usb3 {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_usb4: pmx-led-usb4 {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- pmx_led_otb: pmx-led-otb {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
- };
- i2c@11000 {
- status = "okay";
-
- lm63: lm63@4c {
- compatible = "national,lm63";
- reg = <0x4c>;
- };
- };
- serial@12000 {
- status = "ok";
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = < &pmx_led_level &pmx_led_power_blue
- &pmx_led_power_red &pmx_led_usb1
- &pmx_led_usb2 &pmx_led_usb3
- &pmx_led_usb4 &pmx_led_otb >;
- pinctrl-names = "default";
-
- led-level {
- label = "led_level";
- gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- power-blue {
- label = "power:blue";
- gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
- };
- power-red {
- label = "power:red";
- gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
- };
- usb1 {
- label = "usb1:blue";
- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
- usb2 {
- label = "usb2:blue";
- gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- usb3 {
- label = "usb3:blue";
- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- };
- usb4 {
- label = "usb4:blue";
- gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
- };
- otb {
- label = "otb:blue";
- gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = < &pmx_button_reset &pmx_button_otb >;
- pinctrl-names = "default";
-
- otb {
- label = "OTB Button";
- linux,code = <KEY_COPY>;
- gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
- debounce-interval = <100>;
- };
- reset {
- label = "Reset";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
- debounce-interval = <100>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "uboot";
- reg = <0x0000000 0xc0000>;
- };
-
- partition@a0000 {
- label = "env";
- reg = <0xa0000 0x20000>;
- };
-
- partition@100000 {
- label = "zImage";
- reg = <0x100000 0x300000>;
- };
-
- partition@540000 {
- label = "initrd";
- reg = <0x540000 0x300000>;
- };
-
- partition@980000 {
- label = "boot";
- reg = <0x980000 0x1f400000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@11 {
- reg = <11>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-is2.dts b/arch/arm/dts/kirkwood-is2.dts
deleted file mode 100644
index 1bc16a5..0000000
--- a/arch/arm/dts/kirkwood-is2.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Internet Space v2";
- compatible = "lacie,inetspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <8>; };
diff --git a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
index 7fc2d7d..cf33ff8 100644
--- a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
+++ b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
@@ -1,7 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
-ð0 {
- status = "disabled";
+/ {
+ aliases {
+ spi0 = &spi0;
+ };
};
&hdd_power {
diff --git a/arch/arm/dts/kirkwood-lschlv2.dts b/arch/arm/dts/kirkwood-lschlv2.dts
deleted file mode 100644
index 1d737d9..0000000
--- a/arch/arm/dts/kirkwood-lschlv2.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-lsxl.dtsi"
-
-/ {
- model = "Buffalo Linkstation LS-CHLv2";
- compatible = "buffalo,lschlv2", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x4000000>;
- };
-
- ocp@f1000000 {
- serial@12000 {
- status = "okay";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi b/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
index 7fc2d7d..cf33ff8 100644
--- a/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
+++ b/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
@@ -1,7 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
-ð0 {
- status = "disabled";
+/ {
+ aliases {
+ spi0 = &spi0;
+ };
};
&hdd_power {
diff --git a/arch/arm/dts/kirkwood-lsxhl.dts b/arch/arm/dts/kirkwood-lsxhl.dts
deleted file mode 100644
index a56e0d7..0000000
--- a/arch/arm/dts/kirkwood-lsxhl.dts
+++ /dev/null
@@ -1,20 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-lsxl.dtsi"
-
-/ {
- model = "Buffalo Linkstation LS-XHL";
- compatible = "buffalo,lsxhl", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ocp@f1000000 {
- serial@12000 {
- status = "okay";
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-lsxl.dtsi b/arch/arm/dts/kirkwood-lsxl.dtsi
deleted file mode 100644
index c99c0da..0000000
--- a/arch/arm/dts/kirkwood-lsxl.dtsi
+++ /dev/null
@@ -1,241 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- aliases {
- spi0 = &spi0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_power_hdd: pmx-power-hdd {
- marvell,pins = "mpp10";
- marvell,function = "gpo";
- };
- pmx_usb_vbus: pmx-usb-vbus {
- marvell,pins = "mpp11";
- marvell,function = "gpio";
- };
- pmx_fan_high: pmx-fan-high {
- marvell,pins = "mpp18";
- marvell,function = "gpo";
- };
- pmx_fan_low: pmx-fan-low {
- marvell,pins = "mpp19";
- marvell,function = "gpo";
- };
- pmx_led_function_blue: pmx-led-function-blue {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
- pmx_led_alarm: pmx-led-alarm {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
- pmx_led_info: pmx-led-info {
- marvell,pins = "mpp38";
- marvell,function = "gpio";
- };
- pmx_led_power: pmx-led-power {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
- pmx_fan_lock: pmx-fan-lock {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- pmx_button_function: pmx-button-function {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
- pmx_power_switch: pmx-power-switch {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
- pmx_power_auto_switch: pmx-power-auto-switch {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
- pmx_led_function_red: pmx-led-function_red {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
-
- };
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- spi@10600 {
- status = "okay";
-
- m25p40@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "m25p40", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <25000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x60000>;
- label = "uboot";
- read-only;
- };
-
- partition@60000 {
- reg = <0x60000 0x10000>;
- label = "dtb";
- read-only;
- };
-
- partition@70000 {
- reg = <0x70000 0x10000>;
- label = "uboot_env";
- };
- };
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_function &pmx_power_switch
- &pmx_power_auto_switch>;
- pinctrl-names = "default";
-
- option {
- label = "Function Button";
- linux,code = <KEY_OPTION>;
- gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
- };
- reserved {
- label = "Power-on Switch";
- linux,code = <KEY_RESERVED>;
- linux,input-type = <5>;
- gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- };
- power {
- label = "Power-auto Switch";
- linux,code = <KEY_ESC>;
- linux,input-type = <5>;
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio_leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_function_red &pmx_led_alarm
- &pmx_led_info &pmx_led_power
- &pmx_led_function_blue>;
- pinctrl-names = "default";
-
- func_blue {
- label = "lsxl:blue:func";
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
-
- alarm {
- label = "lsxl:red:alarm";
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
-
- info {
- label = "lsxl:amber:info";
- gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- };
-
- power {
- label = "lsxl:blue:power";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
-
- func_red {
- label = "lsxl:red:func";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio_fan {
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>;
- pinctrl-names = "default";
- gpios = <&gpio0 19 GPIO_ACTIVE_LOW
- &gpio0 18 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map = <0 3
- 1500 2
- 3250 1
- 5000 0>;
- alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
- };
-
- restart_poweroff {
- compatible = "restart-poweroff";
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_power_hdd &pmx_usb_vbus>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 11 0>;
- };
- hdd_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "HDD Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 10 0>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- ethphy1: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-net2big.dts b/arch/arm/dts/kirkwood-net2big.dts
deleted file mode 100644
index 3e3ac28..0000000
--- a/arch/arm/dts/kirkwood-net2big.dts
+++ /dev/null
@@ -1,63 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree file for LaCie 2Big Network v2
- *
- * Copyright (C) 2014
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * Based on netxbig_v2-setup.c,
- * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
- *
-*/
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-#include "kirkwood-netxbig.dtsi"
-
-/ {
- model = "LaCie 2Big Network v2";
- compatible = "lacie,net2big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- fan {
- compatible = "gpio-fan";
- alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-};
-
-®ulators {
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
- };
-
- clocks {
- g762_clk: g762-oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
- };
-};
-
-&i2c0 {
- g762@3e {
- compatible = "gmt,g762";
- reg = <0x3e>;
- clocks = <&g762_clk>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-netxbig.dtsi b/arch/arm/dts/kirkwood-netxbig.dtsi
deleted file mode 100644
index b573702..0000000
--- a/arch/arm/dts/kirkwood-netxbig.dtsi
+++ /dev/null
@@ -1,232 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree common file for LaCie 2Big and 5Big Network v2
- *
- * Copyright (C) 2014
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * Based on netxbig_v2-setup.c,
- * Copyright (C) 2010 Simon Guinot <sguinot@lacie.com>
- *
-*/
-
-#include <dt-bindings/leds/leds-netxbig.h>
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- serial@12000 {
- status = "okay";
- };
-
- spi@10600 {
- status = "okay";
-
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <20000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x80000>;
- label = "u-boot";
- };
- };
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
-
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /*
- * esc and power represent a three position rocker
- * switch. Thus the conventional KEY_POWER does not fit
- */
- exc {
- label = "Back power switch (on|auto)";
- linux,code = <KEY_ESC>;
- linux,input-type = <5>;
- gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
- };
- power {
- label = "Back power switch (auto|off)";
- linux,code = <KEY_1>;
- linux,input-type = <5>;
- gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
- };
- option {
- label = "Function button";
- linux,code = <KEY_OPTION>;
- gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
- };
-
- };
-
- gpio-poweroff {
- compatible = "gpio-poweroff";
- gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
- };
-
- regulators: regulators {
- status = "okay";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd0power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 16 GPIO_ACTIVE_HIGH>;
- };
- };
-
- netxbig_gpio_ext: netxbig-gpio-ext {
- compatible = "lacie,netxbig-gpio-ext";
-
- addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
- &gpio1 16 GPIO_ACTIVE_HIGH
- &gpio1 17 GPIO_ACTIVE_HIGH>;
- data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
- &gpio1 13 GPIO_ACTIVE_HIGH
- &gpio1 14 GPIO_ACTIVE_HIGH>;
- enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
-
- netxbig-leds {
- compatible = "lacie,netxbig-leds";
-
- gpio-ext = <&netxbig_gpio_ext>;
-
- timers = <NETXBIG_LED_TIMER1 500 500
- NETXBIG_LED_TIMER2 500 1000>;
-
- blue-power {
- label = "netxbig:blue:power";
- mode-addr = <0>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 1
- NETXBIG_LED_TIMER1 3
- NETXBIG_LED_TIMER2 7>;
- bright-addr = <1>;
- max-brightness = <7>;
- };
- red-power {
- label = "netxbig:red:power";
- mode-addr = <0>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 2
- NETXBIG_LED_TIMER1 4>;
- bright-addr = <1>;
- max-brightness = <7>;
- };
- blue-sata0 {
- label = "netxbig:blue:sata0";
- mode-addr = <3>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 7
- NETXBIG_LED_SATA 1
- NETXBIG_LED_TIMER1 3>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- red-sata0 {
- label = "netxbig:red:sata0";
- mode-addr = <3>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 2
- NETXBIG_LED_TIMER1 4>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- blue-sata1 {
- label = "netxbig:blue:sata1";
- mode-addr = <4>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 7
- NETXBIG_LED_SATA 1
- NETXBIG_LED_TIMER1 3>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- red-sata1 {
- label = "netxbig:red:sata1";
- mode-addr = <4>;
- mode-val = <NETXBIG_LED_OFF 0
- NETXBIG_LED_ON 2
- NETXBIG_LED_TIMER1 4>;
- bright-addr = <2>;
- max-brightness = <7>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <8>;
- };
-
- ethphy1: ethernet-phy@1 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
-
- pmx_button_function: pmx-button-function {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
- pmx_button_power_off: pmx-button-power-off {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
- pmx_button_power_on: pmx-button-power-on {
- marvell,pins = "mpp13";
- marvell,function = "gpio";
- };
-};
-
-&i2c0 {
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c04";
- pagesize = <16>;
- reg = <0x50>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-ns2-common.dtsi b/arch/arm/dts/kirkwood-ns2-common.dtsi
deleted file mode 100644
index 51530ea..0000000
--- a/arch/arm/dts/kirkwood-ns2-common.dtsi
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_ns2_sata0: pmx-ns2-sata0 {
- marvell,pins = "mpp21";
- marvell,function = "sata0";
- };
- pmx_ns2_sata1: pmx-ns2-sata1 {
- marvell,pins = "mpp20";
- marvell,function = "sata1";
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- spi@10600 {
- status = "okay";
-
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <20000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x0 0x80000>;
- label = "u-boot";
- };
- };
- };
-
- i2c@11000 {
- status = "okay";
-
- eeprom@50 {
- compatible = "atmel,24c04";
- pagesize = <16>;
- reg = <0x50>;
- };
- };
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
-
- power {
- label = "Power push button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- red-fail {
- label = "ns2:red:fail";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
- };
-
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@X {
- /* overwrite reg property in board file */
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-ns2.dts b/arch/arm/dts/kirkwood-ns2.dts
deleted file mode 100644
index 7b67083..0000000
--- a/arch/arm/dts/kirkwood-ns2.dts
+++ /dev/null
@@ -1,40 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Network Space v2";
- compatible = "lacie,netspace_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <8>; };
diff --git a/arch/arm/dts/kirkwood-ns2lite.dts b/arch/arm/dts/kirkwood-ns2lite.dts
deleted file mode 100644
index b0cb590..0000000
--- a/arch/arm/dts/kirkwood-ns2lite.dts
+++ /dev/null
@@ -1,35 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Network Space Lite v2";
- compatible = "lacie,netspace_lite_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "disk-activity";
- };
- };
-};
-
-ðphy0 { reg = <0>; };
diff --git a/arch/arm/dts/kirkwood-ns2max.dts b/arch/arm/dts/kirkwood-ns2max.dts
deleted file mode 100644
index c0a087e..0000000
--- a/arch/arm/dts/kirkwood-ns2max.dts
+++ /dev/null
@@ -1,59 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- model = "LaCie Network Space Max v2";
- compatible = "lacie,netspace_max_v2", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0 &pmx_ns2_sata1>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio_fan {
- compatible = "gpio-fan";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW
- &gpio0 7 GPIO_ACTIVE_LOW
- &gpio1 1 GPIO_ACTIVE_LOW
- &gpio0 23 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map =
- < 0 0
- 1500 15
- 1700 14
- 1800 13
- 2100 12
- 3100 11
- 3300 10
- 4300 9
- 5500 8>;
- alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <8>; };
diff --git a/arch/arm/dts/kirkwood-ns2mini.dts b/arch/arm/dts/kirkwood-ns2mini.dts
deleted file mode 100644
index 5b9fa14..0000000
--- a/arch/arm/dts/kirkwood-ns2mini.dts
+++ /dev/null
@@ -1,60 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include <dt-bindings/leds/leds-ns2.h>
-#include "kirkwood-ns2-common.dtsi"
-
-/ {
- /* This machine is embedded in the first LaCie CloudBox product. */
- model = "LaCie Network Space Mini v2";
- compatible = "lacie,netspace_mini_v2", "marvell,kirkwood-88f6192", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x8000000>;
- };
-
- ocp@f1000000 {
- sata@80000 {
- pinctrl-0 = <&pmx_ns2_sata0>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <1>;
- };
- };
-
- gpio_fan {
- compatible = "gpio-fan";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW
- &gpio0 7 GPIO_ACTIVE_LOW
- &gpio1 1 GPIO_ACTIVE_LOW
- &gpio0 23 GPIO_ACTIVE_LOW>;
- gpio-fan,speed-map =
- < 0 0
- 3000 15
- 3180 14
- 4140 13
- 4570 12
- 6760 11
- 7140 10
- 7980 9
- 9200 8>;
- alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-
- ns2-leds {
- compatible = "lacie,ns2-leds";
-
- blue-sata {
- label = "ns2:blue:sata";
- slow-gpio = <&gpio0 29 0>;
- cmd-gpio = <&gpio0 30 0>;
- modes-map = <NS_V2_LED_OFF 1 0
- NS_V2_LED_ON 0 1
- NS_V2_LED_ON 1 1
- NS_V2_LED_SATA 0 0>;
- };
- };
-};
-
-ðphy0 { reg = <0>; };
diff --git a/arch/arm/dts/kirkwood-nsa310s.dts b/arch/arm/dts/kirkwood-nsa310s.dts
deleted file mode 100644
index 09ee76c..0000000
--- a/arch/arm/dts/kirkwood-nsa310s.dts
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device tree file for the Zyxel NSA 310S NAS box.
- *
- * Copyright (c) 2015-2021, Tony Dinh <mibodhi@gmail.com>
- *
- * Based on
- * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
- * Based upon the board setup file created by Peter Schildmann
- */
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Zyxel NSA310S";
- compatible = "zyxel,nsa320s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pinctrl-names = "default";
-
- pmx_sata0: pmx-sata0 {
- marvell,pins ;
- marvell,function = "sata0";
- };
-
- pmx_sata1: pmx-sata1 {
- marvell,pins ;
- marvell,function = "sata1";
- };
-
- pmx_usb_power: pmx-usb-power {
- marvell,pins = "mpp21";
- marvell,function = "gpio";
- };
-
- pmx_pwr_off: pmx-pwr-off {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
-
- pmx_btn_reset: pmx-btn-reset {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-
- pmx_btn_copy: pmx-btn-copy {
- marvell,pins = "mpp25";
- marvell,function = "gpio";
- };
-
- pmx_btn_power: pmx-btn-power {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd2_green: pmx-led-hdd2-green {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd2_red: pmx-led-hdd2-red {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_led_usb_green: pmx-led-usb-green {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_green: pmx-led-copy-green {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_red: pmx-led-copy-red {
- marvell,pins = "mpp23";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_green: pmx-led-sys-green {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_orange: pmx-led-sys-orange {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_green: pmx-led-hdd1-green {
- marvell,pins = "mpp16";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_red: pmx-led-hdd1-red {
- marvell,pins = "mpp13";
- marvell,function = "gpio";
- };
-
- pmx_pwr_sata1: pmx-pwr-sata1 {
- marvell,pins = "mpp33";
- marvell,function = "gpio";
- };
- };
-
- serial@12000 {
- status = "ok";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <1>;
- };
-
- rtc@10300 {
- status = "disabled";
- };
-
- i2c@11000 {
- status = "okay";
- ht1382: rtc@68 {
- compatible = "htk,ht1382";
- reg = <0x68>;
- };
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pmx_usb_power &pmx_pwr_sata1>;
-
- usb0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
- };
-
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_pwr_off>;
- pinctrl-names = "default";
- gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
- pinctrl-names = "default";
-
- button@1 {
- label = "Power Button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
- };
- button@2 {
- label = "Copy Button";
- linux,code = <KEY_COPY>;
- gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
- button@3 {
- label = "Reset Button";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
- &pmx_led_usb_green
- &pmx_led_sys_green &pmx_led_sys_orange
- &pmx_led_copy_green &pmx_led_copy_red
- &pmx_led_hdd1_green &pmx_led_hdd1_red>;
- pinctrl-names = "default";
-
- green-sys {
- label = "nsa310s:green:sys";
- gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-on";
- };
- orange-sys {
- label = "nsa310s:orange:sys";
- gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- green-hdd1 {
- label = "nsa310s:green:hdd1";
- gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
- };
- red-hdd1 {
- label = "nsa310s:red:hdd1";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
- };
- green-hdd2 {
- label = "nsa310s:green:hdd2";
- gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
- red-hdd2 {
- label = "nsa310s:red:hdd2";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- green-usb {
- label = "nsa310s:green:usb";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
- };
- green-copy {
- label = "nsa310s:green:copy";
- gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "ide-disk";
- };
- red-copy {
- label = "nsa310s:red:copy";
- gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&nand {
- status = "okay";
- chip-delay = <35>;
-
- partition@0 {
- label = "uboot";
- reg = <0x0000000 0x0100000>;
- };
- partition@100000 {
- label = "stock_uboot_env";
- reg = <0x0100000 0x0080000>;
- };
- partition@180000 {
- label = "key_store";
- reg = <0x0180000 0x0080000>;
- };
- partition@200000 {
- label = "info";
- reg = <0x0200000 0x0080000>;
- };
- partition@280000 {
- label = "etc";
- reg = <0x0280000 0x0a00000>;
- };
- partition@c80000 {
- label = "kernel_1";
- reg = <0x0c80000 0x0a00000>;
- };
- partition@1680000 {
- label = "rootfs1";
- reg = <0x1680000 0x2fc0000>;
- };
- partition@4640000 {
- label = "kernel_2";
- reg = <0x4640000 0x0a00000>;
- };
- partition@5040000 {
- label = "rootfs2";
- reg = <0x5040000 0x2fc0000>;
- };
-};
-
-&mdio {
- status = "okay";
- ethphy0: ethernet-phy@1 {
- compatible = "marvell,88e1510";
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- phy-mode = "rgmii";
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi b/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi
new file mode 100644
index 0000000..dec27b2
--- /dev/null
+++ b/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+&nand {
+ partition@0 {
+ /delete-property/ read-only;
+ };
+};
diff --git a/arch/arm/dts/kirkwood-nsa325.dts b/arch/arm/dts/kirkwood-nsa325.dts
deleted file mode 100644
index efc57cf..0000000
--- a/arch/arm/dts/kirkwood-nsa325.dts
+++ /dev/null
@@ -1,231 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/* Device tree file for the Zyxel NSA 325 NAS box.
- *
- * Copyright (c) 2015, Hans Ulli Kroll <ulli.kroll@googlemail.com>
- *
- *
- * Based upon the board setup file created by Peter Schildmann
- */
-
-/dts-v1/;
-
-#include "kirkwood-nsa3x0-common.dtsi"
-
-/ {
- model = "ZyXEL NSA325";
- compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pinctrl-names = "default";
-
- pmx_led_hdd2_green: pmx-led-hdd2-green {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd2_red: pmx-led-hdd2-red {
- marvell,pins = "mpp13";
- marvell,function = "gpio";
- };
-
- pmx_mcu_data: pmx-mcu-data {
- marvell,pins = "mpp14";
- marvell,function = "gpio";
- };
-
- pmx_led_usb_green: pmx-led-usb-green {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
-
- pmx_mcu_clk: pmx-mcu-clk {
- marvell,pins = "mpp16";
- marvell,function = "gpio";
- };
-
- pmx_mcu_act: pmx-mcu-act {
- marvell,pins = "mpp17";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_green: pmx-led-sys-green {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_led_sys_orange: pmx-led-sys-orange {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_green: pmx-led-hdd1-green {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
-
- pmx_led_hdd1_red: pmx-led-hdd1-red {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
-
- pmx_htp: pmx-htp {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
-
- /*
- * Buzzer needs to be switched at around 1kHz so is
- * not compatible with the gpio-beeper driver.
- */
- pmx_buzzer: pmx-buzzer {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_vid_b1: pmx-vid-b1 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
-
- pmx_power_resume_data: pmx-power-resume-data {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
-
- pmx_power_resume_clk: pmx-power-resume-clk {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
-
- pmx_pwr_sata1: pmx-pwr-sata1 {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
-
- /* This board uses the pcf8563 RTC instead of the SoC RTC */
- rtc@10300 {
- status = "disabled";
- };
-
- i2c@11000 {
- status = "okay";
-
- pcf8563: pcf8563@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- };
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_pwr_sata1>;
- pinctrl-names = "default";
-
- usb0_power: regulator@1 {
- enable-active-high;
- };
-
- sata1_power: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "SATA1 Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- enable-active-high;
- gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_hdd2_green &pmx_led_hdd2_red
- &pmx_led_usb_green
- &pmx_led_sys_green &pmx_led_sys_orange
- &pmx_led_copy_green &pmx_led_copy_red
- &pmx_led_hdd1_green &pmx_led_hdd1_red>;
- pinctrl-names = "default";
-
- green-sys {
- label = "nsa325:green:sys";
- gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- };
- orange-sys {
- label = "nsa325:orange:sys";
- gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- green-hdd1 {
- label = "nsa325:green:hdd1";
- gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
- };
- red-hdd1 {
- label = "nsa325:red:hdd1";
- gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- };
- green-hdd2 {
- label = "nsa325:green:hdd2";
- gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
- };
- red-hdd2 {
- label = "nsa325:red:hdd2";
- gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
- };
- green-usb {
- label = "nsa325:green:usb";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
- };
- green-copy {
- label = "nsa325:green:copy";
- gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
- };
- red-copy {
- label = "nsa325:red:copy";
- gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
- };
-
- /* The following pins are currently not assigned to a driver,
- some of them should be configured as inputs.
- pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act
- &pmx_htp &pmx_vid_b1
- &pmx_power_resume_data &pmx_power_resume_clk>; */
- };
-
-};
-
-&mdio {
- status = "okay";
- ethphy0: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-nsa3x0-common.dtsi b/arch/arm/dts/kirkwood-nsa3x0-common.dtsi
deleted file mode 100644
index a21c50d..0000000
--- a/arch/arm/dts/kirkwood-nsa3x0-common.dtsi
+++ /dev/null
@@ -1,157 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "ZyXEL NSA310";
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
-
- pmx_usb_power: pmx-usb-power {
- marvell,pins = "mpp21";
- marvell,function = "gpio";
- };
-
- pmx_pwr_off: pmx-pwr-off {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
-
- pmx_btn_reset: pmx-btn-reset {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
-
- pmx_btn_copy: pmx-btn-copy {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
-
- pmx_btn_power: pmx-btn-power {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_green: pmx-led-copy-green {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
-
- pmx_led_copy_red: pmx-led-copy-red {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio_poweroff {
- compatible = "gpio-poweroff";
- pinctrl-0 = <&pmx_pwr_off>;
- pinctrl-names = "default";
- gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
- pinctrl-names = "default";
-
- power {
- label = "Power Button";
- linux,code = <KEY_POWER>;
- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
- };
- copy {
- label = "Copy Button";
- linux,code = <KEY_COPY>;
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
- reset {
- label = "Reset Button";
- linux,code = <KEY_RESTART>;
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
- };
-
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power>;
- pinctrl-names = "default";
-
- usb0_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&nand {
- status = "okay";
- chip-delay = <35>;
-
- partition@0 {
- label = "uboot";
- reg = <0x0000000 0x0100000>;
- };
- partition@100000 {
- label = "uboot_env";
- reg = <0x0100000 0x0080000>;
- };
- partition@180000 {
- label = "key_store";
- reg = <0x0180000 0x0080000>;
- };
- partition@200000 {
- label = "info";
- reg = <0x0200000 0x0080000>;
- };
- partition@280000 {
- label = "etc";
- reg = <0x0280000 0x0a00000>;
- };
- partition@c80000 {
- label = "kernel_1";
- reg = <0x0c80000 0x0a00000>;
- };
- partition@1680000 {
- label = "rootfs1";
- reg = <0x1680000 0x2fc0000>;
- };
- partition@4640000 {
- label = "kernel_2";
- reg = <0x4640000 0x0a00000>;
- };
- partition@5040000 {
- label = "rootfs2";
- reg = <0x5040000 0x2fc0000>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-openrd-base.dts b/arch/arm/dts/kirkwood-openrd-base.dts
deleted file mode 100644
index 094191e..0000000
--- a/arch/arm/dts/kirkwood-openrd-base.dts
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Base Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * base variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
- model = "OpenRD Base";
- compatible = "marvell,openrd-base", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- serial@12100 {
- status = "okay";
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-openrd-client.dts b/arch/arm/dts/kirkwood-openrd-client.dts
deleted file mode 100644
index 74dc23d..0000000
--- a/arch/arm/dts/kirkwood-openrd-client.dts
+++ /dev/null
@@ -1,73 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Client Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * client variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
- model = "OpenRD Client";
- compatible = "marvell,openrd-client", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- audio-controller@a0000 {
- status = "okay";
- };
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
-
- cs42l51: cs42l51@4a {
- compatible = "cirrus,cs42l51";
- reg = <0x4a>;
- #sound-dai-cells = <0>;
- };
- };
- };
-
- sound {
- compatible = "simple-audio-card";
- simple-audio-card,format = "i2s";
- simple-audio-card,mclk-fs = <256>;
-
- simple-audio-card,cpu {
- sound-dai = <&audio0 0>;
- };
-
- simple-audio-card,codec {
- sound-dai = <&cs42l51>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@8 {
- reg = <8>;
- };
- ethphy1: ethernet-phy@24 {
- reg = <24>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-openrd-ultimate.dts b/arch/arm/dts/kirkwood-openrd-ultimate.dts
deleted file mode 100644
index 888e133..0000000
--- a/arch/arm/dts/kirkwood-openrd-ultimate.dts
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD Ultimate Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are specific to OpenRD
- * ultimate variant of the Marvell Kirkwood Development Board.
- */
-
-/dts-v1/;
-
-#include "kirkwood-openrd.dtsi"
-
-/ {
- model = "OpenRD Ultimate";
- compatible = "marvell,openrd-ultimate", "marvell,openrd", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
-
- cs42l51: cs42l51@4a {
- compatible = "cirrus,cs42l51";
- reg = <0x4a>;
- };
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
- ethphy1: ethernet-phy@1 {
- reg = <1>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "okay";
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-openrd.dtsi b/arch/arm/dts/kirkwood-openrd.dtsi
deleted file mode 100644
index 47f03c6..0000000
--- a/arch/arm/dts/kirkwood-openrd.dtsi
+++ /dev/null
@@ -1,122 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Marvell OpenRD (Base|Client|Ultimate) Board Description
- *
- * Andrew Lunn <andrew@lunn.ch>
- *
- * This file contains the definitions that are common between the three
- * variants of the Marvell Kirkwood Development Board.
- */
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pinctrl-0 = <&pmx_select28 &pmx_sdio_cd &pmx_select34>;
- pinctrl-names = "default";
-
- pmx_select28: pmx-select-rs232-rs485 {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
- pmx_sdio_cd: pmx-sdio-cd {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_select34: pmx-select-uart-sd {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "okay";
-
- };
- sata@80000 {
- status = "okay";
- nr-ports = <2>;
- };
- mvsdio@90000 {
- status = "okay";
- cd-gpios = <&gpio0 29 9>;
- };
- gpio@10100 {
- p28 {
- gpio-hog;
- gpios = <28 GPIO_ACTIVE_HIGH>;
- /*
- * SelRS232or485 selects between RS-232 or RS-485
- * mode for the second UART.
- *
- * Low: RS-232
- * High: RS-485
- *
- * To use the second UART, you need to change also
- * the SelUARTorSD.
- */
- output-low;
- line-name = "SelRS232or485";
- };
- };
- gpio@10140 {
- p2 {
- gpio-hog;
- gpios = <2 GPIO_ACTIVE_HIGH>;
- /*
- * SelUARTorSD selects between the second UART
- * (serial@12100) and SD (mvsdio@90000).
- *
- * Low: UART
- * High: SD
- *
- * When changing this line make sure the newly
- * selected device node is enabled and the
- * previously selected device node is disabled.
- */
- output-high; /* Select SD by default */
- line-name = "SelUARTorSD";
- };
- };
- };
-};
-
-&nand {
- status = "okay";
- pinctrl-0 = <&pmx_nand>;
- pinctrl-names = "default";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@600000 {
- label = "root";
- reg = <0x0600000 0x1FA00000>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood-pogo_e02.dts b/arch/arm/dts/kirkwood-pogo_e02.dts
deleted file mode 100644
index f9e95e5..0000000
--- a/arch/arm/dts/kirkwood-pogo_e02.dts
+++ /dev/null
@@ -1,132 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-pogo_e02.dts - Device tree file for Pogoplug E02
- *
- * Copyright (C) 2015 Christoph Junghans <ottxor@gentoo.org>
- *
- * based on information of dts files from
- * Arch Linux ARM by Oleg Rakhmanov <moonman.ca@gmail.com>
- * OpenWrt by Felix Kaechele <heffer@fedoraproject.org>
- *
- */
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- model = "Cloud Engines Pogoplug E02";
- compatible = "cloudengines,pogoe02", "marvell,kirkwood-88f6281",
- "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x10000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8";
- stdout-path = &uart0;
- };
-
- gpio-leds {
- compatible = "gpio-leds";
-
- health {
- label = "pogo_e02:green:health";
- gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
- fault {
- label = "pogo_e02:orange:fault";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-0 = < &pmx_usb_power_enable &pmx_led_orange
- &pmx_led_green >;
- pinctrl-names = "default";
-
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_green: pmx-led-green {
- marvell,pins = "mpp48";
- marvell,function = "gpio";
- };
-
- pmx_led_orange: pmx-led-orange {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-&nand {
- chip-delay = <40>;
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- read-only;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "pogoplug";
- reg = <0x0500000 0x2000000>;
- };
-
- partition@2500000 {
- label = "root";
- reg = <0x02500000 0x5b00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-pogoplug-series-4.dts b/arch/arm/dts/kirkwood-pogoplug-series-4.dts
deleted file mode 100644
index 5aa4669..0000000
--- a/arch/arm/dts/kirkwood-pogoplug-series-4.dts
+++ /dev/null
@@ -1,180 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-pogoplug-series-4.dts - Device tree file for PogoPlug Series 4
- * inspired by the board files made by Kevin Mihelich for ArchLinux,
- * and their DTS file.
- *
- * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
- */
-
-/dts-v1/;
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6192.dtsi"
-#include <dt-bindings/input/linux-event-codes.h>
-
-/ {
- model = "Cloud Engines PogoPlug Series 4";
- compatible = "cloudengines,pogoplugv4", "marvell,kirkwood-88f6192",
- "marvell,kirkwood";
-
- memory {
- device_type = "memory";
- reg = <0x00000000 0x08000000>;
- };
-
- chosen {
- stdout-path = "uart0:115200n8";
- };
-
- gpio_keys {
- compatible = "gpio-keys";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_button_eject>;
- pinctrl-names = "default";
-
- eject {
- debounce-interval = <50>;
- wakeup-source;
- linux,code = <KEY_EJECTCD>;
- label = "Eject Button";
- gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_green &pmx_led_red>;
- pinctrl-names = "default";
-
- health {
- label = "pogoplugv4:green:health";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
- fault {
- label = "pogoplugv4:red:fault";
- gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&pinctrl {
- pmx_sata0: pmx-sata0 {
- marvell,pins = "mpp21";
- marvell,function = "sata0";
- };
-
- pmx_sata1: pmx-sata1 {
- marvell,pins = "mpp20";
- marvell,function = "sata1";
- };
-
- pmx_sdio_cd: pmx-sdio-cd {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
-
- pmx_sdio_wp: pmx-sdio-wp {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_button_eject: pmx-button-eject {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_led_green: pmx-led-green {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
-
- pmx_led_red: pmx-led-red {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-/*
- * This PCIE controller has a USB 3.0 XHCI controller at 1,0
- */
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
-
-&sata {
- status = "okay";
- pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
- pinctrl-names = "default";
- nr-ports = <1>;
-};
-
-&sdio {
- status = "okay";
- pinctrl-0 = <&pmx_sdio &pmx_sdio_cd &pmx_sdio_wp>;
- pinctrl-names = "default";
- cd-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
- wp-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
-};
-
-&nand {
- /* 128 MiB of NAND flash */
- chip-delay = <40>;
- status = "okay";
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "u-boot";
- reg = <0x00000000 0x200000>;
- read-only;
- };
-
- partition@200000 {
- label = "uImage";
- reg = <0x00200000 0x300000>;
- };
-
- partition@500000 {
- label = "uImage2";
- reg = <0x00500000 0x300000>;
- };
-
- partition@800000 {
- label = "failsafe";
- reg = <0x00800000 0x800000>;
- };
-
- partition@1000000 {
- label = "root";
- reg = <0x01000000 0x7000000>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi b/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
deleted file mode 100644
index 0a698d3..0000000
--- a/arch/arm/dts/kirkwood-sheevaplug-common.dtsi
+++ /dev/null
@@ -1,104 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-sheevaplug-common.dtsi - Common parts for Sheevaplugs
- *
- * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
- */
-
-#include "kirkwood.dtsi"
-#include "kirkwood-6281.dtsi"
-
-/ {
- memory {
- device_type = "memory";
- reg = <0x00000000 0x20000000>;
- };
-
- chosen {
- bootargs = "console=ttyS0,115200n8 earlyprintk";
- stdout-path = &uart0;
- };
-
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
-
- pmx_usb_power_enable: pmx-usb-power-enable {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
- pmx_led_red: pmx-led-red {
- marvell,pins = "mpp46";
- marvell,function = "gpio";
- };
- pmx_led_blue: pmx-led-blue {
- marvell,pins = "mpp49";
- marvell,function = "gpio";
- };
- pmx_sdio_cd: pmx-sdio-cd {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
- pmx_sdio_wp: pmx-sdio-wp {
- marvell,pins = "mpp47";
- marvell,function = "gpio";
- };
- };
- serial@12000 {
- status = "okay";
- };
- };
-
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_usb_power_enable>;
- pinctrl-names = "default";
-
- usb_power: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "USB Power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio0 29 0>;
- };
- };
-};
-
-&nand {
- status = "okay";
-
- partition@0 {
- label = "u-boot";
- reg = <0x0000000 0x100000>;
- };
-
- partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x400000>;
- };
-
- partition@500000 {
- label = "root";
- reg = <0x0500000 0x1fb00000>;
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- reg = <0>;
- };
-};
-
-ð0 {
- status = "okay";
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
diff --git a/arch/arm/dts/kirkwood-sheevaplug.dts b/arch/arm/dts/kirkwood-sheevaplug.dts
deleted file mode 100644
index c73cc90..0000000
--- a/arch/arm/dts/kirkwood-sheevaplug.dts
+++ /dev/null
@@ -1,42 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * kirkwood-sheevaplug.dts - Device tree file for Sheevaplug
- *
- * Copyright (C) 2013 Simon Baatz <gmbnomis@gmail.com>
- */
-
-/dts-v1/;
-
-#include "kirkwood-sheevaplug-common.dtsi"
-
-/ {
- model = "Globalscale Technologies SheevaPlug";
- compatible = "globalscale,sheevaplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
-
- ocp@f1000000 {
- mvsdio@90000 {
- pinctrl-0 = <&pmx_sdio>;
- pinctrl-names = "default";
- status = "okay";
- /* No CD or WP GPIOs */
- broken-cd;
- };
- };
-
- gpio-leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_led_blue &pmx_led_red>;
- pinctrl-names = "default";
-
- health {
- label = "sheevaplug:blue:health";
- gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
- default-state = "keep";
- };
-
- misc {
- label = "sheevaplug:red:misc";
- gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
- };
- };
-};
diff --git a/arch/arm/dts/kirkwood-synology.dtsi b/arch/arm/dts/kirkwood-synology.dtsi
deleted file mode 100644
index c97ed29..0000000
--- a/arch/arm/dts/kirkwood-synology.dtsi
+++ /dev/null
@@ -1,855 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Nodes for Marvell 628x Synology devices
- *
- * Andrew Lunn <andrew@lunn.ch>
- * Ben Peddell <klightspeed@killerwolves.net>
- *
- */
-
-/ {
- ocp@f1000000 {
- pinctrl: pin-controller@10000 {
- pmx_alarmled_12: pmx-alarmled-12 {
- marvell,pins = "mpp12";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_15: pmx-fanctrl-15 {
- marvell,pins = "mpp15";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_16: pmx-fanctrl-16 {
- marvell,pins = "mpp16";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_17: pmx-fanctrl-17 {
- marvell,pins = "mpp17";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_18: pmx-fanalarm-18 {
- marvell,pins = "mpp18";
- marvell,function = "gpo";
- };
-
- pmx_hddled_20: pmx-hddled-20 {
- marvell,pins = "mpp20";
- marvell,function = "gpio";
- };
-
- pmx_hddled_21: pmx-hddled-21 {
- marvell,pins = "mpp21";
- marvell,function = "gpio";
- };
-
- pmx_hddled_22: pmx-hddled-22 {
- marvell,pins = "mpp22";
- marvell,function = "gpio";
- };
-
- pmx_hddled_23: pmx-hddled-23 {
- marvell,pins = "mpp23";
- marvell,function = "gpio";
- };
-
- pmx_hddled_24: pmx-hddled-24 {
- marvell,pins = "mpp24";
- marvell,function = "gpio";
- };
-
- pmx_hddled_25: pmx-hddled-25 {
- marvell,pins = "mpp25";
- marvell,function = "gpio";
- };
-
- pmx_hddled_26: pmx-hddled-26 {
- marvell,pins = "mpp26";
- marvell,function = "gpio";
- };
-
- pmx_hddled_27: pmx-hddled-27 {
- marvell,pins = "mpp27";
- marvell,function = "gpio";
- };
-
- pmx_hddled_28: pmx-hddled-28 {
- marvell,pins = "mpp28";
- marvell,function = "gpio";
- };
-
- pmx_hdd1_pwr_29: pmx-hdd1-pwr-29 {
- marvell,pins = "mpp29";
- marvell,function = "gpio";
- };
-
- pmx_hdd1_pwr_30: pmx-hdd-pwr-30 {
- marvell,pins = "mpp30";
- marvell,function = "gpio";
- };
-
- pmx_hdd2_pwr_31: pmx-hdd2-pwr-31 {
- marvell,pins = "mpp31";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_32: pmx-fanctrl-32 {
- marvell,pins = "mpp32";
- marvell,function = "gpio";
- };
-
- pmx_fanctrl_33: pmx-fanctrl-33 {
- marvell,pins = "mpp33";
- marvell,function = "gpo";
- };
-
- pmx_fanctrl_34: pmx-fanctrl-34 {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
-
- pmx_hdd2_pwr_34: pmx-hdd2-pwr-34 {
- marvell,pins = "mpp34";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_35: pmx-fanalarm-35 {
- marvell,pins = "mpp35";
- marvell,function = "gpio";
- };
-
- pmx_hddled_36: pmx-hddled-36 {
- marvell,pins = "mpp36";
- marvell,function = "gpio";
- };
-
- pmx_hddled_37: pmx-hddled-37 {
- marvell,pins = "mpp37";
- marvell,function = "gpio";
- };
-
- pmx_hddled_38: pmx-hddled-38 {
- marvell,pins = "mpp38";
- marvell,function = "gpio";
- };
-
- pmx_hddled_39: pmx-hddled-39 {
- marvell,pins = "mpp39";
- marvell,function = "gpio";
- };
-
- pmx_hddled_40: pmx-hddled-40 {
- marvell,pins = "mpp40";
- marvell,function = "gpio";
- };
-
- pmx_hddled_41: pmx-hddled-41 {
- marvell,pins = "mpp41";
- marvell,function = "gpio";
- };
-
- pmx_hddled_42: pmx-hddled-42 {
- marvell,pins = "mpp42";
- marvell,function = "gpio";
- };
-
- pmx_hddled_43: pmx-hddled-43 {
- marvell,pins = "mpp43";
- marvell,function = "gpio";
- };
-
- pmx_hddled_44: pmx-hddled-44 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_hddled_45: pmx-hddled-45 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
-
- pmx_hdd3_pwr_44: pmx-hdd3-pwr-44 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_hdd4_pwr_45: pmx-hdd4-pwr-45 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_44: pmx-fanalarm-44 {
- marvell,pins = "mpp44";
- marvell,function = "gpio";
- };
-
- pmx_fanalarm_45: pmx-fanalarm-45 {
- marvell,pins = "mpp45";
- marvell,function = "gpio";
- };
- };
-
- rtc@10300 {
- status = "disabled";
- };
-
- spi@10600 {
- status = "okay";
-
- m25p80@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,m25p80", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <20000000>;
- mode = <0>;
-
- partition@0 {
- reg = <0x00000000 0x00080000>;
- label = "RedBoot";
- };
-
- partition@80000 {
- reg = <0x00080000 0x00200000>;
- label = "zImage";
- };
-
- partition@280000 {
- reg = <0x00280000 0x00140000>;
- label = "rd.gz";
- };
-
- partition@3c0000 {
- reg = <0x003c0000 0x00010000>;
- label = "vendor";
- };
-
- partition@3d0000 {
- reg = <0x003d0000 0x00020000>;
- label = "RedBoot config";
- };
-
- partition@3f0000 {
- reg = <0x003f0000 0x00010000>;
- label = "FIS directory";
- };
- };
- };
-
- i2c@11000 {
- status = "okay";
- clock-frequency = <400000>;
-
- rs5c372: rs5c372@32 {
- status = "disabled";
- compatible = "ricoh,rs5c372";
- reg = <0x32>;
- };
-
- s35390a: s35390a@30 {
- status = "disabled";
- compatible = "sii,s35390a";
- reg = <0x30>;
- };
- };
-
- serial@12000 {
- status = "okay";
- };
-
- serial@12100 {
- status = "okay";
- };
-
- poweroff@12100 {
- compatible = "synology,power-off";
- reg = <0x12100 0x100>;
- clocks = <&gate_clk 7>;
- };
-
- sata@80000 {
- pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
- pinctrl-names = "default";
- status = "okay";
- nr-ports = <2>;
- };
- };
-
- gpio-fan-150-32-35 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
- &pmx_fanalarm_35>;
- pinctrl-names = "default";
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
- &gpio1 1 GPIO_ACTIVE_HIGH
- &gpio1 2 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2200 1
- 2500 2
- 3000 4
- 3300 3
- 3700 5
- 3800 6
- 4200 7 >;
- };
-
- gpio-fan-150-15-18 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_18>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2200 1
- 2500 2
- 3000 4
- 3300 3
- 3700 5
- 3800 6
- 4200 7 >;
- };
-
- gpio-fan-100-32-35 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_32 &pmx_fanctrl_33 &pmx_fanctrl_34
- &pmx_fanalarm_35>;
- pinctrl-names = "default";
- gpios = <&gpio1 0 GPIO_ACTIVE_HIGH
- &gpio1 1 GPIO_ACTIVE_HIGH
- &gpio1 2 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-fan-100-15-18 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_18>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-fan-100-15-35-1 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_35>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-fan-100-15-35-3 {
- status = "disabled";
- compatible = "gpio-fan";
- pinctrl-0 = <&pmx_fanctrl_15 &pmx_fanctrl_16 &pmx_fanctrl_17
- &pmx_fanalarm_35 &pmx_fanalarm_44 &pmx_fanalarm_45>;
- pinctrl-names = "default";
- gpios = <&gpio0 15 GPIO_ACTIVE_HIGH
- &gpio0 16 GPIO_ACTIVE_HIGH
- &gpio0 17 GPIO_ACTIVE_HIGH>;
- alarm-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH
- &gpio1 12 GPIO_ACTIVE_HIGH
- &gpio1 13 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = < 0 0
- 2500 1
- 3100 2
- 3800 3
- 4600 4
- 4800 5
- 4900 6
- 5000 7 >;
- };
-
- gpio-leds-alarm-12 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_alarmled_12>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:alarm";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-20 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_20 &pmx_hddled_21 &pmx_hddled_22
- &pmx_hddled_23 &pmx_hddled_24 &pmx_hddled_25
- &pmx_hddled_26 &pmx_hddled_27>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-green {
- label = "synology:green:hdd3";
- gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-amber {
- label = "synology:amber:hdd3";
- gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-green {
- label = "synology:green:hdd4";
- gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-amber {
- label = "synology:amber:hdd4";
- gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-21-1 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-21-2 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_21 &pmx_hddled_23 &pmx_hddled_20 &pmx_hddled_22>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-36 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_36 &pmx_hddled_37 &pmx_hddled_38
- &pmx_hddled_39 &pmx_hddled_40 &pmx_hddled_41
- &pmx_hddled_42 &pmx_hddled_43 &pmx_hddled_44
- &pmx_hddled_45>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-green {
- label = "synology:green:hdd3";
- gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
- };
-
- hdd3-amber {
- label = "synology:amber:hdd3";
- gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-green {
- label = "synology:green:hdd4";
- gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
- };
-
- hdd4-amber {
- label = "synology:amber:hdd4";
- gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
- };
-
- hdd5-green {
- label = "synology:green:hdd5";
- gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
- };
-
- hdd5-amber {
- label = "synology:amber:hdd5";
- gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
- };
- };
-
- gpio-leds-hdd-38 {
- status = "disabled";
- compatible = "gpio-leds";
- pinctrl-0 = <&pmx_hddled_38 &pmx_hddled_39 &pmx_hddled_36 &pmx_hddled_37>;
- pinctrl-names = "default";
-
- hdd1-green {
- label = "synology:green:hdd1";
- gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
- };
-
- hdd1-amber {
- label = "synology:amber:hdd1";
- gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-green {
- label = "synology:green:hdd2";
- gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- };
-
- hdd2-amber {
- label = "synology:amber:hdd2";
- gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
- };
- };
-
- regulators-hdd-29 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_29 &pmx_hdd2_pwr_31>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-30-1 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_30>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-30-2 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-30-4 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd1_pwr_30 &pmx_hdd2_pwr_34
- &pmx_hdd3_pwr_44 &pmx_hdd4_pwr_45>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd1power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 30 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "hdd3power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "hdd4power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-31 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd2_pwr_31>;
- pinctrl-names = "default";
-
- regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
- };
- };
-
- regulators-hdd-34 {
- status = "disabled";
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-0 = <&pmx_hdd2_pwr_34 &pmx_hdd3_pwr_44
- &pmx_hdd4_pwr_45>;
- pinctrl-names = "default";
-
- regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "hdd2power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "hdd3power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
- };
-
- regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "hdd4power";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- regulator-always-on;
- regulator-boot-on;
- startup-delay-us = <5000000>;
- gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
- };
- };
-};
-
-&mdio {
- status = "okay";
-
- ethphy0: ethernet-phy@0 {
- device_type = "ethernet-phy";
- reg = <8>;
- };
-
- ethphy1: ethernet-phy@1 {
- device_type = "ethernet-phy";
- reg = <9>;
- };
-};
-
-ð0 {
- status = "okay";
-
- ethernet0-port@0 {
- phy-handle = <ðphy0>;
- };
-};
-
-ð1 {
- status = "disabled";
-
- ethernet1-port@0 {
- phy-handle = <ðphy1>;
- };
-};
-
-&pciec {
- status = "okay";
-};
-
-&pcie0 {
- status = "okay";
-};
diff --git a/arch/arm/dts/kirkwood.dtsi b/arch/arm/dts/kirkwood.dtsi
deleted file mode 100644
index 81c7eda..0000000
--- a/arch/arm/dts/kirkwood.dtsi
+++ /dev/null
@@ -1,393 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/include/ "skeleton.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/gpio.h>
-
-#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
-
-/ {
- compatible = "marvell,kirkwood";
- interrupt-parent = <&intc>;
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- device_type = "cpu";
- compatible = "marvell,feroceon";
- reg = <0>;
- clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
- clock-names = "cpu_clk", "ddrclk", "powersave";
- };
- };
-
- aliases {
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- i2c0 = &i2c0;
- };
-
- mbus@f1000000 {
- compatible = "marvell,kirkwood-mbus", "simple-bus";
- #address-cells = <2>;
- #size-cells = <1>;
- /* If a board file needs to change this ranges it must replace it completely */
- ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 /* internal-regs */
- MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000 /* nand flash */
- MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */
- >;
- controller = <&mbusc>;
- pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
- pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
-
- nand: nand@12f {
- #address-cells = <1>;
- #size-cells = <1>;
- cle = <0>;
- ale = <1>;
- bank-width = <1>;
- compatible = "marvell,orion-nand";
- reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
- chip-delay = <25>;
- /* set partition map and/or chip-delay in board dts */
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_nand>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- crypto_sram: sa-sram@301 {
- compatible = "mmio-sram";
- reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
- clocks = <&gate_clk 17>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
- };
-
- ocp@f1000000 {
- compatible = "simple-bus";
- ranges = <0x00000000 0xf1000000 0x0100000>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- pinctrl: pin-controller@10000 {
- /* set compatible property in SoC file */
- reg = <0x10000 0x20>;
-
- pmx_ge1: pmx-ge1 {
- marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
- "mpp24", "mpp25", "mpp26", "mpp27",
- "mpp30", "mpp31", "mpp32", "mpp33";
- marvell,function = "ge1";
- };
-
- pmx_nand: pmx-nand {
- marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
- "mpp4", "mpp5", "mpp18", "mpp19";
- marvell,function = "nand";
- };
-
- /*
- * Default SPI0 pinctrl setting with CSn on mpp0,
- * overwrite marvell,pins on board level if required.
- */
- pmx_spi: pmx-spi {
- marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
- marvell,function = "spi";
- };
-
- pmx_twsi0: pmx-twsi0 {
- marvell,pins = "mpp8", "mpp9";
- marvell,function = "twsi0";
- };
-
- /*
- * Default UART pinctrl setting without RTS/CTS,
- * overwrite marvell,pins on board level if required.
- */
- pmx_uart0: pmx-uart0 {
- marvell,pins = "mpp10", "mpp11";
- marvell,function = "uart0";
- };
-
- pmx_uart1: pmx-uart1 {
- marvell,pins = "mpp13", "mpp14";
- marvell,function = "uart1";
- };
- };
-
- core_clk: core-clocks@10030 {
- compatible = "marvell,kirkwood-core-clock";
- reg = <0x10030 0x4>;
- #clock-cells = <1>;
- };
-
- spi0: spi@10600 {
- compatible = "marvell,orion-spi";
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- interrupts = <23>;
- reg = <0x10600 0x28>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_spi>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- gpio0: gpio@10100 {
- compatible = "marvell,orion-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x10100 0x40>;
- ngpios = <32>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <35>, <36>, <37>, <38>;
- clocks = <&gate_clk 7>;
- };
-
- gpio1: gpio@10140 {
- compatible = "marvell,orion-gpio";
- #gpio-cells = <2>;
- gpio-controller;
- reg = <0x10140 0x40>;
- ngpios = <18>;
- interrupt-controller;
- #interrupt-cells = <2>;
- interrupts = <39>, <40>, <41>;
- clocks = <&gate_clk 7>;
- };
-
- i2c0: i2c@11000 {
- compatible = "marvell,mv64xxx-i2c";
- reg = <0x11000 0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <29>;
- clock-frequency = <100000>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_twsi0>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- uart0: serial@12000 {
- compatible = "ns16550a";
- reg = <0x12000 0x100>;
- reg-shift = <2>;
- interrupts = <33>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_uart0>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- uart1: serial@12100 {
- compatible = "ns16550a";
- reg = <0x12100 0x100>;
- reg-shift = <2>;
- interrupts = <34>;
- clocks = <&gate_clk 7>;
- pinctrl-0 = <&pmx_uart1>;
- pinctrl-names = "default";
- status = "disabled";
- };
-
- mbusc: mbus-controller@20000 {
- compatible = "marvell,mbus-controller";
- reg = <0x20000 0x80>, <0x1500 0x20>;
- };
-
- sysc: system-controller@20000 {
- compatible = "marvell,orion-system-controller";
- reg = <0x20000 0x120>;
- };
-
- bridge_intc: bridge-interrupt-ctrl@20110 {
- compatible = "marvell,orion-bridge-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x20110 0x8>;
- interrupts = <1>;
- marvell,#interrupts = <6>;
- };
-
- gate_clk: clock-gating-control@2011c {
- compatible = "marvell,kirkwood-gating-clock";
- reg = <0x2011c 0x4>;
- clocks = <&core_clk 0>;
- #clock-cells = <1>;
- };
-
- l2: l2-cache@20128 {
- compatible = "marvell,kirkwood-cache";
- reg = <0x20128 0x4>;
- };
-
- intc: main-interrupt-ctrl@20200 {
- compatible = "marvell,orion-intc";
- interrupt-controller;
- #interrupt-cells = <1>;
- reg = <0x20200 0x10>, <0x20210 0x10>;
- };
-
- timer: timer@20300 {
- compatible = "marvell,orion-timer";
- reg = <0x20300 0x20>;
- interrupt-parent = <&bridge_intc>;
- interrupts = <1>, <2>;
- clocks = <&core_clk 0>;
- };
-
- wdt: watchdog-timer@20300 {
- compatible = "marvell,orion-wdt";
- reg = <0x20300 0x28>, <0x20108 0x4>;
- interrupt-parent = <&bridge_intc>;
- interrupts = <3>;
- clocks = <&gate_clk 7>;
- status = "okay";
- };
-
- cesa: crypto@30000 {
- compatible = "marvell,kirkwood-crypto";
- reg = <0x30000 0x10000>;
- reg-names = "regs";
- interrupts = <22>;
- clocks = <&gate_clk 17>;
- marvell,crypto-srams = <&crypto_sram>;
- marvell,crypto-sram-size = <0x800>;
- status = "okay";
- };
-
- usb0: ehci@50000 {
- compatible = "marvell,orion-ehci";
- reg = <0x50000 0x1000>;
- interrupts = <19>;
- clocks = <&gate_clk 3>;
- status = "okay";
- };
-
- dma0: xor@60800 {
- compatible = "marvell,orion-xor";
- reg = <0x60800 0x100
- 0x60A00 0x100>;
- status = "okay";
- clocks = <&gate_clk 8>;
-
- xor00 {
- interrupts = <5>;
- dmacap,memcpy;
- dmacap,xor;
- };
- xor01 {
- interrupts = <6>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
- };
- };
-
- dma1: xor@60900 {
- compatible = "marvell,orion-xor";
- reg = <0x60900 0x100
- 0x60B00 0x100>;
- status = "okay";
- clocks = <&gate_clk 16>;
-
- xor00 {
- interrupts = <7>;
- dmacap,memcpy;
- dmacap,xor;
- };
- xor01 {
- interrupts = <8>;
- dmacap,memcpy;
- dmacap,xor;
- dmacap,memset;
- };
- };
-
- eth0: ethernet-controller@72000 {
- compatible = "marvell,kirkwood-eth";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x72000 0x4000>;
- clocks = <&gate_clk 0>;
- marvell,tx-checksum-limit = <1600>;
- status = "disabled";
-
- eth0port: ethernet0-port@0 {
- compatible = "marvell,kirkwood-eth-port";
- reg = <0>;
- interrupts = <11>;
- /* overwrite MAC address in bootloader */
- local-mac-address = [00 00 00 00 00 00];
- /* set phy-handle property in board file */
- };
- };
-
- mdio: mdio-bus@72004 {
- compatible = "marvell,orion-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x72004 0x84>;
- interrupts = <46>;
- clocks = <&gate_clk 0>;
- status = "disabled";
-
- /* add phy nodes in board file */
- };
-
- eth1: ethernet-controller@76000 {
- compatible = "marvell,kirkwood-eth";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x76000 0x4000>;
- clocks = <&gate_clk 19>;
- marvell,tx-checksum-limit = <1600>;
- pinctrl-0 = <&pmx_ge1>;
- pinctrl-names = "default";
- status = "disabled";
-
- eth1port: ethernet1-port@0 {
- compatible = "marvell,kirkwood-eth-port";
- reg = <0>;
- interrupts = <15>;
- /* overwrite MAC address in bootloader */
- local-mac-address = [00 00 00 00 00 00];
- /* set phy-handle property in board file */
- };
- };
-
- sata_phy0: sata-phy@82000 {
- compatible = "marvell,mvebu-sata-phy";
- reg = <0x82000 0x0334>;
- clocks = <&gate_clk 14>;
- clock-names = "sata";
- #phy-cells = <0>;
- status = "ok";
- };
-
- sata_phy1: sata-phy@84000 {
- compatible = "marvell,mvebu-sata-phy";
- reg = <0x84000 0x0334>;
- clocks = <&gate_clk 15>;
- clock-names = "sata";
- #phy-cells = <0>;
- status = "ok";
- };
-
- audio0: audio-controller@a0000 {
- compatible = "marvell,kirkwood-audio";
- #sound-dai-cells = <0>;
- reg = <0xa0000 0x2210>;
- interrupts = <24>;
- clocks = <&gate_clk 9>;
- clock-names = "internal";
- status = "disabled";
- };
- };
-};
diff --git a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts b/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
deleted file mode 100644
index 5783732..0000000
--- a/arch/arm/dts/meson-axg-jethome-jethub-j100.dts
+++ /dev/null
@@ -1,361 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Vyacheslav Bocharov <adeep@lexina.in>
- * Copyright (c) 2020 JetHome
- * Author: Aleksandr Kazantsev <ak@tvip.ru>
- * Author: Alexey Shevelkin <ash@tvip.ru>
- * Author: Vyacheslav Bocharov <adeep@lexina.in>
- */
-
-/dts-v1/;
-
-#include "meson-axg.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- compatible = "jethome,jethub-j100", "amlogic,a113d", "amlogic,meson-axg";
- model = "JetHome JetHub J100";
- aliases {
- serial0 = &uart_AO; /* Console */
- serial1 = &uart_AO_B; /* External UART (Wireless Module) */
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- /* 1024MB RAM */
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- reserved-memory {
- linux,cma {
- size = <0x0 0x400000>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_5v>;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb_pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
- regulator-always-on;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
- };
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <250>;
- polling-delay = <1000>;
- thermal-sensors = <&scpi_sensors 0>;
- trips {
- cpu_passive: cpu-passive {
- temperature = <70000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- cpu_hot: cpu-hot {
- temperature = <80000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "hot";
- };
-
- cpu_critical: cpu-critical {
- temperature = <100000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
- };
-
- cpu_cooling_maps: cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- onewire {
- compatible = "w1-gpio";
- gpios = <&gpio GPIOA_14 GPIO_ACTIVE_HIGH>;
- #gpio-cells = <1>;
- };
-};
-
-&efuse {
- sn: sn@32 {
- reg = <0x32 0x20>;
- };
-
- eth_mac: eth_mac@0 {
- reg = <0x0 0x6>;
- };
-
- bt_mac: bt_mac@6 {
- reg = <0x6 0x6>;
- };
-
- wifi_mac: wifi_mac@c {
- reg = <0xc 0x6>;
- };
-
- bid: bid@12 {
- reg = <0x12 0x20>;
- };
-};
-
-ðmac {
- status = "okay";
- pinctrl-0 = <ð_rmii_x_pins>;
- pinctrl-names = "default";
- phy-handle = <ð_phy0>;
- phy-mode = "rmii";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- /* ICPlus IP101A/G Ethernet PHY (vendor_id=0x0243, model_id=0x0c54) */
- eth_phy0: ethernet-phy@0 {
- /* compatible = "ethernet-phy-id0243.0c54";*/
- max-speed = <100>;
- reg = <0>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <10000>;
- reset-gpios = <&gpio GPIOZ_5 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-/* Internal I2C bus (on CPU module) */
-&i2c1 {
- status = "okay";
- pinctrl-0 = <&i2c1_z_pins>;
- pinctrl-names = "default";
-
- /* RTC */
- pcf8563: pcf8563@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- status = "okay";
- };
-};
-
-/* Peripheral I2C bus (on motherboard) */
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ab {
- status = "okay";
- pinctrl-0 = <&pwm_a_x20_pins>;
- pinctrl-names = "default";
-};
-
-/* wifi module */
-&sd_emmc_b {
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr104;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* emmc storage */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
-
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* UART Bluetooth */
-&uart_B {
- status = "okay";
- pinctrl-0 = <&uart_b_z_pins>, <&uart_b_z_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
- };
-};
-
-/* UART Console */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-/* UART Wireless module */
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- phy-supply = <&usb_pwr>;
-};
-
-&spicc1 {
- status = "okay";
- pinctrl-0 = <&spi1_x_pins>, <&spi1_ss0_x_pins>;
- pinctrl-names = "default";
-};
-
-&gpio {
- gpio-line-names =
- "", "", "", "", "", // 0 - 4
- "", "", "", "", "", // 5 - 9
- "UserButton", "", "", "", "", // 10 - 14
- "", "", "", "", "", // 15 - 19
- "", "", "", "", "", // 20 - 24
- "", "LedRed", "LedGreen", "Output3", "Output2", // 25 - 29
- "Output1", "", "", "", "", // 30 - 34
- "", "ZigBeeBOOT", "", "", "", // 35 - 39
- "", "ZigBeeRESET", "", "Input4", "Input3", // 40 - 44
- "Input2", "Input1", "", "", "", // 45 - 49
- "", "", "", "", "", // 50 - 54
- "", "", "", "", "", // 55 - 59
- "", "", "", "", "", // 60 - 64
- "", "", "", "", "", // 65 - 69
- "", "", "", "", "", // 70 - 74
- "", "", "", "", "", // 75 - 79
- "", "", "", "", "", // 80 - 84
- "", ""; // 85-86
-};
-
-&cpu0 {
- #cooling-cells = <2>;
-};
-
-&cpu1 {
- #cooling-cells = <2>;
-};
-
-&cpu2 {
- #cooling-cells = <2>;
-};
-
-&cpu3 {
- #cooling-cells = <2>;
-};
diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts
deleted file mode 100644
index 359589d..0000000
--- a/arch/arm/dts/meson-axg-s400.dts
+++ /dev/null
@@ -1,602 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-axg.dtsi"
-#include <dt-bindings/input/input.h>
-
-/ {
- compatible = "amlogic,s400", "amlogic,a113d", "amlogic,meson-axg";
- model = "Amlogic Meson AXG S400 Development Board";
-
- adc_keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-next {
- label = "Next";
- linux,code = <KEY_NEXT>;
- press-threshold-microvolt = <1116000>; /* 62% */
- };
-
- button-prev {
- label = "Previous";
- linux,code = <KEY_PREVIOUS>;
- press-threshold-microvolt = <900000>; /* 50% */
- };
-
- button-wifi {
- label = "Wifi";
- linux,code = <KEY_WLAN>;
- press-threshold-microvolt = <684000>; /* 38% */
- };
-
- button-up {
- label = "Volume Up";
- linux,code = <KEY_VOLUMEUP>;
- press-threshold-microvolt = <468000>; /* 26% */
- };
-
- button-down {
- label = "Volume Down";
- linux,code = <KEY_VOLUMEDOWN>;
- press-threshold-microvolt = <252000>; /* 14% */
- };
-
- button-voice {
- label = "Voice";
- linux,code = <KEY_VOICECOMMAND>;
- press-threshold-microvolt = <0>; /* 0% */
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- serial1 = &uart_A;
- };
-
- linein: audio-codec-0 {
- #sound-dai-cells = <0>;
- compatible = "everest,es7241";
- VDDA-supply = <&vcc_3v3>;
- VDDP-supply = <&vcc_3v3>;
- VDDD-supply = <&vcc_3v3>;
- status = "okay";
- sound-name-prefix = "Linein";
- };
-
- lineout: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "everest,es7154";
- VDD-supply = <&vcc_3v3>;
- PVDD-supply = <&vcc_5v>;
- status = "okay";
- sound-name-prefix = "Lineout";
- };
-
- spdif_dit: audio-codec-2 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- dmics: audio-codec-3 {
- #sound-dai-cells = <0>;
- compatible = "dmic-codec";
- num-channels = <7>;
- wakeup-delay-ms = <50>;
- status = "okay";
- sound-name-prefix = "MIC";
- };
-
- spdif_dir: audio-codec-4 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dir";
- status = "okay";
- sound-name-prefix = "DIR";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb_pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- speaker-leds {
- compatible = "gpio-leds";
-
- aled1 {
- label = "speaker:aled1";
- gpios = <&gpio_speaker 7 0>;
- };
-
- aled2 {
- label = "speaker:aled2";
- gpios = <&gpio_speaker 6 0>;
- };
-
- aled3 {
- label = "speaker:aled3";
- gpios = <&gpio_speaker 5 0>;
- };
-
- aled4 {
- label = "speaker:aled4";
- gpios = <&gpio_speaker 4 0>;
- };
-
- aled5 {
- label = "speaker:aled5";
- gpios = <&gpio_speaker 3 0>;
- };
-
- aled6 {
- label = "speaker:aled6";
- gpios = <&gpio_speaker 2 0>;
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "AXG-S400";
- audio-aux-devs = <&tdmin_a>, <&tdmin_b>, <&tdmin_c>,
- <&tdmin_lb>, <&tdmout_c>;
- audio-widgets = "Line", "Lineout",
- "Line", "Linein",
- "Speaker", "Speaker1 Left",
- "Speaker", "Speaker1 Right";
- audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
- "TDMOUT_C IN 1", "FRDDR_B OUT 2",
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
- "TDMOUT_C IN 2", "FRDDR_C OUT 2",
- "SPDIFOUT IN 2", "FRDDR_C OUT 3",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 2", "TDM_C Capture",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TDMIN_B IN 2", "TDM_C Capture",
- "TDMIN_B IN 5", "TDM_C Loopback",
- "TDMIN_C IN 2", "TDM_C Capture",
- "TDMIN_C IN 5", "TDM_C Loopback",
- "TDMIN_LB IN 2", "TDM_C Loopback",
- "TDMIN_LB IN 5", "TDM_C Capture",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "TODDR_A IN 3", "SPDIFIN Capture",
- "TODDR_B IN 3", "SPDIFIN Capture",
- "TODDR_C IN 3", "SPDIFIN Capture",
- "TODDR_A IN 4", "PDM Capture",
- "TODDR_B IN 4", "PDM Capture",
- "TODDR_C IN 4", "PDM Capture",
- "TODDR_A IN 6", "TDMIN_LB OUT",
- "TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT",
- "Lineout", "Lineout AOUTL",
- "Lineout", "Lineout AOUTR",
- "Speaker1 Left", "SPK1 OUT_A",
- "Speaker1 Left", "SPK1 OUT_B",
- "Speaker1 Right", "SPK1 OUT_C",
- "Speaker1 Right", "SPK1 OUT_D",
- "Linein AINL", "Linein",
- "Linein AINR", "Linein";
- assigned-clocks = <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <589824000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- dai-link-6 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-rx-mask-1 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&lineout>;
- };
-
- codec-1 {
- sound-dai = <&speaker_amp1>;
- };
-
- codec-2 {
- sound-dai = <&linein>;
- };
-
- };
-
- dai-link-7 {
- sound-dai = <&spdifout>;
-
- codec {
- sound-dai = <&spdif_dit>;
- };
- };
-
- dai-link-8 {
- sound-dai = <&spdifin>;
-
- codec {
- sound-dai = <&spdif_dir>;
- };
- };
-
- dai-link-9 {
- sound-dai = <&pdm>;
-
- codec {
- sound-dai = <&dmics>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ab 0 30518 0>; /* PWM_A at 32.768KHz */
- };
-};
-
-ðmac {
- status = "okay";
- pinctrl-0 = <ð_rgmii_y_pins>;
- pinctrl-names = "default";
- phy-handle = <ð_phy0>;
- phy-mode = "rgmii";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- eth_phy0: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
- eee-broken-1000t;
- };
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&i2c1 {
- status = "okay";
- pinctrl-0 = <&i2c1_z_pins>;
- pinctrl-names = "default";
-
- speaker_amp1: audio-codec@1b {
- compatible = "ti,tas5707";
- reg = <0x1b>;
- reset-gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_LOW>;
- #sound-dai-cells = <0>;
- AVDD-supply = <&vcc_3v3>;
- DVDD-supply = <&vcc_3v3>;
- PVDD_A-supply = <&main_12v>;
- PVDD_B-supply = <&main_12v>;
- PVDD_C-supply = <&main_12v>;
- PVDD_D-supply = <&main_12v>;
- sound-name-prefix = "SPK1";
- };
-};
-
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_10_pins>, <&i2c_ao_sda_11_pins>;
- pinctrl-names = "default";
-
- gpio_speaker: gpio-controller@1f {
- compatible = "nxp,pca9557";
- reg = <0x1f>;
- gpio-controller;
- #gpio-cells = <2>;
- vcc-supply = <&vddao_3v3>;
- };
-};
-
-&pdm {
- pinctrl-0 = <&pdm_dclk_a14_pins>, <&pdm_din0_pins>,
- <&pdm_din1_pins>, <&pdm_din2_pins>, <&pdm_din3_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&pcieA {
- reset-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>;
- status = "okay";
-};
-
-&pcieB {
- reset-gpios = <&gpio GPIOZ_10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
- status = "okay";
-};
-
-&pwm_ab {
- status = "okay";
- pinctrl-0 = <&pwm_a_x20_pins>;
- pinctrl-names = "default";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* wifi module */
-&sd_emmc_b {
- status = "okay";
- #address-cells = <1>;
- #size-cells = <0>;
-
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr104;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* emmc storage */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
-
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-&spdifin {
- pinctrl-0 = <&spdif_in_a19_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&spdifout {
- pinctrl-0 = <&spdif_out_a20_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmif_a {
- pinctrl-0 = <&tdma_sclk_pins>, <&tdma_fs_pins>,
- <&tdma_din0_pins>, <&tdma_dout0_x15_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmif_b {
- pinctrl-0 = <&tdmb_sclk_pins>, <&tdmb_fs_pins>,
- <&tdmb_din3_pins>, <&mclk_b_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmif_c {
- pinctrl-0 = <&tdmc_sclk_pins>, <&tdmc_fs_pins>,
- <&tdmc_din1_pins>, <&tdmc_dout2_pins>,
- <&mclk_c_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmin_c {
- status = "okay";
-};
-
-&tdmin_lb {
- status = "okay";
-};
-
-&tdmout_c {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "otg";
- vbus-supply = <&usb_pwr>;
-};
diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi
deleted file mode 100644
index 3f5254e..0000000
--- a/arch/arm/dts/meson-axg.dtsi
+++ /dev/null
@@ -1,1957 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- */
-
-#include <dt-bindings/clock/axg-aoclkc.h>
-#include <dt-bindings/clock/axg-audio-clkc.h>
-#include <dt-bindings/clock/axg-clkc.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/gpio/meson-axg-gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
-#include <dt-bindings/reset/amlogic,meson-axg-reset.h>
-#include <dt-bindings/power/meson-axg-power.h>
-
-/ {
- compatible = "amlogic,meson-axg";
-
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- tdmif_a: audio-controller-0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_A";
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_b: audio-controller-1 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_B";
- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
- <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_c: audio-controller-2 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_C";
- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
- <&clkc_audio AUD_CLKID_MST_C_SCLK>,
- <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- arm-pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- };
- };
-
- sm: secure-monitor {
- compatible = "amlogic,meson-gxbb-sm";
- };
-
- efuse: efuse {
- compatible = "amlogic,meson-gxbb-efuse";
- clocks = <&clkc CLKID_EFUSE>;
- #address-cells = <1>;
- #size-cells = <1>;
- read-only;
- secure-monitor = <&sm>;
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 16 MiB reserved for Hardware ROM Firmware */
- hwrom_reserved: hwrom@0 {
- reg = <0x0 0x0 0x0 0x1000000>;
- no-map;
- };
-
- /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
- };
- };
-
- scpi {
- compatible = "arm,scpi-pre-1.0";
- mboxes = <&mailbox 1 &mailbox 2>;
- shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
-
- scpi_clocks: clocks {
- compatible = "arm,scpi-clocks";
-
- scpi_dvfs: clock-controller {
- compatible = "arm,scpi-dvfs-clocks";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
- };
-
- scpi_sensors: sensors {
- compatible = "amlogic,meson-gxbb-scpi-sensors";
- #thermal-sensor-cells = <1>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- pcieA: pcie@f9800000 {
- compatible = "amlogic,axg-pcie", "snps,dw-pcie";
- reg = <0x0 0xf9800000 0x0 0x400000>,
- <0x0 0xff646000 0x0 0x2000>,
- <0x0 0xf9f00000 0x0 0x100000>;
- reg-names = "elbi", "cfg", "config";
- interrupts = <GIC_SPI 177 IRQ_TYPE_EDGE_RISING>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>;
- clock-names = "general", "pclk", "port";
- resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>;
- reset-names = "port", "apb";
- num-lanes = <1>;
- phys = <&pcie_phy>;
- phy-names = "pcie";
- status = "disabled";
- };
-
- pcieB: pcie@fa000000 {
- compatible = "amlogic,axg-pcie", "snps,dw-pcie";
- reg = <0x0 0xfa000000 0x0 0x400000>,
- <0x0 0xff648000 0x0 0x2000>,
- <0x0 0xfa400000 0x0 0x100000>;
- reg-names = "elbi", "cfg", "config";
- interrupts = <GIC_SPI 167 IRQ_TYPE_EDGE_RISING>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>;
- clock-names = "general", "pclk", "port";
- resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>;
- reset-names = "port", "apb";
- num-lanes = <1>;
- phys = <&pcie_phy>;
- phy-names = "pcie";
- status = "disabled";
- };
-
- usb: usb@ffe09080 {
- compatible = "amlogic,meson-axg-usb-ctrl";
- reg = <0x0 0xffe09080 0x0 0x20>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "usb_ctrl", "ddr";
- resets = <&reset RESET_USB_OTG>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy1";
-
- dwc2: usb@ff400000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xff400000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@ff500000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xff500000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk;
- };
- };
-
- ethmac: ethernet@ff3f0000 {
- compatible = "amlogic,meson-axg-dwmac",
- "snps,dwmac-3.70a",
- "snps,dwmac";
- reg = <0x0 0xff3f0000 0x0 0x10000>,
- <0x0 0xff634540 0x0 0x8>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&clkc CLKID_ETH>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "stmmaceth", "clkin0", "clkin1",
- "timing-adjustment";
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <2048>;
- power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
- status = "disabled";
- };
-
- pcie_phy: phy@ff644000 {
- compatible = "amlogic,axg-pcie-phy";
- reg = <0x0 0xff644000 0x0 0x1c>;
- resets = <&reset RESET_PCIE_PHY>;
- phys = <&mipi_pcie_analog_dphy>;
- phy-names = "analog";
- #phy-cells = <0>;
- };
-
- pdm: audio-controller@ff632000 {
- compatible = "amlogic,axg-pdm";
- reg = <0x0 0xff632000 0x0 0x34>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "PDM";
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
- status = "disabled";
- };
-
- periphs: bus@ff634000 {
- compatible = "simple-bus";
- reg = <0x0 0xff634000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff634000 0x0 0x2000>;
-
- hwrng: rng@18 {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x18 0x0 0x4>;
- clocks = <&clkc CLKID_RNG0>;
- clock-names = "core";
- };
-
- pinctrl_periphs: pinctrl@480 {
- compatible = "amlogic,meson-axg-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: bank@480 {
- reg = <0x0 0x00480 0x0 0x40>,
- <0x0 0x004e8 0x0 0x14>,
- <0x0 0x00520 0x0 0x14>,
- <0x0 0x00430 0x0 0x3c>;
- reg-names = "mux", "pull", "pull-enable", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_periphs 0 0 86>;
- };
-
- i2c0_pins: i2c0 {
- mux {
- groups = "i2c0_sck",
- "i2c0_sda";
- function = "i2c0";
- bias-disable;
- };
- };
-
- i2c1_x_pins: i2c1_x {
- mux {
- groups = "i2c1_sck_x",
- "i2c1_sda_x";
- function = "i2c1";
- bias-disable;
- };
- };
-
- i2c1_z_pins: i2c1_z {
- mux {
- groups = "i2c1_sck_z",
- "i2c1_sda_z";
- function = "i2c1";
- bias-disable;
- };
- };
-
- i2c2_a_pins: i2c2_a {
- mux {
- groups = "i2c2_sck_a",
- "i2c2_sda_a";
- function = "i2c2";
- bias-disable;
- };
- };
-
- i2c2_x_pins: i2c2_x {
- mux {
- groups = "i2c2_sck_x",
- "i2c2_sda_x";
- function = "i2c2";
- bias-disable;
- };
- };
-
- i2c3_a6_pins: i2c3_a6 {
- mux {
- groups = "i2c3_sda_a6",
- "i2c3_sck_a7";
- function = "i2c3";
- bias-disable;
- };
- };
-
- i2c3_a12_pins: i2c3_a12 {
- mux {
- groups = "i2c3_sda_a12",
- "i2c3_sck_a13";
- function = "i2c3";
- bias-disable;
- };
- };
-
- i2c3_a19_pins: i2c3_a19 {
- mux {
- groups = "i2c3_sda_a19",
- "i2c3_sck_a20";
- function = "i2c3";
- bias-disable;
- };
- };
-
- emmc_pins: emmc {
- mux-0 {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3",
- "emmc_nand_d4",
- "emmc_nand_d5",
- "emmc_nand_d6",
- "emmc_nand_d7",
- "emmc_cmd";
- function = "emmc";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "emmc_clk";
- function = "emmc";
- bias-disable;
- };
- };
-
- emmc_ds_pins: emmc_ds {
- mux {
- groups = "emmc_ds";
- function = "emmc";
- bias-pull-down;
- };
- };
-
- emmc_clk_gate_pins: emmc_clk_gate {
- mux {
- groups = "BOOT_8";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- eth_rgmii_x_pins: eth-x-rgmii {
- mux {
- groups = "eth_mdio_x",
- "eth_mdc_x",
- "eth_rgmii_rx_clk_x",
- "eth_rx_dv_x",
- "eth_rxd0_x",
- "eth_rxd1_x",
- "eth_rxd2_rgmii",
- "eth_rxd3_rgmii",
- "eth_rgmii_tx_clk",
- "eth_txen_x",
- "eth_txd0_x",
- "eth_txd1_x",
- "eth_txd2_rgmii",
- "eth_txd3_rgmii";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_rgmii_y_pins: eth-y-rgmii {
- mux {
- groups = "eth_mdio_y",
- "eth_mdc_y",
- "eth_rgmii_rx_clk_y",
- "eth_rx_dv_y",
- "eth_rxd0_y",
- "eth_rxd1_y",
- "eth_rxd2_rgmii",
- "eth_rxd3_rgmii",
- "eth_rgmii_tx_clk",
- "eth_txen_y",
- "eth_txd0_y",
- "eth_txd1_y",
- "eth_txd2_rgmii",
- "eth_txd3_rgmii";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_rmii_x_pins: eth-x-rmii {
- mux {
- groups = "eth_mdio_x",
- "eth_mdc_x",
- "eth_rgmii_rx_clk_x",
- "eth_rx_dv_x",
- "eth_rxd0_x",
- "eth_rxd1_x",
- "eth_txen_x",
- "eth_txd0_x",
- "eth_txd1_x";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_rmii_y_pins: eth-y-rmii {
- mux {
- groups = "eth_mdio_y",
- "eth_mdc_y",
- "eth_rgmii_rx_clk_y",
- "eth_rx_dv_y",
- "eth_rxd0_y",
- "eth_rxd1_y",
- "eth_txen_y",
- "eth_txd0_y",
- "eth_txd1_y";
- function = "eth";
- bias-disable;
- };
- };
-
- mclk_b_pins: mclk_b {
- mux {
- groups = "mclk_b";
- function = "mclk_b";
- bias-disable;
- };
- };
-
- mclk_c_pins: mclk_c {
- mux {
- groups = "mclk_c";
- function = "mclk_c";
- bias-disable;
- };
- };
-
- pdm_dclk_a14_pins: pdm_dclk_a14 {
- mux {
- groups = "pdm_dclk_a14";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_dclk_a19_pins: pdm_dclk_a19 {
- mux {
- groups = "pdm_dclk_a19";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_pins: pdm_din0 {
- mux {
- groups = "pdm_din0";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_pins: pdm_din1 {
- mux {
- groups = "pdm_din1";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_pins: pdm_din2 {
- mux {
- groups = "pdm_din2";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_pins: pdm_din3 {
- mux {
- groups = "pdm_din3";
- function = "pdm";
- bias-disable;
- };
- };
-
- pwm_a_a_pins: pwm_a_a {
- mux {
- groups = "pwm_a_a";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_a_x18_pins: pwm_a_x18 {
- mux {
- groups = "pwm_a_x18";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_a_x20_pins: pwm_a_x20 {
- mux {
- groups = "pwm_a_x20";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_a_z_pins: pwm_a_z {
- mux {
- groups = "pwm_a_z";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_b_a_pins: pwm_b_a {
- mux {
- groups = "pwm_b_a";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_b_x_pins: pwm_b_x {
- mux {
- groups = "pwm_b_x";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_b_z_pins: pwm_b_z {
- mux {
- groups = "pwm_b_z";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_c_a_pins: pwm_c_a {
- mux {
- groups = "pwm_c_a";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x10_pins: pwm_c_x10 {
- mux {
- groups = "pwm_c_x10";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x17_pins: pwm_c_x17 {
- mux {
- groups = "pwm_c_x17";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_d_x11_pins: pwm_d_x11 {
- mux {
- groups = "pwm_d_x11";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_d_x16_pins: pwm_d_x16 {
- mux {
- groups = "pwm_d_x16";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- sdio_pins: sdio {
- mux-0 {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_cmd";
- function = "sdio";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "sdio_clk";
- function = "sdio";
- bias-disable;
- };
- };
-
- sdio_clk_gate_pins: sdio_clk_gate {
- mux {
- groups = "GPIOX_4";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- spdif_in_z_pins: spdif_in_z {
- mux {
- groups = "spdif_in_z";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a1_pins: spdif_in_a1 {
- mux {
- groups = "spdif_in_a1";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a7_pins: spdif_in_a7 {
- mux {
- groups = "spdif_in_a7";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a19_pins: spdif_in_a19 {
- mux {
- groups = "spdif_in_a19";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a20_pins: spdif_in_a20 {
- mux {
- groups = "spdif_in_a20";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_out_a1_pins: spdif_out_a1 {
- mux {
- groups = "spdif_out_a1";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_a11_pins: spdif_out_a11 {
- mux {
- groups = "spdif_out_a11";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_a19_pins: spdif_out_a19 {
- mux {
- groups = "spdif_out_a19";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_a20_pins: spdif_out_a20 {
- mux {
- groups = "spdif_out_a20";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spdif_out_z_pins: spdif_out_z {
- mux {
- groups = "spdif_out_z";
- function = "spdif_out";
- bias-disable;
- };
- };
-
- spi0_pins: spi0 {
- mux {
- groups = "spi0_miso",
- "spi0_mosi",
- "spi0_clk";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi0_ss0_pins: spi0_ss0 {
- mux {
- groups = "spi0_ss0";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi0_ss1_pins: spi0_ss1 {
- mux {
- groups = "spi0_ss1";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi0_ss2_pins: spi0_ss2 {
- mux {
- groups = "spi0_ss2";
- function = "spi0";
- bias-disable;
- };
- };
-
- spi1_a_pins: spi1_a {
- mux {
- groups = "spi1_miso_a",
- "spi1_mosi_a",
- "spi1_clk_a";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_ss0_a_pins: spi1_ss0_a {
- mux {
- groups = "spi1_ss0_a";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_ss1_pins: spi1_ss1 {
- mux {
- groups = "spi1_ss1";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_x_pins: spi1_x {
- mux {
- groups = "spi1_miso_x",
- "spi1_mosi_x",
- "spi1_clk_x";
- function = "spi1";
- bias-disable;
- };
- };
-
- spi1_ss0_x_pins: spi1_ss0_x {
- mux {
- groups = "spi1_ss0_x";
- function = "spi1";
- bias-disable;
- };
- };
-
- tdma_din0_pins: tdma_din0 {
- mux {
- groups = "tdma_din0";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_dout0_x14_pins: tdma_dout0_x14 {
- mux {
- groups = "tdma_dout0_x14";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_dout0_x15_pins: tdma_dout0_x15 {
- mux {
- groups = "tdma_dout0_x15";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_dout1_pins: tdma_dout1 {
- mux {
- groups = "tdma_dout1";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_din1_pins: tdma_din1 {
- mux {
- groups = "tdma_din1";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_fs_pins: tdma_fs {
- mux {
- groups = "tdma_fs";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_fs_slv_pins: tdma_fs_slv {
- mux {
- groups = "tdma_fs_slv";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_sclk_pins: tdma_sclk {
- mux {
- groups = "tdma_sclk";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdma_sclk_slv_pins: tdma_sclk_slv {
- mux {
- groups = "tdma_sclk_slv";
- function = "tdma";
- bias-disable;
- };
- };
-
- tdmb_din0_pins: tdmb_din0 {
- mux {
- groups = "tdmb_din0";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_din1_pins: tdmb_din1 {
- mux {
- groups = "tdmb_din1";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_din2_pins: tdmb_din2 {
- mux {
- groups = "tdmb_din2";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_din3_pins: tdmb_din3 {
- mux {
- groups = "tdmb_din3";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout0_pins: tdmb_dout0 {
- mux {
- groups = "tdmb_dout0";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout1_pins: tdmb_dout1 {
- mux {
- groups = "tdmb_dout1";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout2_pins: tdmb_dout2 {
- mux {
- groups = "tdmb_dout2";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_dout3_pins: tdmb_dout3 {
- mux {
- groups = "tdmb_dout3";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_fs_pins: tdmb_fs {
- mux {
- groups = "tdmb_fs";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_fs_slv_pins: tdmb_fs_slv {
- mux {
- groups = "tdmb_fs_slv";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_sclk_pins: tdmb_sclk {
- mux {
- groups = "tdmb_sclk";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmb_sclk_slv_pins: tdmb_sclk_slv {
- mux {
- groups = "tdmb_sclk_slv";
- function = "tdmb";
- bias-disable;
- };
- };
-
- tdmc_fs_pins: tdmc_fs {
- mux {
- groups = "tdmc_fs";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_fs_slv_pins: tdmc_fs_slv {
- mux {
- groups = "tdmc_fs_slv";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_sclk_pins: tdmc_sclk {
- mux {
- groups = "tdmc_sclk";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_sclk_slv_pins: tdmc_sclk_slv {
- mux {
- groups = "tdmc_sclk_slv";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din0_pins: tdmc_din0 {
- mux {
- groups = "tdmc_din0";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din1_pins: tdmc_din1 {
- mux {
- groups = "tdmc_din1";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din2_pins: tdmc_din2 {
- mux {
- groups = "tdmc_din2";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_din3_pins: tdmc_din3 {
- mux {
- groups = "tdmc_din3";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout0_pins: tdmc_dout0 {
- mux {
- groups = "tdmc_dout0";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout1_pins: tdmc_dout1 {
- mux {
- groups = "tdmc_dout1";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout2_pins: tdmc_dout2 {
- mux {
- groups = "tdmc_dout2";
- function = "tdmc";
- bias-disable;
- };
- };
-
- tdmc_dout3_pins: tdmc_dout3 {
- mux {
- groups = "tdmc_dout3";
- function = "tdmc";
- bias-disable;
- };
- };
-
- uart_a_pins: uart_a {
- mux {
- groups = "uart_tx_a",
- "uart_rx_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_a_cts_rts_pins: uart_a_cts_rts {
- mux {
- groups = "uart_cts_a",
- "uart_rts_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_b_x_pins: uart_b_x {
- mux {
- groups = "uart_tx_b_x",
- "uart_rx_b_x";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
- mux {
- groups = "uart_cts_b_x",
- "uart_rts_b_x";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_z_pins: uart_b_z {
- mux {
- groups = "uart_tx_b_z",
- "uart_rx_b_z";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
- mux {
- groups = "uart_cts_b_z",
- "uart_rts_b_z";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_ao_b_z_pins: uart_ao_b_z {
- mux {
- groups = "uart_ao_tx_b_z",
- "uart_ao_rx_b_z";
- function = "uart_ao_b_z";
- bias-disable;
- };
- };
-
- uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
- mux {
- groups = "uart_ao_cts_b_z",
- "uart_ao_rts_b_z";
- function = "uart_ao_b_z";
- bias-disable;
- };
- };
- };
- };
-
- hiubus: bus@ff63c000 {
- compatible = "simple-bus";
- reg = <0x0 0xff63c000 0x0 0x1c00>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
-
- sysctrl: system-controller@0 {
- compatible = "amlogic,meson-axg-hhi-sysctrl",
- "simple-mfd", "syscon";
- reg = <0 0 0 0x400>;
-
- clkc: clock-controller {
- compatible = "amlogic,axg-clkc";
- #clock-cells = <1>;
- clocks = <&xtal>;
- clock-names = "xtal";
- };
-
- pwrc: power-controller {
- compatible = "amlogic,meson-axg-pwrc";
- #power-domain-cells = <1>;
- amlogic,ao-sysctrl = <&sysctrl_AO>;
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- reset-names = "viu", "venc", "vcbus",
- "vencl", "vid_lock";
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <250000000>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
- };
-
- mipi_pcie_analog_dphy: phy {
- compatible = "amlogic,axg-mipi-pcie-analog-phy";
- #phy-cells = <0>;
- status = "disabled";
- };
- };
- };
-
- mailbox: mailbox@ff63c404 {
- compatible = "amlogic,meson-gxbb-mhu";
- reg = <0 0xff63c404 0 0x4c>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
- #mbox-cells = <1>;
- };
-
- mipi_dphy: phy@ff640000 {
- compatible = "amlogic,axg-mipi-dphy";
- reg = <0x0 0xff640000 0x0 0x100>;
- clocks = <&clkc CLKID_MIPI_DSI_PHY>;
- clock-names = "pclk";
- resets = <&reset RESET_MIPI_PHY>;
- reset-names = "phy";
- phys = <&mipi_pcie_analog_dphy>;
- phy-names = "analog";
- #phy-cells = <0>;
- status = "disabled";
- };
-
- audio: bus@ff642000 {
- compatible = "simple-bus";
- reg = <0x0 0xff642000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff642000 0x0 0x2000>;
-
- clkc_audio: clock-controller@0 {
- compatible = "amlogic,axg-audio-clkc";
- reg = <0x0 0x0 0x0 0xb4>;
- #clock-cells = <1>;
-
- clocks = <&clkc CLKID_AUDIO>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL3>,
- <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_FCLK_DIV3>,
- <&clkc CLKID_FCLK_DIV4>,
- <&clkc CLKID_GP0_PLL>;
- clock-names = "pclk",
- "mst_in0",
- "mst_in1",
- "mst_in2",
- "mst_in3",
- "mst_in4",
- "mst_in5",
- "mst_in6",
- "mst_in7";
-
- resets = <&reset RESET_AUDIO>;
- };
-
- toddr_a: audio-controller@100 {
- compatible = "amlogic,axg-toddr";
- reg = <0x0 0x100 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_A";
- interrupts = <GIC_SPI 84 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
- resets = <&arb AXG_ARB_TODDR_A>;
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- toddr_b: audio-controller@140 {
- compatible = "amlogic,axg-toddr";
- reg = <0x0 0x140 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_B";
- interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
- resets = <&arb AXG_ARB_TODDR_B>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- toddr_c: audio-controller@180 {
- compatible = "amlogic,axg-toddr";
- reg = <0x0 0x180 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_C";
- interrupts = <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
- resets = <&arb AXG_ARB_TODDR_C>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_a: audio-controller@1c0 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_A";
- interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>;
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- frddr_b: audio-controller@200 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x200 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_B";
- interrupts = <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
- resets = <&arb AXG_ARB_FRDDR_B>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_c: audio-controller@240 {
- compatible = "amlogic,axg-frddr";
- reg = <0x0 0x240 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_C";
- interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
- resets = <&arb AXG_ARB_FRDDR_C>;
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- arb: reset-controller@280 {
- compatible = "amlogic,meson-axg-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
- };
-
- tdmin_a: audio-controller@300 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x300 0x0 0x40>;
- sound-name-prefix = "TDMIN_A";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_b: audio-controller@340 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x340 0x0 0x40>;
- sound-name-prefix = "TDMIN_B";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_c: audio-controller@380 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x380 0x0 0x40>;
- sound-name-prefix = "TDMIN_C";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_lb: audio-controller@3c0 {
- compatible = "amlogic,axg-tdmin";
- reg = <0x0 0x3c0 0x0 0x40>;
- sound-name-prefix = "TDMIN_LB";
- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifin: audio-controller@400 {
- compatible = "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFIN";
- interrupts = <GIC_SPI 87 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
- status = "disabled";
- };
-
- spdifout: audio-controller@480 {
- compatible = "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
- status = "disabled";
- };
-
- tdmout_a: audio-controller@500 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- sound-name-prefix = "TDMOUT_A";
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_b: audio-controller@540 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x540 0x0 0x40>;
- sound-name-prefix = "TDMOUT_B";
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_c: audio-controller@580 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x580 0x0 0x40>;
- sound-name-prefix = "TDMOUT_C";
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
- };
-
- aobus: bus@ff800000 {
- compatible = "simple-bus";
- reg = <0x0 0xff800000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
-
- sysctrl_AO: sys-ctrl@0 {
- compatible = "amlogic,meson-axg-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
-
- clkc_AO: clock-controller {
- compatible = "amlogic,meson-axg-aoclkc";
- #clock-cells = <1>;
- #reset-cells = <1>;
- clocks = <&xtal>, <&clkc CLKID_CLK81>;
- clock-names = "xtal", "mpeg-clk";
- };
- };
-
- pinctrl_aobus: pinctrl@14 {
- compatible = "amlogic,meson-axg-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: bank@14 {
- reg = <0x0 0x00014 0x0 0x8>,
- <0x0 0x0002c 0x0 0x4>,
- <0x0 0x00024 0x0 0x8>;
- reg-names = "mux", "pull", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_aobus 0 0 15>;
- };
-
- i2c_ao_sck_4_pins: i2c_ao_sck_4 {
- mux {
- groups = "i2c_ao_sck_4";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sck_8_pins: i2c_ao_sck_8 {
- mux {
- groups = "i2c_ao_sck_8";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sck_10_pins: i2c_ao_sck_10 {
- mux {
- groups = "i2c_ao_sck_10";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sda_5_pins: i2c_ao_sda_5 {
- mux {
- groups = "i2c_ao_sda_5";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sda_9_pins: i2c_ao_sda_9 {
- mux {
- groups = "i2c_ao_sda_9";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- i2c_ao_sda_11_pins: i2c_ao_sda_11 {
- mux {
- groups = "i2c_ao_sda_11";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- remote_input_ao_pins: remote_input_ao {
- mux {
- groups = "remote_input_ao";
- function = "remote_input_ao";
- bias-disable;
- };
- };
-
- uart_ao_a_pins: uart_ao_a {
- mux {
- groups = "uart_ao_tx_a",
- "uart_ao_rx_a";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
- mux {
- groups = "uart_ao_cts_a",
- "uart_ao_rts_a";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_b_pins: uart_ao_b {
- mux {
- groups = "uart_ao_tx_b",
- "uart_ao_rx_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
- mux {
- groups = "uart_ao_cts_b",
- "uart_ao_rts_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
- };
-
- sec_AO: ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
- };
-
- pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-axg-ao-pwm";
- reg = <0x0 0x02000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- uart_AO: serial@3000 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_AO_B: serial@4000 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x4000 0x0 0x18>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- i2c_AO: i2c@5000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x05000 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_AO_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-axg-ao-pwm";
- reg = <0x0 0x07000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- ir: ir@8000 {
- compatible = "amlogic,meson-gxbb-ir";
- reg = <0x0 0x8000 0x0 0x20>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- saradc: adc@9000 {
- compatible = "amlogic,meson-axg-saradc",
- "amlogic,meson-saradc";
- reg = <0x0 0x9000 0x0 0x38>;
- #io-channel-cells = <1>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>,
- <&clkc_AO CLKID_AO_SAR_ADC>,
- <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
- <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
- clock-names = "clkin", "core", "adc_clk", "adc_sel";
- status = "disabled";
- };
- };
-
- ge2d: ge2d@ff940000 {
- compatible = "amlogic,axg-ge2d";
- reg = <0x0 0xff940000 0x0 0x10000>;
- interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_VAPB>;
- resets = <&reset RESET_GE2D>;
- };
-
- gic: interrupt-controller@ffc01000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xffc01000 0 0x1000>,
- <0x0 0xffc02000 0 0x2000>,
- <0x0 0xffc04000 0 0x2000>,
- <0x0 0xffc06000 0 0x2000>;
- interrupt-controller;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- #interrupt-cells = <3>;
- #address-cells = <0>;
- };
-
- cbus: bus@ffd00000 {
- compatible = "simple-bus";
- reg = <0x0 0xffd00000 0x0 0x25000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x25000>;
-
- reset: reset-controller@1004 {
- compatible = "amlogic,meson-axg-reset";
- reg = <0x0 0x01004 0x0 0x9c>;
- #reset-cells = <1>;
- };
-
- gpio_intc: interrupt-controller@f080 {
- compatible = "amlogic,meson-axg-gpio-intc",
- "amlogic,meson-gpio-intc";
- reg = <0x0 0xf080 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- };
-
- watchdog@f0d0 {
- compatible = "amlogic,meson-gxbb-wdt";
- reg = <0x0 0xf0d0 0x0 0x10>;
- clocks = <&xtal>;
- };
-
- pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-axg-ee-pwm";
- reg = <0x0 0x1b000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-axg-ee-pwm";
- reg = <0x0 0x1a000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- spicc0: spi@13000 {
- compatible = "amlogic,meson-axg-spicc";
- reg = <0x0 0x13000 0x0 0x3c>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>;
- clock-names = "core";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc1: spi@15000 {
- compatible = "amlogic,meson-axg-spicc";
- reg = <0x0 0x15000 0x0 0x3c>;
- interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC1>;
- clock-names = "core";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- clk_msr: clock-measure@18000 {
- compatible = "amlogic,meson-axg-clk-measure";
- reg = <0x0 0x18000 0x0 0x10>;
- };
-
- i2c3: i2c@1c000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1c000 0x0 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c2: i2c@1d000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1d000 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c1: i2c@1e000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1e000 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c0: i2c@1f000 {
- compatible = "amlogic,meson-axg-i2c";
- reg = <0x0 0x1f000 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_I2C>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- uart_B: serial@23000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x23000 0x0 0x18>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- };
-
- uart_A: serial@24000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x24000 0x0 0x18>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- fifo-size = <128>;
- };
- };
-
- apb: bus@ffe00000 {
- compatible = "simple-bus";
- reg = <0x0 0xffe00000 0x0 0x200000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x200000>;
-
- sd_emmc_b: sd@5000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0x5000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_B>;
- };
-
- sd_emmc_c: mmc@7000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0x7000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_C>;
- };
-
- usb2_phy1: phy@9020 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x9020 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- };
- };
-
- sram: sram@fffc0000 {
- compatible = "mmio-sram";
- reg = <0x0 0xfffc0000 0x0 0x20000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x0 0xfffc0000 0x20000>;
-
- cpu_scp_lpri: scp-sram@13000 {
- compatible = "amlogic,meson-axg-scp-shmem";
- reg = <0x13000 0x400>;
- };
-
- cpu_scp_hpri: scp-sram@13400 {
- compatible = "amlogic,meson-axg-scp-shmem";
- reg = <0x13400 0x400>;
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-};
diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi
deleted file mode 100644
index 9dbd508..0000000
--- a/arch/arm/dts/meson-g12-common.dtsi
+++ /dev/null
@@ -1,2493 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- */
-
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/g12a-clkc.h>
-#include <dt-bindings/clock/g12a-aoclkc.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- mmc0 = &sd_emmc_b; /* SD card */
- mmc1 = &sd_emmc_c; /* eMMC */
- mmc2 = &sd_emmc_a; /* SDIO */
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- simplefb_cvbs: framebuffer-cvbs {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-cvbs";
- clocks = <&clkc CLKID_HDMI>,
- <&clkc CLKID_HTX_PCLK>,
- <&clkc CLKID_VPU_INTR>;
- status = "disabled";
- };
-
- simplefb_hdmi: framebuffer-hdmi {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-hdmi";
- clocks = <&clkc CLKID_HDMI>,
- <&clkc CLKID_HTX_PCLK>,
- <&clkc CLKID_VPU_INTR>;
- status = "disabled";
- };
- };
-
- efuse: efuse {
- compatible = "amlogic,meson-gxbb-efuse";
- clocks = <&clkc CLKID_EFUSE>;
- #address-cells = <1>;
- #size-cells = <1>;
- read-only;
- secure-monitor = <&sm>;
- };
-
- gpu_opp_table: opp-table-gpu {
- compatible = "operating-points-v2";
-
- opp-124999998 {
- opp-hz = /bits/ 64 <124999998>;
- opp-microvolt = <800000>;
- };
- opp-249999996 {
- opp-hz = /bits/ 64 <249999996>;
- opp-microvolt = <800000>;
- };
- opp-285714281 {
- opp-hz = /bits/ 64 <285714281>;
- opp-microvolt = <800000>;
- };
- opp-399999994 {
- opp-hz = /bits/ 64 <399999994>;
- opp-microvolt = <800000>;
- };
- opp-499999992 {
- opp-hz = /bits/ 64 <499999992>;
- opp-microvolt = <800000>;
- };
- opp-666666656 {
- opp-hz = /bits/ 64 <666666656>;
- opp-microvolt = <800000>;
- };
- opp-799999987 {
- opp-hz = /bits/ 64 <799999987>;
- opp-microvolt = <800000>;
- };
- };
-
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
- };
-
- /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
- secmon_reserved_bl32: secmon@5300000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
-
- linux,cma {
- compatible = "shared-dma-pool";
- reusable;
- size = <0x0 0x10000000>;
- alignment = <0x0 0x400000>;
- linux,cma-default;
- };
- };
-
- sm: secure-monitor {
- compatible = "amlogic,meson-gxbb-sm";
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- pcie: pcie@fc000000 {
- compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
- reg = <0x0 0xfc000000 0x0 0x400000>,
- <0x0 0xff648000 0x0 0x2000>,
- <0x0 0xfc400000 0x0 0x200000>;
- reg-names = "elbi", "cfg", "config";
- interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
- bus-range = <0x0 0xff>;
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>,
- <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
-
- clocks = <&clkc CLKID_PCIE_PHY
- &clkc CLKID_PCIE_COMB
- &clkc CLKID_PCIE_PLL>;
- clock-names = "general",
- "pclk",
- "port";
- resets = <&reset RESET_PCIE_CTRL_A>,
- <&reset RESET_PCIE_APB>;
- reset-names = "port",
- "apb";
- num-lanes = <1>;
- phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
- phy-names = "pcie";
- status = "disabled";
- };
-
- ethmac: ethernet@ff3f0000 {
- compatible = "amlogic,meson-g12a-dwmac",
- "snps,dwmac-3.70a",
- "snps,dwmac";
- reg = <0x0 0xff3f0000 0x0 0x10000>,
- <0x0 0xff634540 0x0 0x8>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- clocks = <&clkc CLKID_ETH>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "stmmaceth", "clkin0", "clkin1",
- "timing-adjustment";
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <2048>;
- status = "disabled";
-
- mdio0: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
- };
-
- apb: bus@ff600000 {
- compatible = "simple-bus";
- reg = <0x0 0xff600000 0x0 0x200000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff600000 0x0 0x200000>;
-
- hdmi_tx: hdmi-tx@0 {
- compatible = "amlogic,meson-g12a-dw-hdmi";
- reg = <0x0 0x0 0x0 0x10000>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
- resets = <&reset RESET_HDMITX_CAPB3>,
- <&reset RESET_HDMITX_PHY>,
- <&reset RESET_HDMITX>;
- reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
- clocks = <&clkc CLKID_HDMI>,
- <&clkc CLKID_HTX_PCLK>,
- <&clkc CLKID_VPU_INTR>;
- clock-names = "isfr", "iahb", "venci";
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <0>;
- status = "disabled";
-
- /* VPU VENC Input */
- hdmi_tx_venc_port: port@0 {
- reg = <0>;
-
- hdmi_tx_in: endpoint {
- remote-endpoint = <&hdmi_tx_out>;
- };
- };
-
- /* TMDS Output */
- hdmi_tx_tmds_port: port@1 {
- reg = <1>;
- };
- };
-
- apb_efuse: bus@30000 {
- compatible = "simple-bus";
- reg = <0x0 0x30000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x30000 0x0 0x2000>;
-
- hwrng: rng@218 {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x218 0x0 0x4>;
- clocks = <&clkc CLKID_RNG0>;
- clock-names = "core";
- };
- };
-
- acodec: audio-controller@32000 {
- compatible = "amlogic,t9015";
- reg = <0x0 0x32000 0x0 0x14>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "ACODEC";
- clocks = <&clkc CLKID_AUDIO_CODEC>;
- clock-names = "pclk";
- resets = <&reset RESET_AUDIO_CODEC>;
- status = "disabled";
- };
-
- periphs: bus@34400 {
- compatible = "simple-bus";
- reg = <0x0 0x34400 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x34400 0x0 0x400>;
-
- periphs_pinctrl: pinctrl@40 {
- compatible = "amlogic,meson-g12a-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: bank@40 {
- reg = <0x0 0x40 0x0 0x4c>,
- <0x0 0xe8 0x0 0x18>,
- <0x0 0x120 0x0 0x18>,
- <0x0 0x2c0 0x0 0x40>,
- <0x0 0x340 0x0 0x1c>;
- reg-names = "gpio",
- "pull",
- "pull-enable",
- "mux",
- "ds";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&periphs_pinctrl 0 0 86>;
- };
-
- cec_ao_a_h_pins: cec_ao_a_h {
- mux {
- groups = "cec_ao_a_h";
- function = "cec_ao_a_h";
- bias-disable;
- };
- };
-
- cec_ao_b_h_pins: cec_ao_b_h {
- mux {
- groups = "cec_ao_b_h";
- function = "cec_ao_b_h";
- bias-disable;
- };
- };
-
- emmc_ctrl_pins: emmc-ctrl {
- mux-0 {
- groups = "emmc_cmd";
- function = "emmc";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
-
- mux-1 {
- groups = "emmc_clk";
- function = "emmc";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_data_4b_pins: emmc-data-4b {
- mux-0 {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3";
- function = "emmc";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_data_8b_pins: emmc-data-8b {
- mux-0 {
- groups = "emmc_nand_d0",
- "emmc_nand_d1",
- "emmc_nand_d2",
- "emmc_nand_d3",
- "emmc_nand_d4",
- "emmc_nand_d5",
- "emmc_nand_d6",
- "emmc_nand_d7";
- function = "emmc";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_ds_pins: emmc-ds {
- mux {
- groups = "emmc_nand_ds";
- function = "emmc";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- emmc_clk_gate_pins: emmc_clk_gate {
- mux {
- groups = "BOOT_8";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- hdmitx_ddc_pins: hdmitx_ddc {
- mux {
- groups = "hdmitx_sda",
- "hdmitx_sck";
- function = "hdmitx";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- hdmitx_hpd_pins: hdmitx_hpd {
- mux {
- groups = "hdmitx_hpd_in";
- function = "hdmitx";
- bias-disable;
- };
- };
-
-
- i2c0_sda_c_pins: i2c0-sda-c {
- mux {
- groups = "i2c0_sda_c";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
-
- };
- };
-
- i2c0_sck_c_pins: i2c0-sck-c {
- mux {
- groups = "i2c0_sck_c";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sda_z0_pins: i2c0-sda-z0 {
- mux {
- groups = "i2c0_sda_z0";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sck_z1_pins: i2c0-sck-z1 {
- mux {
- groups = "i2c0_sck_z1";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sda_z7_pins: i2c0-sda-z7 {
- mux {
- groups = "i2c0_sda_z7";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c0_sda_z8_pins: i2c0-sda-z8 {
- mux {
- groups = "i2c0_sda_z8";
- function = "i2c0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sda_x_pins: i2c1-sda-x {
- mux {
- groups = "i2c1_sda_x";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sck_x_pins: i2c1-sck-x {
- mux {
- groups = "i2c1_sck_x";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sda_h2_pins: i2c1-sda-h2 {
- mux {
- groups = "i2c1_sda_h2";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sck_h3_pins: i2c1-sck-h3 {
- mux {
- groups = "i2c1_sck_h3";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sda_h6_pins: i2c1-sda-h6 {
- mux {
- groups = "i2c1_sda_h6";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c1_sck_h7_pins: i2c1-sck-h7 {
- mux {
- groups = "i2c1_sck_h7";
- function = "i2c1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sda_x_pins: i2c2-sda-x {
- mux {
- groups = "i2c2_sda_x";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sck_x_pins: i2c2-sck-x {
- mux {
- groups = "i2c2_sck_x";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sda_z_pins: i2c2-sda-z {
- mux {
- groups = "i2c2_sda_z";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c2_sck_z_pins: i2c2-sck-z {
- mux {
- groups = "i2c2_sck_z";
- function = "i2c2";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sda_h_pins: i2c3-sda-h {
- mux {
- groups = "i2c3_sda_h";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sck_h_pins: i2c3-sck-h {
- mux {
- groups = "i2c3_sck_h";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sda_a_pins: i2c3-sda-a {
- mux {
- groups = "i2c3_sda_a";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c3_sck_a_pins: i2c3-sck-a {
- mux {
- groups = "i2c3_sck_a";
- function = "i2c3";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk0_a_pins: mclk0-a {
- mux {
- groups = "mclk0_a";
- function = "mclk0";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk1_a_pins: mclk1-a {
- mux {
- groups = "mclk1_a";
- function = "mclk1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk1_x_pins: mclk1-x {
- mux {
- groups = "mclk1_x";
- function = "mclk1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk1_z_pins: mclk1-z {
- mux {
- groups = "mclk1_z";
- function = "mclk1";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- nor_pins: nor {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c",
- "nor_cs";
- function = "nor";
- bias-disable;
- };
- };
-
- pdm_din0_a_pins: pdm-din0-a {
- mux {
- groups = "pdm_din0_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_c_pins: pdm-din0-c {
- mux {
- groups = "pdm_din0_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_x_pins: pdm-din0-x {
- mux {
- groups = "pdm_din0_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din0_z_pins: pdm-din0-z {
- mux {
- groups = "pdm_din0_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_a_pins: pdm-din1-a {
- mux {
- groups = "pdm_din1_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_c_pins: pdm-din1-c {
- mux {
- groups = "pdm_din1_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_x_pins: pdm-din1-x {
- mux {
- groups = "pdm_din1_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din1_z_pins: pdm-din1-z {
- mux {
- groups = "pdm_din1_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_a_pins: pdm-din2-a {
- mux {
- groups = "pdm_din2_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_c_pins: pdm-din2-c {
- mux {
- groups = "pdm_din2_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_x_pins: pdm-din2-x {
- mux {
- groups = "pdm_din2_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din2_z_pins: pdm-din2-z {
- mux {
- groups = "pdm_din2_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_a_pins: pdm-din3-a {
- mux {
- groups = "pdm_din3_a";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_c_pins: pdm-din3-c {
- mux {
- groups = "pdm_din3_c";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_x_pins: pdm-din3-x {
- mux {
- groups = "pdm_din3_x";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_din3_z_pins: pdm-din3-z {
- mux {
- groups = "pdm_din3_z";
- function = "pdm";
- bias-disable;
- };
- };
-
- pdm_dclk_a_pins: pdm-dclk-a {
- mux {
- groups = "pdm_dclk_a";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pdm_dclk_c_pins: pdm-dclk-c {
- mux {
- groups = "pdm_dclk_c";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pdm_dclk_x_pins: pdm-dclk-x {
- mux {
- groups = "pdm_dclk_x";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pdm_dclk_z_pins: pdm-dclk-z {
- mux {
- groups = "pdm_dclk_z";
- function = "pdm";
- bias-disable;
- drive-strength-microamp = <500>;
- };
- };
-
- pwm_a_pins: pwm-a {
- mux {
- groups = "pwm_a";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_b_x7_pins: pwm-b-x7 {
- mux {
- groups = "pwm_b_x7";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_b_x19_pins: pwm-b-x19 {
- mux {
- groups = "pwm_b_x19";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_c_c_pins: pwm-c-c {
- mux {
- groups = "pwm_c_c";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x5_pins: pwm-c-x5 {
- mux {
- groups = "pwm_c_x5";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_c_x8_pins: pwm-c-x8 {
- mux {
- groups = "pwm_c_x8";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_d_x3_pins: pwm-d-x3 {
- mux {
- groups = "pwm_d_x3";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_d_x6_pins: pwm-d-x6 {
- mux {
- groups = "pwm_d_x6";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_e_pins: pwm-e {
- mux {
- groups = "pwm_e";
- function = "pwm_e";
- bias-disable;
- };
- };
-
- pwm_f_z_pins: pwm-f-z {
- mux {
- groups = "pwm_f_z";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_a_pins: pwm-f-a {
- mux {
- groups = "pwm_f_a";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_x_pins: pwm-f-x {
- mux {
- groups = "pwm_f_x";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_h_pins: pwm-f-h {
- mux {
- groups = "pwm_f_h";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- sdcard_c_pins: sdcard_c {
- mux-0 {
- groups = "sdcard_d0_c",
- "sdcard_d1_c",
- "sdcard_d2_c",
- "sdcard_d3_c",
- "sdcard_cmd_c";
- function = "sdcard";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
-
- mux-1 {
- groups = "sdcard_clk_c";
- function = "sdcard";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdcard_clk_gate_c_pins: sdcard_clk_gate_c {
- mux {
- groups = "GPIOC_4";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdcard_z_pins: sdcard_z {
- mux-0 {
- groups = "sdcard_d0_z",
- "sdcard_d1_z",
- "sdcard_d2_z",
- "sdcard_d3_z",
- "sdcard_cmd_z";
- function = "sdcard";
- bias-pull-up;
- drive-strength-microamp = <4000>;
- };
-
- mux-1 {
- groups = "sdcard_clk_z";
- function = "sdcard";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdcard_clk_gate_z_pins: sdcard_clk_gate_z {
- mux {
- groups = "GPIOZ_6";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdio_pins: sdio {
- mux {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_clk",
- "sdio_cmd";
- function = "sdio";
- bias-disable;
- drive-strength-microamp = <4000>;
- };
- };
-
- sdio_clk_gate_pins: sdio_clk_gate {
- mux {
- groups = "GPIOX_4";
- function = "gpio_periphs";
- bias-pull-down;
- drive-strength-microamp = <4000>;
- };
- };
-
- spdif_in_a10_pins: spdif-in-a10 {
- mux {
- groups = "spdif_in_a10";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_a12_pins: spdif-in-a12 {
- mux {
- groups = "spdif_in_a12";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_in_h_pins: spdif-in-h {
- mux {
- groups = "spdif_in_h";
- function = "spdif_in";
- bias-disable;
- };
- };
-
- spdif_out_h_pins: spdif-out-h {
- mux {
- groups = "spdif_out_h";
- function = "spdif_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- spdif_out_a11_pins: spdif-out-a11 {
- mux {
- groups = "spdif_out_a11";
- function = "spdif_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- spdif_out_a13_pins: spdif-out-a13 {
- mux {
- groups = "spdif_out_a13";
- function = "spdif_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- spicc0_x_pins: spicc0-x {
- mux {
- groups = "spi0_mosi_x",
- "spi0_miso_x",
- "spi0_clk_x";
- function = "spi0";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- spicc0_ss0_x_pins: spicc0-ss0-x {
- mux {
- groups = "spi0_ss0_x";
- function = "spi0";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- spicc0_c_pins: spicc0-c {
- mux {
- groups = "spi0_mosi_c",
- "spi0_miso_c",
- "spi0_ss0_c",
- "spi0_clk_c";
- function = "spi0";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- spicc1_pins: spicc1 {
- mux {
- groups = "spi1_mosi",
- "spi1_miso",
- "spi1_clk";
- function = "spi1";
- drive-strength-microamp = <4000>;
- };
- };
-
- spicc1_ss0_pins: spicc1-ss0 {
- mux {
- groups = "spi1_ss0";
- function = "spi1";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- tdm_a_din0_pins: tdm-a-din0 {
- mux {
- groups = "tdm_a_din0";
- function = "tdm_a";
- bias-disable;
- };
- };
-
-
- tdm_a_din1_pins: tdm-a-din1 {
- mux {
- groups = "tdm_a_din1";
- function = "tdm_a";
- bias-disable;
- };
- };
-
- tdm_a_dout0_pins: tdm-a-dout0 {
- mux {
- groups = "tdm_a_dout0";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_dout1_pins: tdm-a-dout1 {
- mux {
- groups = "tdm_a_dout1";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_fs_pins: tdm-a-fs {
- mux {
- groups = "tdm_a_fs";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_sclk_pins: tdm-a-sclk {
- mux {
- groups = "tdm_a_sclk";
- function = "tdm_a";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_a_slv_fs_pins: tdm-a-slv-fs {
- mux {
- groups = "tdm_a_slv_fs";
- function = "tdm_a";
- bias-disable;
- };
- };
-
-
- tdm_a_slv_sclk_pins: tdm-a-slv-sclk {
- mux {
- groups = "tdm_a_slv_sclk";
- function = "tdm_a";
- bias-disable;
- };
- };
-
- tdm_b_din0_pins: tdm-b-din0 {
- mux {
- groups = "tdm_b_din0";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din1_pins: tdm-b-din1 {
- mux {
- groups = "tdm_b_din1";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din2_pins: tdm-b-din2 {
- mux {
- groups = "tdm_b_din2";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din3_a_pins: tdm-b-din3-a {
- mux {
- groups = "tdm_b_din3_a";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_din3_h_pins: tdm-b-din3-h {
- mux {
- groups = "tdm_b_din3_h";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_dout0_pins: tdm-b-dout0 {
- mux {
- groups = "tdm_b_dout0";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout1_pins: tdm-b-dout1 {
- mux {
- groups = "tdm_b_dout1";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout2_pins: tdm-b-dout2 {
- mux {
- groups = "tdm_b_dout2";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout3_a_pins: tdm-b-dout3-a {
- mux {
- groups = "tdm_b_dout3_a";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_dout3_h_pins: tdm-b-dout3-h {
- mux {
- groups = "tdm_b_dout3_h";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_fs_pins: tdm-b-fs {
- mux {
- groups = "tdm_b_fs";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_sclk_pins: tdm-b-sclk {
- mux {
- groups = "tdm_b_sclk";
- function = "tdm_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_b_slv_fs_pins: tdm-b-slv-fs {
- mux {
- groups = "tdm_b_slv_fs";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_b_slv_sclk_pins: tdm-b-slv-sclk {
- mux {
- groups = "tdm_b_slv_sclk";
- function = "tdm_b";
- bias-disable;
- };
- };
-
- tdm_c_din0_a_pins: tdm-c-din0-a {
- mux {
- groups = "tdm_c_din0_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din0_z_pins: tdm-c-din0-z {
- mux {
- groups = "tdm_c_din0_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din1_a_pins: tdm-c-din1-a {
- mux {
- groups = "tdm_c_din1_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din1_z_pins: tdm-c-din1-z {
- mux {
- groups = "tdm_c_din1_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din2_a_pins: tdm-c-din2-a {
- mux {
- groups = "tdm_c_din2_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- eth_leds_pins: eth-leds {
- mux {
- groups = "eth_link_led",
- "eth_act_led";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_pins: eth {
- mux {
- groups = "eth_mdio",
- "eth_mdc",
- "eth_rgmii_rx_clk",
- "eth_rx_dv",
- "eth_rxd0",
- "eth_rxd1",
- "eth_txen",
- "eth_txd0",
- "eth_txd1";
- function = "eth";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- eth_rgmii_pins: eth-rgmii {
- mux {
- groups = "eth_rxd2_rgmii",
- "eth_rxd3_rgmii",
- "eth_rgmii_tx_clk",
- "eth_txd2_rgmii",
- "eth_txd3_rgmii";
- function = "eth";
- drive-strength-microamp = <4000>;
- bias-disable;
- };
- };
-
- tdm_c_din2_z_pins: tdm-c-din2-z {
- mux {
- groups = "tdm_c_din2_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din3_a_pins: tdm-c-din3-a {
- mux {
- groups = "tdm_c_din3_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_din3_z_pins: tdm-c-din3-z {
- mux {
- groups = "tdm_c_din3_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_dout0_a_pins: tdm-c-dout0-a {
- mux {
- groups = "tdm_c_dout0_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout0_z_pins: tdm-c-dout0-z {
- mux {
- groups = "tdm_c_dout0_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout1_a_pins: tdm-c-dout1-a {
- mux {
- groups = "tdm_c_dout1_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout1_z_pins: tdm-c-dout1-z {
- mux {
- groups = "tdm_c_dout1_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout2_a_pins: tdm-c-dout2-a {
- mux {
- groups = "tdm_c_dout2_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout2_z_pins: tdm-c-dout2-z {
- mux {
- groups = "tdm_c_dout2_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout3_a_pins: tdm-c-dout3-a {
- mux {
- groups = "tdm_c_dout3_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_dout3_z_pins: tdm-c-dout3-z {
- mux {
- groups = "tdm_c_dout3_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_fs_a_pins: tdm-c-fs-a {
- mux {
- groups = "tdm_c_fs_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_fs_z_pins: tdm-c-fs-z {
- mux {
- groups = "tdm_c_fs_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_sclk_a_pins: tdm-c-sclk-a {
- mux {
- groups = "tdm_c_sclk_a";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_sclk_z_pins: tdm-c-sclk-z {
- mux {
- groups = "tdm_c_sclk_z";
- function = "tdm_c";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_c_slv_fs_a_pins: tdm-c-slv-fs-a {
- mux {
- groups = "tdm_c_slv_fs_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_slv_fs_z_pins: tdm-c-slv-fs-z {
- mux {
- groups = "tdm_c_slv_fs_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_slv_sclk_a_pins: tdm-c-slv-sclk-a {
- mux {
- groups = "tdm_c_slv_sclk_a";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- tdm_c_slv_sclk_z_pins: tdm-c-slv-sclk-z {
- mux {
- groups = "tdm_c_slv_sclk_z";
- function = "tdm_c";
- bias-disable;
- };
- };
-
- uart_a_pins: uart-a {
- mux {
- groups = "uart_a_tx",
- "uart_a_rx";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_a_cts_rts_pins: uart-a-cts-rts {
- mux {
- groups = "uart_a_cts",
- "uart_a_rts";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_b_pins: uart-b {
- mux {
- groups = "uart_b_tx",
- "uart_b_rx";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_c_pins: uart-c {
- mux {
- groups = "uart_c_tx",
- "uart_c_rx";
- function = "uart_c";
- bias-disable;
- };
- };
-
- uart_c_cts_rts_pins: uart-c-cts-rts {
- mux {
- groups = "uart_c_cts",
- "uart_c_rts";
- function = "uart_c";
- bias-disable;
- };
- };
- };
- };
-
- cpu_temp: temperature-sensor@34800 {
- compatible = "amlogic,g12a-cpu-thermal",
- "amlogic,g12a-thermal";
- reg = <0x0 0x34800 0x0 0x50>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_TS>;
- #thermal-sensor-cells = <0>;
- amlogic,ao-secure = <&sec_AO>;
- };
-
- ddr_temp: temperature-sensor@34c00 {
- compatible = "amlogic,g12a-ddr-thermal",
- "amlogic,g12a-thermal";
- reg = <0x0 0x34c00 0x0 0x50>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_TS>;
- #thermal-sensor-cells = <0>;
- amlogic,ao-secure = <&sec_AO>;
- };
-
- usb2_phy0: phy@36000 {
- compatible = "amlogic,g12a-usb2-phy";
- reg = <0x0 0x36000 0x0 0x2000>;
- clocks = <&xtal>;
- clock-names = "xtal";
- resets = <&reset RESET_USB_PHY20>;
- reset-names = "phy";
- #phy-cells = <0>;
- };
-
- dmc: bus@38000 {
- compatible = "simple-bus";
- reg = <0x0 0x38000 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x38000 0x0 0x400>;
-
- canvas: video-lut@48 {
- compatible = "amlogic,canvas";
- reg = <0x0 0x48 0x0 0x14>;
- };
- };
-
- usb2_phy1: phy@3a000 {
- compatible = "amlogic,g12a-usb2-phy";
- reg = <0x0 0x3a000 0x0 0x2000>;
- clocks = <&xtal>;
- clock-names = "xtal";
- resets = <&reset RESET_USB_PHY21>;
- reset-names = "phy";
- #phy-cells = <0>;
- };
-
- hiu: bus@3c000 {
- compatible = "simple-bus";
- reg = <0x0 0x3c000 0x0 0x1400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x3c000 0x0 0x1400>;
-
- hhi: system-controller@0 {
- compatible = "amlogic,meson-gx-hhi-sysctrl",
- "simple-mfd", "syscon";
- reg = <0 0 0 0x400>;
-
- clkc: clock-controller {
- compatible = "amlogic,g12a-clkc";
- #clock-cells = <1>;
- clocks = <&xtal>;
- clock-names = "xtal";
- };
-
- pwrc: power-controller {
- compatible = "amlogic,meson-g12a-pwrc";
- #power-domain-cells = <1>;
- amlogic,ao-sysctrl = <&rti>;
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_BT656>,
- <&reset RESET_RDMA>,
- <&reset RESET_VENCI>,
- <&reset RESET_VENCP>,
- <&reset RESET_VDAC>,
- <&reset RESET_VDI6>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- reset-names = "viu", "venc", "vcbus", "bt656",
- "rdma", "venci", "vencp", "vdac",
- "vdi6", "vencl", "vid_lock";
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <666666666>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
- };
- };
- };
-
- usb3_pcie_phy: phy@46000 {
- compatible = "amlogic,g12a-usb3-pcie-phy";
- reg = <0x0 0x46000 0x0 0x2000>;
- clocks = <&clkc CLKID_PCIE_PLL>;
- clock-names = "ref_clk";
- resets = <&reset RESET_PCIE_PHY>;
- reset-names = "phy";
- assigned-clocks = <&clkc CLKID_PCIE_PLL>;
- assigned-clock-rates = <100000000>;
- #phy-cells = <1>;
- };
-
- eth_phy: mdio-multiplexer@4c000 {
- compatible = "amlogic,g12a-mdio-mux";
- reg = <0x0 0x4c000 0x0 0xa4>;
- clocks = <&clkc CLKID_ETH_PHY>,
- <&xtal>,
- <&clkc CLKID_MPLL_50M>;
- clock-names = "pclk", "clkin0", "clkin1";
- mdio-parent-bus = <&mdio0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- ext_mdio: mdio@0 {
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- int_mdio: mdio@1 {
- reg = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- internal_ephy: ethernet_phy@8 {
- compatible = "ethernet-phy-id0180.3301",
- "ethernet-phy-ieee802.3-c22";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <8>;
- max-speed = <100>;
- };
- };
- };
- };
-
- pmu: pmu@ff638000 {
- reg = <0x0 0xff638000 0x0 0x100>,
- <0x0 0xff638c00 0x0 0x100>;
- interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
- };
-
- aobus: bus@ff800000 {
- compatible = "simple-bus";
- reg = <0x0 0xff800000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xff800000 0x0 0x100000>;
-
- rti: sys-ctrl@0 {
- compatible = "amlogic,meson-gx-ao-sysctrl",
- "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x0 0x0 0x100>;
-
- clkc_AO: clock-controller {
- compatible = "amlogic,meson-g12a-aoclkc";
- #clock-cells = <1>;
- #reset-cells = <1>;
- clocks = <&xtal>, <&clkc CLKID_CLK81>;
- clock-names = "xtal", "mpeg-clk";
- };
-
- ao_pinctrl: pinctrl@14 {
- compatible = "amlogic,meson-g12a-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: bank@14 {
- reg = <0x0 0x14 0x0 0x8>,
- <0x0 0x1c 0x0 0x8>,
- <0x0 0x24 0x0 0x14>;
- reg-names = "mux",
- "ds",
- "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&ao_pinctrl 0 0 15>;
- };
-
- i2c_ao_sck_pins: i2c_ao_sck_pins {
- mux {
- groups = "i2c_ao_sck";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c_ao_sda_pins: i2c_ao_sda {
- mux {
- groups = "i2c_ao_sda";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c_ao_sck_e_pins: i2c_ao_sck_e {
- mux {
- groups = "i2c_ao_sck_e";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- i2c_ao_sda_e_pins: i2c_ao_sda_e {
- mux {
- groups = "i2c_ao_sda_e";
- function = "i2c_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- mclk0_ao_pins: mclk0-ao {
- mux {
- groups = "mclk0_ao";
- function = "mclk0_ao";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_din0_pins: tdm-ao-b-din0 {
- mux {
- groups = "tdm_ao_b_din0";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- spdif_ao_out_pins: spdif-ao-out {
- mux {
- groups = "spdif_ao_out";
- function = "spdif_ao_out";
- drive-strength-microamp = <500>;
- bias-disable;
- };
- };
-
- tdm_ao_b_din1_pins: tdm-ao-b-din1 {
- mux {
- groups = "tdm_ao_b_din1";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- tdm_ao_b_din2_pins: tdm-ao-b-din2 {
- mux {
- groups = "tdm_ao_b_din2";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- tdm_ao_b_dout0_pins: tdm-ao-b-dout0 {
- mux {
- groups = "tdm_ao_b_dout0";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_dout1_pins: tdm-ao-b-dout1 {
- mux {
- groups = "tdm_ao_b_dout1";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_dout2_pins: tdm-ao-b-dout2 {
- mux {
- groups = "tdm_ao_b_dout2";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_fs_pins: tdm-ao-b-fs {
- mux {
- groups = "tdm_ao_b_fs";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_sclk_pins: tdm-ao-b-sclk {
- mux {
- groups = "tdm_ao_b_sclk";
- function = "tdm_ao_b";
- bias-disable;
- drive-strength-microamp = <3000>;
- };
- };
-
- tdm_ao_b_slv_fs_pins: tdm-ao-b-slv-fs {
- mux {
- groups = "tdm_ao_b_slv_fs";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- tdm_ao_b_slv_sclk_pins: tdm-ao-b-slv-sclk {
- mux {
- groups = "tdm_ao_b_slv_sclk";
- function = "tdm_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_a_pins: uart-a-ao {
- mux {
- groups = "uart_ao_a_tx",
- "uart_ao_a_rx";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_a_cts_rts_pins: uart-ao-a-cts-rts {
- mux {
- groups = "uart_ao_a_cts",
- "uart_ao_a_rts";
- function = "uart_ao_a";
- bias-disable;
- };
- };
-
- uart_ao_b_2_3_pins: uart-ao-b-2-3 {
- mux {
- groups = "uart_ao_b_tx_2",
- "uart_ao_b_rx_3";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_8_9_pins: uart-ao-b-8-9 {
- mux {
- groups = "uart_ao_b_tx_8",
- "uart_ao_b_rx_9";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_cts_rts_pins: uart-ao-b-cts-rts {
- mux {
- groups = "uart_ao_b_cts",
- "uart_ao_b_rts";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- pwm_a_e_pins: pwm-a-e {
- mux {
- groups = "pwm_a_e";
- function = "pwm_a_e";
- bias-disable;
- };
- };
-
- pwm_ao_a_pins: pwm-ao-a {
- mux {
- groups = "pwm_ao_a";
- function = "pwm_ao_a";
- bias-disable;
- };
- };
-
- pwm_ao_b_pins: pwm-ao-b {
- mux {
- groups = "pwm_ao_b";
- function = "pwm_ao_b";
- bias-disable;
- };
- };
-
- pwm_ao_c_4_pins: pwm-ao-c-4 {
- mux {
- groups = "pwm_ao_c_4";
- function = "pwm_ao_c";
- bias-disable;
- };
- };
-
- pwm_ao_c_6_pins: pwm-ao-c-6 {
- mux {
- groups = "pwm_ao_c_6";
- function = "pwm_ao_c";
- bias-disable;
- };
- };
-
- pwm_ao_d_5_pins: pwm-ao-d-5 {
- mux {
- groups = "pwm_ao_d_5";
- function = "pwm_ao_d";
- bias-disable;
- };
- };
-
- pwm_ao_d_10_pins: pwm-ao-d-10 {
- mux {
- groups = "pwm_ao_d_10";
- function = "pwm_ao_d";
- bias-disable;
- };
- };
-
- pwm_ao_d_e_pins: pwm-ao-d-e {
- mux {
- groups = "pwm_ao_d_e";
- function = "pwm_ao_d";
- };
- };
-
- remote_input_ao_pins: remote-input-ao {
- mux {
- groups = "remote_ao_input";
- function = "remote_ao_input";
- bias-disable;
- };
- };
- };
- };
-
- vrtc: rtc@a8 {
- compatible = "amlogic,meson-vrtc";
- reg = <0x0 0x000a8 0x0 0x4>;
- };
-
- cec_AO: cec@100 {
- compatible = "amlogic,meson-gx-ao-cec";
- reg = <0x0 0x00100 0x0 0x14>;
- interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_AO CLKID_AO_CEC>;
- clock-names = "core";
- status = "disabled";
- };
-
- sec_AO: ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
- };
-
- cecb_AO: cec@280 {
- compatible = "amlogic,meson-g12a-ao-cec";
- reg = <0x0 0x00280 0x0 0x1c>;
- interrupts = <GIC_SPI 203 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_AO CLKID_AO_CTS_OSCIN>;
- clock-names = "oscin";
- status = "disabled";
- };
-
- pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-g12a-ao-pwm-cd";
- reg = <0x0 0x2000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- uart_AO: serial@3000 {
- compatible = "amlogic,meson-gx-uart",
- "amlogic,meson-ao-uart";
- reg = <0x0 0x3000 0x0 0x18>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_AO_B: serial@4000 {
- compatible = "amlogic,meson-gx-uart",
- "amlogic,meson-ao-uart";
- reg = <0x0 0x4000 0x0 0x18>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- i2c_AO: i2c@5000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x05000 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-g12a-ao-pwm-ab";
- reg = <0x0 0x7000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- ir: ir@8000 {
- compatible = "amlogic,meson-gxbb-ir";
- reg = <0x0 0x8000 0x0 0x20>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- saradc: adc@9000 {
- compatible = "amlogic,meson-g12a-saradc",
- "amlogic,meson-saradc";
- reg = <0x0 0x9000 0x0 0x48>;
- #io-channel-cells = <1>;
- interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>,
- <&clkc_AO CLKID_AO_SAR_ADC>,
- <&clkc_AO CLKID_AO_SAR_ADC_CLK>,
- <&clkc_AO CLKID_AO_SAR_ADC_SEL>;
- clock-names = "clkin", "core", "adc_clk", "adc_sel";
- status = "disabled";
- };
- };
-
- vdec: video-decoder@ff620000 {
- compatible = "amlogic,g12a-vdec";
- reg = <0x0 0xff620000 0x0 0x10000>,
- <0x0 0xffd0e180 0x0 0xe4>;
- reg-names = "dos", "esparser";
- interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "vdec", "esparser";
-
- amlogic,ao-sysctrl = <&rti>;
- amlogic,canvas = <&canvas>;
-
- clocks = <&clkc CLKID_PARSER>,
- <&clkc CLKID_DOS>,
- <&clkc CLKID_VDEC_1>,
- <&clkc CLKID_VDEC_HEVC>,
- <&clkc CLKID_VDEC_HEVCF>;
- clock-names = "dos_parser", "dos", "vdec_1",
- "vdec_hevc", "vdec_hevcf";
- resets = <&reset RESET_PARSER>;
- reset-names = "esparser";
- };
-
- vpu: vpu@ff900000 {
- compatible = "amlogic,meson-g12a-vpu";
- reg = <0x0 0xff900000 0x0 0x100000>,
- <0x0 0xff63c000 0x0 0x1000>;
- reg-names = "vpu", "hhi";
- interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- amlogic,canvas = <&canvas>;
-
- /* CVBS VDAC output port */
- cvbs_vdac_port: port@0 {
- reg = <0>;
- };
-
- /* HDMI-TX output port */
- hdmi_tx_port: port@1 {
- reg = <1>;
-
- hdmi_tx_out: endpoint {
- remote-endpoint = <&hdmi_tx_in>;
- };
- };
- };
-
- gic: interrupt-controller@ffc01000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xffc01000 0 0x1000>,
- <0x0 0xffc02000 0 0x2000>,
- <0x0 0xffc04000 0 0x2000>,
- <0x0 0xffc06000 0 0x2000>;
- interrupt-controller;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- #interrupt-cells = <3>;
- #address-cells = <0>;
- };
-
- cbus: bus@ffd00000 {
- compatible = "simple-bus";
- reg = <0x0 0xffd00000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xffd00000 0x0 0x100000>;
-
- reset: reset-controller@1004 {
- compatible = "amlogic,meson-axg-reset";
- reg = <0x0 0x1004 0x0 0x9c>;
- #reset-cells = <1>;
- };
-
- gpio_intc: interrupt-controller@f080 {
- compatible = "amlogic,meson-g12a-gpio-intc",
- "amlogic,meson-gpio-intc";
- reg = <0x0 0xf080 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- };
-
- watchdog: watchdog@f0d0 {
- compatible = "amlogic,meson-gxbb-wdt";
- reg = <0x0 0xf0d0 0x0 0x10>;
- clocks = <&xtal>;
- };
-
- spicc0: spi@13000 {
- compatible = "amlogic,meson-g12a-spicc";
- reg = <0x0 0x13000 0x0 0x44>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC0>,
- <&clkc CLKID_SPICC0_SCLK>;
- clock-names = "core", "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc1: spi@15000 {
- compatible = "amlogic,meson-g12a-spicc";
- reg = <0x0 0x15000 0x0 0x44>;
- interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_SPICC1>,
- <&clkc CLKID_SPICC1_SCLK>;
- clock-names = "core", "pclk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spifc: spi@14000 {
- compatible = "amlogic,meson-gxbb-spifc";
- status = "disabled";
- reg = <0x0 0x14000 0x0 0x80>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_CLK81>;
- };
-
- pwm_ef: pwm@19000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
- reg = <0x0 0x19000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
- reg = <0x0 0x1a000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
- reg = <0x0 0x1b000 0x0 0x20>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- i2c3: i2c@1c000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1c000 0x0 0x20>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- i2c2: i2c@1d000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1d000 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- i2c1: i2c@1e000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1e000 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- i2c0: i2c@1f000 {
- compatible = "amlogic,meson-axg-i2c";
- status = "disabled";
- reg = <0x0 0x1f000 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_I2C>;
- };
-
- clk_msr: clock-measure@18000 {
- compatible = "amlogic,meson-g12a-clk-measure";
- reg = <0x0 0x18000 0x0 0x10>;
- };
-
- uart_C: serial@22000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x22000 0x0 0x18>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_B: serial@23000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x23000 0x0 0x18>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- };
-
- uart_A: serial@24000 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x24000 0x0 0x18>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
- clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
- status = "disabled";
- fifo-size = <128>;
- };
- };
-
- sd_emmc_a: sd@ffe03000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0xffe03000 0x0 0x800>;
- interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_A>,
- <&clkc CLKID_SD_EMMC_A_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_A>;
- };
-
- sd_emmc_b: sd@ffe05000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0xffe05000 0x0 0x800>;
- interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_B>;
- };
-
- sd_emmc_c: mmc@ffe07000 {
- compatible = "amlogic,meson-axg-mmc";
- reg = <0x0 0xffe07000 0x0 0x800>;
- interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_C>;
- };
-
- usb: usb@ffe09000 {
- status = "disabled";
- compatible = "amlogic,meson-g12a-usb-ctrl";
- reg = <0x0 0xffe09000 0x0 0xa0>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>;
- resets = <&reset RESET_USB>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy0>, <&usb2_phy1>,
- <&usb3_pcie_phy PHY_TYPE_USB3>;
- phy-names = "usb2-phy0", "usb2-phy1", "usb3-phy0";
-
- dwc2: usb@ff400000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xff400000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy";
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@ff500000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xff500000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- snps,dis_u2_susphy_quirk;
- snps,quirk-frame-length-adjustment = <0x20>;
- snps,parkmode-disable-ss-quirk;
- };
- };
-
- mali: gpu@ffe40000 {
- compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
- reg = <0x0 0xffe40000 0x0 0x40000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&clkc CLKID_MALI>;
- resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
- operating-points-v2 = <&gpu_opp_table>;
- #cooling-cells = <2>;
- };
- };
-
- thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- thermal-sensors = <&cpu_temp>;
-
- trips {
- cpu_passive: cpu-passive {
- temperature = <85000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- cpu_hot: cpu-hot {
- temperature = <95000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "hot";
- };
-
- cpu_critical: cpu-critical {
- temperature = <110000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
- };
-
- ddr_thermal: ddr-thermal {
- polling-delay = <1000>;
- polling-delay-passive = <100>;
- thermal-sensors = <&ddr_temp>;
-
- trips {
- ddr_passive: ddr-passive {
- temperature = <85000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- ddr_critical: ddr-critical {
- temperature = <110000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
-
- cooling-maps {
- map {
- trip = <&ddr_passive>;
- cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
- arm,no-tick-in-suspend;
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-
-};
diff --git a/arch/arm/dts/meson-g12.dtsi b/arch/arm/dts/meson-g12.dtsi
deleted file mode 100644
index 6a1f4dc..0000000
--- a/arch/arm/dts/meson-g12.dtsi
+++ /dev/null
@@ -1,385 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-#include "meson-g12-common.dtsi"
-#include <dt-bindings/clock/axg-audio-clkc.h>
-#include <dt-bindings/power/meson-g12a-power.h>
-#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
-#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
-
-/ {
- tdmif_a: audio-controller-0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_A";
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_b: audio-controller-1 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_B";
- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
- <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_c: audio-controller-2 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_C";
- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
- <&clkc_audio AUD_CLKID_MST_C_SCLK>,
- <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-};
-
-&apb {
- pdm: audio-controller@40000 {
- compatible = "amlogic,g12a-pdm",
- "amlogic,axg-pdm";
- reg = <0x0 0x40000 0x0 0x34>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "PDM";
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
- resets = <&clkc_audio AUD_RESET_PDM>;
- status = "disabled";
- };
-
- audio: bus@42000 {
- compatible = "simple-bus";
- reg = <0x0 0x42000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
-
- clkc_audio: clock-controller@0 {
- status = "disabled";
- compatible = "amlogic,g12a-audio-clkc";
- reg = <0x0 0x0 0x0 0xb4>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- clocks = <&clkc CLKID_AUDIO>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL3>,
- <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_FCLK_DIV3>,
- <&clkc CLKID_FCLK_DIV4>,
- <&clkc CLKID_GP0_PLL>;
- clock-names = "pclk",
- "mst_in0",
- "mst_in1",
- "mst_in2",
- "mst_in3",
- "mst_in4",
- "mst_in5",
- "mst_in6",
- "mst_in7";
-
- resets = <&reset RESET_AUDIO>;
- };
-
- toddr_a: audio-controller@100 {
- compatible = "amlogic,g12a-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x100 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_A";
- interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
- resets = <&arb AXG_ARB_TODDR_A>,
- <&clkc_audio AUD_RESET_TODDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- toddr_b: audio-controller@140 {
- compatible = "amlogic,g12a-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x140 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_B";
- interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
- resets = <&arb AXG_ARB_TODDR_B>,
- <&clkc_audio AUD_RESET_TODDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- toddr_c: audio-controller@180 {
- compatible = "amlogic,g12a-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x180 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_C";
- interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
- resets = <&arb AXG_ARB_TODDR_C>,
- <&clkc_audio AUD_RESET_TODDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_a: audio-controller@1c0 {
- compatible = "amlogic,g12a-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_A";
- interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>,
- <&clkc_audio AUD_RESET_FRDDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- frddr_b: audio-controller@200 {
- compatible = "amlogic,g12a-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x200 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_B";
- interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
- resets = <&arb AXG_ARB_FRDDR_B>,
- <&clkc_audio AUD_RESET_FRDDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_c: audio-controller@240 {
- compatible = "amlogic,g12a-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x240 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_C";
- interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
- resets = <&arb AXG_ARB_FRDDR_C>,
- <&clkc_audio AUD_RESET_FRDDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- arb: reset-controller@280 {
- status = "disabled";
- compatible = "amlogic,meson-axg-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
- };
-
- tdmin_a: audio-controller@300 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x300 0x0 0x40>;
- sound-name-prefix = "TDMIN_A";
- resets = <&clkc_audio AUD_RESET_TDMIN_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_b: audio-controller@340 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x340 0x0 0x40>;
- sound-name-prefix = "TDMIN_B";
- resets = <&clkc_audio AUD_RESET_TDMIN_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_c: audio-controller@380 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x380 0x0 0x40>;
- sound-name-prefix = "TDMIN_C";
- resets = <&clkc_audio AUD_RESET_TDMIN_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_lb: audio-controller@3c0 {
- compatible = "amlogic,g12a-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x3c0 0x0 0x40>;
- sound-name-prefix = "TDMIN_LB";
- resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifin: audio-controller@400 {
- compatible = "amlogic,g12a-spdifin",
- "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFIN";
- interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
- resets = <&clkc_audio AUD_RESET_SPDIFIN>;
- status = "disabled";
- };
-
- spdifout: audio-controller@480 {
- compatible = "amlogic,g12a-spdifout",
- "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
- resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
- status = "disabled";
- };
-
- tdmout_a: audio-controller@500 {
- compatible = "amlogic,g12a-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- sound-name-prefix = "TDMOUT_A";
- resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_b: audio-controller@540 {
- compatible = "amlogic,g12a-tdmout";
- reg = <0x0 0x540 0x0 0x40>;
- sound-name-prefix = "TDMOUT_B";
- resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_c: audio-controller@580 {
- compatible = "amlogic,g12a-tdmout";
- reg = <0x0 0x580 0x0 0x40>;
- sound-name-prefix = "TDMOUT_C";
- resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifout_b: audio-controller@680 {
- compatible = "amlogic,g12a-spdifout",
- "amlogic,axg-spdifout";
- reg = <0x0 0x680 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT_B";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
- clock-names = "pclk", "mclk";
- resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
- status = "disabled";
- };
-
- toacodec: audio-controller@740 {
- compatible = "amlogic,g12a-toacodec";
- reg = <0x0 0x740 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOACODEC";
- resets = <&clkc_audio AUD_RESET_TOACODEC>;
- status = "disabled";
- };
-
- tohdmitx: audio-controller@744 {
- compatible = "amlogic,g12a-tohdmitx";
- reg = <0x0 0x744 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOHDMITX";
- resets = <&clkc_audio AUD_RESET_TOHDMITX>;
- status = "disabled";
- };
- };
-};
-
-ðmac {
- power-domains = <&pwrc PWRC_G12A_ETH_ID>;
-};
-
-&vpu {
- power-domains = <&pwrc PWRC_G12A_VPU_ID>;
-};
-
-&sd_emmc_a {
- amlogic,dram-access-quirk;
-};
-
-&simplefb_cvbs {
- power-domains = <&pwrc PWRC_G12A_VPU_ID>;
-};
-
-&simplefb_hdmi {
- power-domains = <&pwrc PWRC_G12A_VPU_ID>;
-};
-
diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts
deleted file mode 100644
index e3bb6df..0000000
--- a/arch/arm/dts/meson-g12a-radxa-zero.dts
+++ /dev/null
@@ -1,405 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 BayLibre SAS. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-g12a.dtsi"
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "radxa,zero", "amlogic,g12a";
- model = "Radxa Zero";
-
- aliases {
- serial0 = &uart_AO;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- cvbs-connector {
- status = "disabled";
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- hdmi_pw: regulator-hdmi_pw {
- compatible = "regulator-fixed";
- regulator-name = "HDMI_PW";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&ao_5v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "RADXA-ZERO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_pw>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "disabled";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts
deleted file mode 100644
index 81269cc..0000000
--- a/arch/arm/dts/meson-g12a-sei510.dts
+++ /dev/null
@@ -1,566 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-g12a.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "seirobotics,sei510", "amlogic,g12a";
- model = "SEI Robotics SEI510";
-
- adc_keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-onoff {
- label = "On/Off";
- linux,code = <KEY_POWER>;
- press-threshold-microvolt = <1700000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- mono_dac: audio-codec-0 {
- compatible = "maxim,max98357a";
- #sound-dai-cells = <0>;
- sound-name-prefix = "U16";
- sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
- };
-
- dmics: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "dmic-codec";
- num-channels = <2>;
- wakeup-delay-ms = <50>;
- status = "okay";
- sound-name-prefix = "MIC";
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- vddao_3v3_t: regultor-vddao_3v3_t {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3_T";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddio_ao1v8: regulator-vddio_ao1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- reserved-memory {
- /* TEE Reserved Memory */
- bl32_reserved: bl32@5000000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "SEI510";
- audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
- <&tdmin_a>, <&tdmin_b>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TODDR_A IN 4", "PDM Capture",
- "TODDR_B IN 4", "PDM Capture",
- "TODDR_C IN 4", "PDM Capture",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 3", "TDM_A Loopback",
- "TDMIN_B IN 0", "TDM_A Capture",
- "TDMIN_B IN 3", "TDM_A Loopback",
- "TDMIN_A IN 1", "TDM_B Capture",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 1", "TDM_B Capture",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* internal speaker interface */
- dai-link-6 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&mono_dac>;
- };
-
- codec-1 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- /* 8ch hdmi interface */
- dai-link-7 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* internal digital mics */
- dai-link-8 {
- sound-dai = <&pdm>;
-
- codec {
- sound-dai = <&dmics>;
- };
- };
-
- /* hdmi glue */
- dai-link-9 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&pdm {
- pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>,
- <&pdm_din2_z_pins>, <&pdm_din3_z_pins>,
- <&pdm_dclk_z_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_ao1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&tdmif_a {
- pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
- <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
- assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- assigned-clock-rates = <0>, <0>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- vbat-supply = <&vddao_3v3>;
- vddio-supply = <&vddio_ao1v8>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
diff --git a/arch/arm/dts/meson-g12a-u200.dts b/arch/arm/dts/meson-g12a-u200.dts
deleted file mode 100644
index a26bfe7..0000000
--- a/arch/arm/dts/meson-g12a-u200.dts
+++ /dev/null
@@ -1,308 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-g12a.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- compatible = "amlogic,u200", "amlogic,g12a";
- model = "Amlogic Meson G12A U200 Development Board";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- usb_pwr_en: regulator-usb_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-/* i2c Touch */
-&i2c0 {
- status = "okay";
- pinctrl-0 = <&i2c0_sda_z0_pins>, <&i2c0_sck_z1_pins>;
- pinctrl-names = "default";
-};
-
-/* i2c CM */
-&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_z_pins>, <&i2c2_sck_z_pins>;
- pinctrl-names = "default";
-};
-
-/* i2c Audio */
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc_5v>;
-};
-
-&usb2_phy1 {
- phy-supply = <&vcc_5v>;
-};
diff --git a/arch/arm/dts/meson-g12a.dtsi b/arch/arm/dts/meson-g12a.dtsi
deleted file mode 100644
index 7677764..0000000
--- a/arch/arm/dts/meson-g12a.dtsi
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- */
-
-#include "meson-g12.dtsi"
-
-/ {
- compatible = "amlogic,g12a";
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- cpu_opp_table: opp-table {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <666666666>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <761000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <831000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <981000>;
- };
- };
-};
-
-&cpu_thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&pmu {
- compatible = "amlogic,g12a-ddr-pmu";
-};
diff --git a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
deleted file mode 100644
index 3136531..0000000
--- a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
+++ /dev/null
@@ -1,33 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-a311d.dtsi"
-#include "meson-g12b-bananapi.dtsi"
-
-/ {
- compatible = "bananapi,bpi-m2s", "amlogic,a311d", "amlogic,g12b";
- model = "BananaPi M2S";
-
- aliases {
- i2c0 = &i2c1;
- i2c1 = &i2c3;
- };
-};
-
-/* Camera (CSI) bus */
-&i2c1 {
- status = "okay";
- pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c1_sck_h7_pins>;
- pinctrl-names = "default";
-};
-
-/* Display (DSI) bus */
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
diff --git a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts b/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts
deleted file mode 100644
index 124a809..0000000
--- a/arch/arm/dts/meson-g12b-a311d-khadas-vim3.dts
+++ /dev/null
@@ -1,41 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-a311d.dtsi"
-#include "meson-khadas-vim3.dtsi"
-#include "meson-g12b-khadas-vim3.dtsi"
-
-/ {
- compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
-};
-
-/*
- * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
- * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
- * an USB3.0 Type A connector and a M.2 Key M slot.
- * The PHY driving these differential lines is shared between
- * the USB3.0 controller and the PCIe Controller, thus only
- * a single controller can use it.
- * If the MCU is configured to mux the PCIe/USB3.0 differential lines
- * to the M.2 Key M slot, uncomment the following block to disable
- * USB3.0 from the USB Complex and enable the PCIe controller.
- * The End User is not expected to uncomment the following except for
- * testing purposes, but instead rely on the firmware/bootloader to
- * update these nodes accordingly if PCIe mode is selected by the MCU.
- */
-/*
-&pcie {
- status = "okay";
-};
-
-&usb {
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
- */
diff --git a/arch/arm/dts/meson-g12b-a311d.dtsi b/arch/arm/dts/meson-g12b-a311d.dtsi
deleted file mode 100644
index d61f430..0000000
--- a/arch/arm/dts/meson-g12b-a311d.dtsi
+++ /dev/null
@@ -1,149 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12b.dtsi"
-
-/ {
- cpu_opp_table_0: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <761000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <781000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <811000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <901000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <951000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <1001000>;
- };
- };
-
- cpub_opp_table_1: opp-table-1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <751000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <781000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <831000>;
- };
-
- opp-1908000000 {
- opp-hz = /bits/ 64 <1908000000>;
- opp-microvolt = <861000>;
- };
-
- opp-2016000000 {
- opp-hz = /bits/ 64 <2016000000>;
- opp-microvolt = <911000>;
- };
-
- opp-2108000000 {
- opp-hz = /bits/ 64 <2108000000>;
- opp-microvolt = <951000>;
- };
-
- opp-2208000000 {
- opp-hz = /bits/ 64 <2208000000>;
- opp-microvolt = <1011000>;
- };
- };
-};
diff --git a/arch/arm/dts/meson-g12b-bananapi-cm4-cm4io.dts b/arch/arm/dts/meson-g12b-bananapi-cm4-cm4io.dts
deleted file mode 100644
index 1b0c388..0000000
--- a/arch/arm/dts/meson-g12b-bananapi-cm4-cm4io.dts
+++ /dev/null
@@ -1,165 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-bananapi-cm4.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "bananapi,bpi-cm4io", "bananapi,bpi-cm4", "amlogic,a311d", "amlogic,g12b";
- model = "BananaPi BPI-CM4IO Baseboard with BPI-CM4 Module";
-
- aliases {
- ethernet0 = ðmac;
- i2c0 = &i2c1;
- i2c1 = &i2c3;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- hdmi_connector: hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-CM4IO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&cecb_AO {
- status = "okay";
-};
-
-ðmac {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-/* CSI port */
-&i2c1 {
- status = "okay";
-};
-
-/* DSI port for touchscreen */
-&i2c3 {
- status = "okay";
-};
-
-/* miniPCIe port with USB + SIM slot */
-&pcie {
- status = "okay";
-};
-
-&sd_emmc_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-/* Peripheral Only USB-C port */
-&usb {
- dr_mode = "peripheral";
-
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-bananapi-cm4.dtsi b/arch/arm/dts/meson-g12b-bananapi-cm4.dtsi
deleted file mode 100644
index 97e5229..0000000
--- a/arch/arm/dts/meson-g12b-bananapi-cm4.dtsi
+++ /dev/null
@@ -1,388 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Neil Armstrong <neil.armstrong@linaro.org>
- */
-
-#include "meson-g12b-a311d.dtsi"
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOAO_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- emmc_1v8: regulator-emmc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc-in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddio_c: regulator-vddio-c {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_C";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- enable-gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
-
- gpios = <&gpio_ao GPIOAO_9 GPIO_OPEN_DRAIN>;
- gpios-states = <1>;
-
- states = <1800000 0>,
- <3300000 1>;
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwm-supply = <&dc_in>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwm-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-/* Ethernet to be enabled in baseboard DT */
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- phy-mode = "rgmii-txid";
- phy-handle = <&external_phy>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-/* HDMI to be enabled in baseboard DT */
-&hdmi_tx {
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&dc_in>;
-};
-
-/* "Camera" I2C bus */
-&i2c1 {
- pinctrl-0 = <&i2c1_sda_h6_pins>, <&i2c1_sck_h7_pins>;
- pinctrl-names = "default";
-};
-
-/* Main I2C bus */
-&i2c2 {
- pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>;
- pinctrl-names = "default";
-};
-
-/* "ID" I2C bus */
-&i2c3 {
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&pcie {
- reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
-
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vddao_1v8>;
-
- status = "okay";
-};
-
-/* on-module SDIO WiFi */
-&sd_emmc_a {
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- sd-uhs-sdr104;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-
- status = "okay";
-
- rtl8822cs: wifi@1 {
- reg = <1>;
- };
-};
-
-/* SD card to be enabled in baseboard DT */
-&sd_emmc_b {
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_c>;
-};
-
-/* on-module eMMC */
-&sd_emmc_c {
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-/* on-module UART BT */
-&uart_A {
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- status = "okay";
-
- bluetooth {
- compatible = "realtek,rtl8822cs-bt";
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
- device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_AO {
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-
- status = "okay";
-};
-
-&usb {
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
diff --git a/arch/arm/dts/meson-g12b-bananapi.dtsi b/arch/arm/dts/meson-g12b-bananapi.dtsi
deleted file mode 100644
index 83709787..0000000
--- a/arch/arm/dts/meson-g12b-bananapi.dtsi
+++ /dev/null
@@ -1,521 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2023 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 4 GiB */
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "RST";
- linux,code = <KEY_POWER>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- fan0: pwm-fan {
- compatible = "pwm-fan";
- #cooling-cells = <2>;
- cooling-min-state = <0>;
- cooling-max-state = <3>;
- cooling-levels = <0 120 170 220>;
- pwms = <&pwm_cd 1 40000 0>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-0 {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
-
- led-1 {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- dc_in: regulator-dc-in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc-5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_3v3: regulator-vcc-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- };
-
- vddcpu_a: regulator-vddcpu-a {
- compatible = "pwm-regulator";
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
- pwm-supply = <&dc_in>;
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- compatible = "pwm-regulator";
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
- pwm-supply = <&vsys_3v3>;
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
- regulator-boot-on;
- regulator-always-on;
- };
-
- vsys_3v3: regulator-vsys-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VSYS_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb-pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-M2S";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-/* Main i2c bus */
-&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>;
- pinctrl-names = "default";
-};
-
-&pcie {
- status = "okay";
- reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_ab {
- status = "okay";
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&pwm_cd {
- status = "okay";
- pinctrl-0 = <&pwm_d_x6_pins>;
- pinctrl-names = "default";
- pwm-gpios = <&gpio GPIOAO_10 GPIO_ACTIVE_HIGH>;
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- /* enable if WiFi/BT board connected */
- status = "disabled";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- sd-uhs-sdr104;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- rtl8822cs: wifi@1 {
- reg = <1>;
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vsys_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- /* enable if WiFi/BT board connected */
- status = "disabled";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "realtek,rtl8822cs-bt";
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>;
- device-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb2_phy0 {
- phy-supply = <&dc_in>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb_pwr>;
-};
-
-&usb3_pcie_phy {
- phy-supply = <&usb_pwr>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
diff --git a/arch/arm/dts/meson-g12b-gsking-x.dts b/arch/arm/dts/meson-g12b-gsking-x.dts
deleted file mode 100644
index 6c7bfac..0000000
--- a/arch/arm/dts/meson-g12b-gsking-x.dts
+++ /dev/null
@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-w400.dtsi"
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "azw,gsking-x", "amlogic,s922x", "amlogic,g12b";
- model = "Beelink GS-King X";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "GSKING-X";
- audio-aux-devs = <&tdmout_a>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 1",
- "TDMOUT_A IN 1", "FRDDR_B OUT 1",
- "TDMOUT_A IN 2", "FRDDR_C OUT 1",
- "TDM_A Playback", "TDMOUT_A OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&tdmif_a {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-gtking-pro.dts b/arch/arm/dts/meson-g12b-gtking-pro.dts
deleted file mode 100644
index 707daf9..0000000
--- a/arch/arm/dts/meson-g12b-gtking-pro.dts
+++ /dev/null
@@ -1,142 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-w400.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b";
- model = "Beelink GT-King Pro";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-white {
- label = "power:white";
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "GTKING-PRO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-gtking.dts b/arch/arm/dts/meson-g12b-gtking.dts
deleted file mode 100644
index 5d96c14..0000000
--- a/arch/arm/dts/meson-g12b-gtking.dts
+++ /dev/null
@@ -1,163 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-w400.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b";
- model = "Beelink GT-King";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- spdif_dit: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "GTKING";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "SPDIFOUT IN 0", "FRDDR_A OUT 3",
- "SPDIFOUT IN 1", "FRDDR_B OUT 3",
- "SPDIFOUT IN 2", "FRDDR_C OUT 3";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* spdif hdmi or toslink interface */
- dai-link-4 {
- sound-dai = <&spdifout>;
-
- codec-0 {
- sound-dai = <&spdif_dit>;
- };
-
- codec-1 {
- sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_A>;
- };
- };
-
- /* spdif hdmi interface */
- dai-link-5 {
- sound-dai = <&spdifout_b>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_SPDIF_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-6 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&spdifout {
- pinctrl-0 = <&spdif_out_h_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&spdifout_b {
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi b/arch/arm/dts/meson-g12b-khadas-vim3.dtsi
deleted file mode 100644
index f42cf4b..0000000
--- a/arch/arm/dts/meson-g12b-khadas-vim3.dtsi
+++ /dev/null
@@ -1,107 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/ {
- model = "Khadas VIM3";
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&dc_in>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8030DEC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&vsys_3v3>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
diff --git a/arch/arm/dts/meson-g12b-odroid-go-ultra.dts b/arch/arm/dts/meson-g12b-odroid-go-ultra.dts
deleted file mode 100644
index 1e40709..0000000
--- a/arch/arm/dts/meson-g12b-odroid-go-ultra.dts
+++ /dev/null
@@ -1,722 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Neil Armstrong <neil.armstrong@linaro.org>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-s922x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-toacodec.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "hardkernel,odroid-go-ultra", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-GO-Ultra";
-
- aliases {
- serial0 = &uart_AO;
- rtc0 = &vrtc;
- };
-
- adc-joystick-left {
- compatible = "adc-joystick";
- io-channels = <&saradc 2>, <&saradc 3>;
- poll-interval = <10>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- axis@0 {
- reg = <0>;
- linux,code = <ABS_Y>;
- abs-range = <3150 950>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- axis@1 {
- reg = <1>;
- linux,code = <ABS_X>;
- abs-range = <700 2900>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- };
-
- adc-joystick-right {
- compatible = "adc-joystick";
- io-channels = <&saradc 0>, <&saradc 1>;
- poll-interval = <10>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- axis@0 {
- reg = <0>;
- linux,code = <ABS_RY>;
- abs-range = <3150 950>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- axis@1 {
- reg = <1>;
- linux,code = <ABS_RX>;
- abs-range = <800 3000>;
- abs-fuzz = <32>;
- abs-flat = <64>;
- };
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- codec_clk: codec-clk {
- compatible = "fixed-clock";
- clock-frequency = <12288000>;
- clock-output-names = "codec_clk";
- #clock-cells = <0>;
- };
-
- gpio-keys {
- compatible = "gpio-keys-polled";
- poll-interval = <10>;
- pinctrl-0 = <&keypad_gpio_pins>;
- pinctrl-names = "default";
-
- volume-up-button {
- label = "VOLUME-UP";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&gpio GPIOX_8 GPIO_ACTIVE_LOW>;
- };
- volume-down-button {
- label = "VOLUME-DOWN";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&gpio GPIOX_9 GPIO_ACTIVE_LOW>;
- };
- dpad-up-button {
- label = "DPAD-UP";
- linux,code = <BTN_DPAD_UP>;
- gpios = <&gpio GPIOX_0 GPIO_ACTIVE_LOW>;
- };
- dpad-down-button {
- label = "DPAD-DOWN";
- linux,code = <BTN_DPAD_DOWN>;
- gpios = <&gpio GPIOX_1 GPIO_ACTIVE_LOW>;
- };
- dpad-left-button {
- label = "DPAD-LEFT";
- linux,code = <BTN_DPAD_LEFT>;
- gpios = <&gpio GPIOX_2 GPIO_ACTIVE_LOW>;
- };
- dpad-right-button {
- label = "DPAD-RIGHT";
- linux,code = <BTN_DPAD_RIGHT>;
- gpios = <&gpio GPIOX_3 GPIO_ACTIVE_LOW>;
- };
- a-button {
- label = "A";
- linux,code = <BTN_EAST>;
- gpios = <&gpio GPIOX_4 GPIO_ACTIVE_LOW>;
- };
- b-button {
- label = "B";
- linux,code = <BTN_SOUTH>;
- gpios = <&gpio GPIOX_5 GPIO_ACTIVE_LOW>;
- };
- y-button {
- label = "Y";
- linux,code = <BTN_WEST>;
- gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- };
- x-button {
- label = "X";
- linux,code = <BTN_NORTH>;
- gpios = <&gpio GPIOX_7 GPIO_ACTIVE_LOW>;
- };
- f1-button {
- label = "F1";
- linux,code = <BTN_TRIGGER_HAPPY1>;
- gpios = <&gpio GPIOX_17 GPIO_ACTIVE_LOW>;
- };
- f2-button {
- label = "F2";
- linux,code = <BTN_TRIGGER_HAPPY2>;
- gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>;
- };
- f3-button {
- label = "F3";
- linux,code = <BTN_TRIGGER_HAPPY3>;
- gpios = <&gpio GPIOX_11 GPIO_ACTIVE_LOW>;
- };
- f4-button {
- label = "F4";
- linux,code = <BTN_TRIGGER_HAPPY4>;
- gpios = <&gpio GPIOX_12 GPIO_ACTIVE_LOW>;
- };
- f5-button {
- label = "F5";
- linux,code = <BTN_TRIGGER_HAPPY5>;
- gpios = <&gpio GPIOX_13 GPIO_ACTIVE_LOW>;
- };
- f6-button {
- label = "F6";
- linux,code = <BTN_TRIGGER_HAPPY6>;
- gpios = <&gpio GPIOX_16 GPIO_ACTIVE_LOW>;
- };
- top-left-button {
- label = "TOP Left";
- linux,code = <BTN_TL>;
- gpios = <&gpio GPIOX_14 GPIO_ACTIVE_LOW>;
- };
- top-left2-button {
- label = "TOP Left 2";
- linux,code = <BTN_TL2>;
- gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>;
- };
- top-right-button {
- label = "TOP Right";
- linux,code = <BTN_TR>;
- gpios = <&gpio GPIOX_15 GPIO_ACTIVE_LOW>;
- };
- top-right2-button {
- label = "TOP Right 2";
- linux,code = <BTN_TR2>;
- gpios = <&gpio GPIOX_18 GPIO_ACTIVE_LOW>;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- vdd_sys: regulator-vdd-sys {
- compatible = "regulator-fixed";
- regulator-name = "VDD_SYS";
- regulator-min-microvolt = <3800000>;
- regulator-max-microvolt = <3800000>;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "Odroid GO Ultra";
- audio-widgets = "Microphone", "Mic Jack",
- "Headphone", "Headphones",
- "Speaker", "Internal Speakers";
- audio-aux-devs = <&tdmout_b>, <&tdmin_b>, <&speaker_amp>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMIN_B IN 1", "TDM_B Capture",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "MICL", "Mic Jack",
- "Headphones", "HPOL",
- "Headphones", "HPOR",
- "Speaker Amplifier INL", "HPOL",
- "Speaker Amplifier INR", "HPOR",
- "Internal Speakers", "Speaker Amplifier OUTL",
- "Internal Speakers", "Speaker Amplifier OUTR";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-2 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&rk817>;
- };
- };
- };
-
- speaker_amp: speaker-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "Speaker Amplifier";
- VCC-supply = <&hp_5v>;
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-/* RK817 only supports 12.5mV steps, round up the values */
-&cpu_opp_table_0 {
- opp-1000000000 {
- opp-microvolt = <737500>;
- };
- opp-1200000000 {
- opp-microvolt = <737500>;
- };
- opp-1398000000 {
- opp-microvolt = <762500>;
- };
- opp-1512000000 {
- opp-microvolt = <800000>;
- };
- opp-1608000000 {
- opp-microvolt = <837500>;
- };
- opp-1704000000 {
- opp-microvolt = <862500>;
- };
- opp-1896000000 {
- opp-microvolt = <987500>;
- };
- opp-1992000000 {
- opp-microvolt = <1012500>;
- };
-};
-
-/* RK818 only supports 12.5mV steps, round up the values */
-&cpub_opp_table_1 {
- opp-1000000000 {
- opp-microvolt = <775000>;
- };
- opp-1200000000 {
- opp-microvolt = <775000>;
- };
- opp-1398000000 {
- opp-microvolt = <800000>;
- };
- opp-1512000000 {
- opp-microvolt = <825000>;
- };
- opp-1608000000 {
- opp-microvolt = <862500>;
- };
- opp-1704000000 {
- opp-microvolt = <900000>;
- };
- opp-1800000000 {
- opp-microvolt = <987500>;
- };
- opp-1908000000 {
- opp-microvolt = <1025000>;
- };
-};
-
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
- pinctrl-names = "default";
-
- rk818: pmic@1c {
- compatible = "rockchip,rk818";
- reg = <0x1c>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <7 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_7 */
-
- vcc1-supply = <&vdd_sys>;
- vcc2-supply = <&vdd_sys>;
- vcc3-supply = <&vdd_sys>;
- vcc4-supply = <&vdd_sys>;
- vcc6-supply = <&vdd_sys>;
- vcc7-supply = <&vcc_2v3>;
- vcc8-supply = <&vcc_2v3>;
- vcc9-supply = <&vddao_3v3>;
- boost-supply = <&vdd_sys>;
- switch-supply = <&vdd_sys>;
-
- regulators {
- vddcpu_a: DCDC_REG1 {
- regulator-name = "vddcpu_a";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <775000>;
- regulator-max-microvolt = <1025000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <775000>;
- };
- };
-
- vdd_ee: DCDC_REG2 {
- regulator-name = "vdd_ee";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <875000>;
- regulator-max-microvolt = <1250000>;
- regulator-ramp-delay = <6001>;
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <875000>;
- };
- };
-
- vddq_1v1: DCDC_REG3 {
- regulator-name = "vddq_1v1";
- regulator-always-on;
- regulator-boot-on;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- vddao_3v3: DCDC_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vddao_3v3";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- hp_5v: DCDC_BOOST {
- regulator-always-on;
- regulator-boot-on;
- regulator-name = "hp_5v";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vddio_ao1v8: LDO_REG5 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vddio_ao1v8";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vddq_1v8: LDO_REG7 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-name = "vddq_1v8";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1800000>;
- };
- };
-
- vddio_c: LDO_REG9 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vddio_c";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <3300000>;
- };
- };
-
- vcc_sd: SWITCH_REG {
- regulator-name = "vcc_sd";
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- OTG_SWITCH {
- regulator-name = "otg_switch";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rk817: pmic@20 {
- compatible = "rockchip,rk817";
- reg = <0x20>;
- interrupt-parent = <&gpio_intc>;
-
- interrupts = <5 IRQ_TYPE_LEVEL_LOW>; /* GPIOAO_5 */
-
- vcc1-supply = <&vdd_sys>;
- vcc2-supply = <&vdd_sys>;
- vcc3-supply = <&vdd_sys>;
- vcc4-supply = <&vdd_sys>;
- vcc5-supply = <&vdd_sys>;
- vcc6-supply = <&vdd_sys>;
- vcc7-supply = <&vdd_sys>;
- vcc8-supply = <&vdd_sys>;
- vcc9-supply = <&rk817_boost>;
-
- #sound-dai-cells = <0>;
- clocks = <&codec_clk>;
- clock-names = "mclk";
-
- #clock-cells = <1>;
-
- regulators {
- vddcpu_b: DCDC_REG2 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <737500>;
- regulator-max-microvolt = <1012500>;
- regulator-ramp-delay = <6001>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vddcpu_b";
- regulator-state-mem {
- regulator-on-in-suspend;
- regulator-suspend-microvolt = <1000000>;
- };
- };
-
- vcc_2v3: DCDC_REG3 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <2300000>;
- regulator-max-microvolt = <2400000>;
- regulator-initial-mode = <0x2>;
- regulator-name = "vcc_2v3";
- regulator-state-mem {
- regulator-on-in-suspend;
- };
- };
-
- LDO_REG4 {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vdd_codec";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- vcc_lcd: LDO_REG8 {
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-name = "vcc_lcd";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- rk817_boost: BOOST {
- regulator-always-on;
- regulator-boot-on;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5400000>;
- regulator-name = "rk817_boost";
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
-
- usb_host: OTG_SWITCH {
- regulator-name = "usb_host";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-state-mem {
- regulator-off-in-suspend;
- };
- };
- };
- };
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-ð_phy {
- status = "disabled";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&periphs_pinctrl {
- keypad_gpio_pins: keypad-gpio {
- mux {
- groups = "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3",
- "GPIOX_4", "GPIOX_5", "GPIOX_6", "GPIOX_7",
- "GPIOX_8", "GPIOX_9", "GPIOX_10", "GPIOX_11",
- "GPIOX_12", "GPIOX_13", "GPIOX_14", "GPIOX_15",
- "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19";
- function = "gpio_periphs";
- bias-pull-up;
- output-disable;
- };
- };
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao1v8>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vddio_c>;
-
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_sd>;
- vqmmc-supply = <&vddio_ao1v8>;
-};
-
-
-&tdmif_b {
- pinctrl-0 = <&tdm_b_dout0_pins>, <&tdm_b_fs_pins>, <&tdm_b_sclk_pins>, <&tdm_b_din1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD1>,
- <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD1>;
- assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- assigned-clock-rates = <0>, <0>;
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
-};
-
-&usb2_phy0 {
- status = "okay";
-};
-
-&usb2_phy1 {
- status = "okay";
- phy-supply = <&usb_host>;
-};
diff --git a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts
deleted file mode 100644
index ce1198a..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts
+++ /dev/null
@@ -1,31 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
-#include "meson-g12b-a311d.dtsi"
-#include "meson-g12b-odroid-n2.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-n2-plus", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-N2Plus";
-};
-
-&vddcpu_a {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_ab 0 1500 0>;
-};
-
-&vddcpu_b {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_AO_cd 1 1500 0>;
-};
-
diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dts b/arch/arm/dts/meson-g12b-odroid-n2.dts
deleted file mode 100644
index a198a91..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2.dts
+++ /dev/null
@@ -1,15 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-s922x.dtsi"
-#include "meson-g12b-odroid-n2.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-N2";
-};
diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dtsi b/arch/arm/dts/meson-g12b-odroid-n2.dtsi
deleted file mode 100644
index 24d0442..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2.dtsi
+++ /dev/null
@@ -1,303 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12b-odroid.dtsi"
-
-/ {
- aliases {
- rtc0 = &rtc;
- };
-
- dio2133: audio-amplifier-0 {
- compatible = "simple-audio-amplifier";
- enable-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- VCC-supply = <&vcc_5v>;
- sound-name-prefix = "U19";
- status = "okay";
- };
-
- hub_5v: regulator-hub_5v {
- compatible = "regulator-fixed";
- regulator-name = "HUB_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to the Hub CHIPENABLE, LOW sets low power state */
- gpio = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "ODROID-N2";
- audio-widgets = "Line", "Lineout";
- audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>,
- <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>,
- <&dio2133>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "TDMOUT_C IN 1", "FRDDR_B OUT 2",
- "TDMOUT_C IN 2", "FRDDR_C OUT 2",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TDMIN_C IN 4", "TDM_B Loopback",
- "TDMIN_LB IN 1", "TDM_B Loopback",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TDMIN_B IN 5", "TDM_C Loopback",
- "TDMIN_C IN 5", "TDM_C Loopback",
- "TDMIN_LB IN 2", "TDM_C Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "TODDR_A IN 6", "TDMIN_LB OUT",
- "TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT",
- "U19 INL", "ACODEC LOLP",
- "U19 INR", "ACODEC LORP",
- "Lineout", "U19 OUTL",
- "Lineout", "U19 OUTR";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_B>;
- };
- };
-
- /* i2s jack output interface */
- dai-link-7 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_C>;
- };
- };
-
- /* hdmi glue */
- dai-link-8 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- /* acodec glue */
- dai-link-9 {
- sound-dai = <&toacodec TOACODEC_OUT>;
-
- codec {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddao_1v8>;
- status = "okay";
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOH */
- "", "", "", "", "", "", "", "",
- "",
- /* BOOT */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOC */
- "", "", "", "", "", "", "", "",
- /* GPIOA */
- "PIN_44", /* GPIOA_0 */
- "PIN_46", /* GPIOA_1 */
- "PIN_45", /* GPIOA_2 */
- "PIN_47", /* GPIOA_3 */
- "PIN_26", /* GPIOA_4 */
- "", "", "", "", "", "",
- "PIN_42", /* GPIOA_11 */
- "PIN_32", /* GPIOA_12 */
- "PIN_7", /* GPIOA_13 */
- "PIN_27", /* GPIOA_14 */
- "PIN_28", /* GPIOA_15 */
- /* GPIOX */
- "PIN_16", /* GPIOX_0 */
- "PIN_18", /* GPIOX_1 */
- "PIN_22", /* GPIOX_2 */
- "PIN_11", /* GPIOX_3 */
- "PIN_13", /* GPIOX_4 */
- "PIN_33", /* GPIOX_5 */
- "PIN_35", /* GPIOX_6 */
- "PIN_15", /* GPIOX_7 */
- "PIN_19", /* GPIOX_8 */
- "PIN_21", /* GPIOX_9 */
- "PIN_24", /* GPIOX_10 */
- "PIN_23", /* GPIOX_11 */
- "PIN_8", /* GPIOX_12 */
- "PIN_10", /* GPIOX_13 */
- "PIN_29", /* GPIOX_14 */
- "PIN_31", /* GPIOX_15 */
- "PIN_12", /* GPIOX_16 */
- "PIN_3", /* GPIOX_17 */
- "PIN_5", /* GPIOX_18 */
- "PIN_36"; /* GPIOX_19 */
- /*
- * WARNING: The USB Hub on the Odroid-N2 needs a reset signal
- * to be turned high in order to be detected by the USB Controller
- * This signal should be handled by a USB specific power sequence
- * in order to reset the Hub when USB bus is powered down.
- */
- hog-0 {
- gpio-hog;
- gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- linux,rc-map-name = "rc-odroid";
-};
-
-/*
- * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins
- * and eMMC Data 4 to 7 pins.
- * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
- * and change bus-width to 4 then spifc can be enabled.
- * The SW1 slide should also be set to the correct position.
- */
-&spifc {
- status = "disabled";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- mx25u64: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mxicy,mx25u6435f", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&toacodec {
- status = "okay";
-};
-
-&usb {
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy1 {
- /* Enable the hub which is connected to this port */
- phy-supply = <&hub_5v>;
-};
diff --git a/arch/arm/dts/meson-g12b-odroid-n2l.dts b/arch/arm/dts/meson-g12b-odroid-n2l.dts
deleted file mode 100644
index 70919f4..0000000
--- a/arch/arm/dts/meson-g12b-odroid-n2l.dts
+++ /dev/null
@@ -1,125 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2022 Dongjin Kim <tobetter@gmail.com>
- */
-
-/dts-v1/;
-
-/* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
-#include "meson-g12b-a311d.dtsi"
-#include "meson-g12b-odroid.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-n2l", "amlogic,s922x", "amlogic,g12b";
- model = "Hardkernel ODROID-N2L";
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "ODROID-N2L";
- audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
- <&tdmin_c>, <&tdmin_lb>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TDMIN_C IN 4", "TDM_B Loopback",
- "TDMIN_LB IN 1", "TDM_B Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "TODDR_A IN 6", "TDMIN_LB OUT",
- "TODDR_B IN 6", "TDMIN_LB OUT",
- "TODDR_C IN 6", "TDMIN_LB OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-7 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-ð_phy {
- status = "disabled";
-};
-
-&vddcpu_a {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_ab 0 1500 0>;
-};
-
-&vddcpu_b {
- regulator-min-microvolt = <680000>;
- regulator-max-microvolt = <1040000>;
-
- pwms = <&pwm_AO_cd 1 1500 0>;
-};
-
-&usb2_phy0 {
- phy-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb_pwr_en>;
-};
diff --git a/arch/arm/dts/meson-g12b-odroid.dtsi b/arch/arm/dts/meson-g12b-odroid.dtsi
deleted file mode 100644
index 9e12a34..0000000
--- a/arch/arm/dts/meson-g12b-odroid.dtsi
+++ /dev/null
@@ -1,445 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-toacodec.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- fan: gpio-fan {
- compatible = "gpio-fan";
- gpios = <&gpio_ao GPIOAO_10 GPIO_ACTIVE_HIGH>;
- /* Using Dummy Speed */
- gpio-fan,speed-map = <0 0>, <1 1>;
- #cooling-cells = <2>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- label = "n2:blue";
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- tflash_vdd: regulator-tflash_vdd {
- compatible = "regulator-fixed";
-
- regulator-name = "TFLASH_VDD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- tf_io: gpio-regulator-tf_io {
- compatible = "regulator-gpio";
-
- regulator-name = "TF_IO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- usb_pwr_en: regulator-usb_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to the microUSB port power enable */
- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&main_12v>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&main_12v>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8120B1ABC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu_thermal {
- trips {
- cpu_active: cpu-active {
- temperature = <60000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "active";
- };
- };
-
- cooling-maps {
- map {
- trip = <&cpu_active>;
- cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&ddr_thermal {
- trips {
- ddr_active: ddr-active {
- temperature = <60000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "active";
- };
- };
-
- cooling-maps {
- map {
- trip = <&ddr_active>;
- cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&tf_io>;
-
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmif_c {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmin_c {
- status = "okay";
-};
-
-&tdmin_lb {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tdmout_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc_5v>;
-};
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts b/arch/arm/dts/meson-g12b-radxa-zero2.dts
deleted file mode 100644
index 890f5bf..0000000
--- a/arch/arm/dts/meson-g12b-radxa-zero2.dts
+++ /dev/null
@@ -1,489 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- * Copyright (c) 2022 Radxa Limited
- * Author: Yuntian Zhang <yt@radxa.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-a311d.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
- model = "Radxa Zero2";
-
- aliases {
- serial0 = &uart_AO;
- serial2 = &uart_A;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIOA_12 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- ao_5v: regulator-ao-5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <730000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&ao_5v>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * Silergy SY8120B1ABC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <730000>;
- regulator-max-microvolt = <1022000>;
-
- pwm-supply = <&ao_5v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "RADXA-ZERO2";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: clock-0 {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "PIN_27", "PIN_28", "PIN_7", "PIN_11", "PIN_13", "PIN_15", "PIN_18", "PIN_40",
- "", "", "", "", "", "", "", "",
- /* GPIOH */
- "", "", "", "", "PIN_19", "PIN_21", "PIN_24", "PIN_23",
- "",
- /* BOOT */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "EMMC_PWRSEQ", "", "", "",
- /* GPIOC */
- "", "", "", "", "", "", "SD_CD", "PIN_36",
- /* GPIOA */
- "PIN_32", "PIN_12", "PIN_35", "", "", "PIN_38", "", "",
- "", "", "", "", "LED_GREEN", "PIN_31", "PIN_3", "PIN_5",
- /* GPIOX */
- "", "", "", "", "", "", "SDIO_PWRSEQ", "",
- "", "", "", "", "", "", "", "",
- "", "BT_SHUTDOWN", "", "";
-};
-
-&gpio_ao {
- gpio-line-names =
- /* GPIOAO */
- "PIN_8", "PIN_10", "", "BTN_POWER", "", "", "", "PIN_29",
- "PIN_33", "PIN_37", "FAN", "",
- /* GPIOE */
- "", "", "";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&ao_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "disabled";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_ab {
- pinctrl-0 = <&pwm_ao_a_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts b/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts
deleted file mode 100644
index 7f66f26..0000000
--- a/arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts
+++ /dev/null
@@ -1,14 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2023 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b-s922x.dtsi"
-#include "meson-g12b-bananapi.dtsi"
-
-/ {
- compatible = "bananapi,bpi-m2s", "amlogic,s922x", "amlogic,g12b";
- model = "BananaPi M2S";
-};
diff --git a/arch/arm/dts/meson-g12b-s922x.dtsi b/arch/arm/dts/meson-g12b-s922x.dtsi
deleted file mode 100644
index 1e5d0ee..0000000
--- a/arch/arm/dts/meson-g12b-s922x.dtsi
+++ /dev/null
@@ -1,139 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12b.dtsi"
-
-/ {
- cpu_opp_table_0: opp-table-0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <731000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <731000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <731000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <731000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <761000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <831000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1896000000 {
- opp-hz = /bits/ 64 <1896000000>;
- opp-microvolt = <981000>;
- };
-
- opp-1992000000 {
- opp-hz = /bits/ 64 <1992000000>;
- opp-microvolt = <1001000>;
- };
- };
-
- cpub_opp_table_1: opp-table-1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-100000000 {
- opp-hz = /bits/ 64 <100000000>;
- opp-microvolt = <751000>;
- };
-
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <751000>;
- };
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <751000>;
- };
-
- opp-667000000 {
- opp-hz = /bits/ 64 <667000000>;
- opp-microvolt = <751000>;
- };
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <771000>;
- };
-
- opp-1398000000 {
- opp-hz = /bits/ 64 <1398000000>;
- opp-microvolt = <791000>;
- };
-
- opp-1512000000 {
- opp-hz = /bits/ 64 <1512000000>;
- opp-microvolt = <821000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <861000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <891000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <981000>;
- };
-
- opp-1908000000 {
- opp-hz = /bits/ 64 <1908000000>;
- opp-microvolt = <1022000>;
- };
- };
-};
diff --git a/arch/arm/dts/meson-g12b-w400.dtsi b/arch/arm/dts/meson-g12b-w400.dtsi
deleted file mode 100644
index feb0885..0000000
--- a/arch/arm/dts/meson-g12b-w400.dtsi
+++ /dev/null
@@ -1,425 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-g12b.dtsi"
-#include "meson-g12b-s922x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddcpu_a: regulator-vddcpu-a {
- /*
- * MP1653 Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_A";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_ab 0 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddcpu_b: regulator-vddcpu-b {
- /*
- * MP1652 Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU_B";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- usb1_pow: regulator-usb1-pow {
- compatible = "regulator-fixed";
- regulator-name = "USB1_POW";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* connected to SY6280A Power Switch */
- gpio = <&gpio GPIOA_8 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- usb_pwr_en: regulator-usb-pwr-en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to USB3 Type-A Port power enable */
- gpio = <&gpio GPIOAO_7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vddao_1v8: regulator-vddao-1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao-3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu_b>;
- operating-points-v2 = <&cpu_opp_table_0>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu100 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu101 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu102 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu103 {
- cpu-supply = <&vddcpu_a>;
- operating-points-v2 = <&cpub_opp_table_1>;
- clocks = <&clkc CLKID_CPUB_CLK>;
- clock-latency = <50000>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_a_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <100000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy0 {
- phy-supply = <&usb1_pow>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb1_pow>;
-};
diff --git a/arch/arm/dts/meson-g12b.dtsi b/arch/arm/dts/meson-g12b.dtsi
deleted file mode 100644
index 75ff00f..0000000
--- a/arch/arm/dts/meson-g12b.dtsi
+++ /dev/null
@@ -1,146 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12.dtsi"
-
-/ {
- compatible = "amlogic,g12b";
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
-
- core1 {
- cpu = <&cpu1>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&cpu100>;
- };
-
- core1 {
- cpu = <&cpu101>;
- };
-
- core2 {
- cpu = <&cpu102>;
- };
-
- core3 {
- cpu = <&cpu103>;
- };
- };
- };
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- capacity-dmips-mhz = <592>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- capacity-dmips-mhz = <592>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu100: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x100>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu101: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x101>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu102: cpu@102 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x102>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu103: cpu@103 {
- device_type = "cpu";
- compatible = "arm,cortex-a73";
- reg = <0x0 0x103>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-};
-
-&clkc {
- compatible = "amlogic,g12b-clkc";
-};
-
-&cpu_thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&mali {
- dma-coherent;
-};
-
-&pmu {
- compatible = "amlogic,g12b-ddr-pmu";
-};
diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi
deleted file mode 100644
index 4e84ab8..0000000
--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi
+++ /dev/null
@@ -1,447 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 BayLibre SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-update {
- label = "update";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <1300000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- spi0 = &spifc;
- };
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&vcc5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
- status = "disabled";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_DISK_ACTIVITY;
- gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "disk-activity";
- };
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
- };
-
- vcc_card: regulator-vcc_card {
- compatible = "regulator-fixed";
- regulator-name = "VCC_CARD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddio_ao3v3>;
-
- gpio = <&gpio GPIODV_4 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc5v: regulator-vcc5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&ao_5v>;
-
- gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddio_ao3v3: regulator-vddio_ao3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddio_ao3v3>;
- regulator-always-on;
- };
-
- vddio_card: regulator-vddio-card {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_CARD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
-
- regulator-settling-time-up-us = <200>;
- regulator-settling-time-down-us = <50000>;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-PC";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Speaker", "7J4-14 LEFT",
- "Speaker", "7J4-11 RIGHT";
- audio-routing = "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "7J4-14 LEFT", "AU2 OUTL",
- "7J4-11 RIGHT", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
- status = "okay";
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_phy_irq_pins>;
- pinctrl-names = "default";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
- phy-mode = "rgmii";
- status = "okay";
-};
-
-&external_mdio {
- external_phy: ethernet-phy@0 {
- reg = <0>;
- max-speed = <1000>;
- reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
- reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&pinctrl_periphs {
- /*
- * Make sure the reset pin of the usb HUB is driven high to take
- * it out of reset.
- */
- usb1_rst_pins: usb1_rst_irq {
- mux {
- groups = "GPIODV_3";
- function = "gpio_periphs";
- bias-disable;
- output-high;
- };
- };
-
- /* Make sure the phy irq pin is properly configured as input */
- eth_phy_irq_pins: eth_phy_irq {
- mux {
- groups = "GPIOZ_15";
- function = "gpio_periphs";
- bias-disable;
- output-disable;
- };
- };
-};
-
-&hdmi_tx {
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc5v>;
- status = "okay";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&i2c_C {
- pinctrl-0 = <&i2c_c_dv18_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- rtc: rtc@51 {
- reg = <0x51>;
- compatible = "nxp,pcf8563";
- #clock-cells = <0>;
- clock-output-names = "rtc_clkout";
- };
-};
-
-&pwm_AO_ab {
- pinctrl-0 = <&pwm_ao_a_3_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_ab {
- pinctrl-0 = <&pwm_b_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
- status = "okay";
-};
-
-&saradc {
- vref-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-/* SD card */
-&sd_emmc_b {
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- max-frequency = <200000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vcc_card>;
- vqmmc-supply = <&vddio_card>;
-
- status = "okay";
-};
-
-/* eMMC */
-&sd_emmc_c {
- pinctrl-0 = <&emmc_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddio_ao3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- status = "okay";
-};
-
-&spifc {
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- gd25lq128: flash@0 {
- compatible = "jedec,spi-nor";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0>;
- spi-max-frequency = <12000000>;
- };
-};
-
-&uart_AO {
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- pinctrl-0 = <&usb1_rst_pins>;
- pinctrl-names = "default";
- phy-supply = <&vcc5v>;
-};
-
-&usb2_phy1 {
- phy-supply = <&vcc5v>;
-};
diff --git a/arch/arm/dts/meson-gx-mali450.dtsi b/arch/arm/dts/meson-gx-mali450.dtsi
deleted file mode 100644
index f9771b5..0000000
--- a/arch/arm/dts/meson-gx-mali450.dtsi
+++ /dev/null
@@ -1,61 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/ {
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-125000000 {
- opp-hz = /bits/ 64 <125000000>;
- opp-microvolt = <950000>;
- };
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <950000>;
- };
- opp-285714285 {
- opp-hz = /bits/ 64 <285714285>;
- opp-microvolt = <950000>;
- };
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <950000>;
- };
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <950000>;
- };
- opp-666666666 {
- opp-hz = /bits/ 64 <666666666>;
- opp-microvolt = <950000>;
- };
- opp-744000000 {
- opp-hz = /bits/ 64 <744000000>;
- opp-microvolt = <950000>;
- };
- };
-};
-
-&apb {
- mali: gpu@c0000 {
- compatible = "arm,mali-450";
- reg = <0x0 0xc0000 0x0 0x40000>;
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gp", "gpmmu", "pp", "pmu",
- "pp0", "ppmmu0", "pp1", "ppmmu1",
- "pp2", "ppmmu2";
- operating-points-v2 = <&gpu_opp_table>;
- };
-};
diff --git a/arch/arm/dts/meson-gx-p23x-q20x.dtsi b/arch/arm/dts/meson-gx-p23x-q20x.dtsi
deleted file mode 100644
index dafc841..0000000
--- a/arch/arm/dts/meson-gx-p23x-q20x.dtsi
+++ /dev/null
@@ -1,324 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-/* Common DTSI for same Amlogic Q200/Q201 and P230/P231 boards using either
- * the pin-compatible S912 (GXM) or S905D (GXL) SoCs.
- */
-
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&hdmi_5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- spdif_dit: audio-codec-0 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "P230-Q200";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Line", "Lineout";
- audio-routing = "AU2 INL", "ACODEC LOLP",
- "AU2 INR", "ACODEC LORP",
- "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "Lineout", "AU2 OUTL",
- "Lineout", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
-
- codec-0 {
- sound-dai = <&spdif_dit>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-5 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
- pinctrl-0 = <&spdif_out_h_pins>;
- pinctrl-names = "default";
-
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* Wireless SDIO Module */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* This UART is brought out to the DB9 connector */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "otg";
-};
diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
deleted file mode 100644
index 11f89bf..0000000
--- a/arch/arm/dts/meson-gx.dtsi
+++ /dev/null
@@ -1,675 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Andreas Färber
- *
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- *
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/power/meson-gxbb-power.h>
-#include <dt-bindings/thermal/thermal.h>
-
-/ {
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
-
- aliases {
- mmc0 = &sd_emmc_b; /* SD card */
- mmc1 = &sd_emmc_c; /* eMMC */
- mmc2 = &sd_emmc_a; /* SDIO */
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 16 MiB reserved for Hardware ROM Firmware */
- hwrom_reserved: hwrom@0 {
- reg = <0x0 0x0 0x0 0x1000000>;
- no-map;
- };
-
- /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@10000000 {
- reg = <0x0 0x10000000 0x0 0x200000>;
- no-map;
- };
-
- /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved_alt: secmon@5000000 {
- reg = <0x0 0x05000000 0x0 0x300000>;
- no-map;
- };
-
- /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
- secmon_reserved_bl32: secmon@5300000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
-
- linux,cma {
- compatible = "shared-dma-pool";
- reusable;
- size = <0x0 0x10000000>;
- alignment = <0x0 0x400000>;
- linux,cma-default;
- };
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- simplefb_cvbs: framebuffer-cvbs {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-cvbs";
- power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
- status = "disabled";
- };
-
- simplefb_hdmi: framebuffer-hdmi {
- compatible = "amlogic,simple-framebuffer",
- "simple-framebuffer";
- amlogic,pipeline = "vpu-hdmi";
- power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
- status = "disabled";
- };
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 0>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- thermal-zones {
- cpu-thermal {
- polling-delay-passive = <250>; /* milliseconds */
- polling-delay = <1000>; /* milliseconds */
-
- thermal-sensors = <&scpi_sensors 0>;
-
- trips {
- cpu_passive: cpu-passive {
- temperature = <80000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "passive";
- };
-
- cpu_hot: cpu-hot {
- temperature = <90000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "hot";
- };
-
- cpu_critical: cpu-critical {
- temperature = <110000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "critical";
- };
- };
-
- cpu_cooling_maps: cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
- };
- };
-
- arm-pmu {
- compatible = "arm,cortex-a53-pmu";
- interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts = <GIC_PPI 13
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 14
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 11
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
- <GIC_PPI 10
- (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- xtal: xtal-clk {
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- clock-output-names = "xtal";
- #clock-cells = <0>;
- };
-
- firmware {
- sm: secure-monitor {
- compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
- };
- };
-
- efuse: efuse {
- compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
- #address-cells = <1>;
- #size-cells = <1>;
- read-only;
- secure-monitor = <&sm>;
-
- sn: sn@14 {
- reg = <0x14 0x10>;
- };
-
- eth_mac: eth-mac@34 {
- reg = <0x34 0x10>;
- };
-
- bid: bid@46 {
- reg = <0x46 0x30>;
- };
- };
-
- scpi {
- compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
- mboxes = <&mailbox 1 &mailbox 2>;
- shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
-
- scpi_clocks: clocks {
- compatible = "arm,scpi-clocks";
-
- scpi_dvfs: clocks-0 {
- compatible = "arm,scpi-dvfs-clocks";
- #clock-cells = <1>;
- clock-indices = <0>;
- clock-output-names = "vcpu";
- };
- };
-
- scpi_sensors: sensors {
- compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
- #thermal-sensor-cells = <1>;
- };
- };
-
- soc {
- compatible = "simple-bus";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- cbus: bus@c1100000 {
- compatible = "simple-bus";
- reg = <0x0 0xc1100000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
-
- gpio_intc: interrupt-controller@9880 {
- compatible = "amlogic,meson-gpio-intc";
- reg = <0x0 0x9880 0x0 0x10>;
- interrupt-controller;
- #interrupt-cells = <2>;
- amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
- status = "disabled";
- };
-
- reset: reset-controller@4404 {
- compatible = "amlogic,meson-gxbb-reset";
- reg = <0x0 0x04404 0x0 0x9c>;
- #reset-cells = <1>;
- };
-
- aiu: audio-controller@5400 {
- compatible = "amlogic,aiu";
- #sound-dai-cells = <2>;
- sound-name-prefix = "AIU";
- reg = <0x0 0x5400 0x0 0x2ac>;
- interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "i2s", "spdif";
- status = "disabled";
- };
-
- uart_A: serial@84c0 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x84c0 0x0 0x18>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- fifo-size = <128>;
- };
-
- uart_B: serial@84dc {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x84dc 0x0 0x18>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- i2c_A: i2c@8500 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x08500 0x0 0x20>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm_ab: pwm@8550 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
- reg = <0x0 0x08550 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- pwm_cd: pwm@8650 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
- reg = <0x0 0x08650 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- saradc: adc@8680 {
- compatible = "amlogic,meson-saradc";
- reg = <0x0 0x8680 0x0 0x34>;
- #io-channel-cells = <1>;
- interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- pwm_ef: pwm@86c0 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
- reg = <0x0 0x086c0 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- uart_C: serial@8700 {
- compatible = "amlogic,meson-gx-uart";
- reg = <0x0 0x8700 0x0 0x18>;
- interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- clock-measure@8758 {
- compatible = "amlogic,meson-gx-clk-measure";
- reg = <0x0 0x8758 0x0 0x10>;
- };
-
- i2c_B: i2c@87c0 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x087c0 0x0 0x20>;
- interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- i2c_C: i2c@87e0 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x087e0 0x0 0x20>;
- interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spicc: spi@8d80 {
- compatible = "amlogic,meson-gx-spicc";
- reg = <0x0 0x08d80 0x0 0x80>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- spifc: spi@8c80 {
- compatible = "amlogic,meson-gxbb-spifc";
- reg = <0x0 0x08c80 0x0 0x80>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- watchdog@98d0 {
- compatible = "amlogic,meson-gxbb-wdt";
- reg = <0x0 0x098d0 0x0 0x10>;
- clocks = <&xtal>;
- };
- };
-
- gic: interrupt-controller@c4301000 {
- compatible = "arm,gic-400";
- reg = <0x0 0xc4301000 0 0x1000>,
- <0x0 0xc4302000 0 0x2000>,
- <0x0 0xc4304000 0 0x2000>,
- <0x0 0xc4306000 0 0x2000>;
- interrupt-controller;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- #interrupt-cells = <3>;
- #address-cells = <0>;
- };
-
- sram: sram@c8000000 {
- compatible = "mmio-sram";
- reg = <0x0 0xc8000000 0x0 0x14000>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0 0x0 0xc8000000 0x14000>;
-
- cpu_scp_lpri: scp-sram@0 {
- compatible = "amlogic,meson-gxbb-scp-shmem";
- reg = <0x13000 0x400>;
- };
-
- cpu_scp_hpri: scp-sram@200 {
- compatible = "amlogic,meson-gxbb-scp-shmem";
- reg = <0x13400 0x400>;
- };
- };
-
- aobus: bus@c8100000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8100000 0x0 0x100000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
-
- sysctrl_AO: sys-ctrl@0 {
- compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
- reg = <0x0 0x0 0x0 0x100>;
-
- clkc_AO: clock-controller {
- compatible = "amlogic,meson-gx-aoclkc";
- #clock-cells = <1>;
- #reset-cells = <1>;
- };
- };
-
- cec_AO: cec@100 {
- compatible = "amlogic,meson-gx-ao-cec";
- reg = <0x0 0x00100 0x0 0x14>;
- interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- sec_AO: ao-secure@140 {
- compatible = "amlogic,meson-gx-ao-secure", "syscon";
- reg = <0x0 0x140 0x0 0x140>;
- amlogic,has-chip-id;
- };
-
- uart_AO: serial@4c0 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x004c0 0x0 0x18>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- uart_AO_B: serial@4e0 {
- compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
- reg = <0x0 0x004e0 0x0 0x18>;
- interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
-
- i2c_AO: i2c@500 {
- compatible = "amlogic,meson-gxbb-i2c";
- reg = <0x0 0x500 0x0 0x20>;
- interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- pwm_AO_ab: pwm@550 {
- compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
- reg = <0x0 0x00550 0x0 0x10>;
- #pwm-cells = <3>;
- status = "disabled";
- };
-
- ir: ir@580 {
- compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
- reg = <0x0 0x00580 0x0 0x40>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
- status = "disabled";
- };
- };
-
- vdec: video-codec@c8820000 {
- compatible = "amlogic,gx-vdec";
- reg = <0x0 0xc8820000 0x0 0x10000>,
- <0x0 0xc110a580 0x0 0xe4>;
- reg-names = "dos", "esparser";
-
- interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "vdec", "esparser";
-
- amlogic,ao-sysctrl = <&sysctrl_AO>;
- amlogic,canvas = <&canvas>;
- };
-
- periphs: bus@c8834000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8834000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
-
- hwrng: rng@0 {
- compatible = "amlogic,meson-rng";
- reg = <0x0 0x0 0x0 0x4>;
- };
- };
-
- dmcbus: bus@c8838000 {
- compatible = "simple-bus";
- reg = <0x0 0xc8838000 0x0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
-
- canvas: video-lut@48 {
- compatible = "amlogic,canvas";
- reg = <0x0 0x48 0x0 0x14>;
- };
- };
-
- hiubus: bus@c883c000 {
- compatible = "simple-bus";
- reg = <0x0 0xc883c000 0x0 0x2000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
-
- sysctrl: system-controller@0 {
- compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
- reg = <0 0 0 0x400>;
-
- pwrc: power-controller {
- compatible = "amlogic,meson-gxbb-pwrc";
- #power-domain-cells = <1>;
- amlogic,ao-sysctrl = <&sysctrl_AO>;
- };
- };
-
- mailbox: mailbox@404 {
- compatible = "amlogic,meson-gxbb-mhu";
- reg = <0 0x404 0 0x4c>;
- interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
- #mbox-cells = <1>;
- };
- };
-
- ethmac: ethernet@c9410000 {
- compatible = "amlogic,meson-gxbb-dwmac",
- "snps,dwmac-3.70a",
- "snps,dwmac";
- reg = <0x0 0xc9410000 0x0 0x10000>,
- <0x0 0xc8834540 0x0 0x4>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
- rx-fifo-depth = <4096>;
- tx-fifo-depth = <2048>;
- power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
- status = "disabled";
- };
-
- apb: apb@d0000000 {
- compatible = "simple-bus";
- reg = <0x0 0xd0000000 0x0 0x200000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
-
- sd_emmc_a: mmc@70000 {
- compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x70000 0x0 0x800>;
- interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- sd_emmc_b: mmc@72000 {
- compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x72000 0x0 0x800>;
- interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- sd_emmc_c: mmc@74000 {
- compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
- reg = <0x0 0x74000 0x0 0x800>;
- interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
- };
-
- vpu: vpu@d0100000 {
- compatible = "amlogic,meson-gx-vpu";
- reg = <0x0 0xd0100000 0x0 0x100000>,
- <0x0 0xc883c000 0x0 0x1000>;
- reg-names = "vpu", "hhi";
- interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- amlogic,canvas = <&canvas>;
-
- /* CVBS VDAC output port */
- cvbs_vdac_port: port@0 {
- reg = <0>;
- };
-
- /* HDMI-TX output port */
- hdmi_tx_port: port@1 {
- reg = <1>;
-
- hdmi_tx_out: endpoint {
- remote-endpoint = <&hdmi_tx_in>;
- };
- };
- };
-
- hdmi_tx: hdmi-tx@c883a000 {
- compatible = "amlogic,meson-gx-dw-hdmi";
- reg = <0x0 0xc883a000 0x0 0x1c>;
- interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
- #address-cells = <1>;
- #size-cells = <0>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "HDMITX";
- status = "disabled";
-
- /* VPU VENC Input */
- hdmi_tx_venc_port: port@0 {
- reg = <0>;
-
- hdmi_tx_in: endpoint {
- remote-endpoint = <&hdmi_tx_out>;
- };
- };
-
- /* TMDS Output */
- hdmi_tx_tmds_port: port@1 {
- reg = <1>;
- };
- };
- };
-};
diff --git a/arch/arm/dts/meson-gxl-mali.dtsi b/arch/arm/dts/meson-gxl-mali.dtsi
deleted file mode 100644
index 478e755..0000000
--- a/arch/arm/dts/meson-gxl-mali.dtsi
+++ /dev/null
@@ -1,17 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-gx-mali450.dtsi"
-
-&mali {
- compatible = "amlogic,meson-gxl-mali", "arm,mali-450";
-
- clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
- clock-names = "bus", "core";
-
- assigned-clocks = <&clkc CLKID_GP0_PLL>;
- assigned-clock-rates = <744000000>;
-};
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
deleted file mode 100644
index 213a070..0000000
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts
+++ /dev/null
@@ -1,319 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2018 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-#include "meson-gxl-s805x.dtsi"
-
-/ {
- compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S805X-AC";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- spi0 = &spifc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- /*
- * The pads are present but no connector is soldered on
- * 2J2, so keep this off by default.
- */
- status = "disabled";
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- dc_5v: regulator-dc_5v {
- compatible = "regulator-fixed";
- regulator-name = "DC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x20000000>;
- };
-
- vcck: regulator-vcck {
- compatible = "regulator-fixed";
- regulator-name = "VCCK";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_5v>;
-
- /*
- * This is controlled by GPIOAO_9 we reserve this but
- * claiming it as done below reset the board anyway
- * Need to investigate this
- *
- * gpio = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- * enable-active-high;
- */
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_5v>;
- regulator-always-on;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-AC";
- audio-widgets = "Speaker", "9J5-3 LEFT",
- "Speaker", "9J5-2 RIGHT";
- audio-routing = "9J5-3 LEFT", "ACODEC LOLN",
- "9J5-2 RIGHT", "ACODEC LORN";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&internal_phy {
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&gpio_ao {
- gpio-line-names = "UART TX",
- "UART RX",
- "7J1 Header Pin31",
- "", "", "", "",
- "IR In",
- "HDMI CEC",
- "5V VCCK Regulator",
- /* GPIO_TEST_N */
- "";
-};
-
-&gpio {
- gpio-line-names = /* Bank GPIOZ */
- "", "", "", "", "", "", "",
- "", "", "", "", "", "", "",
- "Eth Link LED", "Eth Activity LED",
- /* Bank GPIOH */
- "HDMI HPD", "HDMI SDA", "HDMI SCL",
- "", "7J1 Header Pin13",
- "7J1 Header Pin15",
- "7J1 Header Pin7",
- "7J1 Header Pin12",
- "7J1 Header Pin16",
- "7J1 Header Pin18",
- /* Bank BOOT */
- "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
- "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
- "eMMC Clk", "eMMC Reset", "eMMC CMD",
- "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
- "", "SPI NOR Chip Select",
- /* Bank CARD */
- "", "", "", "", "", "", "",
- /* Bank GPIODV */
- "", "", "", "", "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "", "", "", "", "",
- "7J1 Header Pin27", "7J1 Header Pin28", "",
- "7J1 Header Pin29",
- "VCCK Regulator", "VDDEE Regulator",
- /* Bank GPIOX */
- "7J1 Header Pin22", "7J1 Header Pin26",
- "7J1 Header Pin36", "7J1 Header Pin38",
- "7J1 Header Pin40", "7J1 Header Pin37",
- "7J1 Header Pin33", "7J1 Header Pin35",
- "7J1 Header Pin19", "7J1 Header Pin21",
- "7J1 Header Pin24", "7J1 Header Pin23",
- "7J1 Header Pin8", "7J1 Header Pin10",
- "", "", "7J1 Header Pin32", "", "",
- /* Bank GPIOCLK */
- "", "";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-&spifc {
- status = "okay";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- w25q32: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <3000000>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
diff --git a/arch/arm/dts/meson-gxl-s805x.dtsi b/arch/arm/dts/meson-gxl-s805x.dtsi
deleted file mode 100644
index 2997584..0000000
--- a/arch/arm/dts/meson-gxl-s805x.dtsi
+++ /dev/null
@@ -1,23 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- compatible = "amlogic,s805x", "amlogic,meson-gxl";
-};
-
-/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
-&gpu_opp_table {
- opp-744000000 {
- status = "disabled";
- };
-};
-
-&mali {
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-rates;
-};
diff --git a/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts b/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts
deleted file mode 100644
index 100a1cf..0000000
--- a/arch/arm/dts/meson-gxl-s905d-libretech-pc.dts
+++ /dev/null
@@ -1,16 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxl-s905d.dtsi"
-#include "meson-gx-libretech-pc.dtsi"
-
-/ {
- compatible = "libretech,aml-s905d-pc", "amlogic,s905d",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S905D-PC";
-};
diff --git a/arch/arm/dts/meson-gxl-s905d.dtsi b/arch/arm/dts/meson-gxl-s905d.dtsi
deleted file mode 100644
index 4332191..0000000
--- a/arch/arm/dts/meson-gxl-s905d.dtsi
+++ /dev/null
@@ -1,12 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gxl.dtsi"
-#include "meson-gxl-mali.dtsi"
-
-/ {
- compatible = "amlogic,s905d", "amlogic,meson-gxl";
-};
diff --git a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts b/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
deleted file mode 100644
index a18d6d2..0000000
--- a/arch/arm/dts/meson-gxl-s905w-jethome-jethub-j80.dts
+++ /dev/null
@@ -1,247 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Vyacheslav Bocharov <adeep@lexina.in>
- * Copyright (c) 2020 JetHome
- * Author: Aleksandr Kazantsev <ak@tvip.ru>
- * Author: Alexey Shevelkin <ash@tvip.ru>
- * Author: Vyacheslav Bocharov <adeep@lexina.in>
- */
-
-/dts-v1/;
-
-#include "meson-gxl.dtsi"
-
-/ {
- compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl";
- model = "JetHome JetHub J80";
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- reserved-memory {
- linux,cma {
- size = <0x0 0x1000000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO; /* Console */
- serial1 = &uart_A; /* Bluetooth */
- serial2 = &uart_AO_B; /* Wireless module 1 */
- serial3 = &uart_C; /* Wireless module 2 */
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-};
-
-&efuse {
- bt_mac: bt-mac@6 {
- reg = <0x6 0x6>;
- };
-
- wifi_mac: wifi-mac@c {
- reg = <0xc 0x6>;
- };
-};
-
-&sn {
- reg = <0x32 0x20>;
-};
-
-ð_mac {
- reg = <0x0 0x6>;
-};
-
-&bid {
- reg = <0x12 0x20>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* Wireless SDIO Module */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* Console UART */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-/* S905W only has access to its internal PHY */
-ðmac {
- status = "okay";
- phy-mode = "rmii";
- phy-handle = <&internal_phy>;
-};
-
-&internal_phy {
- status = "okay";
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "realtek,rtl8822cs-bt";
- enable-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- host-wake-gpios = <&gpio GPIOX_18 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&uart_C {
- status = "okay";
- pinctrl-0 = <&uart_c_pins>;
- pinctrl-names = "default";
-};
-
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>, <&uart_ao_b_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-};
-
-&i2c_B {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&i2c_b_pins>;
-
- pcf8563: rtc@51 {
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- status = "okay";
- };
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
deleted file mode 100644
index 02f8183..0000000
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts
+++ /dev/null
@@ -1,237 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
- */
-
-/dts-v1/;
-
-#include "meson-gxl-s905x-p212.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
- model = "Khadas VIM";
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- aliases {
- serial2 = &uart_AO_B;
- ethernet0 = ðmac;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- led-controller {
- compatible = "pwm-leds";
-
- led-1 {
- label = "vim:red:power";
- pwms = <&pwm_AO_ab 1 7812500 0>;
- max-brightness = <255>;
- linux,default-trigger = "default-on";
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "KHADAS-VIM";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c_A {
- status = "okay";
- pinctrl-0 = <&i2c_a_pins>;
- pinctrl-names = "default";
-};
-
-&i2c_B {
- status = "okay";
- pinctrl-0 = <&i2c_b_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- status = "okay";
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "xin32k";
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-khadas";
-};
-
-&gpio_ao {
- gpio-line-names = "UART TX",
- "UART RX",
- "Power Key In",
- "J9 Header Pin35",
- "J9 Header Pin16",
- "J9 Header Pin15",
- "J9 Header Pin33",
- "IR In",
- "HDMI CEC",
- "SYS LED",
- /* GPIO_TEST_N */
- "";
-};
-
-&gpio {
- gpio-line-names = /* Bank GPIOZ */
- "", "", "", "", "", "", "",
- "", "", "", "", "", "", "",
- "Power OFF",
- "VCCK Enable",
- /* Bank GPIOH */
- "HDMI HPD", "HDMI SDA", "HDMI SCL",
- "HDMI_5V_EN", "SPDIF",
- "J9 Header Pin37",
- "J9 Header Pin30",
- "J9 Header Pin29",
- "J9 Header Pin32",
- "J9 Header Pin31",
- /* Bank BOOT */
- "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
- "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
- "eMMC Clk", "eMMC Reset", "eMMC CMD",
- "", "BOOT_MODE", "", "", "eMMC Data Strobe",
- /* Bank CARD */
- "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
- "SDCard D3", "SDCard D2", "SDCard Det",
- /* Bank GPIODV */
- "", "", "", "", "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "", "", "", "", "",
- "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
- "VCCK Regulator", "VDDEE Regulator",
- /* Bank GPIOX */
- "WIFI SDIO D0", "WIFI SDIO D1", "WIFI SDIO D2",
- "WIFI SDIO D3", "WIFI SDIO CLK", "WIFI SDIO CMD",
- "WIFI Power Enable", "WIFI WAKE HOST",
- "Bluetooth PCM DOUT", "Bluetooth PCM DIN",
- "Bluetooth PCM SYNC", "Bluetooth PCM CLK",
- "Bluetooth UART TX", "Bluetooth UART RX",
- "Bluetooth UART CTS", "Bluetooth UART RTS",
- "WIFI 32K", "Bluetooth Enable",
- "Bluetooth WAKE HOST",
- /* Bank GPIOCLK */
- "", "J9 Header Pin39";
-};
-
-&pwm_AO_ab {
- status = "okay";
- pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
- pinctrl-names = "default";
- clocks = <&xtal> , <&xtal>;
- clock-names = "clkin0", "clkin1" ;
-};
-
-&pwm_ef {
- pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
-};
-
-&sd_emmc_a {
- max-frequency = <100000000>;
-};
-
-/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
-&uart_AO {
- status = "okay";
-};
-
-/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- dr_mode = "peripheral";
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
deleted file mode 100644
index 6c4e68e..0000000
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts
+++ /dev/null
@@ -1,313 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- compatible = "libretech,aml-s905x-cc-v2", "amlogic,s905x",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S905X-CC V2";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- spi0 = &spifc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_DISK_ACTIVITY;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "disk-activity";
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcck: regulator-vcck {
- compatible = "regulator-fixed";
- regulator-name = "VCCK";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vcc_card: regulator-vcc_card {
- compatible = "regulator-fixed";
- regulator-name = "VCC_CARD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddio_ao3v3>;
-
- gpio = <&gpio GPIOCLK_1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vcc5v: regulator-vcc5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&ao_5v>;
-
- gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
- };
-
- vddio_ao3v3: regulator-vddio_ao3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&ao_5v>;
- regulator-always-on;
- };
-
- vddio_card: regulator-vddio-card {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_CARD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
-
- regulator-settling-time-up-us = <200>;
- regulator-settling-time-down-us = <50000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddio_ao3v3>;
- regulator-always-on;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC 1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddio_ao3v3>;
- regulator-always-on;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-CC-V2";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-ðmac {
- status = "okay";
-};
-
-&internal_phy {
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- hdmi-supply = <&vcc5v>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* SD card */
-&sd_emmc_b {
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-ddr50;
- max-frequency = <100000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vcc_card>;
- vqmmc-supply = <&vddio_card>;
-
- status = "okay";
-};
-
-/* eMMC */
-&sd_emmc_c {
- pinctrl-0 = <&emmc_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddio_ao3v3>;
- vqmmc-supply = <&vcc_1v8>;
-
- status = "okay";
-};
-
-&spifc {
- status = "okay";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- nor_4u1: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <3000000>;
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc5v>;
-};
-
-&usb2_phy1 {
- phy-supply = <&vcc5v>;
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
deleted file mode 100644
index 82bfabf..0000000
--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts
+++ /dev/null
@@ -1,356 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- compatible = "libretech,aml-s905x-cc", "amlogic,s905x",
- "amlogic,meson-gxl";
- model = "Libre Computer AML-S905X-CC";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&hdmi_5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-system {
- label = "librecomputer:system-status";
- gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- panic-indicator;
- };
-
- led-blue {
- label = "librecomputer:blue";
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vcc_card: regulator-vcc-card {
- compatible = "regulator-gpio";
-
- regulator-name = "VCC_CARD";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
-
- regulator-settling-time-up-us = <200>;
- regulator-settling-time-down-us = <50000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- /* This is provided by LDOs on the eMMC daugther card */
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "LIBRETECH-CC";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Line", "Lineout";
- audio-routing = "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "Lineout", "AU2 OUTL",
- "Lineout", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&internal_phy {
- pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&gpio_ao {
- gpio-line-names = "UART TX",
- "UART RX",
- "Blue LED",
- "SDCard Voltage Switch",
- "7J1 Header Pin5",
- "7J1 Header Pin3",
- "7J1 Header Pin12",
- "IR In",
- "9J3 Switch HDMI CEC/7J1 Header Pin11",
- "7J1 Header Pin13",
- /* GPIO_TEST_N */
- "7J1 Header Pin15";
-};
-
-&gpio {
- gpio-line-names = /* Bank GPIOZ */
- "", "", "", "", "", "", "",
- "", "", "", "", "", "", "",
- "Eth Link LED", "Eth Activity LED",
- /* Bank GPIOH */
- "HDMI HPD", "HDMI SDA", "HDMI SCL",
- "HDMI_5V_EN", "9J1 Header Pin2",
- "Analog Audio Mute",
- "2J3 Header Pin6",
- "2J3 Header Pin5",
- "2J3 Header Pin4",
- "2J3 Header Pin3",
- /* Bank BOOT */
- "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3",
- "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7",
- "eMMC Clk", "eMMC Reset", "eMMC CMD",
- "ALT BOOT MODE", "", "", "", "eMMC Data Strobe",
- /* Bank CARD */
- "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
- "SDCard D3", "SDCard D2", "SDCard Det",
- /* Bank GPIODV */
- "", "", "", "", "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "", "", "", "", "",
- "Green LED", "VCCK Enable",
- "7J1 Header Pin27", "7J1 Header Pin28",
- "VCCK Regulator", "VDDEE Regulator",
- /* Bank GPIOX */
- "7J1 Header Pin22", "7J1 Header Pin26",
- "7J1 Header Pin36", "7J1 Header Pin38",
- "7J1 Header Pin40", "7J1 Header Pin37",
- "7J1 Header Pin33", "7J1 Header Pin35",
- "7J1 Header Pin19", "7J1 Header Pin21",
- "7J1 Header Pin24", "7J1 Header Pin23",
- "7J1 Header Pin8", "7J1 Header Pin10",
- "7J1 Header Pin16", "7J1 Header Pin18",
- "7J1 Header Pin32", "7J1 Header Pin29",
- "7J1 Header Pin31",
- /* Bank GPIOCLK */
- "7J1 Header Pin7", "";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vcc_card>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- /*
- * even though the schematics don't show it:
- * HDMI_5V is also used as supply for the USB VBUS.
- */
- phy-supply = <&hdmi_5v>;
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dts b/arch/arm/dts/meson-gxl-s905x-p212.dts
deleted file mode 100644
index 9b4ea6a..0000000
--- a/arch/arm/dts/meson-gxl-s905x-p212.dts
+++ /dev/null
@@ -1,134 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxl-s905x-p212.dtsi"
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
- model = "Amlogic Meson GXL (S905X) P212 Development Board";
-
- dio2133: analog-amplifier {
- compatible = "simple-audio-amplifier";
- sound-name-prefix = "AU2";
- VCC-supply = <&hdmi_5v>;
- enable-gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
- };
-
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "S905X-P212";
- audio-aux-devs = <&dio2133>;
- audio-widgets = "Line", "Lineout";
- audio-routing = "AU2 INL", "ACODEC LOLN",
- "AU2 INR", "ACODEC LORN",
- "Lineout", "AU2 OUTL",
- "Lineout", "AU2 OUTR";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
-
- codec-1 {
- sound-dai = <&aiu AIU_ACODEC CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_ACODEC CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddio_ao18>;
- status = "okay";
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-/* This UART is brought out to the DB9 connector */
-&uart_AO {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-gxl-s905x-p212.dtsi b/arch/arm/dts/meson-gxl-s905x-p212.dtsi
deleted file mode 100644
index a150cc0..0000000
--- a/arch/arm/dts/meson-gxl-s905x-p212.dtsi
+++ /dev/null
@@ -1,213 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
- * Based on meson-gx-p23x-q20x.dtsi:
- * - Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- * - Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/* Common DTSI for devices which are based on the P212 reference board. */
-
-#include "meson-gxl-s905x.dtsi"
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-};
-
-ðmac {
- status = "okay";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-/* Wireless SDIO Module */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* This is connected to the Bluetooth module: */
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "host";
-};
-
-&usb2_phy0 {
- /*
- * HDMI_5V is also used as supply for the USB VBUS.
- */
- phy-supply = <&hdmi_5v>;
-};
diff --git a/arch/arm/dts/meson-gxl-s905x.dtsi b/arch/arm/dts/meson-gxl-s905x.dtsi
deleted file mode 100644
index 40c19f6..0000000
--- a/arch/arm/dts/meson-gxl-s905x.dtsi
+++ /dev/null
@@ -1,18 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gxl.dtsi"
-#include "meson-gxl-mali.dtsi"
-
-/ {
- compatible = "amlogic,s905x", "amlogic,meson-gxl";
-};
-
-/* S905X only has access to its internal PHY */
-ðmac {
- phy-mode = "rmii";
- phy-handle = <&internal_phy>;
-};
diff --git a/arch/arm/dts/meson-gxl.dtsi b/arch/arm/dts/meson-gxl.dtsi
deleted file mode 100644
index 17bcfa4..0000000
--- a/arch/arm/dts/meson-gxl.dtsi
+++ /dev/null
@@ -1,940 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gx.dtsi"
-#include <dt-bindings/clock/gxbb-clkc.h>
-#include <dt-bindings/clock/gxbb-aoclkc.h>
-#include <dt-bindings/gpio/meson-gxl-gpio.h>
-#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
-
-/ {
- compatible = "amlogic,meson-gxl";
-
- soc {
- usb: usb@d0078080 {
- compatible = "amlogic,meson-gxl-usb-ctrl";
- reg = <0x0 0xd0078080 0x0 0x20>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>;
- clock-names = "usb_ctrl", "ddr";
- resets = <&reset RESET_USB_OTG>;
-
- dr_mode = "otg";
-
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-
- dwc2: usb@c9100000 {
- compatible = "amlogic,meson-g12a-usb", "snps,dwc2";
- reg = <0x0 0xc9100000 0x0 0x40000>;
- interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkc CLKID_USB1>;
- clock-names = "otg";
- phys = <&usb2_phy1>;
- dr_mode = "peripheral";
- g-rx-fifo-size = <192>;
- g-np-tx-fifo-size = <128>;
- g-tx-fifo-size = <128 128 16 16 16>;
- };
-
- dwc3: usb@c9000000 {
- compatible = "snps,dwc3";
- reg = <0x0 0xc9000000 0x0 0x100000>;
- interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- maximum-speed = "high-speed";
- snps,dis_u2_susphy_quirk;
- };
- };
-
- acodec: audio-controller@c8832000 {
- compatible = "amlogic,t9015";
- reg = <0x0 0xc8832000 0x0 0x14>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "ACODEC";
- clocks = <&clkc CLKID_ACODEC>;
- clock-names = "pclk";
- resets = <&reset RESET_ACODEC>;
- status = "disabled";
- };
-
- crypto: crypto@c883e000 {
- compatible = "amlogic,gxl-crypto";
- reg = <0x0 0xc883e000 0x0 0x36>;
- interrupts = <GIC_SPI 188 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc CLKID_BLKMV>;
- clock-names = "blkmv";
- status = "okay";
- };
- };
-};
-
-&aiu {
- compatible = "amlogic,aiu-gxl", "amlogic,aiu";
- clocks = <&clkc CLKID_AIU_GLUE>,
- <&clkc CLKID_I2S_OUT>,
- <&clkc CLKID_AOCLK_GATE>,
- <&clkc CLKID_CTS_AMCLK>,
- <&clkc CLKID_MIXER_IFACE>,
- <&clkc CLKID_IEC958>,
- <&clkc CLKID_IEC958_GATE>,
- <&clkc CLKID_CTS_MCLK_I958>,
- <&clkc CLKID_CTS_I958>;
- clock-names = "pclk",
- "i2s_pclk",
- "i2s_aoclk",
- "i2s_mclk",
- "i2s_mixer",
- "spdif_pclk",
- "spdif_aoclk",
- "spdif_mclk",
- "spdif_mclk_sel";
- resets = <&reset RESET_AIU>;
-};
-
-&apb {
- usb2_phy0: phy@78000 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78000 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-
- usb2_phy1: phy@78020 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78020 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-};
-
-&efuse {
- clocks = <&clkc CLKID_EFUSE>;
-};
-
-ðmac {
- clocks = <&clkc CLKID_ETH>,
- <&clkc CLKID_FCLK_DIV2>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
-
- mdio0: mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- };
-};
-
-&aobus {
- pinctrl_aobus: pinctrl@14 {
- compatible = "amlogic,meson-gxl-aobus-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio_ao: bank@14 {
- reg = <0x0 0x00014 0x0 0x8>,
- <0x0 0x0002c 0x0 0x4>,
- <0x0 0x00024 0x0 0x8>;
- reg-names = "mux", "pull", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_aobus 0 0 14>;
- };
-
- uart_ao_a_pins: uart_ao_a {
- mux {
- groups = "uart_tx_ao_a", "uart_rx_ao_a";
- function = "uart_ao";
- bias-disable;
- };
- };
-
- uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
- mux {
- groups = "uart_cts_ao_a",
- "uart_rts_ao_a";
- function = "uart_ao";
- bias-disable;
- };
- };
-
- uart_ao_b_pins: uart_ao_b {
- mux {
- groups = "uart_tx_ao_b", "uart_rx_ao_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_0_1_pins: uart_ao_b_0_1 {
- mux {
- groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
- mux {
- groups = "uart_cts_ao_b",
- "uart_rts_ao_b";
- function = "uart_ao_b";
- bias-disable;
- };
- };
-
- remote_input_ao_pins: remote_input_ao {
- mux {
- groups = "remote_input_ao";
- function = "remote_input_ao";
- bias-disable;
- };
- };
-
- i2c_ao_pins: i2c_ao {
- mux {
- groups = "i2c_sck_ao",
- "i2c_sda_ao";
- function = "i2c_ao";
- bias-disable;
- };
- };
-
- pwm_ao_a_3_pins: pwm_ao_a_3 {
- mux {
- groups = "pwm_ao_a_3";
- function = "pwm_ao_a";
- bias-disable;
- };
- };
-
- pwm_ao_a_8_pins: pwm_ao_a_8 {
- mux {
- groups = "pwm_ao_a_8";
- function = "pwm_ao_a";
- bias-disable;
- };
- };
-
- pwm_ao_b_pins: pwm_ao_b {
- mux {
- groups = "pwm_ao_b";
- function = "pwm_ao_b";
- bias-disable;
- };
- };
-
- pwm_ao_b_6_pins: pwm_ao_b_6 {
- mux {
- groups = "pwm_ao_b_6";
- function = "pwm_ao_b";
- bias-disable;
- };
- };
-
- i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
- mux {
- groups = "i2s_out_ch23_ao";
- function = "i2s_out_ao";
- bias-disable;
- };
- };
-
- i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
- mux {
- groups = "i2s_out_ch45_ao";
- function = "i2s_out_ao";
- bias-disable;
- };
- };
-
- spdif_out_ao_6_pins: spdif_out_ao_6 {
- mux {
- groups = "spdif_out_ao_6";
- function = "spdif_out_ao";
- bias-disable;
- };
- };
-
- spdif_out_ao_9_pins: spdif_out_ao_9 {
- mux {
- groups = "spdif_out_ao_9";
- function = "spdif_out_ao";
- bias-disable;
- };
- };
-
- ao_cec_pins: ao_cec {
- mux {
- groups = "ao_cec";
- function = "cec_ao";
- bias-disable;
- };
- };
-
- ee_cec_pins: ee_cec {
- mux {
- groups = "ee_cec";
- function = "cec_ao";
- bias-disable;
- };
- };
- };
-};
-
-&cec_AO {
- clocks = <&clkc_AO CLKID_AO_CEC_32K>;
- clock-names = "core";
-};
-
-&clkc_AO {
- compatible = "amlogic,meson-gxl-aoclkc", "amlogic,meson-gx-aoclkc";
- clocks = <&xtal>, <&clkc CLKID_CLK81>;
- clock-names = "xtal", "mpeg-clk";
-};
-
-&gpio_intc {
- compatible = "amlogic,meson-gxl-gpio-intc",
- "amlogic,meson-gpio-intc";
- status = "okay";
-};
-
-&hdmi_tx {
- compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
- resets = <&reset RESET_HDMITX_CAPB3>,
- <&reset RESET_HDMI_SYSTEM_RESET>,
- <&reset RESET_HDMI_TX>;
- reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
- clocks = <&clkc CLKID_HDMI_PCLK>,
- <&clkc CLKID_CLK81>,
- <&clkc CLKID_GCLK_VENCI_INT0>;
- clock-names = "isfr", "iahb", "venci";
-};
-
-&sysctrl {
- clkc: clock-controller {
- compatible = "amlogic,gxl-clkc";
- #clock-cells = <1>;
- clocks = <&xtal>;
- clock-names = "xtal";
- };
-};
-
-&hwrng {
- clocks = <&clkc CLKID_RNG0>;
- clock-names = "core";
-};
-
-&i2c_A {
- clocks = <&clkc CLKID_I2C>;
-};
-
-&i2c_AO {
- clocks = <&clkc CLKID_AO_I2C>;
-};
-
-&i2c_B {
- clocks = <&clkc CLKID_I2C>;
-};
-
-&i2c_C {
- clocks = <&clkc CLKID_I2C>;
-};
-
-&periphs {
- pinctrl_periphs: pinctrl@4b0 {
- compatible = "amlogic,meson-gxl-periphs-pinctrl";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- gpio: bank@4b0 {
- reg = <0x0 0x004b0 0x0 0x28>,
- <0x0 0x004e8 0x0 0x14>,
- <0x0 0x00520 0x0 0x14>,
- <0x0 0x00430 0x0 0x40>;
- reg-names = "mux", "pull", "pull-enable", "gpio";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pinctrl_periphs 0 0 100>;
- };
-
- emmc_pins: emmc {
- mux-0 {
- groups = "emmc_nand_d07",
- "emmc_cmd";
- function = "emmc";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "emmc_clk";
- function = "emmc";
- bias-disable;
- };
- };
-
- emmc_ds_pins: emmc-ds {
- mux {
- groups = "emmc_ds";
- function = "emmc";
- bias-pull-down;
- };
- };
-
- emmc_clk_gate_pins: emmc_clk_gate {
- mux {
- groups = "BOOT_8";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- nor_pins: nor {
- mux {
- groups = "nor_d",
- "nor_q",
- "nor_c",
- "nor_cs";
- function = "nor";
- bias-disable;
- };
- };
-
- spi_pins: spi-pins {
- mux {
- groups = "spi_miso",
- "spi_mosi",
- "spi_sclk";
- function = "spi";
- bias-disable;
- };
- };
-
- spi_idle_high_pins: spi-idle-high-pins {
- mux {
- groups = "spi_sclk";
- bias-pull-up;
- };
- };
-
- spi_idle_low_pins: spi-idle-low-pins {
- mux {
- groups = "spi_sclk";
- bias-pull-down;
- };
- };
-
- spi_ss0_pins: spi-ss0 {
- mux {
- groups = "spi_ss0";
- function = "spi";
- bias-disable;
- };
- };
-
- sdcard_pins: sdcard {
- mux-0 {
- groups = "sdcard_d0",
- "sdcard_d1",
- "sdcard_d2",
- "sdcard_d3",
- "sdcard_cmd";
- function = "sdcard";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "sdcard_clk";
- function = "sdcard";
- bias-disable;
- };
- };
-
- sdcard_clk_gate_pins: sdcard_clk_gate {
- mux {
- groups = "CARD_2";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- sdio_pins: sdio {
- mux-0 {
- groups = "sdio_d0",
- "sdio_d1",
- "sdio_d2",
- "sdio_d3",
- "sdio_cmd";
- function = "sdio";
- bias-pull-up;
- };
-
- mux-1 {
- groups = "sdio_clk";
- function = "sdio";
- bias-disable;
- };
- };
-
- sdio_clk_gate_pins: sdio_clk_gate {
- mux {
- groups = "GPIOX_4";
- function = "gpio_periphs";
- bias-pull-down;
- };
- };
-
- sdio_irq_pins: sdio_irq {
- mux {
- groups = "sdio_irq";
- function = "sdio";
- bias-disable;
- };
- };
-
- uart_a_pins: uart_a {
- mux {
- groups = "uart_tx_a",
- "uart_rx_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_a_cts_rts_pins: uart_a_cts_rts {
- mux {
- groups = "uart_cts_a",
- "uart_rts_a";
- function = "uart_a";
- bias-disable;
- };
- };
-
- uart_b_pins: uart_b {
- mux {
- groups = "uart_tx_b",
- "uart_rx_b";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_b_cts_rts_pins: uart_b_cts_rts {
- mux {
- groups = "uart_cts_b",
- "uart_rts_b";
- function = "uart_b";
- bias-disable;
- };
- };
-
- uart_c_pins: uart_c {
- mux {
- groups = "uart_tx_c",
- "uart_rx_c";
- function = "uart_c";
- bias-disable;
- };
- };
-
- uart_c_cts_rts_pins: uart_c_cts_rts {
- mux {
- groups = "uart_cts_c",
- "uart_rts_c";
- function = "uart_c";
- bias-disable;
- };
- };
-
- i2c_a_pins: i2c_a {
- mux {
- groups = "i2c_sck_a",
- "i2c_sda_a";
- function = "i2c_a";
- bias-disable;
- };
- };
-
- i2c_b_pins: i2c_b {
- mux {
- groups = "i2c_sck_b",
- "i2c_sda_b";
- function = "i2c_b";
- bias-disable;
- };
- };
-
- i2c_c_pins: i2c_c {
- mux {
- groups = "i2c_sck_c",
- "i2c_sda_c";
- function = "i2c_c";
- bias-disable;
- };
- };
-
- i2c_c_dv18_pins: i2c_c_dv18 {
- mux {
- groups = "i2c_sck_c_dv19",
- "i2c_sda_c_dv18";
- function = "i2c_c";
- bias-disable;
- };
- };
-
- eth_pins: eth_c {
- mux {
- groups = "eth_mdio",
- "eth_mdc",
- "eth_clk_rx_clk",
- "eth_rx_dv",
- "eth_rxd0",
- "eth_rxd1",
- "eth_rxd2",
- "eth_rxd3",
- "eth_rgmii_tx_clk",
- "eth_tx_en",
- "eth_txd0",
- "eth_txd1",
- "eth_txd2",
- "eth_txd3";
- function = "eth";
- bias-disable;
- };
- };
-
- eth_link_led_pins: eth_link_led {
- mux {
- groups = "eth_link_led";
- function = "eth_led";
- bias-disable;
- };
- };
-
- eth_act_led_pins: eth_act_led {
- mux {
- groups = "eth_act_led";
- function = "eth_led";
- };
- };
-
- pwm_a_pins: pwm_a {
- mux {
- groups = "pwm_a";
- function = "pwm_a";
- bias-disable;
- };
- };
-
- pwm_b_pins: pwm_b {
- mux {
- groups = "pwm_b";
- function = "pwm_b";
- bias-disable;
- };
- };
-
- pwm_c_pins: pwm_c {
- mux {
- groups = "pwm_c";
- function = "pwm_c";
- bias-disable;
- };
- };
-
- pwm_d_pins: pwm_d {
- mux {
- groups = "pwm_d";
- function = "pwm_d";
- bias-disable;
- };
- };
-
- pwm_e_pins: pwm_e {
- mux {
- groups = "pwm_e";
- function = "pwm_e";
- bias-disable;
- };
- };
-
- pwm_f_clk_pins: pwm_f_clk {
- mux {
- groups = "pwm_f_clk";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- pwm_f_x_pins: pwm_f_x {
- mux {
- groups = "pwm_f_x";
- function = "pwm_f";
- bias-disable;
- };
- };
-
- hdmi_hpd_pins: hdmi_hpd {
- mux {
- groups = "hdmi_hpd";
- function = "hdmi_hpd";
- bias-disable;
- };
- };
-
- hdmi_i2c_pins: hdmi_i2c {
- mux {
- groups = "hdmi_sda", "hdmi_scl";
- function = "hdmi_i2c";
- bias-disable;
- };
- };
-
- i2s_am_clk_pins: i2s_am_clk {
- mux {
- groups = "i2s_am_clk";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2s_out_ao_clk_pins: i2s_out_ao_clk {
- mux {
- groups = "i2s_out_ao_clk";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2s_out_lr_clk_pins: i2s_out_lr_clk {
- mux {
- groups = "i2s_out_lr_clk";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2s_out_ch01_pins: i2s_out_ch01 {
- mux {
- groups = "i2s_out_ch01";
- function = "i2s_out";
- bias-disable;
- };
- };
- i2sout_ch23_z_pins: i2sout_ch23_z {
- mux {
- groups = "i2sout_ch23_z";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2sout_ch45_z_pins: i2sout_ch45_z {
- mux {
- groups = "i2sout_ch45_z";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- i2sout_ch67_z_pins: i2sout_ch67_z {
- mux {
- groups = "i2sout_ch67_z";
- function = "i2s_out";
- bias-disable;
- };
- };
-
- spdif_out_h_pins: spdif_out_ao_h {
- mux {
- groups = "spdif_out_h";
- function = "spdif_out";
- bias-disable;
- };
- };
- };
-
- eth_phy_mux: mdio@558 {
- reg = <0x0 0x558 0x0 0xc>;
- compatible = "amlogic,gxl-mdio-mux";
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "ref";
- mdio-parent-bus = <&mdio0>;
-
- external_mdio: mdio@0 {
- reg = <0x0>;
- #address-cells = <1>;
- #size-cells = <0>;
- };
-
- internal_mdio: mdio@1 {
- reg = <0x1>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- internal_phy: ethernet-phy@8 {
- compatible = "ethernet-phy-id0181.4400";
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- reg = <8>;
- max-speed = <100>;
- };
- };
- };
-};
-
-&pwrc {
- resets = <&reset RESET_VIU>,
- <&reset RESET_VENC>,
- <&reset RESET_VCBUS>,
- <&reset RESET_BT656>,
- <&reset RESET_DVIN_RESET>,
- <&reset RESET_RDMA>,
- <&reset RESET_VENCI>,
- <&reset RESET_VENCP>,
- <&reset RESET_VDAC>,
- <&reset RESET_VDI6>,
- <&reset RESET_VENCL>,
- <&reset RESET_VID_LOCK>;
- reset-names = "viu", "venc", "vcbus", "bt656",
- "dvin", "rdma", "venci", "vencp",
- "vdac", "vdi6", "vencl", "vid_lock";
- clocks = <&clkc CLKID_VPU>,
- <&clkc CLKID_VAPB>;
- clock-names = "vpu", "vapb";
- /*
- * VPU clocking is provided by two identical clock paths
- * VPU_0 and VPU_1 muxed to a single clock by a glitch
- * free mux to safely change frequency while running.
- * Same for VAPB but with a final gate after the glitch free mux.
- */
- assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_VPU>, /* Glitch free mux */
- <&clkc CLKID_VAPB_0_SEL>,
- <&clkc CLKID_VAPB_0>,
- <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
- assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VPU_0>,
- <&clkc CLKID_FCLK_DIV4>,
- <0>, /* Do Nothing */
- <&clkc CLKID_VAPB_0>;
- assigned-clock-rates = <0>, /* Do Nothing */
- <666666666>,
- <0>, /* Do Nothing */
- <0>, /* Do Nothing */
- <250000000>,
- <0>; /* Do Nothing */
-};
-
-&saradc {
- compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
- clocks = <&xtal>,
- <&clkc CLKID_SAR_ADC>,
- <&clkc CLKID_SAR_ADC_CLK>,
- <&clkc CLKID_SAR_ADC_SEL>;
- clock-names = "clkin", "core", "adc_clk", "adc_sel";
-};
-
-&sd_emmc_a {
- clocks = <&clkc CLKID_SD_EMMC_A>,
- <&clkc CLKID_SD_EMMC_A_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_A>;
-};
-
-&sd_emmc_b {
- clocks = <&clkc CLKID_SD_EMMC_B>,
- <&clkc CLKID_SD_EMMC_B_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_B>;
-};
-
-&sd_emmc_c {
- clocks = <&clkc CLKID_SD_EMMC_C>,
- <&clkc CLKID_SD_EMMC_C_CLK0>,
- <&clkc CLKID_FCLK_DIV2>;
- clock-names = "core", "clkin0", "clkin1";
- resets = <&reset RESET_SD_EMMC_C>;
-};
-
-&simplefb_hdmi {
- clocks = <&clkc CLKID_HDMI_PCLK>,
- <&clkc CLKID_CLK81>,
- <&clkc CLKID_GCLK_VENCI_INT0>;
-};
-
-&spicc {
- clocks = <&clkc CLKID_SPICC>;
- clock-names = "core";
- resets = <&reset RESET_PERIPHS_SPICC>;
- num-cs = <1>;
-};
-
-&spifc {
- clocks = <&clkc CLKID_SPI>;
-};
-
-&uart_A {
- clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_AO {
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_AO_B {
- clocks = <&xtal>, <&clkc_AO CLKID_AO_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_B {
- clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&uart_C {
- clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
- clock-names = "xtal", "pclk", "baud";
-};
-
-&vpu {
- compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
- power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
-};
-
-&vdec {
- compatible = "amlogic,gxl-vdec", "amlogic,gx-vdec";
- clocks = <&clkc CLKID_DOS_PARSER>,
- <&clkc CLKID_DOS>,
- <&clkc CLKID_VDEC_1>,
- <&clkc CLKID_VDEC_HEVC>;
- clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
- resets = <&reset RESET_PARSER>;
- reset-names = "esparser";
-};
diff --git a/arch/arm/dts/meson-gxm-gt1-ultimate.dts b/arch/arm/dts/meson-gxm-gt1-ultimate.dts
deleted file mode 100644
index 2c26788..0000000
--- a/arch/arm/dts/meson-gxm-gt1-ultimate.dts
+++ /dev/null
@@ -1,91 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include "meson-gx-p23x-q20x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
- compatible = "azw,gt1-ultimate", "amlogic,s912", "amlogic,meson-gxm";
- model = "Beelink GT1 Ultimate";
-
- leds {
- compatible = "gpio-leds";
-
- led-white {
- color = <LED_COLOR_ID_WHITE>;
- function = LED_FUNCTION_POWER;
- gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- panic-indicator;
- };
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "update";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <10000>;
- };
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>;
- pinctrl-names = "default";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
- phy-mode = "rgmii";
-};
-
-&external_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_15 */
- interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-beelink-gs1";
-};
-
-&sd_emmc_a {
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts
deleted file mode 100644
index 74897a1..0000000
--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts
+++ /dev/null
@@ -1,424 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
- * Copyright (c) 2017 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/sound/meson-aiu.h>
-
-/ {
- compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm";
- model = "Khadas VIM2";
-
- aliases {
- serial0 = &uart_AO;
- serial2 = &uart_AO_B;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
- };
-
- gpio_fan: gpio-fan {
- compatible = "gpio-fan";
- gpios = <&gpio GPIODV_14 GPIO_ACTIVE_HIGH
- &gpio GPIODV_15 GPIO_ACTIVE_HIGH>;
- /* Dummy RPM values since fan is optional */
- gpio-fan,speed-map =
- <0 0>,
- <1 1>,
- <2 2>,
- <3 3>;
- #cooling-cells = <2>;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- led-controller {
- compatible = "pwm-leds";
-
- led-1 {
- label = "vim:red:power";
- pwms = <&pwm_AO_ab 1 7812500 0>;
- max-brightness = <255>;
- linux,default-trigger = "default-on";
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- hdmi_5v: regulator-hdmi-5v {
- compatible = "regulator-fixed";
-
- regulator-name = "HDMI_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-
- gpio = <&gpio GPIOH_3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- vddio_ao18: regulator-vddio_ao18 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO18";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddio_boot: regulator-vddio_boot {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_BOOT";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "KHADAS-VIM2";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&aiu {
- status = "okay";
-};
-
-&cec_AO {
- status = "okay";
- pinctrl-0 = <&ao_cec_pins>;
- pinctrl-names = "default";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu_cooling_maps {
- map0 {
- cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>;
- };
-
- map1 {
- cooling-device = <&gpio_fan 2 THERMAL_NO_LIMIT>,
- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>;
- pinctrl-names = "default";
-
- /* Select external PHY by default */
- phy-handle = <&external_phy>;
-
- amlogic,tx-delay-ns = <2>;
-
- /* External PHY is in RGMII */
- phy-mode = "rgmii";
-
- status = "okay";
-};
-
-&external_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
-
- reset-assert-us = <10000>;
- reset-deassert-us = <80000>;
- reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_15 */
- interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&hdmi_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c_A {
- status = "okay";
- pinctrl-0 = <&i2c_a_pins>;
- pinctrl-names = "default";
-};
-
-&i2c_B {
- status = "okay";
- pinctrl-0 = <&i2c_b_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- status = "okay";
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- clock-output-names = "xin32k";
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- linux,rc-map-name = "rc-khadas";
-};
-
-&pwm_AO_ab {
- status = "okay";
- pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
- pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
-};
-
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_pins>;
- pinctrl-1 = <&sdcard_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&vddio_boot>;
-};
-
-/*
- * EMMC_DS pin is shared between SPI NOR CS and eMMC Data Strobe
- * Remove emmc_ds_pins from sd_emmc_c pinctrl-0 then spifc can be enabled
- */
-&spifc {
- status = "disabled";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- w25q32: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,w25q16", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-/* This one is connected to the Bluetooth module */
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
-&uart_AO_B {
- status = "okay";
- pinctrl-0 = <&uart_ao_b_pins>;
- pinctrl-names = "default";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao18>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
-};
diff --git a/arch/arm/dts/meson-gxm-s912-libretech-pc.dts b/arch/arm/dts/meson-gxm-s912-libretech-pc.dts
deleted file mode 100644
index 444c249..0000000
--- a/arch/arm/dts/meson-gxm-s912-libretech-pc.dts
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include "meson-gx-libretech-pc.dtsi"
-
-/ {
- compatible = "libretech,aml-s912-pc", "amlogic,s912",
- "amlogic,meson-gxm";
- model = "Libre Computer AML-S912-PC";
-
- typec2_vbus: regulator-typec2_vbus {
- compatible = "regulator-fixed";
- regulator-name = "TYPEC2_VBUS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc5v>;
-
- gpio = <&gpio GPIODV_1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&pinctrl_periphs {
- /*
- * Make sure the irq pin of the TYPE C controller is not driven
- * by the SoC.
- */
- fusb302_irq_pins: fusb302_irq {
- mux {
- groups = "GPIODV_0";
- function = "gpio_periphs";
- bias-pull-up;
- output-disable;
- };
- };
-};
-
-&i2c_C {
- fusb302@22 {
- compatible = "fcs,fusb302";
- reg = <0x22>;
-
- pinctrl-0 = <&fusb302_irq_pins>;
- pinctrl-names = "default";
- interrupt-parent = <&gpio_intc>;
- interrupts = <59 IRQ_TYPE_LEVEL_LOW>;
-
- vbus-supply = <&typec2_vbus>;
-
- status = "okay";
- };
-};
-
-&usb2_phy2 {
- phy-supply = <&typec2_vbus>;
-};
diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts
deleted file mode 100644
index f8c4034..0000000
--- a/arch/arm/dts/meson-gxm-wetek-core2.dts
+++ /dev/null
@@ -1,85 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-gxm.dtsi"
-#include "meson-gx-p23x-q20x.dtsi"
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-
-/ {
- compatible = "wetek,core2", "amlogic,s912", "amlogic,meson-gxm";
- model = "WeTek Core 2";
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>; /* 2 GiB or 3 GiB */
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 0>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-update {
- label = "update";
- linux,code = <KEY_VENDOR>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- button-power {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-/* Disabled as Realtek RTL8152 USB provides Ethernet */
-ðmac {
- status = "disabled";
-};
-
-&internal_phy {
- status = "disabled";
-};
-
-&ir {
- linux,rc-map-name = "rc-wetek-play2";
-};
-
-/* This is connected to the Bluetooth module: */
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi
deleted file mode 100644
index 411cc31..0000000
--- a/arch/arm/dts/meson-gxm.dtsi
+++ /dev/null
@@ -1,216 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2016 Endless Computers, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#include "meson-gxl.dtsi"
-
-/ {
- compatible = "amlogic,meson-gxm";
-
- cpus {
- cpu-map {
- cluster0 {
- core0 {
- cpu = <&cpu0>;
- };
- core1 {
- cpu = <&cpu1>;
- };
- core2 {
- cpu = <&cpu2>;
- };
- core3 {
- cpu = <&cpu3>;
- };
- };
-
- cluster1 {
- core0 {
- cpu = <&cpu4>;
- };
- core1 {
- cpu = <&cpu5>;
- };
- core2 {
- cpu = <&cpu6>;
- };
- core3 {
- cpu = <&cpu7>;
- };
- };
- };
-
- cpu0: cpu@0 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu1: cpu@1 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu2: cpu@2 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu3: cpu@3 {
- capacity-dmips-mhz = <1024>;
- };
-
- cpu4: cpu@100 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x100>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
-
- cpu5: cpu@101 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x101>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
-
- cpu6: cpu@102 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x102>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
-
- cpu7: cpu@103 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- reg = <0x0 0x103>;
- enable-method = "psci";
- capacity-dmips-mhz = <1024>;
- next-level-cache = <&l2>;
- clocks = <&scpi_dvfs 1>;
- #cooling-cells = <2>;
- };
- };
-
- gpu_opp_table: opp-table {
- compatible = "operating-points-v2";
-
- opp-125000000 {
- opp-hz = /bits/ 64 <125000000>;
- opp-microvolt = <950000>;
- };
- opp-250000000 {
- opp-hz = /bits/ 64 <250000000>;
- opp-microvolt = <950000>;
- };
- opp-285714285 {
- opp-hz = /bits/ 64 <285714285>;
- opp-microvolt = <950000>;
- };
- opp-400000000 {
- opp-hz = /bits/ 64 <400000000>;
- opp-microvolt = <950000>;
- };
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <950000>;
- };
- opp-666666666 {
- opp-hz = /bits/ 64 <666666666>;
- opp-microvolt = <950000>;
- };
- };
-};
-
-&apb {
- usb2_phy2: phy@78040 {
- compatible = "amlogic,meson-gxl-usb2-phy";
- #phy-cells = <0>;
- reg = <0x0 0x78040 0x0 0x20>;
- clocks = <&clkc CLKID_USB>;
- clock-names = "phy";
- resets = <&reset RESET_USB_OTG>;
- reset-names = "phy";
- status = "okay";
- };
-
- mali: gpu@c0000 {
- compatible = "amlogic,meson-gxm-mali", "arm,mali-t820";
- reg = <0x0 0xc0000 0x0 0x40000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "job", "mmu", "gpu";
- clocks = <&clkc CLKID_MALI>;
- resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>;
- operating-points-v2 = <&gpu_opp_table>;
- };
-};
-
-&clkc_AO {
- compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc";
-};
-
-&cpu_cooling_maps {
- map0 {
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-};
-
-&saradc {
- compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc";
-};
-
-&scpi_dvfs {
- clock-indices = <0 1>;
- clock-output-names = "vbig", "vlittle";
-};
-
-&vpu {
- compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
-};
-
-&hdmi_tx {
- compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
-};
-
-&usb {
- compatible = "amlogic,meson-gxm-usb-ctrl";
-
- phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2";
- phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>;
-};
-
-&vdec {
- compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec";
-};
diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi
deleted file mode 100644
index 3cf4ecb..0000000
--- a/arch/arm/dts/meson-khadas-vim3.dtsi
+++ /dev/null
@@ -1,534 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
- */
-
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x80000000>;
- };
-
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1710000>;
-
- button-function {
- label = "Function";
- linux,code = <KEY_FN>;
- press-threshold-microvolt = <10000>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-white {
- color = <LED_COLOR_ID_WHITE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
-
- led-red {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>;
- };
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <100>;
-
- power-button {
- label = "power";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "VCC_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vsys_3v3>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vsys_3v3: regulator-vsys_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VSYS_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- usb_pwr: regulator-usb_pwr {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- gpio = <&gpio GPIOA_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "KHADAS-VIM3";
- audio-aux-devs = <&tdmin_a>, <&tdmout_a>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 3", "TDM_A Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- /* hdmi glue */
- dai-link-7 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cpu_thermal {
- trips {
- cpu_active: cpu-active {
- temperature = <80000>; /* millicelsius */
- hysteresis = <2000>; /* millicelsius */
- type = "active";
- };
- };
-
- cooling-maps {
- map {
- trip = <&cpu_active>;
- cooling-device = <&khadas_mcu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c_AO {
- status = "okay";
- pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
- pinctrl-names = "default";
-
- khadas_mcu: system-controller@18 {
- compatible = "khadas,mcu";
- reg = <0x18>;
- #cooling-cells = <2>;
- };
-
- gpio_expander: gpio-controller@20 {
- compatible = "ti,tca6408";
- reg = <0x20>;
- vcc-supply = <&vcc_3v3>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- rtc: rtc@51 {
- compatible = "haoyu,hym8563";
- reg = <0x51>;
- #clock-cells = <0>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
- linux,rc-map-name = "rc-khadas";
-};
-
-&pcie {
- reset-gpios = <&gpio GPIOA_8 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vddao_1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vsys_3v3>;
- vqmmc-supply = <&vsys_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-/*
- * EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR CS
- * and eMMC Data 4 to 7 pins.
- * Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
- * and change bus-width to 4 then spifc can be enabled.
- */
-&spifc {
- status = "disabled";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- w25q128: spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "winbond,w25q128fw", "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&tdmif_a {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- };
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb2_phy0 {
- phy-supply = <&dc_in>;
-};
-
-&usb2_phy1 {
- phy-supply = <&usb_pwr>;
-};
-
-&usb3_pcie_phy {
- phy-supply = <&usb_pwr>;
-};
-
-&usb {
- status = "okay";
- dr_mode = "peripheral";
-};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
deleted file mode 100644
index 5860343..0000000
--- a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
+++ /dev/null
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-bananapi.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "bananapi,bpi-m2-pro", "amlogic,sm1";
- model = "Banana Pi BPI-M2-PRO";
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-M2-PRO";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts b/arch/arm/dts/meson-sm1-bananapi-m5.dts
deleted file mode 100644
index f045bf8..0000000
--- a/arch/arm/dts/meson-sm1-bananapi-m5.dts
+++ /dev/null
@@ -1,221 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-bananapi.dtsi"
-#include <dt-bindings/sound/meson-g12a-toacodec.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "bananapi,bpi-m5", "amlogic,sm1";
- model = "Banana Pi BPI-M5";
-
- /* TOFIX: handle CVBS_DET on SARADC channel 0 */
- cvbs-connector {
- compatible = "composite-video-connector";
-
- port {
- cvbs_connector_in: endpoint {
- remote-endpoint = <&cvbs_vdac_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "BPI-M5";
- audio-widgets = "Line", "Lineout";
- audio-aux-devs = <&tdmout_b>, <&tdmout_c>,
- <&tdmin_a>, <&tdmin_b>, <&tdmin_c>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TDMOUT_C IN 0", "FRDDR_A OUT 2",
- "TDMOUT_C IN 1", "FRDDR_B OUT 2",
- "TDMOUT_C IN 2", "FRDDR_C OUT 2",
- "TDM_C Playback", "TDMOUT_C OUT",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TDMIN_C IN 4", "TDM_B Loopback",
- "TDMIN_A IN 5", "TDM_C Loopback",
- "TDMIN_B IN 5", "TDM_C Loopback",
- "TDMIN_C IN 5", "TDM_C Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT",
- "TODDR_A IN 2", "TDMIN_C OUT",
- "TODDR_B IN 2", "TDMIN_C OUT",
- "TODDR_C IN 2", "TDMIN_C OUT",
- "Lineout", "ACODEC LOLP",
- "Lineout", "ACODEC LORP";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-6 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_B>;
- };
- };
-
- /* i2s jack output interface */
- dai-link-7 {
- sound-dai = <&tdmif_c>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>;
- };
-
- codec-1 {
- sound-dai = <&toacodec TOACODEC_IN_C>;
- };
- };
-
- /* hdmi glue */
- dai-link-8 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
-
- /* acodec glue */
- dai-link-9 {
- sound-dai = <&toacodec TOACODEC_OUT>;
-
- codec {
- sound-dai = <&acodec>;
- };
- };
- };
-};
-
-&acodec {
- AVDD-supply = <&vddao_1v8>;
- status = "okay";
-};
-
-
-&clkc_audio {
- status = "okay";
-};
-
-&cvbs_vdac_port {
- cvbs_vdac_out: endpoint {
- remote-endpoint = <&cvbs_connector_in>;
- };
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmif_c {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmin_c {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tdmout_c {
- status = "okay";
-};
-
-&toacodec {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
diff --git a/arch/arm/dts/meson-sm1-bananapi.dtsi b/arch/arm/dts/meson-sm1-bananapi.dtsi
deleted file mode 100644
index 17045ff..0000000
--- a/arch/arm/dts/meson-sm1-bananapi.dtsi
+++ /dev/null
@@ -1,435 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 BayLibre SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-sm1.dtsi"
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-
-/ {
- adc-keys {
- compatible = "adc-keys";
- io-channels = <&saradc 2>;
- io-channel-names = "buttons";
- keyup-threshold-microvolt = <1800000>;
-
- button-sw3 {
- label = "SW3";
- linux,code = <BTN_3>;
- press-threshold-microvolt = <1700000>;
- };
- };
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key {
- label = "SW1";
- linux,code = <BTN_1>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-green {
- color = <LED_COLOR_ID_GREEN>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- };
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- vddio_c: regulator-vddio_c {
- compatible = "regulator-gpio";
- regulator-name = "VDDIO_C";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
-
- enable-gpios = <&gpio_ao GPIOE_2 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
-
- gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>;
- gpios-states = <1>;
-
- states = <1800000 0>,
- <3300000 1>;
- };
-
- tflash_vdd: regulator-tflash_vdd {
- compatible = "regulator-fixed";
- regulator-name = "TFLASH_VDD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- pwm-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- /* USB Hub Power Enable */
- vl_pwr_en: regulator-vl_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "VL_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
-
- gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii-txid";
- phy-handle = <&external_phy>;
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "ETH_MDIO", /* GPIOZ_0 */
- "ETH_MDC", /* GPIOZ_1 */
- "ETH_RXCLK", /* GPIOZ_2 */
- "ETH_RX_DV", /* GPIOZ_3 */
- "ETH_RXD0", /* GPIOZ_4 */
- "ETH_RXD1", /* GPIOZ_5 */
- "ETH_RXD2", /* GPIOZ_6 */
- "ETH_RXD3", /* GPIOZ_7 */
- "ETH_TXCLK", /* GPIOZ_8 */
- "ETH_TXEN", /* GPIOZ_9 */
- "ETH_TXD0", /* GPIOZ_10 */
- "ETH_TXD1", /* GPIOZ_11 */
- "ETH_TXD2", /* GPIOZ_12 */
- "ETH_TXD3", /* GPIOZ_13 */
- "ETH_INTR", /* GPIOZ_14 */
- "ETH_NRST", /* GPIOZ_15 */
- /* GPIOH */
- "HDMI_SDA", /* GPIOH_0 */
- "HDMI_SCL", /* GPIOH_1 */
- "HDMI_HPD", /* GPIOH_2 */
- "HDMI_CEC", /* GPIOH_3 */
- "VL-RST_N", /* GPIOH_4 */
- "CON1-P36", /* GPIOH_5 */
- "VL-PWREN", /* GPIOH_6 */
- "WiFi_3V3_1V8", /* GPIOH_7 */
- "TFLASH_VDD_EN", /* GPIOH_8 */
- /* BOOT */
- "eMMC_D0", /* BOOT_0 */
- "eMMC_D1", /* BOOT_1 */
- "eMMC_D2", /* BOOT_2 */
- "eMMC_D3", /* BOOT_3 */
- "eMMC_D4", /* BOOT_4 */
- "eMMC_D5", /* BOOT_5 */
- "eMMC_D6", /* BOOT_6 */
- "eMMC_D7", /* BOOT_7 */
- "eMMC_CLK", /* BOOT_8 */
- "",
- "eMMC_CMD", /* BOOT_10 */
- "",
- "eMMC_RST#", /* BOOT_12 */
- "eMMC_DS", /* BOOT_13 */
- "", "",
- /* GPIOC */
- "SD_D0_B", /* GPIOC_0 */
- "SD_D1_B", /* GPIOC_1 */
- "SD_D2_B", /* GPIOC_2 */
- "SD_D3_B", /* GPIOC_3 */
- "SD_CLK_B", /* GPIOC_4 */
- "SD_CMD_B", /* GPIOC_5 */
- "CARD_EN_DET", /* GPIOC_6 */
- "",
- /* GPIOA */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "",
- "CON1-P27", /* GPIOA_14 */
- "CON1-P28", /* GPIOA_15 */
- /* GPIOX */
- "CON1-P16", /* GPIOX_0 */
- "CON1-P18", /* GPIOX_1 */
- "CON1-P22", /* GPIOX_2 */
- "CON1-P11", /* GPIOX_3 */
- "CON1-P13", /* GPIOX_4 */
- "CON1-P07", /* GPIOX_5 */
- "CON1-P33", /* GPIOX_6 */
- "CON1-P15", /* GPIOX_7 */
- "CON1-P19", /* GPIOX_8 */
- "CON1-P21", /* GPIOX_9 */
- "CON1-P24", /* GPIOX_10 */
- "CON1-P23", /* GPIOX_11 */
- "CON1-P08", /* GPIOX_12 */
- "CON1-P10", /* GPIOX_13 */
- "CON1-P29", /* GPIOX_14 */
- "CON1-P31", /* GPIOX_15 */
- "CON1-P26", /* GPIOX_16 */
- "CON1-P03", /* GPIOX_17 */
- "CON1-P05", /* GPIOX_18 */
- "CON1-P32"; /* GPIOX_19 */
-
- /*
- * WARNING: The USB Hub needs a reset signal to be turned high in
- * order to be detected by the USB Controller. This signal should
- * be handled by a USB specific power sequence to reset the Hub
- * when the USB bus is powered down.
- */
- usb-hub-hog {
- gpio-hog;
- gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
-&gpio_ao {
- gpio-line-names =
- /* GPIOAO */
- "DEBUG TX", /* GPIOAO_0 */
- "DEBUG RX", /* GPIOAO_1 */
- "SYS_LED2", /* GPIOAO_2 */
- "UPDATE_KEY", /* GPIOAO_3 */
- "CON1-P40", /* GPIOAO_4 */
- "IR_IN", /* GPIOAO_5 */
- "TF_3V3N_1V8_EN", /* GPIOAO_6 */
- "CON1-P35", /* GPIOAO_7 */
- "CON1-P12", /* GPIOAO_8 */
- "CON1-P37", /* GPIOAO_9 */
- "CON1-P38", /* GPIOAO_10 */
- "SYS_LED", /* GPIOAO_11 */
- /* GPIOE */
- "VDDEE_PWM", /* GPIOE_0 */
- "VDDCPU_PWM", /* GPIOE_1 */
- "TF_PWR_EN"; /* GPIOE_2 */
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&dc_in>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddao_1v8>;
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- /* TOFIX: SD card is barely usable in SDR modes */
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&vddio_c>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
-};
-
-&usb2_phy0 {
- phy-supply = <&dc_in>;
-};
-
-&usb2_phy1 {
- /* Enable the hub which is connected to this port */
- phy-supply = <&vl_pwr_en>;
-};
diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts
deleted file mode 100644
index f2c0981..0000000
--- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts
+++ /dev/null
@@ -1,113 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1.dtsi"
-#include "meson-khadas-vim3.dtsi"
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "khadas,vim3l", "amlogic,sm1";
- model = "Khadas VIM3L";
-
- vddcpu: regulator-vddcpu {
- /*
- * Silergy SY8030DEC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&vsys_3v3>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- sound {
- model = "G12B-KHADAS-VIM3L";
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 13", "TDM_A Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT";
- };
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-/*
- * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
- * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
- * an USB3.0 Type A connector and a M.2 Key M slot.
- * The PHY driving these differential lines is shared between
- * the USB3.0 controller and the PCIe Controller, thus only
- * a single controller can use it.
- * If the MCU is configured to mux the PCIe/USB3.0 differential lines
- * to the M.2 Key M slot, uncomment the following block to disable
- * USB3.0 from the USB Complex and enable the PCIe controller.
- * The End User is not expected to uncomment the following except for
- * testing purposes, but instead rely on the firmware/bootloader to
- * update these nodes accordingly if PCIe mode is selected by the MCU.
- */
-/*
-&pcie {
- status = "okay";
-};
-
-&usb {
- phys = <&usb2_phy0>, <&usb2_phy1>;
- phy-names = "usb2-phy0", "usb2-phy1";
-};
- */
-
-&sd_emmc_a {
- sd-uhs-sdr50;
-};
diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts
deleted file mode 100644
index 8c30ce6..0000000
--- a/arch/arm/dts/meson-sm1-odroid-c4.dts
+++ /dev/null
@@ -1,48 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-odroid.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-c4", "amlogic,sm1";
- model = "Hardkernel ODROID-C4";
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
- };
-
- sound {
- model = "ODROID-C4";
- };
-};
-
-&gpio {
- /*
- * WARNING: The USB Hub on the Odroid-C4 needs a reset signal
- * to be turned high in order to be detected by the USB Controller
- * This signal should be handled by a USB specific power sequence
- * in order to reset the Hub when USB bus is powered down.
- */
- hog-0 {
- gpio-hog;
- gpios = <GPIOH_4 GPIO_ACTIVE_HIGH>;
- output-high;
- line-name = "usb-hub-reset";
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-odroid";
-};
diff --git a/arch/arm/dts/meson-sm1-odroid-hc4.dts b/arch/arm/dts/meson-sm1-odroid-hc4.dts
deleted file mode 100644
index f3f9532..0000000
--- a/arch/arm/dts/meson-sm1-odroid-hc4.dts
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
- */
-
-/dts-v1/;
-
-#include "meson-sm1-odroid.dtsi"
-
-/ {
- compatible = "hardkernel,odroid-hc4", "amlogic,sm1";
- model = "Hardkernel ODROID-HC4";
-
- aliases {
- rtc0 = &rtc;
- rtc1 = &vrtc;
- };
-
- fan0: pwm-fan {
- compatible = "pwm-fan";
- #cooling-cells = <2>;
- cooling-min-state = <0>;
- cooling-max-state = <3>;
- cooling-levels = <0 120 170 220>;
- pwms = <&pwm_cd 1 40000 0>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-blue {
- color = <LED_COLOR_ID_BLUE>;
- function = LED_FUNCTION_STATUS;
- gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- panic-indicator;
- };
-
- led-red {
- color = <LED_COLOR_ID_RED>;
- function = LED_FUNCTION_POWER;
- gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>;
- default-state = "on";
- };
- };
-
- /* Powers the SATA Disk 0 regulator, which is enabled when a disk load is detected */
- p12v_0: regulator-p12v_0 {
- compatible = "regulator-fixed";
- regulator-name = "P12V_0";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- /* Powers the SATA Disk 1 regulator, which is enabled when a disk load is detected */
- p12v_1: regulator-p12v_1 {
- compatible = "regulator-fixed";
- regulator-name = "P12V_1";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- vin-supply = <&main_12v>;
-
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- sound {
- model = "ODROID-HC4";
- };
-};
-
-&cpu_thermal {
- cooling-maps {
- map {
- trip = <&cpu_passive>;
- cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-&ir {
- linux,rc-map-name = "rc-odroid";
-};
-
-&i2c2 {
- status = "okay";
- pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>;
- pinctrl-names = "default";
-
- rtc: rtc@51 {
- status = "okay";
- compatible = "nxp,pcf8563";
- reg = <0x51>;
- wakeup-source;
- };
-};
-
-&pcie {
- status = "okay";
- reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
-};
-
-&pwm_cd {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&pwm_d_x6_pins>;
-};
-
-&sd_emmc_c {
- status = "disabled";
-};
-
-&spifc {
- status = "okay";
- pinctrl-0 = <&nor_pins>;
- pinctrl-names = "default";
-
- spi-flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <104000000>;
- };
-};
-
-&usb {
- phys = <&usb2_phy1>;
- phy-names = "usb2-phy1";
-};
-
-&usb2_phy0 {
- status = "disabled";
-};
diff --git a/arch/arm/dts/meson-sm1-odroid.dtsi b/arch/arm/dts/meson-sm1-odroid.dtsi
deleted file mode 100644
index fd0ad85..0000000
--- a/arch/arm/dts/meson-sm1-odroid.dtsi
+++ /dev/null
@@ -1,449 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Dongjin Kim <tobetter@gmail.com>
- */
-
-#include "meson-sm1.dtsi"
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/leds/common.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- tflash_vdd: regulator-tflash_vdd {
- compatible = "regulator-fixed";
-
- regulator-name = "TFLASH_VDD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>;
- enable-active-high;
- regulator-always-on;
- };
-
- tf_io: gpio-regulator-tf_io {
- compatible = "regulator-gpio";
-
- regulator-name = "TF_IO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vcc_5v>;
-
- enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- regulator-always-on;
-
- gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_SOURCE>;
- gpios-states = <0>;
-
- states = <3300000 0>,
- <1800000 1>;
- };
-
- flash_1v8: regulator-flash_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "FLASH_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- main_12v: regulator-main_12v {
- compatible = "regulator-fixed";
- regulator-name = "12V";
- regulator-min-microvolt = <12000000>;
- regulator-max-microvolt = <12000000>;
- regulator-always-on;
- };
-
- vcc_5v: regulator-vcc_5v {
- compatible = "regulator-fixed";
- regulator-name = "5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- vin-supply = <&main_12v>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-high;
- };
-
- vcc_1v8: regulator-vcc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vcc_3v3>;
- regulator-always-on;
- };
-
- vcc_3v3: regulator-vcc_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VCC_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- /* FIXME: actually controlled by VDDCPU_B_EN */
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * MP8756GD Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <721000>;
- regulator-max-microvolt = <1022000>;
-
- vin-supply = <&main_12v>;
-
- pwms = <&pwm_AO_cd 1 1250 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- usb_pwr_en: regulator-usb_pwr_en {
- compatible = "regulator-fixed";
- regulator-name = "USB_PWR_EN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vcc_5v>;
-
- /* Connected to the microUSB port power enable */
- gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vddao_1v8: regulator-vddao_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&main_12v>;
- regulator-always-on;
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- audio-aux-devs = <&tdmout_b>;
- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- /* 8ch hdmi interface */
- dai-link-3 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* hdmi glue */
- dai-link-4 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-&ext_mdio {
- external_phy: ethernet-phy@0 {
- /* Realtek RTL8211F (0x001cc916) */
- reg = <0>;
- max-speed = <1000>;
-
- interrupt-parent = <&gpio_intc>;
- /* MAC_INTR on GPIOZ_14 */
- interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
- };
-};
-
-ðmac {
- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>;
- pinctrl-names = "default";
- status = "okay";
- phy-mode = "rgmii";
- phy-handle = <&external_phy>;
- amlogic,tx-delay-ns = <2>;
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&gpio {
- gpio-line-names =
- /* GPIOZ */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOH */
- "", "", "", "", "",
- "PIN_36", /* GPIOH_5 */
- "PIN_26", /* GPIOH_6 */
- "PIN_32", /* GPIOH_7 */
- "",
- /* BOOT */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "", "", "",
- /* GPIOC */
- "", "", "", "", "", "", "", "",
- /* GPIOA */
- "", "", "", "", "", "", "", "",
- "", "", "", "", "", "",
- "PIN_27", /* GPIOA_14 */
- "PIN_28", /* GPIOA_15 */
- /* GPIOX */
- "PIN_16", /* GPIOX_0 */
- "PIN_18", /* GPIOX_1 */
- "PIN_22", /* GPIOX_2 */
- "PIN_11", /* GPIOX_3 */
- "PIN_13", /* GPIOX_4 */
- "PIN_7", /* GPIOX_5 */
- "PIN_33", /* GPIOX_6 */
- "PIN_15", /* GPIOX_7 */
- "PIN_19", /* GPIOX_8 */
- "PIN_21", /* GPIOX_9 */
- "PIN_24", /* GPIOX_10 */
- "PIN_23", /* GPIOX_11 */
- "PIN_8", /* GPIOX_12 */
- "PIN_10", /* GPIOX_13 */
- "PIN_29", /* GPIOX_14 */
- "PIN_31", /* GPIOX_15 */
- "PIN_12", /* GPIOX_16 */
- "PIN_3", /* GPIOX_17 */
- "PIN_5", /* GPIOX_18 */
- "PIN_35"; /* GPIOX_19 */
-};
-
-&gpio_ao {
- gpio-line-names =
- /* GPIOAO */
- "", "", "", "",
- "PIN_47", /* GPIOAO_4 */
- "", "",
- "PIN_45", /* GPIOAO_7 */
- "PIN_46", /* GPIOAO_8 */
- "PIN_44", /* GPIOAO_9 */
- "PIN_42", /* GPIOAO_10 */
- "",
- /* GPIOE */
- "", "", "";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
- hdmi-supply = <&vcc_5v>;
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&saradc {
- status = "okay";
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <200000000>;
- sd-uhs-sdr12;
- sd-uhs-sdr25;
- sd-uhs-sdr50;
- sd-uhs-sdr104;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&tflash_vdd>;
- vqmmc-supply = <&tf_io>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vcc_3v3>;
- vqmmc-supply = <&flash_1v8>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- vbus-supply = <&usb_pwr_en>;
-};
-
-&usb2_phy0 {
- phy-supply = <&vcc_5v>;
-};
-
diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts
deleted file mode 100644
index 2194a77..0000000
--- a/arch/arm/dts/meson-sm1-sei610.dts
+++ /dev/null
@@ -1,616 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre SAS. All rights reserved.
- */
-
-/dts-v1/;
-
-#include "meson-sm1.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/gpio/meson-g12a-gpio.h>
-#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
-
-/ {
- compatible = "seirobotics,sei610", "amlogic,sm1";
- model = "SEI Robotics SEI610";
-
- aliases {
- serial0 = &uart_AO;
- ethernet0 = ðmac;
- };
-
- mono_dac: audio-codec-0 {
- compatible = "maxim,max98357a";
- #sound-dai-cells = <0>;
- sound-name-prefix = "U16";
- sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>;
- };
-
- dmics: audio-codec-1 {
- #sound-dai-cells = <0>;
- compatible = "dmic-codec";
- num-channels = <2>;
- wakeup-delay-ms = <50>;
- status = "okay";
- sound-name-prefix = "MIC";
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- emmc_pwrseq: emmc-pwrseq {
- compatible = "mmc-pwrseq-emmc";
- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
-
- key1 {
- label = "A";
- linux,code = <BTN_0>;
- gpios = <&gpio GPIOH_6 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <34 IRQ_TYPE_EDGE_BOTH>;
- };
-
- key2 {
- label = "B";
- linux,code = <BTN_1>;
- gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <35 IRQ_TYPE_EDGE_BOTH>;
- };
-
- key3 {
- label = "C";
- linux,code = <BTN_2>;
- gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <2 IRQ_TYPE_EDGE_BOTH>;
- };
-
- mic_mute {
- label = "MicMute";
- linux,code = <SW_MUTE_DEVICE>;
- linux,input-type = <EV_SW>;
- gpios = <&gpio_ao GPIOE_2 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <99 IRQ_TYPE_EDGE_BOTH>;
- };
-
- power_key {
- label = "PowerKey";
- linux,code = <KEY_POWER>;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
- interrupt-parent = <&gpio_intc>;
- interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
- };
- };
-
- hdmi-connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_connector_in: endpoint {
- remote-endpoint = <&hdmi_tx_tmds_out>;
- };
- };
- };
-
- led-controller-1 {
- compatible = "gpio-leds";
-
- led-1 {
- label = "sei610:blue:bt";
- gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
- default-state = "off";
- };
- };
-
- led-controller-2 {
- compatible = "pwm-leds";
-
- led-2 {
- label = "sei610:red:power";
- pwms = <&pwm_AO_ab 0 30518 0>;
- max-brightness = <255>;
- linux,default-trigger = "default-on";
- active-low;
- };
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x0 0x0 0x0 0x40000000>;
- };
-
- ao_5v: regulator-ao_5v {
- compatible = "regulator-fixed";
- regulator-name = "AO_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- dc_in: regulator-dc_in {
- compatible = "regulator-fixed";
- regulator-name = "DC_IN";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
-
- emmc_1v8: regulator-emmc_1v8 {
- compatible = "regulator-fixed";
- regulator-name = "EMMC_1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- vddao_3v3: regulator-vddao_3v3 {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&dc_in>;
- regulator-always-on;
- };
-
- /* Used by Tuner, RGB Led & IR Emitter LED array */
- vddao_3v3_t: regulator-vddao_3v3_t {
- compatible = "regulator-fixed";
- regulator-name = "VDDAO_3V3_T";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vddao_3v3>;
- gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>;
- enable-active-low;
- regulator-always-on;
- };
-
- vddcpu: regulator-vddcpu {
- /*
- * SY8120B1ABC DC/DC Regulator.
- */
- compatible = "pwm-regulator";
-
- regulator-name = "VDDCPU";
- regulator-min-microvolt = <690000>;
- regulator-max-microvolt = <1050000>;
-
- vin-supply = <&dc_in>;
-
- pwms = <&pwm_AO_cd 1 1500 0>;
- pwm-dutycycle-range = <100 0>;
-
- regulator-boot-on;
- regulator-always-on;
- };
-
- vddio_ao1v8: regulator-vddio_ao1v8 {
- compatible = "regulator-fixed";
- regulator-name = "VDDIO_AO1V8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- vin-supply = <&vddao_3v3>;
- regulator-always-on;
- };
-
- reserved-memory {
- /* TEE Reserved Memory */
- bl32_reserved: bl32@5000000 {
- reg = <0x0 0x05300000 0x0 0x2000000>;
- no-map;
- };
- };
-
- sdio_pwrseq: sdio-pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
- clocks = <&wifi32k>;
- clock-names = "ext_clock";
- };
-
- sound {
- compatible = "amlogic,axg-sound-card";
- model = "SEI610";
- audio-aux-devs = <&tdmout_a>, <&tdmout_b>,
- <&tdmin_a>, <&tdmin_b>;
- audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0",
- "TDMOUT_A IN 1", "FRDDR_B OUT 0",
- "TDMOUT_A IN 2", "FRDDR_C OUT 0",
- "TDM_A Playback", "TDMOUT_A OUT",
- "TDMOUT_B IN 0", "FRDDR_A OUT 1",
- "TDMOUT_B IN 1", "FRDDR_B OUT 1",
- "TDMOUT_B IN 2", "FRDDR_C OUT 1",
- "TDM_B Playback", "TDMOUT_B OUT",
- "TODDR_A IN 4", "PDM Capture",
- "TODDR_B IN 4", "PDM Capture",
- "TODDR_C IN 4", "PDM Capture",
- "TDMIN_A IN 0", "TDM_A Capture",
- "TDMIN_A IN 3", "TDM_A Loopback",
- "TDMIN_B IN 0", "TDM_A Capture",
- "TDMIN_B IN 3", "TDM_A Loopback",
- "TDMIN_A IN 1", "TDM_B Capture",
- "TDMIN_A IN 4", "TDM_B Loopback",
- "TDMIN_B IN 1", "TDM_B Capture",
- "TDMIN_B IN 4", "TDM_B Loopback",
- "TODDR_A IN 0", "TDMIN_A OUT",
- "TODDR_B IN 0", "TDMIN_A OUT",
- "TODDR_C IN 0", "TDMIN_A OUT",
- "TODDR_A IN 1", "TDMIN_B OUT",
- "TODDR_B IN 1", "TDMIN_B OUT",
- "TODDR_C IN 1", "TDMIN_B OUT";
-
- assigned-clocks = <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
- status = "okay";
-
- dai-link-0 {
- sound-dai = <&frddr_a>;
- };
-
- dai-link-1 {
- sound-dai = <&frddr_b>;
- };
-
- dai-link-2 {
- sound-dai = <&frddr_c>;
- };
-
- dai-link-3 {
- sound-dai = <&toddr_a>;
- };
-
- dai-link-4 {
- sound-dai = <&toddr_b>;
- };
-
- dai-link-5 {
- sound-dai = <&toddr_c>;
- };
-
- /* internal speaker interface */
- dai-link-6 {
- sound-dai = <&tdmif_a>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&mono_dac>;
- };
-
- codec-1 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>;
- };
- };
-
- /* 8ch hdmi interface */
- dai-link-7 {
- sound-dai = <&tdmif_b>;
- dai-format = "i2s";
- dai-tdm-slot-tx-mask-0 = <1 1>;
- dai-tdm-slot-tx-mask-1 = <1 1>;
- dai-tdm-slot-tx-mask-2 = <1 1>;
- dai-tdm-slot-tx-mask-3 = <1 1>;
- mclk-fs = <256>;
-
- codec {
- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
- };
- };
-
- /* internal digital mics */
- dai-link-8 {
- sound-dai = <&pdm>;
-
- codec {
- sound-dai = <&dmics>;
- };
- };
-
- /* hdmi glue */
- dai-link-9 {
- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
-
- codec {
- sound-dai = <&hdmi_tx>;
- };
- };
- };
-
- wifi32k: wifi32k {
- compatible = "pwm-clock";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
- };
-};
-
-&arb {
- status = "okay";
-};
-
-&cec_AO {
- pinctrl-0 = <&cec_ao_a_h_pins>;
- pinctrl-names = "default";
- status = "disabled";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&cecb_AO {
- pinctrl-0 = <&cec_ao_b_h_pins>;
- pinctrl-names = "default";
- status = "okay";
- hdmi-phandle = <&hdmi_tx>;
-};
-
-&clkc_audio {
- status = "okay";
-};
-
-&cpu0 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu1 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU1_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu2 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU2_CLK>;
- clock-latency = <50000>;
-};
-
-&cpu3 {
- cpu-supply = <&vddcpu>;
- operating-points-v2 = <&cpu_opp_table>;
- clocks = <&clkc CLKID_CPU3_CLK>;
- clock-latency = <50000>;
-};
-
-ðmac {
- status = "okay";
- phy-handle = <&internal_ephy>;
- phy-mode = "rmii";
-};
-
-&frddr_a {
- status = "okay";
-};
-
-&frddr_b {
- status = "okay";
-};
-
-&frddr_c {
- status = "okay";
-};
-
-&hdmi_tx {
- status = "okay";
- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
- pinctrl-names = "default";
-};
-
-&hdmi_tx_tmds_port {
- hdmi_tx_tmds_out: endpoint {
- remote-endpoint = <&hdmi_connector_in>;
- };
-};
-
-&i2c3 {
- status = "okay";
- pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
- pinctrl-names = "default";
-};
-
-&ir {
- status = "okay";
- pinctrl-0 = <&remote_input_ao_pins>;
- pinctrl-names = "default";
-};
-
-&pdm {
- pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_dclk_z_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&pwm_AO_ab {
- status = "okay";
- pinctrl-0 = <&pwm_ao_a_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&pwm_AO_cd {
- pinctrl-0 = <&pwm_ao_d_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
-};
-
-&pwm_ef {
- status = "okay";
- pinctrl-0 = <&pwm_e_pins>;
- pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-};
-
-&saradc {
- status = "okay";
- vref-supply = <&vddio_ao1v8>;
-};
-
-/* SDIO */
-&sd_emmc_a {
- status = "okay";
- pinctrl-0 = <&sdio_pins>;
- pinctrl-1 = <&sdio_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
- #address-cells = <1>;
- #size-cells = <0>;
-
- bus-width = <4>;
- cap-sd-highspeed;
- sd-uhs-sdr50;
- max-frequency = <100000000>;
-
- non-removable;
- disable-wp;
-
- /* WiFi firmware requires power to be kept while in suspend */
- keep-power-in-suspend;
-
- mmc-pwrseq = <&sdio_pwrseq>;
-
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddio_ao1v8>;
-
- brcmf: wifi@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-/* SD card */
-&sd_emmc_b {
- status = "okay";
- pinctrl-0 = <&sdcard_c_pins>;
- pinctrl-1 = <&sdcard_clk_gate_c_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <4>;
- cap-sd-highspeed;
- max-frequency = <50000000>;
- disable-wp;
-
- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&vddao_3v3>;
-};
-
-/* eMMC */
-&sd_emmc_c {
- status = "okay";
- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
- pinctrl-1 = <&emmc_clk_gate_pins>;
- pinctrl-names = "default", "clk-gate";
-
- bus-width = <8>;
- cap-mmc-highspeed;
- mmc-ddr-1_8v;
- mmc-hs200-1_8v;
- max-frequency = <200000000>;
- non-removable;
- disable-wp;
-
- mmc-pwrseq = <&emmc_pwrseq>;
- vmmc-supply = <&vddao_3v3>;
- vqmmc-supply = <&emmc_1v8>;
-};
-
-&tdmif_a {
- pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>,
- <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>;
- assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- assigned-clock-rates = <0>, <0>;
-};
-
-&tdmif_b {
- status = "okay";
-};
-
-&tdmin_a {
- status = "okay";
-};
-
-&tdmin_b {
- status = "okay";
-};
-
-&tdmout_a {
- status = "okay";
-};
-
-&tdmout_b {
- status = "okay";
-};
-
-&toddr_a {
- status = "okay";
-};
-
-&toddr_b {
- status = "okay";
-};
-
-&toddr_c {
- status = "okay";
-};
-
-&tohdmitx {
- status = "okay";
-};
-
-&uart_A {
- status = "okay";
- pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
- pinctrl-names = "default";
- uart-has-rtscts;
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- interrupt-parent = <&gpio_intc>;
- interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "host-wakeup";
- shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>;
- max-speed = <2000000>;
- clocks = <&wifi32k>;
- clock-names = "lpo";
- vbat-supply = <&vddao_3v3>;
- vddio-supply = <&vddio_ao1v8>;
- };
-};
-
-/* Exposed via the on-board USB to Serial FT232RL IC */
-&uart_AO {
- status = "okay";
- pinctrl-0 = <&uart_ao_a_pins>;
- pinctrl-names = "default";
-};
-
-&usb {
- status = "okay";
- dr_mode = "otg";
-};
diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi
deleted file mode 100644
index 56ca0ba..0000000
--- a/arch/arm/dts/meson-sm1.dtsi
+++ /dev/null
@@ -1,550 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include "meson-g12-common.dtsi"
-#include <dt-bindings/clock/axg-audio-clkc.h>
-#include <dt-bindings/power/meson-sm1-power.h>
-#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
-#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
-
-/ {
- compatible = "amlogic,sm1";
-
- tdmif_a: audio-controller-0 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_A";
- clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
- <&clkc_audio AUD_CLKID_MST_A_SCLK>,
- <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_b: audio-controller-1 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_B";
- clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
- <&clkc_audio AUD_CLKID_MST_B_SCLK>,
- <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- tdmif_c: audio-controller-2 {
- compatible = "amlogic,axg-tdm-iface";
- #sound-dai-cells = <0>;
- sound-name-prefix = "TDM_C";
- clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
- <&clkc_audio AUD_CLKID_MST_C_SCLK>,
- <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
- clock-names = "mclk", "sclk", "lrclk";
- status = "disabled";
- };
-
- cpus {
- #address-cells = <0x2>;
- #size-cells = <0x0>;
-
- cpu0: cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x0>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu1: cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x1>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu2: cpu@2 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x2>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- cpu3: cpu@3 {
- device_type = "cpu";
- compatible = "arm,cortex-a55";
- reg = <0x0 0x3>;
- enable-method = "psci";
- next-level-cache = <&l2>;
- #cooling-cells = <2>;
- };
-
- l2: l2-cache0 {
- compatible = "cache";
- cache-level = <2>;
- };
- };
-
- cpu_opp_table: opp-table {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <770000>;
- };
-
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <780000>;
- };
-
- opp-1404000000 {
- opp-hz = /bits/ 64 <1404000000>;
- opp-microvolt = <790000>;
- };
-
- opp-1500000000 {
- opp-hz = /bits/ 64 <1500000000>;
- opp-microvolt = <800000>;
- };
-
- opp-1608000000 {
- opp-hz = /bits/ 64 <1608000000>;
- opp-microvolt = <810000>;
- };
-
- opp-1704000000 {
- opp-hz = /bits/ 64 <1704000000>;
- opp-microvolt = <850000>;
- };
-
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <900000>;
- };
-
- opp-1908000000 {
- opp-hz = /bits/ 64 <1908000000>;
- opp-microvolt = <950000>;
- };
- };
-};
-
-&apb {
- audio: bus@60000 {
- compatible = "simple-bus";
- reg = <0x0 0x60000 0x0 0x1000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
-
- clkc_audio: clock-controller@0 {
- status = "disabled";
- compatible = "amlogic,sm1-audio-clkc";
- reg = <0x0 0x0 0x0 0xb4>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- clocks = <&clkc CLKID_AUDIO>,
- <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>,
- <&clkc CLKID_MPLL3>,
- <&clkc CLKID_HIFI_PLL>,
- <&clkc CLKID_FCLK_DIV3>,
- <&clkc CLKID_FCLK_DIV4>,
- <&clkc CLKID_FCLK_DIV5>;
- clock-names = "pclk",
- "mst_in0",
- "mst_in1",
- "mst_in2",
- "mst_in3",
- "mst_in4",
- "mst_in5",
- "mst_in6",
- "mst_in7";
-
- resets = <&reset RESET_AUDIO>;
- };
-
- toddr_a: audio-controller@100 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x100 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_A";
- interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
- resets = <&arb AXG_ARB_TODDR_A>,
- <&clkc_audio AUD_RESET_TODDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <8192>;
- status = "disabled";
- };
-
- toddr_b: audio-controller@140 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x140 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_B";
- interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
- resets = <&arb AXG_ARB_TODDR_B>,
- <&clkc_audio AUD_RESET_TODDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- toddr_c: audio-controller@180 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x180 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_C";
- interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
- resets = <&arb AXG_ARB_TODDR_C>,
- <&clkc_audio AUD_RESET_TODDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_a: audio-controller@1c0 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x1c0 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_A";
- interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
- resets = <&arb AXG_ARB_FRDDR_A>,
- <&clkc_audio AUD_RESET_FRDDR_A>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <512>;
- status = "disabled";
- };
-
- frddr_b: audio-controller@200 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x200 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_B";
- interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
- resets = <&arb AXG_ARB_FRDDR_B>,
- <&clkc_audio AUD_RESET_FRDDR_B>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_c: audio-controller@240 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x240 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_C";
- interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
- resets = <&arb AXG_ARB_FRDDR_C>,
- <&clkc_audio AUD_RESET_FRDDR_C>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- arb: reset-controller@280 {
- status = "disabled";
- compatible = "amlogic,meson-sm1-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
- };
-
- tdmin_a: audio-controller@300 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x300 0x0 0x40>;
- sound-name-prefix = "TDMIN_A";
- resets = <&clkc_audio AUD_RESET_TDMIN_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_b: audio-controller@340 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x340 0x0 0x40>;
- sound-name-prefix = "TDMIN_B";
- resets = <&clkc_audio AUD_RESET_TDMIN_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_c: audio-controller@380 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x380 0x0 0x40>;
- sound-name-prefix = "TDMIN_C";
- resets = <&clkc_audio AUD_RESET_TDMIN_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmin_lb: audio-controller@3c0 {
- compatible = "amlogic,sm1-tdmin",
- "amlogic,axg-tdmin";
- reg = <0x0 0x3c0 0x0 0x40>;
- sound-name-prefix = "TDMIN_LB";
- resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
- clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- spdifin: audio-controller@400 {
- compatible = "amlogic,g12a-spdifin",
- "amlogic,axg-spdifin";
- reg = <0x0 0x400 0x0 0x30>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFIN";
- interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
- <&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
- clock-names = "pclk", "refclk";
- resets = <&clkc_audio AUD_RESET_SPDIFIN>;
- status = "disabled";
- };
-
- spdifout_a: audio-controller@480 {
- compatible = "amlogic,g12a-spdifout",
- "amlogic,axg-spdifout";
- reg = <0x0 0x480 0x0 0x50>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "SPDIFOUT_A";
- clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
- <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
- clock-names = "pclk", "mclk";
- resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
- status = "disabled";
- };
-
- tdmout_a: audio-controller@500 {
- compatible = "amlogic,sm1-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- sound-name-prefix = "TDMOUT_A";
- resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_b: audio-controller@540 {
- compatible = "amlogic,sm1-tdmout";
- reg = <0x0 0x540 0x0 0x40>;
- sound-name-prefix = "TDMOUT_B";
- resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- tdmout_c: audio-controller@580 {
- compatible = "amlogic,sm1-tdmout";
- reg = <0x0 0x580 0x0 0x40>;
- sound-name-prefix = "TDMOUT_C";
- resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
- status = "disabled";
- };
-
- toacodec: audio-controller@740 {
- compatible = "amlogic,sm1-toacodec",
- "amlogic,g12a-toacodec";
- reg = <0x0 0x740 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOACODEC";
- resets = <&clkc_audio AUD_RESET_TOACODEC>;
- status = "disabled";
- };
-
- tohdmitx: audio-controller@744 {
- compatible = "amlogic,sm1-tohdmitx",
- "amlogic,g12a-tohdmitx";
- reg = <0x0 0x744 0x0 0x4>;
- #sound-dai-cells = <1>;
- sound-name-prefix = "TOHDMITX";
- resets = <&clkc_audio AUD_RESET_TOHDMITX>;
- status = "disabled";
- };
-
- toddr_d: audio-controller@840 {
- compatible = "amlogic,sm1-toddr",
- "amlogic,axg-toddr";
- reg = <0x0 0x840 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "TODDR_D";
- interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
- resets = <&arb AXG_ARB_TODDR_D>,
- <&clkc_audio AUD_RESET_TODDR_D>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
-
- frddr_d: audio-controller@880 {
- compatible = "amlogic,sm1-frddr",
- "amlogic,axg-frddr";
- reg = <0x0 0x880 0x0 0x2c>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "FRDDR_D";
- interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
- clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
- resets = <&arb AXG_ARB_FRDDR_D>,
- <&clkc_audio AUD_RESET_FRDDR_D>;
- reset-names = "arb", "rst";
- amlogic,fifo-depth = <256>;
- status = "disabled";
- };
- };
-
- pdm: audio-controller@61000 {
- compatible = "amlogic,sm1-pdm",
- "amlogic,axg-pdm";
- reg = <0x0 0x61000 0x0 0x34>;
- #sound-dai-cells = <0>;
- sound-name-prefix = "PDM";
- clocks = <&clkc_audio AUD_CLKID_PDM>,
- <&clkc_audio AUD_CLKID_PDM_DCLK>,
- <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
- clock-names = "pclk", "dclk", "sysclk";
- resets = <&clkc_audio AUD_RESET_PDM>;
- status = "disabled";
- };
-};
-
-&cecb_AO {
- compatible = "amlogic,meson-sm1-ao-cec";
-};
-
-&clk_msr {
- compatible = "amlogic,meson-sm1-clk-measure";
-};
-
-
-&clkc {
- compatible = "amlogic,sm1-clkc";
-};
-
-&cpu_thermal {
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
- };
- };
-};
-
-ðmac {
- power-domains = <&pwrc PWRC_SM1_ETH_ID>;
-};
-
-&gpio_intc {
- compatible = "amlogic,meson-sm1-gpio-intc",
- "amlogic,meson-gpio-intc";
-};
-
-&pcie {
- power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
-};
-
-&pmu {
- compatible = "amlogic,sm1-ddr-pmu";
-};
-
-&pwrc {
- compatible = "amlogic,meson-sm1-pwrc";
-};
-
-&simplefb_cvbs {
- power-domains = <&pwrc PWRC_SM1_VPU_ID>;
-};
-
-&simplefb_hdmi {
- power-domains = <&pwrc PWRC_SM1_VPU_ID>;
-};
-
-&vdec {
- compatible = "amlogic,sm1-vdec";
-};
-
-&vpu {
- power-domains = <&pwrc PWRC_SM1_VPU_ID>;
-};
-
-&usb {
- power-domains = <&pwrc PWRC_SM1_USB_ID>;
-};
diff --git a/arch/arm/dts/sdm845-db845c-u-boot.dtsi b/arch/arm/dts/sdm845-db845c-u-boot.dtsi
new file mode 100644
index 0000000..906f9fa
--- /dev/null
+++ b/arch/arm/dts/sdm845-db845c-u-boot.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/* Needed for Linux to boot from USB, otherwise if PCIe driver is not in initramfs
+ * the VBUS supply will never get turned on.
+ * https://lore.kernel.org/linux-arm-msm/20240320122515.3243711-1-caleb.connolly@linaro.org/
+ */
+&pcie0_3p3v_dual {
+ regulator-always-on;
+};
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index c2fff84..031d4e5 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -6,10 +6,12 @@
config KW88F6192
bool
select ARCH_VERY_EARLY_INIT
+ imply OF_UPSTREAM
config KW88F6281
bool
select ARCH_VERY_EARLY_INIT
+ imply OF_UPSTREAM
config SHEEVA_88SV131
bool
diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index 95e7b01..7570f48 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -32,24 +32,28 @@
config MESON_GXL
bool "GXL"
select MESON_GX
+ imply OF_UPSTREAM
help
Select this if your SoC is an S905X/D or S805X
config MESON_GXM
bool "GXM"
select MESON_GX
+ imply OF_UPSTREAM
help
Select this if your SoC is an S912
config MESON_AXG
bool "AXG"
select MESON64_COMMON
+ imply OF_UPSTREAM
help
Select this if your SoC is an A113X/D
config MESON_G12A
bool "G12A"
select MESON64_COMMON
+ imply OF_UPSTREAM
help
Select this if your SoC is an S905X/D2
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 2058c95..f15d3cc 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -18,6 +18,8 @@
select TOOLS_KWBIMAGE if SPL
select SPL_SYS_NO_VECTOR_TABLE if SPL
select ARCH_VERY_EARLY_INIT
+ select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
+ select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
# ARMv7 SoCs...
config ARMADA_375
@@ -456,6 +458,29 @@
default 0x0
depends on MVEBU_SPL_BOOT_DEVICE_SPI
+config ARMADA_32BIT_SYSCON
+ bool
+ depends on ARMADA_32BIT
+ select REGMAP
+ select SYSCON
+
+config ARMADA_32BIT_SYSCON_RESET
+ bool "Support Armada XP/375/38x/39x reset controller"
+ depends on ARMADA_32BIT
+ depends on DM_RESET
+ select ARMADA_32BIT_SYSCON
+ help
+ Build support for Armada XP/375/38x/39x reset controller. This is
+ needed for PCIe support.
+
+config ARMADA_32BIT_SYSCON_SYSRESET
+ bool "Support Armada XP/375/38x/39x sysreset via driver model"
+ depends on ARMADA_32BIT
+ depends on SYSRESET
+ select ARMADA_32BIT_SYSCON
+ help
+ Build support for Armada XP/375/38x/39x system reset via driver model.
+
source "board/solidrun/clearfog/Kconfig"
source "board/kobol/helios4/Kconfig"
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 0584ed2..329c2e4 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -22,13 +22,14 @@
obj-y = cpu.o
obj-y += dram.o
obj-y += lowlevel.o
-obj-$(CONFIG_DM_RESET) += system-controller.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_ARMADA_375) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_38X) += ../../../drivers/ddr/marvell/a38x/xor.o
obj-$(CONFIG_ARMADA_XP) += ../../../drivers/ddr/marvell/axp/xor.o
obj-$(CONFIG_ARMADA_MSYS) += ../../../drivers/ddr/marvell/axp/xor.o
+obj-$(CONFIG_ARMADA_32BIT_SYSCON) += system-controller.o
+
ifdef CONFIG_ARMADA_38X
obj-$(CONFIG_MVEBU_EFUSE) += efuse.o
endif
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 8e0de93..7c62a5d 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -52,6 +52,7 @@
*/
}
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)
void reset_cpu(void)
{
struct mvebu_system_registers *reg =
@@ -62,6 +63,7 @@
while (1)
;
}
+#endif
u32 get_boot_device(void)
{
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index 7cdde11..682431e 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -1,18 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+
-// (C) 2021 Pali Rohár <pali@kernel.org>
+/*
+ * Copyright (C) 2021 Pali Rohár <pali@kernel.org>
+ * Copyright (C) 2024 Marek Behún <kabel@kernel.org>
+ */
#include <common.h>
#include <dm.h>
+#include <dm/lists.h>
+#include <regmap.h>
#include <reset-uclass.h>
+#include <syscon.h>
+#include <sysreset.h>
#include <asm/io.h>
-#define MVEBU_SOC_CONTROL_1_REG 0x4
+#define MVEBU_SOC_CONTROL_1_REG 0x4
-#define MVEBU_PCIE_ID 0
+#if defined(CONFIG_ARMADA_375)
+# define MVEBU_RSTOUTN_MASK_REG 0x54
+# define MVEBU_SYS_SOFT_RST_REG 0x58
+#else
+# define MVEBU_RSTOUTN_MASK_REG 0x60
+# define MVEBU_SYS_SOFT_RST_REG 0x64
+#endif
-struct mvebu_reset_data {
- void *base;
-};
+#define MVEBU_GLOBAL_SOFT_RST_BIT BIT(0)
+
+#define MVEBU_PCIE_ID 0
+
+#if IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET)
static int mvebu_reset_of_xlate(struct reset_ctl *rst,
struct ofnode_phandle_args *args)
@@ -46,46 +61,33 @@
static int mvebu_reset_assert(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
- clrbits_32(data->base + MVEBU_SOC_CONTROL_1_REG, BIT(rst->data));
- return 0;
+ return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG,
+ BIT(rst->data), 0);
}
static int mvebu_reset_deassert(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
- setbits_32(data->base + MVEBU_SOC_CONTROL_1_REG, BIT(rst->data));
- return 0;
+ return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG,
+ BIT(rst->data), BIT(rst->data));
}
static int mvebu_reset_status(struct reset_ctl *rst)
{
- struct mvebu_reset_data *data = dev_get_priv(rst->dev);
+ struct regmap *regmap = syscon_get_regmap(rst->dev->parent);
+ uint val;
+ int ret;
- return !(readl(data->base + MVEBU_SOC_CONTROL_1_REG) & BIT(rst->data));
-}
+ ret = regmap_read(regmap, MVEBU_SOC_CONTROL_1_REG, &val);
+ if (ret < 0)
+ return ret;
-static int mvebu_reset_of_to_plat(struct udevice *dev)
-{
- struct mvebu_reset_data *data = dev_get_priv(dev);
-
- data->base = dev_read_addr_ptr(dev);
- if (!data->base)
- return -EINVAL;
-
- return 0;
+ return !(val & BIT(rst->data));
}
-static const struct udevice_id mvebu_reset_of_match[] = {
- { .compatible = "marvell,armada-370-xp-system-controller" },
- { .compatible = "marvell,armada-375-system-controller" },
- { .compatible = "marvell,armada-380-system-controller" },
- { .compatible = "marvell,armada-390-system-controller" },
- { },
-};
-
static const struct reset_ops mvebu_reset_ops = {
.of_xlate = mvebu_reset_of_xlate,
.request = mvebu_reset_request,
@@ -98,8 +100,81 @@
U_BOOT_DRIVER(mvebu_reset) = {
.name = "mvebu-reset",
.id = UCLASS_RESET,
- .of_match = mvebu_reset_of_match,
- .of_to_plat = mvebu_reset_of_to_plat,
- .priv_auto = sizeof(struct mvebu_reset_data),
.ops = &mvebu_reset_ops,
};
+
+#endif /* IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET) */
+
+#if IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)
+
+static int mvebu_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct regmap *regmap = syscon_get_regmap(dev->parent);
+ uint bit;
+
+ if (type != SYSRESET_COLD)
+ return -EPROTONOSUPPORT;
+
+ bit = MVEBU_GLOBAL_SOFT_RST_BIT;
+
+ regmap_update_bits(regmap, MVEBU_RSTOUTN_MASK_REG, bit, bit);
+ regmap_update_bits(regmap, MVEBU_SYS_SOFT_RST_REG, bit, bit);
+
+ /* Loop while waiting for the reset */
+ while (1)
+ ;
+
+ return 0;
+}
+
+static struct sysreset_ops mvebu_sysreset_ops = {
+ .request = mvebu_sysreset_request,
+};
+
+U_BOOT_DRIVER(mvebu_sysreset) = {
+ .name = "mvebu-sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &mvebu_sysreset_ops,
+};
+
+#endif /* IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET) */
+
+static int mvebu_syscon_bind(struct udevice *dev)
+{
+ int ret = 0;
+
+ /* bind also mvebu-reset, with the same ofnode */
+ if (IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_RESET)) {
+ ret = device_bind_driver_to_node(dev, "mvebu-reset",
+ "mvebu-reset", dev_ofnode(dev),
+ NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* bind also mvebu-sysreset, with the same ofnode */
+ if (IS_ENABLED(CONFIG_ARMADA_32BIT_SYSCON_SYSRESET)) {
+ ret = device_bind_driver_to_node(dev, "mvebu-sysreset",
+ "mvebu-sysreset",
+ dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ return ret;
+}
+
+static const struct udevice_id mvebu_syscon_of_match[] = {
+ { .compatible = "marvell,armada-370-xp-system-controller" },
+ { .compatible = "marvell,armada-375-system-controller" },
+ { .compatible = "marvell,armada-380-system-controller" },
+ { .compatible = "marvell,armada-390-system-controller" },
+ { },
+};
+
+U_BOOT_DRIVER(mvebu_syscon) = {
+ .name = "mvebu-system-controller",
+ .id = UCLASS_SYSCON,
+ .of_match = mvebu_syscon_of_match,
+ .bind = mvebu_syscon_bind,
+};
diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index 857171e..7a4495c 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -3,3 +3,4 @@
# (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
obj-y += board.o
+obj-$(CONFIG_OF_LIVE) += of_fixup.o
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index f12f579..3d5994c 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -16,6 +16,7 @@
#include <dm/pinctrl.h>
#include <dm/uclass-internal.h>
#include <dm/read.h>
+#include <power/regulator.h>
#include <env.h>
#include <init.h>
#include <linux/arm-smccc.h>
@@ -24,9 +25,12 @@
#include <linux/sizes.h>
#include <lmb.h>
#include <malloc.h>
+#include <fdt_support.h>
#include <usb.h>
#include <sort.h>
+#include "qcom-priv.h"
+
DECLARE_GLOBAL_DATA_PTR;
static struct mm_region rbx_mem_map[CONFIG_NR_DRAM_BANKS + 2] = { { 0 } };
@@ -93,7 +97,9 @@
* try and use the FDT built into U-Boot if there is one...
* This avoids having a hard dependency on the previous stage bootloader
*/
- if (IS_ENABLED(CONFIG_OF_SEPARATE) && (!fdt || fdt != ALIGN(fdt, SZ_4K))) {
+
+ if (IS_ENABLED(CONFIG_OF_SEPARATE) && (!fdt || fdt != ALIGN(fdt, SZ_4K) ||
+ fdt_check_header((void *)fdt))) {
debug("%s: Using built in FDT, bootloader gave us %#llx\n", __func__, fdt);
return (void *)gd->fdt_blob;
}
@@ -156,7 +162,9 @@
int board_init(void)
{
+ regulators_enable_boot_on(false);
show_psci_version();
+ qcom_of_fixup_nodes();
qcom_board_init();
return 0;
}
diff --git a/arch/arm/mach-snapdragon/of_fixup.c b/arch/arm/mach-snapdragon/of_fixup.c
new file mode 100644
index 0000000..3f7ac22
--- /dev/null
+++ b/arch/arm/mach-snapdragon/of_fixup.c
@@ -0,0 +1,155 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * OF_LIVE devicetree fixup.
+ *
+ * This file implements runtime fixups for Qualcomm DT to improve
+ * compatibility with U-Boot. This includes adjusting the USB nodes
+ * to only use USB high-speed, as well as remapping volume buttons
+ * to behave as up/down for navigating U-Boot.
+ *
+ * We use OF_LIVE for this rather than early FDT fixup for a couple
+ * of reasons: it has a much nicer API, is most likely more efficient,
+ * and our changes are only applied to U-Boot. This allows us to use a
+ * DT designed for Linux, run U-Boot with a modified version, and then
+ * boot Linux with the original FDT.
+ *
+ * Copyright (c) 2024 Linaro Ltd.
+ * Author: Caleb Connolly <caleb.connolly@linaro.org>
+ */
+
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dm/of_access.h>
+#include <dm/of.h>
+#include <fdt_support.h>
+#include <linux/errno.h>
+#include <stdlib.h>
+#include <time.h>
+
+/* U-Boot only supports USB high-speed mode on Qualcomm platforms with DWC3
+ * USB controllers. Rather than requiring source level DT changes, we fix up
+ * DT here. This improves compatibility with upstream DT and simplifies the
+ * porting process for new devices.
+ */
+static int fixup_qcom_dwc3(struct device_node *glue_np)
+{
+ struct device_node *dwc3;
+ int ret, len, hsphy_idx = 1;
+ const __be32 *phandles;
+ const char *second_phy_name;
+
+ debug("Fixing up %s\n", glue_np->name);
+
+ /* Tell the glue driver to configure the wrapper for high-speed only operation */
+ ret = of_write_prop(glue_np, "qcom,select-utmi-as-pipe-clk", 0, NULL);
+ if (ret) {
+ log_err("Failed to add property 'qcom,select-utmi-as-pipe-clk': %d\n", ret);
+ return ret;
+ }
+
+ /* Find the DWC3 node itself */
+ dwc3 = of_find_compatible_node(glue_np, NULL, "snps,dwc3");
+ if (!dwc3) {
+ log_err("Failed to find dwc3 node\n");
+ return -ENOENT;
+ }
+
+ phandles = of_get_property(dwc3, "phys", &len);
+ len /= sizeof(*phandles);
+ if (len == 1) {
+ log_debug("Only one phy, not a superspeed controller\n");
+ return 0;
+ }
+
+ /* Figure out if the superspeed phy is present and if so then which phy is it? */
+ ret = of_property_read_string_index(dwc3, "phy-names", 1, &second_phy_name);
+ if (ret == -ENODATA) {
+ log_debug("Only one phy, not a super-speed controller\n");
+ return 0;
+ } else if (ret) {
+ log_err("Failed to read second phy name: %d\n", ret);
+ return ret;
+ }
+
+ if (!strncmp("usb3-phy", second_phy_name, strlen("usb3-phy"))) {
+ log_debug("Second phy isn't superspeed (is '%s') assuming first phy is SS\n",
+ second_phy_name);
+ hsphy_idx = 0;
+ }
+
+ /* Overwrite the "phys" property to only contain the high-speed phy */
+ ret = of_write_prop(dwc3, "phys", sizeof(*phandles), phandles + hsphy_idx);
+ if (ret) {
+ log_err("Failed to overwrite 'phys' property: %d\n", ret);
+ return ret;
+ }
+
+ /* Overwrite "phy-names" to only contain a single entry */
+ ret = of_write_prop(dwc3, "phy-names", strlen("usb2-phy"), "usb2-phy");
+ if (ret) {
+ log_err("Failed to overwrite 'phy-names' property: %d\n", ret);
+ return ret;
+ }
+
+ ret = of_write_prop(dwc3, "maximum-speed", strlen("high-speed"), "high-speed");
+ if (ret) {
+ log_err("Failed to set 'maximum-speed' property: %d\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void fixup_usb_nodes(void)
+{
+ struct device_node *glue_np = NULL;
+ int ret;
+
+ while ((glue_np = of_find_compatible_node(glue_np, NULL, "qcom,dwc3"))) {
+ ret = fixup_qcom_dwc3(glue_np);
+ if (ret)
+ log_warning("Failed to fixup node %s: %d\n", glue_np->name, ret);
+ }
+}
+
+/* Remove all references to the rpmhpd device */
+static void fixup_power_domains(void)
+{
+ struct device_node *pd = NULL, *np = NULL;
+ struct property *prop;
+ const __be32 *val;
+
+ /* All Qualcomm platforms name the rpm(h)pd "power-controller" */
+ for_each_of_allnodes(pd) {
+ if (pd->name && !strcmp("power-controller", pd->name))
+ break;
+ }
+
+ /* Sanity check that this is indeed a power domain controller */
+ if (!of_find_property(pd, "#power-domain-cells", NULL)) {
+ log_err("Found power-controller but it doesn't have #power-domain-cells\n");
+ return;
+ }
+
+ /* Remove all references to the power domain controller */
+ for_each_of_allnodes(np) {
+ if (!(prop = of_find_property(np, "power-domains", NULL)))
+ continue;
+
+ val = prop->value;
+ if (val[0] == cpu_to_fdt32(pd->phandle))
+ of_remove_property(np, prop);
+ }
+}
+
+#define time_call(func, ...) \
+ do { \
+ u64 start = timer_get_us(); \
+ func(__VA_ARGS__); \
+ debug(#func " took %lluus\n", timer_get_us() - start); \
+ } while (0)
+
+void qcom_of_fixup_nodes(void)
+{
+ time_call(fixup_usb_nodes);
+ time_call(fixup_power_domains);
+}
diff --git a/arch/arm/mach-snapdragon/qcom-priv.h b/arch/arm/mach-snapdragon/qcom-priv.h
new file mode 100644
index 0000000..0a7ed5e
--- /dev/null
+++ b/arch/arm/mach-snapdragon/qcom-priv.h
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#ifndef __QCOM_PRIV_H__
+#define __QCOM_PRIV_H__
+
+#if CONFIG_IS_ENABLED(OF_LIVE)
+/**
+ * qcom_of_fixup_nodes() - Fixup Qualcomm DT nodes
+ *
+ * Adjusts nodes in the live tree to improve compatibility with U-Boot.
+ */
+void qcom_of_fixup_nodes(void);
+#else
+static inline void qcom_of_fixup_nodes(void)
+{
+ log_debug("Unable to dynamically fixup USB nodes, please enable CONFIG_OF_LIVE\n");
+}
+#endif /* OF_LIVE */
+
+#endif /* __QCOM_PRIV_H__ */
diff --git a/board/CZ.NIC/turris_atsha_otp.c b/board/CZ.NIC/turris_atsha_otp.c
index a29fe36..85eebcd 100644
--- a/board/CZ.NIC/turris_atsha_otp.c
+++ b/board/CZ.NIC/turris_atsha_otp.c
@@ -11,6 +11,7 @@
#include <atsha204a-i2c.h>
#include "turris_atsha_otp.h"
+#include "turris_common.h"
#define TURRIS_ATSHA_OTP_VERSION 0
#define TURRIS_ATSHA_OTP_SERIAL 1
@@ -32,26 +33,6 @@
return dev;
}
-static void increment_mac(u8 *mac)
-{
- int i;
-
- for (i = 5; i >= 3; i--) {
- mac[i] += 1;
- if (mac[i])
- break;
- }
-}
-
-static void set_mac_if_invalid(int i, u8 *mac)
-{
- u8 oldmac[6];
-
- if (is_valid_ethaddr(mac) &&
- !eth_env_get_enetaddr_by_index("eth", i, oldmac))
- eth_env_set_enetaddr_by_index("eth", i, mac);
-}
-
int turris_atsha_otp_init_mac_addresses(int first_idx)
{
struct udevice *dev = get_atsha204a_dev();
@@ -84,11 +65,7 @@
mac[4] = mac1[2];
mac[5] = mac1[3];
- set_mac_if_invalid((first_idx + 0) % 3, mac);
- increment_mac(mac);
- set_mac_if_invalid((first_idx + 1) % 3, mac);
- increment_mac(mac);
- set_mac_if_invalid((first_idx + 2) % 3, mac);
+ turris_init_mac_addresses(first_idx, mac);
return 0;
}
diff --git a/board/CZ.NIC/turris_common.c b/board/CZ.NIC/turris_common.c
new file mode 100644
index 0000000..1717dda
--- /dev/null
+++ b/board/CZ.NIC/turris_common.c
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Marek Behún <kabel@kernel.org>
+ */
+
+#include <env.h>
+#include <net.h>
+
+#include "turris_common.h"
+
+static void increment_mac(u8 *mac)
+{
+ int i;
+
+ for (i = 5; i >= 3; i--) {
+ mac[i] += 1;
+ if (mac[i])
+ break;
+ }
+}
+
+static void set_mac_if_invalid(int i, u8 *mac)
+{
+ u8 oldmac[6];
+
+ if (is_valid_ethaddr(mac) &&
+ !eth_env_get_enetaddr_by_index("eth", i, oldmac))
+ eth_env_set_enetaddr_by_index("eth", i, mac);
+}
+
+void turris_init_mac_addresses(int first_idx, const u8 *first_mac)
+{
+ u8 mac[6];
+
+ memcpy(mac, first_mac, sizeof(mac));
+
+ set_mac_if_invalid((first_idx + 0) % 3, mac);
+ increment_mac(mac);
+ set_mac_if_invalid((first_idx + 1) % 3, mac);
+ increment_mac(mac);
+ set_mac_if_invalid((first_idx + 2) % 3, mac);
+}
diff --git a/board/CZ.NIC/turris_common.h b/board/CZ.NIC/turris_common.h
new file mode 100644
index 0000000..5565ea9
--- /dev/null
+++ b/board/CZ.NIC/turris_common.h
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#ifndef TURRIS_COMMON_H
+#define TURRIS_COMMON_H
+
+#include <asm/types.h>
+
+void turris_init_mac_addresses(int first_idx, const u8 *first_mac);
+
+#endif
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 3489bdd..1a2f60e 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -565,13 +565,10 @@
int checkboard(void)
{
int i, ret, board_version, ram_size, is_sd;
- const char *pub_key, *model;
+ const char *pub_key;
const u8 *topology;
u64 serial_number;
- model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
- printf("Model: %s\n", model);
-
ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
&ram_size, NULL);
if (ret < 0) {
diff --git a/board/CZ.NIC/turris_omnia/Makefile b/board/CZ.NIC/turris_omnia/Makefile
index dc39b44..341378b 100644
--- a/board/CZ.NIC/turris_omnia/Makefile
+++ b/board/CZ.NIC/turris_omnia/Makefile
@@ -2,4 +2,4 @@
#
# Copyright (C) 2017 Marek Behún <kabel@kernel.org>
-obj-y := turris_omnia.o ../turris_atsha_otp.o
+obj-y := turris_omnia.o ../turris_atsha_otp.o ../turris_common.o
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index adeb69a..3b7a71b 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -18,18 +18,22 @@
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
+#include <asm/unaligned.h>
#include <dm/uclass.h>
#include <dt-bindings/gpio/gpio.h>
#include <fdt_support.h>
#include <hexdump.h>
#include <time.h>
+#include <turris-omnia-mcu-interface.h>
#include <linux/bitops.h>
+#include <linux/bitrev.h>
#include <linux/delay.h>
#include <u-boot/crc.h>
#include "../drivers/ddr/marvell/a38x/ddr3_init.h"
#include <../serdes/a38x/high_speed_env_spec.h>
#include "../turris_atsha_otp.h"
+#include "../turris_common.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -59,46 +63,6 @@
#define A385_WD_RSTOUT_UNMASK MVEBU_REGISTER(0x20704)
#define A385_WD_RSTOUT_UNMASK_GLOBAL BIT(8)
-enum mcu_commands {
- CMD_GET_STATUS_WORD = 0x01,
- CMD_GET_RESET = 0x09,
- CMD_GET_FW_VERSION_APP = 0x0a,
- CMD_WATCHDOG_STATE = 0x0b,
- CMD_GET_FW_VERSION_BOOT = 0x0e,
-
- /* available if STS_FEATURES_SUPPORTED bit set in status word */
- CMD_GET_FEATURES = 0x10,
-
- /* available if EXT_CMD bit set in features */
- CMD_EXT_CONTROL = 0x12,
-};
-
-enum status_word_bits {
- STS_MCU_TYPE_MASK = GENMASK(1, 0),
- STS_MCU_TYPE_STM32 = 0,
- STS_MCU_TYPE_GD32 = 1,
- STS_MCU_TYPE_MKL = 2,
- STS_MCU_TYPE_UNKN = 3,
- STS_FEATURES_SUPPORTED = BIT(2),
- CARD_DET_STSBIT = 0x0010,
- MSATA_IND_STSBIT = 0x0020,
-};
-
-/* CMD_GET_FEATURES */
-enum features_e {
- FEAT_PERIPH_MCU = BIT(0),
- FEAT_EXT_CMDS = BIT(1),
-};
-
-/* CMD_EXT_CONTROL */
-enum ext_ctl_e {
- EXT_CTL_nRES_LAN = BIT(1),
- EXT_CTL_nRES_PHY = BIT(2),
- EXT_CTL_nPERST0 = BIT(3),
- EXT_CTL_nPERST1 = BIT(4),
- EXT_CTL_nPERST2 = BIT(5),
-};
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2014_T3.0"
@@ -172,6 +136,141 @@
return dm_i2c_write(chip, cmd, buf, len);
}
+static int omnia_mcu_get_sts_and_features(u16 *psts, u32 *pfeatures)
+{
+ u16 sts, feat16;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &sts, sizeof(sts));
+ if (ret)
+ return ret;
+
+ if (psts)
+ *psts = sts;
+
+ if (!pfeatures)
+ return 0;
+
+ if (sts & STS_FEATURES_SUPPORTED) {
+ /* try read 32-bit features */
+ ret = omnia_mcu_read(CMD_GET_FEATURES, pfeatures,
+ sizeof(*pfeatures));
+ if (ret) {
+ /* try read 16-bit features */
+ ret = omnia_mcu_read(CMD_GET_FEATURES, &feat16,
+ sizeof(&feat16));
+ if (ret)
+ return ret;
+
+ *pfeatures = feat16;
+ } else {
+ if (*pfeatures & FEAT_FROM_BIT_16_INVALID)
+ *pfeatures &= GENMASK(15, 0);
+ }
+ } else {
+ *pfeatures = 0;
+ }
+
+ return 0;
+}
+
+static int omnia_mcu_get_sts(u16 *sts)
+{
+ return omnia_mcu_get_sts_and_features(sts, NULL);
+}
+
+static bool omnia_mcu_has_feature(u32 feature)
+{
+ u32 features;
+
+ if (omnia_mcu_get_sts_and_features(NULL, &features))
+ return false;
+
+ return feature & features;
+}
+
+static u32 omnia_mcu_crc32(const void *p, size_t len)
+{
+ u32 val, crc = 0;
+
+ compiletime_assert(!(len % 4), "length has to be a multiple of 4");
+
+ while (len) {
+ val = bitrev32(get_unaligned_le32(p));
+ crc = crc32(crc, (void *)&val, 4);
+ p += 4;
+ len -= 4;
+ }
+
+ return ~bitrev32(crc);
+}
+
+/* Can only be called after relocation, since it needs cleared BSS */
+static int omnia_mcu_board_info(char *serial, u8 *mac, char *version)
+{
+ static u8 reply[17];
+ static bool cached;
+
+ if (!cached) {
+ u8 csum;
+ int ret;
+
+ ret = omnia_mcu_read(CMD_BOARD_INFO_GET, reply, sizeof(reply));
+ if (ret)
+ return ret;
+
+ if (reply[0] != 16)
+ return -EBADMSG;
+
+ csum = reply[16];
+ reply[16] = 0;
+
+ if ((omnia_mcu_crc32(&reply[1], 16) & 0xff) != csum)
+ return -EBADMSG;
+
+ cached = true;
+ }
+
+ if (serial) {
+ const char *serial_env;
+
+ serial_env = env_get("serial#");
+ if (serial_env && strlen(serial_env) == 16) {
+ strcpy(serial, serial_env);
+ } else {
+ sprintf(serial, "%016llX",
+ get_unaligned_le64(&reply[1]));
+ env_set("serial#", serial);
+ }
+ }
+
+ if (mac)
+ memcpy(mac, &reply[9], ETH_ALEN);
+
+ if (version)
+ sprintf(version, "%u", reply[15]);
+
+ return 0;
+}
+
+static int omnia_mcu_get_board_public_key(char pub_key[static 67])
+{
+ u8 reply[34];
+ int ret;
+
+ ret = omnia_mcu_read(CMD_CRYPTO_GET_PUBLIC_KEY, reply, sizeof(reply));
+ if (ret)
+ return ret;
+
+ if (reply[0] != 33)
+ return -EBADMSG;
+
+ bin2hex(pub_key, &reply[1], 33);
+ pub_key[66] = '\0';
+
+ return 0;
+}
+
static void enable_a385_watchdog(unsigned int timeout_minutes)
{
struct sar_freq_modes sar_freq;
@@ -219,7 +318,7 @@
puts("Disabling MCU watchdog... ");
- ret = omnia_mcu_write(CMD_WATCHDOG_STATE, "\x00", 1);
+ ret = omnia_mcu_write(CMD_SET_WATCHDOG_STATE, "\x00", 1);
if (ret) {
printf("omnia_mcu_write failed: %i\n", ret);
return false;
@@ -233,7 +332,7 @@
static bool omnia_detect_sata(const char *msata_slot)
{
int ret;
- u16 stsword;
+ u16 sts;
puts("MiniPCIe/mSATA card detection... ");
@@ -249,24 +348,24 @@
}
}
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword));
+ ret = omnia_mcu_get_sts(&sts);
if (ret) {
printf("omnia_mcu_read failed: %i, defaulting to MiniPCIe card\n",
ret);
return false;
}
- if (!(stsword & CARD_DET_STSBIT)) {
+ if (!(sts & STS_CARD_DET)) {
puts("none\n");
return false;
}
- if (stsword & MSATA_IND_STSBIT)
+ if (sts & STS_MSATA_IND)
puts("mSATA\n");
else
puts("MiniPCIe\n");
- return stsword & MSATA_IND_STSBIT ? true : false;
+ return sts & STS_MSATA_IND;
}
static bool omnia_detect_wwan_usb3(const char *wwan_slot)
@@ -393,32 +492,33 @@
static const char * const omnia_get_mcu_type(void)
{
- static const char * const mcu_types[] = {
- [STS_MCU_TYPE_STM32] = "STM32",
- [STS_MCU_TYPE_GD32] = "GD32",
- [STS_MCU_TYPE_MKL] = "MKL",
- [STS_MCU_TYPE_UNKN] = "unknown",
- };
- static const char * const mcu_types_with_perip_resets[] = {
- [STS_MCU_TYPE_STM32] = "STM32 (with peripheral resets)",
- [STS_MCU_TYPE_GD32] = "GD32 (with peripheral resets)",
- [STS_MCU_TYPE_MKL] = "MKL (with peripheral resets)",
- [STS_MCU_TYPE_UNKN] = "unknown (with peripheral resets)",
- };
- u16 stsword, features;
+ static char result[] = "xxxxxxx (with peripheral resets)";
+ u16 sts;
int ret;
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &stsword, sizeof(stsword));
+ ret = omnia_mcu_get_sts(&sts);
if (ret)
return "unknown";
- if (stsword & STS_FEATURES_SUPPORTED) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, &features, sizeof(features));
- if (ret == 0 && (features & FEAT_PERIPH_MCU))
- return mcu_types_with_perip_resets[stsword & STS_MCU_TYPE_MASK];
+ switch (sts & STS_MCU_TYPE_MASK) {
+ case STS_MCU_TYPE_STM32:
+ strcpy(result, "STM32");
+ break;
+ case STS_MCU_TYPE_GD32:
+ strcpy(result, "GD32");
+ break;
+ case STS_MCU_TYPE_MKL:
+ strcpy(result, "MKL");
+ break;
+ default:
+ strcpy(result, "unknown");
+ break;
}
- return mcu_types[stsword & STS_MCU_TYPE_MASK];
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU))
+ strcat(result, " (with peripheral resets)");
+
+ return result;
}
static const char * const omnia_get_mcu_version(void)
@@ -695,9 +795,6 @@
void spl_board_init(void)
{
- u16 val;
- int ret;
-
/*
* If booting from UART, disable MCU watchdog in SPL, since uploading
* U-Boot proper can take too much time and trigger it. Instead enable
@@ -714,12 +811,8 @@
* resets then LAN eth switch is initialized automatically by bootstrap
* pins when A385 is released from the reset.
*/
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &val, sizeof(val));
- if (ret == 0 && (val & STS_FEATURES_SUPPORTED)) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, &val, sizeof(val));
- if (ret == 0 && (val & FEAT_PERIPH_MCU))
- initialize_switch();
- }
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU))
+ initialize_switch();
}
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP) || IS_ENABLED(CONFIG_OF_BOARD_SETUP)
@@ -914,26 +1007,40 @@
return 0;
}
+static void fixup_atsha_node(void *blob)
+{
+ int node;
+
+ if (!omnia_mcu_has_feature(FEAT_CRYPTO))
+ return;
+
+ node = fdt_node_offset_by_compatible(blob, -1, "atmel,atsha204a");
+ if (node < 0) {
+ printf("Cannot find ATSHA204A node!\n");
+ return;
+ }
+
+ if (fdt_status_disabled(blob, node) < 0)
+ printf("Cannot disable ATSHA204A node!\n");
+ else
+ debug("Disabled ATSHA204A node\n");
+}
+
#endif
#if IS_ENABLED(CONFIG_OF_BOARD_FIXUP)
int board_fix_fdt(void *blob)
{
- u16 val;
- int ret;
-
- ret = omnia_mcu_read(CMD_GET_STATUS_WORD, &val, sizeof(val));
- if (ret == 0 && (val & STS_FEATURES_SUPPORTED)) {
- ret = omnia_mcu_read(CMD_GET_FEATURES, &val, sizeof(val));
- if (ret == 0 && (val & FEAT_PERIPH_MCU)) {
- fixup_mcu_gpio_in_pcie_nodes(blob);
- fixup_mcu_gpio_in_eth_wan_node(blob);
- }
+ if (omnia_mcu_has_feature(FEAT_PERIPH_MCU)) {
+ fixup_mcu_gpio_in_pcie_nodes(blob);
+ fixup_mcu_gpio_in_eth_wan_node(blob);
}
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
+ fixup_atsha_node(blob);
+
return 0;
}
#endif
@@ -964,23 +1071,46 @@
int checkboard(void)
{
- char serial[17];
+ char serial[17], version[4], pub_key[67];
+ bool has_version;
int err;
- err = turris_atsha_otp_get_serial_number(serial);
- printf("Model: Turris Omnia\n");
printf(" MCU type: %s\n", omnia_get_mcu_type());
printf(" MCU version: %s\n", omnia_get_mcu_version());
printf(" RAM size: %i MiB\n", omnia_get_ram_size_gb() * 1024);
+
+ if (omnia_mcu_has_feature(FEAT_BOARD_INFO)) {
+ err = omnia_mcu_board_info(serial, NULL, version);
+ has_version = !err;
+ } else {
+ err = turris_atsha_otp_get_serial_number(serial);
+ has_version = false;
+ }
+
+ printf(" Board version: %s\n", has_version ? version : "unknown");
printf(" Serial Number: %s\n", !err ? serial : "unknown");
+ if (omnia_mcu_has_feature(FEAT_CRYPTO)) {
+ err = omnia_mcu_get_board_public_key(pub_key);
+ printf(" ECDSA Public Key: %s\n", !err ? pub_key : "unknown");
+ }
+
return 0;
}
int misc_init_r(void)
{
- turris_atsha_otp_init_mac_addresses(1);
- turris_atsha_otp_init_serial_number();
+ if (omnia_mcu_has_feature(FEAT_BOARD_INFO)) {
+ char serial[17];
+ u8 first_mac[6];
+
+ if (!omnia_mcu_board_info(serial, first_mac, NULL))
+ turris_init_mac_addresses(1, first_mac);
+ } else {
+ turris_atsha_otp_init_mac_addresses(1);
+ turris_atsha_otp_init_serial_number();
+ }
+
return 0;
}
@@ -1102,6 +1232,8 @@
fixup_msata_port_nodes(blob);
fixup_wwan_port_nodes(blob);
+ fixup_atsha_node(blob);
+
return 0;
}
#endif
diff --git a/board/amlogic/jethub-j100/MAINTAINERS b/board/amlogic/jethub-j100/MAINTAINERS
index 43f6a5f..3edc5d8 100644
--- a/board/amlogic/jethub-j100/MAINTAINERS
+++ b/board/amlogic/jethub-j100/MAINTAINERS
@@ -1,5 +1,5 @@
JetHome JetHub
-M: Vyacheslav Bocharov <adeep@lexina.in>
+M: Viacheslav Bocharov <adeep@lexina.in>
S: Maintained
L: u-boot-amlogic@groups.io
F: board/amlogic/jethub-j100/
diff --git a/cmd/rng.c b/cmd/rng.c
index b073a6c..e5ab868 100644
--- a/cmd/rng.c
+++ b/cmd/rng.c
@@ -17,7 +17,7 @@
u8 buf[64];
int devnum;
struct udevice *dev;
- int ret = CMD_RET_SUCCESS;
+ int ret = CMD_RET_SUCCESS, err;
if (argc == 2 && !strcmp(argv[1], "list")) {
int idx = 0;
@@ -62,8 +62,9 @@
n = min(n, sizeof(buf));
- if (dm_rng_read(dev, buf, n)) {
- printf("Reading RNG failed\n");
+ err = dm_rng_read(dev, buf, n);
+ if (err) {
+ puts(err == -EINTR ? "Abort\n" : "Reading RNG failed\n");
ret = CMD_RET_FAILURE;
} else {
print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, buf, n);
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index cc17a8b..977daf9 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -6,6 +6,7 @@
CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFKW/kwbimage.cfg"
CONFIG_TEXT_BASE=0x00600000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
+# CONFIG_OF_UPSTREAM is not set
CONFIG_TARGET_SBx81LIFKW=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index 0612723..9bc8614 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -6,6 +6,7 @@
CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg"
CONFIG_TEXT_BASE=0x00600000
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000
+# CONFIG_OF_UPSTREAM is not set
CONFIG_TARGET_SBx81LIFXCAT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xC0000
diff --git a/configs/bananapi-cm4-cm4io_defconfig b/configs/bananapi-cm4-cm4io_defconfig
index 116147f..cb78dab 100644
--- a/configs/bananapi-cm4-cm4io_defconfig
+++ b/configs/bananapi-cm4-cm4io_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-bananapi-cm4-cm4io"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-bananapi-cm4-cm4io"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig
index 755bccb..196bc40 100644
--- a/configs/bananapi-m2-pro_defconfig
+++ b/configs/bananapi-m2-pro_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m2-pro"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-bananapi-m2-pro"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig
index af8dace..7b137d5 100644
--- a/configs/bananapi-m2s_defconfig
+++ b/configs/bananapi-m2s_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-bananapi-m2s"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-bananapi-m2s"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig
index 6de5d5f..99ed7c9 100644
--- a/configs/bananapi-m5_defconfig
+++ b/configs/bananapi-m5_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m5"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-bananapi-m5"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig
index 99e36e9..c1e60ed 100644
--- a/configs/beelink-gsking-x_defconfig
+++ b/configs/beelink-gsking-x_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gsking-x"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-gsking-x"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/beelink-gt1-ultimate_defconfig b/configs/beelink-gt1-ultimate_defconfig
index 00fdad8..0e30e13 100644
--- a/configs/beelink-gt1-ultimate_defconfig
+++ b/configs/beelink-gt1-ultimate_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-gt1-ultimate"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-gt1-ultimate"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig
index 5c21d8e..0b644f0 100644
--- a/configs/beelink-gtking_defconfig
+++ b/configs/beelink-gtking_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-gtking"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig
index 37bb4cd..a694617 100644
--- a/configs/beelink-gtkingpro_defconfig
+++ b/configs/beelink-gtkingpro_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-gtking-pro"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index bb1bcb0..69658a2 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-d2net"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-d2net"
CONFIG_IDENT_STRING=" D2 v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index edfe92c..b85f7ca 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_DNS325=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-dns325"
CONFIG_IDENT_STRING="\nD-Link DNS-325"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 719fa39..7b5f194 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_DOCKSTAR=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dockstar"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-dockstar"
CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index 02a2635..8518eab 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -13,7 +13,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x100000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dreamplug"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-dreamplug"
CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x100000
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index 304c098..ef805ec 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -14,7 +14,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x3D0000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ds109"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x3D0000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index d577d58..53b2ce9 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_GOFLEXHOME=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-goflexnet"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-goflexnet"
CONFIG_IDENT_STRING="\nSeagate GoFlex Home"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 7cb649e..5371ee4 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_GURUPLUG=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-guruplug-server-plus"
CONFIG_IDENT_STRING="\nMarvell-GuruPlug"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 074384e..32b0e1c 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_IB62X0=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ib62x0"
CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index f7b74c4..45ffbd9 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_ICONNECT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-iconnect"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-iconnect"
CONFIG_IDENT_STRING=" Iomega iConnect"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_PCI=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 2e8e3f3..3fa7790 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -11,7 +11,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-is2"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-is2"
CONFIG_IDENT_STRING=" IS v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig
index 8632454..9de6b4b 100644
--- a/configs/jethub_j100_defconfig
+++ b/configs/jethub_j100_defconfig
@@ -8,7 +8,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-axg-jethome-jethub-j100"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-axg-jethome-jethub-j100"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_AXG=y
diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig
index ca0808f..8530687 100644
--- a/configs/jethub_j80_defconfig
+++ b/configs/jethub_j80_defconfig
@@ -8,7 +8,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905w-jethome-jethub-j80"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905w-jethome-jethub-j80"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig
index 59ef337..50f8b30 100644
--- a/configs/khadas-vim2_defconfig
+++ b/configs/khadas-vim2_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-khadas-vim2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig
index ee62fe3..37b8d6a 100644
--- a/configs/khadas-vim3_android_ab_defconfig
+++ b/configs/khadas-vim3_android_ab_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-khadas-vim3"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig
index cecbe50..55d59dd 100644
--- a/configs/khadas-vim3_android_defconfig
+++ b/configs/khadas-vim3_android_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-khadas-vim3"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig
index 5df4b92..32579b8 100644
--- a/configs/khadas-vim3_defconfig
+++ b/configs/khadas-vim3_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-a311d-khadas-vim3"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig
index ec4e0dc..95e7027 100644
--- a/configs/khadas-vim3l_android_ab_defconfig
+++ b/configs/khadas-vim3l_android_ab_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-khadas-vim3l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig
index 206f8de..6372d11 100644
--- a/configs/khadas-vim3l_android_defconfig
+++ b/configs/khadas-vim3l_android_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x0
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-khadas-vim3l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig
index de8fdd8..b9f4690 100644
--- a/configs/khadas-vim3l_defconfig
+++ b/configs/khadas-vim3l_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-khadas-vim3l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
index 5ed7c1a..ac00e89 100644
--- a/configs/khadas-vim_defconfig
+++ b/configs/khadas-vim_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-khadas-vim"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index f0ab195..6ad0457 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -9,7 +9,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s805x-libretech-ac"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
index bb1a37a..beb919c 100644
--- a/configs/libretech-cc_defconfig
+++ b/configs/libretech-cc_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-libretech-cc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig
index 8949e24..784a269 100644
--- a/configs/libretech-cc_v2_defconfig
+++ b/configs/libretech-cc_v2_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-libretech-cc-v2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index a5dc311..0adc0af 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -9,7 +9,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905d-libretech-pc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index 68f462e..cbce0cf 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -8,7 +8,7 @@
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-s912-libretech-pc"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 99bdbc1..ad06007 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -15,7 +15,7 @@
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-lschlv2"
CONFIG_IDENT_STRING=" LS-CHLv2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index bb0a5dd..b2d9f0c 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -16,7 +16,7 @@
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-lsxhl"
CONFIG_IDENT_STRING=" LS-XHL"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index f01b26f..4ea342a 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -10,7 +10,7 @@
CONFIG_TARGET_NAS220=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xA0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-blackarmor-nas220"
CONFIG_IDENT_STRING="\nNAS 220"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index dda627a..39cbc33 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-net2big"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-net2big"
CONFIG_IDENT_STRING=" 2Big v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index 742e620..cd416cb 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2lite"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2lite"
CONFIG_IDENT_STRING=" NS v2 Lite"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 7779e68..6a3d929 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2max"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2max"
CONFIG_IDENT_STRING=" NS Max v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index 9e3614b..e25631b 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2mini"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2mini"
CONFIG_IDENT_STRING=" NS v2 Mini"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index 1583a0a..b6ac2a8 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -12,7 +12,7 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_OFFSET=0x70000
CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ns2"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-ns2"
CONFIG_IDENT_STRING=" NS v2"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0x70000
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 89d8b18..e859a43 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_NSA310S=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xE0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa310s"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-nsa310s"
CONFIG_DEBUG_UART_BASE=0xf1012000
CONFIG_DEBUG_UART_CLOCK=166666667
CONFIG_IDENT_STRING="\nZyXEL NSA310S/320S 1/2-Bay Power Media Server"
diff --git a/configs/nsa325_defconfig b/configs/nsa325_defconfig
index 5da4a00..88a8900 100644
--- a/configs/nsa325_defconfig
+++ b/configs/nsa325_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_NSA325=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-nsa325"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-nsa325"
CONFIG_IDENT_STRING="\nZyXEL NSA325 2-Bay Power Media Server"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_PCI=y
diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig
index fe1f861..4ef1e68 100644
--- a/configs/odroid-c4_defconfig
+++ b/configs/odroid-c4_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-odroid-c4"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig
index 49d628b..06437fe 100644
--- a/configs/odroid-go-ultra_defconfig
+++ b/configs/odroid-go-ultra_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-go-ultra"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-odroid-go-ultra"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig
index 7720ab5..60233fb 100644
--- a/configs/odroid-hc4_defconfig
+++ b/configs/odroid-hc4_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-odroid-hc4"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig
index 9694f04..a4cc766 100644
--- a/configs/odroid-n2_defconfig
+++ b/configs/odroid-n2_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-odroid-n2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/odroid-n2l_defconfig b/configs/odroid-n2l_defconfig
index 673e0cf..3f657d1 100644
--- a/configs/odroid-n2l_defconfig
+++ b/configs/odroid-n2l_defconfig
@@ -7,7 +7,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2l"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-odroid-n2l"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index 29a14e0..057dd28 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -11,7 +11,7 @@
CONFIG_TARGET_OPENRD=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-base"
CONFIG_IDENT_STRING="\nOpenRD-Base"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index a95a435..05e4292 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -12,7 +12,7 @@
CONFIG_BOARD_IS_OPENRD_CLIENT=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-client"
CONFIG_IDENT_STRING="\nOpenRD-Client"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index e3f5294..6e13c6e 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -12,7 +12,7 @@
CONFIG_BOARD_IS_OPENRD_ULTIMATE=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-openrd-ultimate"
CONFIG_IDENT_STRING="\nOpenRD-Ultimate"
CONFIG_SYS_LOAD_ADDR=0x800000
# CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/p212_defconfig b/configs/p212_defconfig
index 6b73607..9cf22ca 100644
--- a/configs/p212_defconfig
+++ b/configs/p212_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxl-s905x-p212"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXL=y
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index e53ccf3..880cb20 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_POGO_E02=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogo_e02"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-pogo_e02"
CONFIG_IDENT_STRING="\nPogo E02"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_BOOTDELAY=3
diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig
index 95e22b3..50046e8 100644
--- a/configs/pogo_v4_defconfig
+++ b/configs/pogo_v4_defconfig
@@ -12,7 +12,7 @@
CONFIG_TARGET_POGO_V4=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0xC0000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-pogoplug-series-4"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-pogoplug-series-4"
CONFIG_IDENT_STRING="\nPogoplug V4"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_PCI=y
diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig
index 222db64..1abb573 100644
--- a/configs/qcom_defconfig
+++ b/configs/qcom_defconfig
@@ -18,33 +18,58 @@
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_CMD_BOOTMENU=y
+CONFIG_CMD_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_BUS=2
+CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
+CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
+# CONFIG_CMD_BIND is not set
CONFIG_CMD_CLK=y
CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_UFS=y
CONFIG_CMD_USB=y
CONFIG_CMD_CAT=y
CONFIG_CMD_BMP=y
CONFIG_CMD_LOG=y
-# CONFIG_NET is not set
+CONFIG_OF_LIVE=y
CONFIG_BUTTON_QCOM_PMIC=y
CONFIG_CLK=y
CONFIG_CLK_QCOM_QCS404=y
CONFIG_CLK_QCOM_SDM845=y
CONFIG_MSM_GPIO=y
CONFIG_QCOM_PMIC_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_QUP=y
+CONFIG_I2C_MUX=y
CONFIG_DM_KEYBOARD=y
CONFIG_BUTTON_KEYBOARD=y
+CONFIG_IOMMU=y
+CONFIG_QCOM_HYP_SMMU=y
+CONFIG_MISC=y
+CONFIG_NVMEM=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ADMA=y
CONFIG_MMC_SDHCI_MSM=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_ETH_PHY=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_QCOM=y
+CONFIG_RGMII=y
CONFIG_PHY=y
+CONFIG_PHY_QCOM_QUSB2=y
+CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_QCOM_QCS404=y
CONFIG_PINCTRL_QCOM_SDM845=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_QCOM=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SCSI=y
CONFIG_MSM_SERIAL=y
CONFIG_MSM_GENI_SERIAL=y
@@ -55,6 +80,10 @@
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
CONFIG_UFS=y
CONFIG_VIDEO=y
# CONFIG_VIDEO_FONT_8X16 is not set
diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig
index b795681..92e0a88 100644
--- a/configs/radxa-zero2_defconfig
+++ b/configs/radxa-zero2_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12b-radxa-zero2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig
index 103ff8a..5179c58 100644
--- a/configs/radxa-zero_defconfig
+++ b/configs/radxa-zero_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12a-radxa-zero"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/s400_defconfig b/configs/s400_defconfig
index 8e22c95..d75d296 100644
--- a/configs/s400_defconfig
+++ b/configs/s400_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-axg-s400"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_AXG=y
diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig
index c4a49fb..791979e 100644
--- a/configs/sei510_defconfig
+++ b/configs/sei510_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12a-sei510"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig
index ae254c6..ce53743 100644
--- a/configs/sei610_defconfig
+++ b/configs/sei610_defconfig
@@ -10,7 +10,7 @@
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xFFFF0000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-sm1-sei610"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 0af87dc4..b673b3f 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -13,7 +13,7 @@
CONFIG_TARGET_SHEEVAPLUG=y
CONFIG_ENV_SIZE=0x20000
CONFIG_ENV_OFFSET=0x80000
-CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug"
+CONFIG_DEFAULT_DEVICE_TREE="marvell/kirkwood-sheevaplug"
CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_HAS_BOARD_SIZE_LIMIT=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 2914840..f2b3911 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -31,6 +31,7 @@
CONFIG_OF_BOARD_FIXUP=y
CONFIG_SYS_MEMTEST_START=0x00800000
CONFIG_SYS_MEMTEST_END=0x00ffffff
+CONFIG_LTO=y
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=983040
CONFIG_FIT=y
@@ -64,6 +65,7 @@
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_PCI=y
+CONFIG_CMD_POWEROFF=y
CONFIG_CMD_SATA=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
@@ -71,6 +73,7 @@
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
CONFIG_CMD_AES=y
CONFIG_CMD_HASH=y
CONFIG_CMD_BTRFS=y
@@ -105,6 +108,7 @@
CONFIG_PCI_MVEBU=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_ARMADA_38X=y
+CONFIG_DM_RNG=y
CONFIG_DM_RTC=y
CONFIG_RTC_ARMADA38X=y
CONFIG_SERIAL_PROBE_ALL=y
@@ -112,6 +116,8 @@
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_KIRKWOOD_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_SYSRESET_CMD_POWEROFF=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/u200_defconfig b/configs/u200_defconfig
index 21c90e7..879ae0d 100644
--- a/configs/u200_defconfig
+++ b/configs/u200_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-g12a-u200"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_G12A=y
diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig
index 01ffb8b..c4b126c 100644
--- a/configs/wetek-core2_defconfig
+++ b/configs/wetek-core2_defconfig
@@ -6,7 +6,7 @@
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000
CONFIG_ENV_SIZE=0x2000
CONFIG_DM_GPIO=y
-CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2"
+CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxm-wetek-core2"
CONFIG_OF_LIBFDT_OVERLAY=y
CONFIG_DM_RESET=y
CONFIG_MESON_GXM=y
diff --git a/doc/board/amlogic/jethub-j100.rst b/doc/board/amlogic/jethub-j100.rst
index 86acdaf..cbf1ea7 100644
--- a/doc/board/amlogic/jethub-j100.rst
+++ b/doc/board/amlogic/jethub-j100.rst
@@ -1,9 +1,9 @@
.. SPDX-License-Identifier: GPL-2.0+
-U-Boot for JetHub J100 (A113X)
-==============================
+U-Boot for JetHub J100/J110 (A113X)
+===================================
-JetHome Jethub D1 (http://jethome.ru/jethub-d1) is a home automation controller device
+JetHome Jethub D1/D1+ (http://jethome.ru/jethub-d1p) is a home automation controller device
manufactured by JetHome with the following specifications:
- Amlogic A113X (ARM Cortex-A53) quad-core up to 1.5GHz
@@ -23,7 +23,10 @@
The basic version also has:
- - TI CC2538 + CC2592 Zigbee Wireless with upto 20dBm output power and Zigbee 3.0
+ - Zigbee module one from:
+ - TI CC2538 + CC2592 Zigbee 3.0 Wireless
+ - TI CC2652P1 Zigbee 3.0 Wireless
+ - Silicon Labs EFT32MG21 Zigbee 3.0/Thread Wireless
- 1 x 1-Wire
- 2 x RS-485
- 4 x dry contact digital GPIO inputs
diff --git a/drivers/clk/exynos/clk-exynos850.c b/drivers/clk/exynos/clk-exynos850.c
index cf94a3e..0c09ba0 100644
--- a/drivers/clk/exynos/clk-exynos850.c
+++ b/drivers/clk/exynos/clk-exynos850.c
@@ -10,6 +10,13 @@
#include <dt-bindings/clock/exynos850.h>
#include "clk.h"
+enum exynos850_cmu_id {
+ CMU_TOP,
+ CMU_PERI,
+ CMU_CORE,
+ CMU_HSI,
+};
+
/* ---- CMU_TOP ------------------------------------------------------------- */
/* Register Offset definitions for CMU_TOP (0x120e0000) */
@@ -19,9 +26,23 @@
#define PLL_CON3_PLL_SHARED0 0x014c
#define PLL_CON0_PLL_SHARED1 0x0180
#define PLL_CON3_PLL_SHARED1 0x018c
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_BUS 0x1014
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_CCI 0x1018
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_MMC_EMBD 0x101c
+#define CLK_CON_MUX_MUX_CLKCMU_CORE_SSS 0x1020
+#define CLK_CON_MUX_MUX_CLKCMU_HSI_BUS 0x103c
+#define CLK_CON_MUX_MUX_CLKCMU_HSI_MMC_CARD 0x1040
+#define CLK_CON_MUX_MUX_CLKCMU_HSI_USB20DRD 0x1044
#define CLK_CON_MUX_MUX_CLKCMU_PERI_BUS 0x1070
#define CLK_CON_MUX_MUX_CLKCMU_PERI_IP 0x1074
#define CLK_CON_MUX_MUX_CLKCMU_PERI_UART 0x1078
+#define CLK_CON_DIV_CLKCMU_CORE_BUS 0x1820
+#define CLK_CON_DIV_CLKCMU_CORE_CCI 0x1824
+#define CLK_CON_DIV_CLKCMU_CORE_MMC_EMBD 0x1828
+#define CLK_CON_DIV_CLKCMU_CORE_SSS 0x182c
+#define CLK_CON_DIV_CLKCMU_HSI_BUS 0x1848
+#define CLK_CON_DIV_CLKCMU_HSI_MMC_CARD 0x184c
+#define CLK_CON_DIV_CLKCMU_HSI_USB20DRD 0x1850
#define CLK_CON_DIV_CLKCMU_PERI_BUS 0x187c
#define CLK_CON_DIV_CLKCMU_PERI_IP 0x1880
#define CLK_CON_DIV_CLKCMU_PERI_UART 0x1884
@@ -31,23 +52,40 @@
#define CLK_CON_DIV_PLL_SHARED1_DIV2 0x1898
#define CLK_CON_DIV_PLL_SHARED1_DIV3 0x189c
#define CLK_CON_DIV_PLL_SHARED1_DIV4 0x18a0
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_BUS 0x201c
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_CCI 0x2020
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD 0x2024
+#define CLK_CON_GAT_GATE_CLKCMU_CORE_SSS 0x2028
+#define CLK_CON_GAT_GATE_CLKCMU_HSI_BUS 0x2044
+#define CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD 0x2048
+#define CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD 0x204c
#define CLK_CON_GAT_GATE_CLKCMU_PERI_BUS 0x2080
#define CLK_CON_GAT_GATE_CLKCMU_PERI_IP 0x2084
#define CLK_CON_GAT_GATE_CLKCMU_PERI_UART 0x2088
-static const struct samsung_pll_clock top_pure_pll_clks[] = {
- PLL(pll_0822x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "clock-oscclk",
- PLL_CON3_PLL_SHARED0),
- PLL(pll_0822x, CLK_FOUT_SHARED1_PLL, "fout_shared1_pll", "clock-oscclk",
- PLL_CON3_PLL_SHARED1),
- PLL(pll_0831x, CLK_FOUT_MMC_PLL, "fout_mmc_pll", "clock-oscclk",
- PLL_CON3_PLL_MMC),
-};
-
-/* List of parent clocks for Muxes in CMU_TOP */
+/* List of parent clocks for Muxes in CMU_TOP: for PURECLKCOMP */
PNAME(mout_shared0_pll_p) = { "clock-oscclk", "fout_shared0_pll" };
PNAME(mout_shared1_pll_p) = { "clock-oscclk", "fout_shared1_pll" };
PNAME(mout_mmc_pll_p) = { "clock-oscclk", "fout_mmc_pll" };
+/* List of parent clocks for Muxes in CMU_TOP: for CMU_CORE */
+PNAME(mout_core_bus_p) = { "dout_shared1_div2", "dout_shared0_div3",
+ "dout_shared1_div3", "dout_shared0_div4" };
+PNAME(mout_core_cci_p) = { "dout_shared0_div2", "dout_shared1_div2",
+ "dout_shared0_div3", "dout_shared1_div3" };
+PNAME(mout_core_mmc_embd_p) = { "clock-oscclk", "dout_shared0_div2",
+ "dout_shared1_div2", "dout_shared0_div3",
+ "dout_shared1_div3", "mout_mmc_pll",
+ "clock-oscclk", "clock-oscclk" };
+PNAME(mout_core_sss_p) = { "dout_shared0_div3", "dout_shared1_div3",
+ "dout_shared0_div4", "dout_shared1_div4" };
+/* List of parent clocks for Muxes in CMU_TOP: for CMU_HSI */
+PNAME(mout_hsi_bus_p) = { "dout_shared0_div2", "dout_shared1_div2" };
+PNAME(mout_hsi_mmc_card_p) = { "clock-oscclk", "dout_shared0_div2",
+ "dout_shared1_div2", "dout_shared0_div3",
+ "dout_shared1_div3", "mout_mmc_pll",
+ "clock-oscclk", "clock-oscclk" };
+PNAME(mout_hsi_usb20drd_p) = { "clock-oscclk", "dout_shared0_div4",
+ "dout_shared1_div4", "clock-oscclk" };
/* List of parent clocks for Muxes in CMU_TOP: for CMU_PERI */
PNAME(mout_peri_bus_p) = { "dout_shared0_div4", "dout_shared1_div4" };
PNAME(mout_peri_uart_p) = { "clock-oscclk", "dout_shared0_div4",
@@ -55,6 +93,17 @@
PNAME(mout_peri_ip_p) = { "clock-oscclk", "dout_shared0_div4",
"dout_shared1_div4", "clock-oscclk" };
+/* PURECLKCOMP */
+
+static const struct samsung_pll_clock top_pure_pll_clks[] = {
+ PLL(pll_0822x, CLK_FOUT_SHARED0_PLL, "fout_shared0_pll", "clock-oscclk",
+ PLL_CON3_PLL_SHARED0),
+ PLL(pll_0822x, CLK_FOUT_SHARED1_PLL, "fout_shared1_pll", "clock-oscclk",
+ PLL_CON3_PLL_SHARED1),
+ PLL(pll_0831x, CLK_FOUT_MMC_PLL, "fout_mmc_pll", "clock-oscclk",
+ PLL_CON3_PLL_MMC),
+};
+
static const struct samsung_mux_clock top_pure_mux_clks[] = {
MUX(CLK_MOUT_SHARED0_PLL, "mout_shared0_pll", mout_shared0_pll_p,
PLL_CON0_PLL_SHARED0, 4, 1),
@@ -64,15 +113,6 @@
PLL_CON0_PLL_MMC, 4, 1),
};
-static const struct samsung_mux_clock top_peri_mux_clks[] = {
- MUX(CLK_MOUT_PERI_BUS, "mout_peri_bus", mout_peri_bus_p,
- CLK_CON_MUX_MUX_CLKCMU_PERI_BUS, 0, 1),
- MUX(CLK_MOUT_PERI_UART, "mout_peri_uart", mout_peri_uart_p,
- CLK_CON_MUX_MUX_CLKCMU_PERI_UART, 0, 2),
- MUX(CLK_MOUT_PERI_IP, "mout_peri_ip", mout_peri_ip_p,
- CLK_CON_MUX_MUX_CLKCMU_PERI_IP, 0, 2),
-};
-
static const struct samsung_div_clock top_pure_div_clks[] = {
DIV(CLK_DOUT_SHARED0_DIV3, "dout_shared0_div3", "mout_shared0_pll",
CLK_CON_DIV_PLL_SHARED0_DIV3, 0, 2),
@@ -88,15 +128,81 @@
CLK_CON_DIV_PLL_SHARED1_DIV4, 0, 1),
};
-static const struct samsung_div_clock top_peri_div_clks[] = {
- DIV(CLK_DOUT_PERI_BUS, "dout_peri_bus", "gout_peri_bus",
- CLK_CON_DIV_CLKCMU_PERI_BUS, 0, 4),
- DIV(CLK_DOUT_PERI_UART, "dout_peri_uart", "gout_peri_uart",
- CLK_CON_DIV_CLKCMU_PERI_UART, 0, 4),
- DIV(CLK_DOUT_PERI_IP, "dout_peri_ip", "gout_peri_ip",
- CLK_CON_DIV_CLKCMU_PERI_IP, 0, 4),
+/* CORE */
+
+static const struct samsung_mux_clock top_core_mux_clks[] = {
+ MUX(CLK_MOUT_CORE_BUS, "mout_core_bus", mout_core_bus_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_BUS, 0, 2),
+ MUX(CLK_MOUT_CORE_CCI, "mout_core_cci", mout_core_cci_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_CCI, 0, 2),
+ MUX(CLK_MOUT_CORE_MMC_EMBD, "mout_core_mmc_embd", mout_core_mmc_embd_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_MMC_EMBD, 0, 3),
+ MUX(CLK_MOUT_CORE_SSS, "mout_core_sss", mout_core_sss_p,
+ CLK_CON_MUX_MUX_CLKCMU_CORE_SSS, 0, 2),
+};
+
+static const struct samsung_gate_clock top_core_gate_clks[] = {
+ GATE(CLK_GOUT_CORE_BUS, "gout_core_bus", "mout_core_bus",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_BUS, 21, 0, 0),
+ GATE(CLK_GOUT_CORE_CCI, "gout_core_cci", "mout_core_cci",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_CCI, 21, 0, 0),
+ GATE(CLK_GOUT_CORE_MMC_EMBD, "gout_core_mmc_embd", "mout_core_mmc_embd",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_MMC_EMBD, 21, 0, 0),
+ GATE(CLK_GOUT_CORE_SSS, "gout_core_sss", "mout_core_sss",
+ CLK_CON_GAT_GATE_CLKCMU_CORE_SSS, 21, 0, 0),
};
+static const struct samsung_div_clock top_core_div_clks[] = {
+ DIV(CLK_DOUT_CORE_BUS, "dout_core_bus", "gout_core_bus",
+ CLK_CON_DIV_CLKCMU_CORE_BUS, 0, 4),
+ DIV(CLK_DOUT_CORE_CCI, "dout_core_cci", "gout_core_cci",
+ CLK_CON_DIV_CLKCMU_CORE_CCI, 0, 4),
+ DIV(CLK_DOUT_CORE_MMC_EMBD, "dout_core_mmc_embd", "gout_core_mmc_embd",
+ CLK_CON_DIV_CLKCMU_CORE_MMC_EMBD, 0, 9),
+ DIV(CLK_DOUT_CORE_SSS, "dout_core_sss", "gout_core_sss",
+ CLK_CON_DIV_CLKCMU_CORE_SSS, 0, 4),
+};
+
+/* HSI */
+
+static const struct samsung_mux_clock top_hsi_mux_clks[] = {
+ MUX(CLK_MOUT_HSI_BUS, "mout_hsi_bus", mout_hsi_bus_p,
+ CLK_CON_MUX_MUX_CLKCMU_HSI_BUS, 0, 1),
+ MUX(CLK_MOUT_HSI_MMC_CARD, "mout_hsi_mmc_card", mout_hsi_mmc_card_p,
+ CLK_CON_MUX_MUX_CLKCMU_HSI_MMC_CARD, 0, 3),
+ MUX(CLK_MOUT_HSI_USB20DRD, "mout_hsi_usb20drd", mout_hsi_usb20drd_p,
+ CLK_CON_MUX_MUX_CLKCMU_HSI_USB20DRD, 0, 2),
+};
+
+static const struct samsung_gate_clock top_hsi_gate_clks[] = {
+ GATE(CLK_GOUT_HSI_BUS, "gout_hsi_bus", "mout_hsi_bus",
+ CLK_CON_GAT_GATE_CLKCMU_HSI_BUS, 21, 0, 0),
+ GATE(CLK_GOUT_HSI_MMC_CARD, "gout_hsi_mmc_card", "mout_hsi_mmc_card",
+ CLK_CON_GAT_GATE_CLKCMU_HSI_MMC_CARD, 21, 0, 0),
+ GATE(CLK_GOUT_HSI_USB20DRD, "gout_hsi_usb20drd", "mout_hsi_usb20drd",
+ CLK_CON_GAT_GATE_CLKCMU_HSI_USB20DRD, 21, 0, 0),
+};
+
+static const struct samsung_div_clock top_hsi_div_clks[] = {
+ DIV(CLK_DOUT_HSI_BUS, "dout_hsi_bus", "gout_hsi_bus",
+ CLK_CON_DIV_CLKCMU_HSI_BUS, 0, 4),
+ DIV(CLK_DOUT_HSI_MMC_CARD, "dout_hsi_mmc_card", "gout_hsi_mmc_card",
+ CLK_CON_DIV_CLKCMU_HSI_MMC_CARD, 0, 9),
+ DIV(CLK_DOUT_HSI_USB20DRD, "dout_hsi_usb20drd", "gout_hsi_usb20drd",
+ CLK_CON_DIV_CLKCMU_HSI_USB20DRD, 0, 4),
+};
+
+/* PERI */
+
+static const struct samsung_mux_clock top_peri_mux_clks[] = {
+ MUX(CLK_MOUT_PERI_BUS, "mout_peri_bus", mout_peri_bus_p,
+ CLK_CON_MUX_MUX_CLKCMU_PERI_BUS, 0, 1),
+ MUX(CLK_MOUT_PERI_UART, "mout_peri_uart", mout_peri_uart_p,
+ CLK_CON_MUX_MUX_CLKCMU_PERI_UART, 0, 2),
+ MUX(CLK_MOUT_PERI_IP, "mout_peri_ip", mout_peri_ip_p,
+ CLK_CON_MUX_MUX_CLKCMU_PERI_IP, 0, 2),
+};
+
static const struct samsung_gate_clock top_peri_gate_clks[] = {
GATE(CLK_GOUT_PERI_BUS, "gout_peri_bus", "mout_peri_bus",
CLK_CON_GAT_GATE_CLKCMU_PERI_BUS, 21, 0, 0),
@@ -106,12 +212,31 @@
CLK_CON_GAT_GATE_CLKCMU_PERI_IP, 21, 0, 0),
};
+static const struct samsung_div_clock top_peri_div_clks[] = {
+ DIV(CLK_DOUT_PERI_BUS, "dout_peri_bus", "gout_peri_bus",
+ CLK_CON_DIV_CLKCMU_PERI_BUS, 0, 4),
+ DIV(CLK_DOUT_PERI_UART, "dout_peri_uart", "gout_peri_uart",
+ CLK_CON_DIV_CLKCMU_PERI_UART, 0, 4),
+ DIV(CLK_DOUT_PERI_IP, "dout_peri_ip", "gout_peri_ip",
+ CLK_CON_DIV_CLKCMU_PERI_IP, 0, 4),
+};
+
static const struct samsung_clk_group top_cmu_clks[] = {
/* CMU_TOP_PURECLKCOMP */
{ S_CLK_PLL, top_pure_pll_clks, ARRAY_SIZE(top_pure_pll_clks) },
{ S_CLK_MUX, top_pure_mux_clks, ARRAY_SIZE(top_pure_mux_clks) },
{ S_CLK_DIV, top_pure_div_clks, ARRAY_SIZE(top_pure_div_clks) },
+ /* CMU_TOP clocks for CMU_CORE */
+ { S_CLK_MUX, top_core_mux_clks, ARRAY_SIZE(top_core_mux_clks) },
+ { S_CLK_GATE, top_core_gate_clks, ARRAY_SIZE(top_core_gate_clks) },
+ { S_CLK_DIV, top_core_div_clks, ARRAY_SIZE(top_core_div_clks) },
+
+ /* CMU_TOP clocks for CMU_HSI */
+ { S_CLK_MUX, top_hsi_mux_clks, ARRAY_SIZE(top_hsi_mux_clks) },
+ { S_CLK_GATE, top_hsi_gate_clks, ARRAY_SIZE(top_hsi_gate_clks) },
+ { S_CLK_DIV, top_hsi_div_clks, ARRAY_SIZE(top_hsi_div_clks) },
+
/* CMU_TOP clocks for CMU_PERI */
{ S_CLK_MUX, top_peri_mux_clks, ARRAY_SIZE(top_peri_mux_clks) },
{ S_CLK_GATE, top_peri_gate_clks, ARRAY_SIZE(top_peri_gate_clks) },
@@ -120,7 +245,7 @@
static int exynos850_cmu_top_probe(struct udevice *dev)
{
- return samsung_cmu_register_one(dev, top_cmu_clks,
+ return samsung_cmu_register_one(dev, CMU_TOP, top_cmu_clks,
ARRAY_SIZE(top_cmu_clks));
}
@@ -129,11 +254,13 @@
{ }
};
+SAMSUNG_CLK_OPS(exynos850_cmu_top, CMU_TOP);
+
U_BOOT_DRIVER(exynos850_cmu_top) = {
.name = "exynos850-cmu-top",
.id = UCLASS_CLK,
.of_match = exynos850_cmu_top_ids,
- .ops = &ccf_clk_ops,
+ .ops = &exynos850_cmu_top_clk_ops,
.probe = exynos850_cmu_top_probe,
.flags = DM_FLAG_PRE_RELOC,
};
@@ -171,7 +298,8 @@
static int exynos850_cmu_peri_probe(struct udevice *dev)
{
- return samsung_register_cmu(dev, peri_cmu_clks, exynos850_cmu_top);
+ return samsung_register_cmu(dev, CMU_PERI, peri_cmu_clks,
+ exynos850_cmu_top);
}
static const struct udevice_id exynos850_cmu_peri_ids[] = {
@@ -179,11 +307,149 @@
{ }
};
+SAMSUNG_CLK_OPS(exynos850_cmu_peri, CMU_PERI);
+
U_BOOT_DRIVER(exynos850_cmu_peri) = {
.name = "exynos850-cmu-peri",
.id = UCLASS_CLK,
.of_match = exynos850_cmu_peri_ids,
- .ops = &ccf_clk_ops,
+ .ops = &exynos850_cmu_peri_clk_ops,
.probe = exynos850_cmu_peri_probe,
.flags = DM_FLAG_PRE_RELOC,
};
+
+/* ---- CMU_CORE ------------------------------------------------------------ */
+
+/* Register Offset definitions for CMU_CORE (0x12000000) */
+#define PLL_CON0_MUX_CLKCMU_CORE_BUS_USER 0x0600
+#define PLL_CON0_MUX_CLKCMU_CORE_MMC_EMBD_USER 0x0620
+#define CLK_CON_DIV_DIV_CLK_CORE_BUSP 0x1800
+#define CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK 0x20e8
+#define CLK_CON_GAT_GOUT_CORE_MMC_EMBD_SDCLKIN 0x20ec
+
+/* List of parent clocks for Muxes in CMU_CORE */
+PNAME(mout_core_bus_user_p) = { "clock-oscclk", "dout_core_bus" };
+PNAME(mout_core_mmc_embd_user_p) = { "clock-oscclk",
+ "dout_core_mmc_embd" };
+
+static const struct samsung_mux_clock core_mux_clks[] = {
+ MUX(CLK_MOUT_CORE_BUS_USER, "mout_core_bus_user", mout_core_bus_user_p,
+ PLL_CON0_MUX_CLKCMU_CORE_BUS_USER, 4, 1),
+ MUX_F(CLK_MOUT_CORE_MMC_EMBD_USER, "mout_core_mmc_embd_user",
+ mout_core_mmc_embd_user_p, PLL_CON0_MUX_CLKCMU_CORE_MMC_EMBD_USER,
+ 4, 1, CLK_SET_RATE_PARENT, 0),
+};
+
+static const struct samsung_div_clock core_div_clks[] = {
+ DIV(CLK_DOUT_CORE_BUSP, "dout_core_busp", "mout_core_bus_user",
+ CLK_CON_DIV_DIV_CLK_CORE_BUSP, 0, 2),
+};
+
+static const struct samsung_gate_clock core_gate_clks[] = {
+ GATE(CLK_GOUT_MMC_EMBD_ACLK, "gout_mmc_embd_aclk", "dout_core_busp",
+ CLK_CON_GAT_GOUT_CORE_MMC_EMBD_I_ACLK, 21, 0, 0),
+ GATE(CLK_GOUT_MMC_EMBD_SDCLKIN, "gout_mmc_embd_sdclkin",
+ "mout_core_mmc_embd_user", CLK_CON_GAT_GOUT_CORE_MMC_EMBD_SDCLKIN,
+ 21, CLK_SET_RATE_PARENT, 0),
+};
+
+static const struct samsung_clk_group core_cmu_clks[] = {
+ { S_CLK_MUX, core_mux_clks, ARRAY_SIZE(core_mux_clks) },
+ { S_CLK_DIV, core_div_clks, ARRAY_SIZE(core_div_clks) },
+ { S_CLK_GATE, core_gate_clks, ARRAY_SIZE(core_gate_clks) },
+};
+
+static int exynos850_cmu_core_probe(struct udevice *dev)
+{
+ return samsung_register_cmu(dev, CMU_CORE, core_cmu_clks,
+ exynos850_cmu_top);
+}
+
+static const struct udevice_id exynos850_cmu_core_ids[] = {
+ { .compatible = "samsung,exynos850-cmu-core" },
+ { }
+};
+
+SAMSUNG_CLK_OPS(exynos850_cmu_core, CMU_CORE);
+
+U_BOOT_DRIVER(exynos850_cmu_core) = {
+ .name = "exynos850-cmu-core",
+ .id = UCLASS_CLK,
+ .of_match = exynos850_cmu_core_ids,
+ .ops = &exynos850_cmu_core_clk_ops,
+ .probe = exynos850_cmu_core_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
+
+/* ---- CMU_HSI ------------------------------------------------------------- */
+
+/* Register Offset definitions for CMU_HSI (0x13400000) */
+#define PLL_CON0_MUX_CLKCMU_HSI_BUS_USER 0x0600
+#define PLL_CON0_MUX_CLKCMU_HSI_MMC_CARD_USER 0x0610
+#define PLL_CON0_MUX_CLKCMU_HSI_USB20DRD_USER 0x0620
+#define CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50 0x200c
+#define CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26 0x2010
+#define CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK 0x2024
+#define CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN 0x2028
+#define CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20 0x203c
+#define CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY 0x2040
+
+/* List of parent clocks for Muxes in CMU_HSI */
+PNAME(mout_hsi_bus_user_p) = { "clock-oscclk", "dout_hsi_bus" };
+PNAME(mout_hsi_mmc_card_user_p) = { "clock-oscclk", "dout_hsi_mmc_card" };
+PNAME(mout_hsi_usb20drd_user_p) = { "clock-oscclk", "dout_hsi_usb20drd" };
+
+static const struct samsung_mux_clock hsi_mux_clks[] __initconst = {
+ MUX(CLK_MOUT_HSI_BUS_USER, "mout_hsi_bus_user", mout_hsi_bus_user_p,
+ PLL_CON0_MUX_CLKCMU_HSI_BUS_USER, 4, 1),
+ MUX_F(CLK_MOUT_HSI_MMC_CARD_USER, "mout_hsi_mmc_card_user",
+ mout_hsi_mmc_card_user_p, PLL_CON0_MUX_CLKCMU_HSI_MMC_CARD_USER,
+ 4, 1, CLK_SET_RATE_PARENT, 0),
+ MUX(CLK_MOUT_HSI_USB20DRD_USER, "mout_hsi_usb20drd_user",
+ mout_hsi_usb20drd_user_p, PLL_CON0_MUX_CLKCMU_HSI_USB20DRD_USER,
+ 4, 1),
+};
+
+static const struct samsung_gate_clock hsi_gate_clks[] __initconst = {
+ GATE(CLK_GOUT_USB_REF_CLK, "gout_usb_ref", "mout_hsi_usb20drd_user",
+ CLK_CON_GAT_HSI_USB20DRD_TOP_I_REF_CLK_50, 21, 0, 0),
+ GATE(CLK_GOUT_USB_PHY_REF_CLK, "gout_usb_phy_ref", "clock-oscclk",
+ CLK_CON_GAT_HSI_USB20DRD_TOP_I_PHY_REFCLK_26, 21, 0, 0),
+ GATE(CLK_GOUT_MMC_CARD_ACLK, "gout_mmc_card_aclk", "mout_hsi_bus_user",
+ CLK_CON_GAT_GOUT_HSI_MMC_CARD_I_ACLK, 21, 0, 0),
+ GATE(CLK_GOUT_MMC_CARD_SDCLKIN, "gout_mmc_card_sdclkin",
+ "mout_hsi_mmc_card_user",
+ CLK_CON_GAT_GOUT_HSI_MMC_CARD_SDCLKIN, 21, CLK_SET_RATE_PARENT, 0),
+ GATE(CLK_GOUT_USB_PHY_ACLK, "gout_usb_phy_aclk", "mout_hsi_bus_user",
+ CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_ACLK_PHYCTRL_20, 21, 0, 0),
+ GATE(CLK_GOUT_USB_BUS_EARLY_CLK, "gout_usb_bus_early",
+ "mout_hsi_bus_user",
+ CLK_CON_GAT_GOUT_HSI_USB20DRD_TOP_BUS_CLK_EARLY, 21, 0, 0),
+};
+
+static const struct samsung_clk_group hsi_cmu_clks[] = {
+ { S_CLK_MUX, hsi_mux_clks, ARRAY_SIZE(hsi_mux_clks) },
+ { S_CLK_GATE, hsi_gate_clks, ARRAY_SIZE(hsi_gate_clks) },
+};
+
+static int exynos850_cmu_hsi_probe(struct udevice *dev)
+{
+ return samsung_register_cmu(dev, CMU_HSI, hsi_cmu_clks,
+ exynos850_cmu_hsi);
+}
+
+static const struct udevice_id exynos850_cmu_hsi_ids[] = {
+ { .compatible = "samsung,exynos850-cmu-hsi" },
+ { }
+};
+
+SAMSUNG_CLK_OPS(exynos850_cmu_hsi, CMU_HSI);
+
+U_BOOT_DRIVER(exynos850_cmu_hsi) = {
+ .name = "exynos850-cmu-hsi",
+ .id = UCLASS_CLK,
+ .of_match = exynos850_cmu_hsi_ids,
+ .ops = &exynos850_cmu_hsi_clk_ops,
+ .probe = exynos850_cmu_hsi_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/exynos/clk-pll.c b/drivers/clk/exynos/clk-pll.c
index 4aacbc2..542d577 100644
--- a/drivers/clk/exynos/clk-pll.c
+++ b/drivers/clk/exynos/clk-pll.c
@@ -136,7 +136,7 @@
return clk;
}
-void samsung_clk_register_pll(void __iomem *base,
+void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
const struct samsung_pll_clock *clk_list,
unsigned int nr_clk)
{
@@ -145,10 +145,12 @@
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_pll_clock *pll_clk;
+ unsigned long clk_id;
pll_clk = &clk_list[cnt];
clk = _samsung_clk_register_pll(base, pll_clk);
- clk_dm(pll_clk->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, pll_clk->id);
+ clk_dm(clk_id, clk);
}
}
diff --git a/drivers/clk/exynos/clk-pll.h b/drivers/clk/exynos/clk-pll.h
index bd79309..bdc94e7 100644
--- a/drivers/clk/exynos/clk-pll.h
+++ b/drivers/clk/exynos/clk-pll.h
@@ -15,9 +15,15 @@
#include <linux/clk-provider.h>
+struct samsung_pll_clock;
+
enum samsung_pll_type {
pll_0822x,
pll_0831x,
};
+void samsung_clk_register_pll(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_pll_clock *clk_list,
+ unsigned int nr_clk);
+
#endif /* __EXYNOS_CLK_PLL_H */
diff --git a/drivers/clk/exynos/clk.c b/drivers/clk/exynos/clk.c
index 430767f..943e8bd 100644
--- a/drivers/clk/exynos/clk.c
+++ b/drivers/clk/exynos/clk.c
@@ -10,61 +10,67 @@
#include <dm.h>
#include "clk.h"
-void samsung_clk_register_mux(void __iomem *base,
- const struct samsung_mux_clock *clk_list,
- unsigned int nr_clk)
+static void samsung_clk_register_mux(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_mux_clock *clk_list,
+ unsigned int nr_clk)
{
unsigned int cnt;
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_mux_clock *m;
+ unsigned long clk_id;
m = &clk_list[cnt];
clk = clk_register_mux(NULL, m->name, m->parent_names,
m->num_parents, m->flags, base + m->offset, m->shift,
m->width, m->mux_flags);
- clk_dm(m->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, m->id);
+ clk_dm(clk_id, clk);
}
}
-void samsung_clk_register_div(void __iomem *base,
- const struct samsung_div_clock *clk_list,
- unsigned int nr_clk)
+static void samsung_clk_register_div(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_div_clock *clk_list,
+ unsigned int nr_clk)
{
unsigned int cnt;
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_div_clock *d;
+ unsigned long clk_id;
d = &clk_list[cnt];
clk = clk_register_divider(NULL, d->name, d->parent_name,
d->flags, base + d->offset, d->shift,
d->width, d->div_flags);
- clk_dm(d->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, d->id);
+ clk_dm(clk_id, clk);
}
}
-void samsung_clk_register_gate(void __iomem *base,
- const struct samsung_gate_clock *clk_list,
- unsigned int nr_clk)
+static void samsung_clk_register_gate(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_gate_clock *clk_list,
+ unsigned int nr_clk)
{
unsigned int cnt;
for (cnt = 0; cnt < nr_clk; cnt++) {
struct clk *clk;
const struct samsung_gate_clock *g;
+ unsigned long clk_id;
g = &clk_list[cnt];
clk = clk_register_gate(NULL, g->name, g->parent_name,
g->flags, base + g->offset, g->bit_idx,
g->gate_flags, NULL);
- clk_dm(g->id, clk);
+ clk_id = SAMSUNG_TO_CLK_ID(cmu_id, g->id);
+ clk_dm(clk_id, clk);
}
}
-typedef void (*samsung_clk_register_fn)(void __iomem *base,
+typedef void (*samsung_clk_register_fn)(void __iomem *base, unsigned int cmu_id,
const void *clk_list,
unsigned int nr_clk);
@@ -78,34 +84,37 @@
/**
* samsung_cmu_register_clocks() - Register provided clock groups
* @base: Base address of CMU registers
+ * @cmu_id: CMU index number
* @clk_groups: list of clock groups
* @nr_groups: count of clock groups in @clk_groups
*
* Having the array of clock groups @clk_groups makes it possible to keep a
* correct clocks registration order.
*/
-void samsung_cmu_register_clocks(void __iomem *base,
- const struct samsung_clk_group *clk_groups,
- unsigned int nr_groups)
+static void samsung_cmu_register_clocks(void __iomem *base, unsigned int cmu_id,
+ const struct samsung_clk_group *clk_groups,
+ unsigned int nr_groups)
{
unsigned int i;
for (i = 0; i < nr_groups; i++) {
const struct samsung_clk_group *g = &clk_groups[i];
- samsung_clk_register_fns[g->type](base, g->clk_list, g->nr_clk);
+ samsung_clk_register_fns[g->type](base, cmu_id,
+ g->clk_list, g->nr_clk);
}
}
/**
* samsung_cmu_register_one - Register all CMU clocks
* @dev: CMU device
+ * @cmu_id: CMU index number
* @clk_groups: list of CMU clock groups
* @nr_groups: count of CMU clock groups in @clk_groups
*
* Return: 0 on success or negative value on error.
*/
-int samsung_cmu_register_one(struct udevice *dev,
+int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
const struct samsung_clk_group *clk_groups,
unsigned int nr_groups)
{
@@ -115,7 +124,7 @@
if (!base)
return -EINVAL;
- samsung_cmu_register_clocks(base, clk_groups, nr_groups);
+ samsung_cmu_register_clocks(base, cmu_id, clk_groups, nr_groups);
return 0;
}
diff --git a/drivers/clk/exynos/clk.h b/drivers/clk/exynos/clk.h
index 91a51b8..ed0a395 100644
--- a/drivers/clk/exynos/clk.h
+++ b/drivers/clk/exynos/clk.h
@@ -13,6 +13,51 @@
#include <linux/clk-provider.h>
#include "clk-pll.h"
+#define _SAMSUNG_CLK_OPS(_name, _cmu) \
+static int _name##_of_xlate(struct clk *clk, \
+ struct ofnode_phandle_args *args) \
+{ \
+ if (args->args_count > 1) { \
+ debug("Invalid args_count: %d\n", args->args_count); \
+ return -EINVAL; \
+ } \
+ \
+ if (args->args_count) \
+ clk->id = SAMSUNG_TO_CLK_ID(_cmu, args->args[0]); \
+ else \
+ clk->id = 0; \
+ \
+ return 0; \
+} \
+ \
+static const struct clk_ops _name##_clk_ops = { \
+ .set_rate = ccf_clk_set_rate, \
+ .get_rate = ccf_clk_get_rate, \
+ .set_parent = ccf_clk_set_parent, \
+ .enable = ccf_clk_enable, \
+ .disable = ccf_clk_disable, \
+ .of_xlate = _name##_of_xlate, \
+}
+
+/**
+ * SAMSUNG_CLK_OPS - Define clock operations structure for specified CMU.
+ * @name: name of generated structure
+ * @cmu: CMU index
+ *
+ * Like ccf_clk_ops, but with custom .of_xlate callback.
+ */
+#define SAMSUNG_CLK_OPS(name, cmu) _SAMSUNG_CLK_OPS(name, cmu)
+
+/**
+ * SAMSUNG_TO_CLK_ID - Calculate a global clock index.
+ * @_cmu: CMU index
+ * @_id: local clock index (unique across @_cmu)
+ *
+ * Return: A global clock index unique across all CMUs.
+ * Keeps a range of 256 available clocks for every CMU.
+ */
+#define SAMSUNG_TO_CLK_ID(_cmu, _id) (((_cmu) << 8) | ((_id) & 0xff))
+
/**
* struct samsung_mux_clock - information about mux clock
* @id: platform specific id of the clock
@@ -179,29 +224,14 @@
unsigned int nr_clk;
};
-void samsung_clk_register_mux(void __iomem *base,
- const struct samsung_mux_clock *clk_list,
- unsigned int nr_clk);
-void samsung_clk_register_div(void __iomem *base,
- const struct samsung_div_clock *clk_list,
- unsigned int nr_clk);
-void samsung_clk_register_gate(void __iomem *base,
- const struct samsung_gate_clock *clk_list,
- unsigned int nr_clk);
-void samsung_clk_register_pll(void __iomem *base,
- const struct samsung_pll_clock *clk_list,
- unsigned int nr_clk);
-
-void samsung_cmu_register_clocks(void __iomem *base,
- const struct samsung_clk_group *clk_groups,
- unsigned int nr_groups);
-int samsung_cmu_register_one(struct udevice *dev,
+int samsung_cmu_register_one(struct udevice *dev, unsigned int cmu_id,
const struct samsung_clk_group *clk_groups,
unsigned int nr_groups);
/**
* samsung_register_cmu - Register CMU clocks ensuring parent CMU is present
* @dev: CMU device
+ * @cmu_id: CMU index number
* @clk_groups: list of CMU clock groups
* @parent_drv: name of parent CMU driver
*
@@ -210,7 +240,7 @@
*
* Return: 0 on success or negative value on error.
*/
-#define samsung_register_cmu(dev, clk_groups, parent_drv) \
+#define samsung_register_cmu(dev, cmu_id, clk_groups, parent_drv) \
({ \
struct udevice *__parent; \
int __ret; \
@@ -220,8 +250,8 @@
if (__ret || !__parent) \
__ret = -ENOENT; \
else \
- __ret = samsung_cmu_register_one(dev, clk_groups, \
- ARRAY_SIZE(clk_groups)); \
+ __ret = samsung_cmu_register_one(dev, cmu_id, \
+ clk_groups, ARRAY_SIZE(clk_groups)); \
__ret; \
})
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 0df0d18..8dae635 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -2,7 +2,7 @@
config CLK_QCOM
bool
- depends on CLK && DM_RESET
+ depends on CLK && DM_RESET && POWER_DOMAIN
def_bool n
menu "Qualcomm clock drivers"
diff --git a/drivers/clk/qcom/clock-apq8016.c b/drivers/clk/qcom/clock-apq8016.c
index e6647f7..5a58681 100644
--- a/drivers/clk/qcom/clock-apq8016.c
+++ b/drivers/clk/qcom/clock-apq8016.c
@@ -23,11 +23,7 @@
#define APCS_CLOCK_BRANCH_ENA_VOTE (0x45004)
#define SDCC_BCR(n) ((n * 0x1000) + 0x41000)
-#define SDCC_CMD_RCGR(n) ((n * 0x1000) + 0x41004)
-#define SDCC_CFG_RCGR(n) ((n * 0x1000) + 0x41008)
-#define SDCC_M(n) ((n * 0x1000) + 0x4100C)
-#define SDCC_N(n) ((n * 0x1000) + 0x41010)
-#define SDCC_D(n) ((n * 0x1000) + 0x41014)
+#define SDCC_CMD_RCGR(n) (((n + 1) * 0x1000) + 0x41004)
#define SDCC_APPS_CBCR(n) ((n * 0x1000) + 0x41018)
#define SDCC_AHB_CBCR(n) ((n * 0x1000) + 0x4101C)
@@ -38,31 +34,10 @@
#define BLSP1_UART2_BCR (0x3028)
#define BLSP1_UART2_APPS_CBCR (0x302C)
#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
-#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
-#define BLSP1_UART2_APPS_M (0x303C)
-#define BLSP1_UART2_APPS_N (0x3040)
-#define BLSP1_UART2_APPS_D (0x3044)
/* GPLL0 clock control registers */
#define GPLL0_STATUS_ACTIVE BIT(17)
-static const struct bcr_regs sdc_regs[] = {
- {
- .cfg_rcgr = SDCC_CFG_RCGR(1),
- .cmd_rcgr = SDCC_CMD_RCGR(1),
- .M = SDCC_M(1),
- .N = SDCC_N(1),
- .D = SDCC_D(1),
- },
- {
- .cfg_rcgr = SDCC_CFG_RCGR(2),
- .cmd_rcgr = SDCC_CMD_RCGR(2),
- .M = SDCC_M(2),
- .N = SDCC_N(2),
- .D = SDCC_D(2),
- }
-};
-
static struct pll_vote_clk gpll0_vote_clk = {
.status = GPLL0_STATUS,
.status_bit = GPLL0_STATUS_ACTIVE,
@@ -86,7 +61,7 @@
clk_enable_cbc(priv->base + SDCC_AHB_CBCR(slot));
/* 800Mhz/div, gpll0 */
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs[slot], div, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, SDCC_CMD_RCGR(slot), div, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC_APPS_CBCR(slot));
@@ -94,14 +69,6 @@
return rate;
}
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR,
- .M = BLSP1_UART2_APPS_M,
- .N = BLSP1_UART2_APPS_N,
- .D = BLSP1_UART2_APPS_D,
-};
-
/* UART: 115200 */
int apq8016_clk_init_uart(phys_addr_t base)
{
@@ -109,7 +76,7 @@
clk_enable_vote_clk(base, &gcc_blsp1_ahb_clk);
/* 7372800 uart block clock @ GPLL0 */
- clk_rcg_set_rate_mnd(base, &uart2_regs, 1, 144, 15625,
+ clk_rcg_set_rate_mnd(base, BLSP1_UART2_APPS_CMD_RCGR, 1, 144, 15625,
CFG_CLK_SRC_GPLL0, 16);
/* Vote for gpll0 clock */
diff --git a/drivers/clk/qcom/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c
index a473161..479f977 100644
--- a/drivers/clk/qcom/clock-apq8096.c
+++ b/drivers/clk/qcom/clock-apq8096.c
@@ -26,31 +26,15 @@
#define SDCC2_APPS_CBCR (0x14004) /* branch control */
#define SDCC2_AHB_CBCR (0x14008)
#define SDCC2_CMD_RCGR (0x14010)
-#define SDCC2_CFG_RCGR (0x14014)
-#define SDCC2_M (0x14018)
-#define SDCC2_N (0x1401C)
-#define SDCC2_D (0x14020)
#define BLSP2_AHB_CBCR (0x25004)
#define BLSP2_UART2_APPS_CBCR (0x29004)
#define BLSP2_UART2_APPS_CMD_RCGR (0x2900C)
-#define BLSP2_UART2_APPS_CFG_RCGR (0x29010)
-#define BLSP2_UART2_APPS_M (0x29014)
-#define BLSP2_UART2_APPS_N (0x29018)
-#define BLSP2_UART2_APPS_D (0x2901C)
/* GPLL0 clock control registers */
#define GPLL0_STATUS_ACTIVE BIT(30)
#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0)
-static const struct bcr_regs sdc_regs = {
- .cfg_rcgr = SDCC2_CFG_RCGR,
- .cmd_rcgr = SDCC2_CMD_RCGR,
- .M = SDCC2_M,
- .N = SDCC2_N,
- .D = SDCC2_D,
-};
-
static const struct pll_vote_clk gpll0_vote_clk = {
.status = GPLL0_STATUS,
.status_bit = GPLL0_STATUS_ACTIVE,
@@ -69,7 +53,7 @@
int div = 5;
clk_enable_cbc(priv->base + SDCC2_AHB_CBCR);
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs, div, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, SDCC2_CMD_RCGR, div, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC2_APPS_CBCR);
@@ -77,21 +61,13 @@
return rate;
}
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP2_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP2_UART2_APPS_CMD_RCGR,
- .M = BLSP2_UART2_APPS_M,
- .N = BLSP2_UART2_APPS_N,
- .D = BLSP2_UART2_APPS_D,
-};
-
static int clk_init_uart(struct msm_clk_priv *priv)
{
/* Enable AHB clock */
clk_enable_vote_clk(priv->base, &gcc_blsp2_ahb_clk);
/* 7372800 uart block clock @ GPLL0 */
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 192, 15625,
+ clk_rcg_set_rate_mnd(priv->base, BLSP2_UART2_APPS_CMD_RCGR, 1, 192, 15625,
CFG_CLK_SRC_GPLL0, 16);
/* Vote for gpll0 clock */
diff --git a/drivers/clk/qcom/clock-qcom.c b/drivers/clk/qcom/clock-qcom.c
index 7c683e5..05e5ab7 100644
--- a/drivers/clk/qcom/clock-qcom.c
+++ b/drivers/clk/qcom/clock-qcom.c
@@ -22,7 +22,9 @@
#include <linux/bug.h>
#include <linux/delay.h>
#include <linux/bitops.h>
+#include <linux/iopoll.h>
#include <reset-uclass.h>
+#include <power-domain-uclass.h>
#include "clock-qcom.h"
@@ -30,6 +32,13 @@
#define CBCR_BRANCH_ENABLE_BIT BIT(0)
#define CBCR_BRANCH_OFF_BIT BIT(31)
+#define GDSC_SW_COLLAPSE_MASK BIT(0)
+#define GDSC_POWER_DOWN_COMPLETE BIT(15)
+#define GDSC_POWER_UP_COMPLETE BIT(16)
+#define GDSC_PWR_ON_MASK BIT(31)
+#define CFG_GDSCR_OFFSET 0x4
+#define GDSC_STATUS_POLL_TIMEOUT_US 1500
+
/* Enable clock controlled by CBC soft macro */
void clk_enable_cbc(phys_addr_t cbcr)
{
@@ -95,7 +104,7 @@
* root set rate for clocks with half integer and MND divider
* div should be pre-calculated ((div * 2) - 1)
*/
-void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
+void clk_rcg_set_rate_mnd(phys_addr_t base, uint32_t cmd_rcgr,
int div, int m, int n, int source, u8 mnd_width)
{
u32 cfg;
@@ -111,13 +120,14 @@
debug("m %#x n %#x d %#x div %#x mask %#x\n", m_val, n_val, d_val, div, mask);
/* Program MND values */
- writel(m_val & mask, base + regs->M);
- writel(n_val & mask, base + regs->N);
- writel(d_val & mask, base + regs->D);
+ writel(m_val & mask, base + cmd_rcgr + RCG_M_REG);
+ writel(n_val & mask, base + cmd_rcgr + RCG_N_REG);
+ writel(d_val & mask, base + cmd_rcgr + RCG_D_REG);
/* setup src select and divider */
- cfg = readl(base + regs->cfg_rcgr);
- cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK);
+ cfg = readl(base + cmd_rcgr + RCG_CFG_REG);
+ cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK |
+ CFG_SRC_DIV_MASK);
cfg |= source & CFG_SRC_SEL_MASK; /* Select clock source */
if (div)
@@ -126,20 +136,20 @@
if (n && n != m)
cfg |= CFG_MODE_DUAL_EDGE;
- writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
+ writel(cfg, base + cmd_rcgr + RCG_CFG_REG); /* Write new clock configuration */
/* Inform h/w to start using the new config. */
- clk_bcr_update(base + regs->cmd_rcgr);
+ clk_bcr_update(base + cmd_rcgr);
}
/* root set rate for clocks with half integer and mnd_width=0 */
-void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
+void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div,
int source)
{
u32 cfg;
/* setup src select and divider */
- cfg = readl(base + regs->cfg_rcgr);
+ cfg = readl(base + cmd_rcgr + RCG_CFG_REG);
cfg &= ~(CFG_SRC_SEL_MASK | CFG_MODE_MASK | CFG_HW_CLK_CTRL_MASK);
cfg |= source & CFG_CLK_SRC_MASK; /* Select clock source */
@@ -150,10 +160,10 @@
if (div)
cfg |= (2 * div - 1) & CFG_SRC_DIV_MASK;
- writel(cfg, base + regs->cfg_rcgr); /* Write new clock configuration */
+ writel(cfg, base + cmd_rcgr + RCG_CFG_REG); /* Write new clock configuration */
/* Inform h/w to start using the new config. */
- clk_bcr_update(base + regs->cmd_rcgr);
+ clk_bcr_update(base + cmd_rcgr);
}
const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate)
@@ -217,12 +227,13 @@
.ops = &msm_clk_ops,
.priv_auto = sizeof(struct msm_clk_priv),
.probe = msm_clk_probe,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
};
int qcom_cc_bind(struct udevice *parent)
{
struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(parent);
- struct udevice *clkdev, *rstdev;
+ struct udevice *clkdev = NULL, *rstdev = NULL, *pwrdev;
struct driver *drv;
int ret;
@@ -237,20 +248,41 @@
if (ret)
return ret;
- /* Bail out early if resets are not specified for this platform */
- if (!data->resets)
- return ret;
+ if (data->resets) {
+ /* Get a handle to the common reset handler */
+ drv = lists_driver_lookup_name("qcom_reset");
+ if (!drv) {
+ ret = -ENOENT;
+ goto unbind_clkdev;
+ }
- /* Get a handle to the common reset handler */
- drv = lists_driver_lookup_name("qcom_reset");
- if (!drv)
- return -ENOENT;
+ /* Register the reset controller */
+ ret = device_bind_with_driver_data(parent, drv, "qcom_reset", (ulong)data,
+ dev_ofnode(parent), &rstdev);
+ if (ret)
+ goto unbind_clkdev;
+ }
- /* Register the reset controller */
- ret = device_bind_with_driver_data(parent, drv, "qcom_reset", (ulong)data,
- dev_ofnode(parent), &rstdev);
- if (ret)
- device_unbind(clkdev);
+ if (data->power_domains) {
+ /* Get a handle to the common power domain handler */
+ drv = lists_driver_lookup_name("qcom_power");
+ if (!drv) {
+ ret = -ENOENT;
+ goto unbind_rstdev;
+ }
+ /* Register the power domain controller */
+ ret = device_bind_with_driver_data(parent, drv, "qcom_power", (ulong)data,
+ dev_ofnode(parent), &pwrdev);
+ if (ret)
+ goto unbind_rstdev;
+ }
+
+ return 0;
+
+unbind_rstdev:
+ device_unbind(rstdev);
+unbind_clkdev:
+ device_unbind(clkdev);
return ret;
}
@@ -305,3 +337,80 @@
.ops = &qcom_reset_ops,
.probe = qcom_reset_probe,
};
+
+static int qcom_power_set(struct power_domain *pwr, bool on)
+{
+ struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(pwr->dev);
+ void __iomem *base = dev_get_priv(pwr->dev);
+ const struct qcom_power_map *map;
+ u32 value;
+ int ret;
+
+ if (pwr->id >= data->num_power_domains)
+ return -ENODEV;
+
+ map = &data->power_domains[pwr->id];
+
+ if (!map->reg)
+ return -ENODEV;
+
+ value = readl(base + map->reg);
+
+ if (on)
+ value &= ~GDSC_SW_COLLAPSE_MASK;
+ else
+ value |= GDSC_SW_COLLAPSE_MASK;
+
+ writel(value, base + map->reg);
+
+ if (on)
+ ret = readl_poll_timeout(base + map->reg + CFG_GDSCR_OFFSET,
+ value,
+ (value & GDSC_POWER_UP_COMPLETE) ||
+ (value & GDSC_PWR_ON_MASK),
+ GDSC_STATUS_POLL_TIMEOUT_US);
+
+ else
+ ret = readl_poll_timeout(base + map->reg + CFG_GDSCR_OFFSET,
+ value,
+ (value & GDSC_POWER_DOWN_COMPLETE) ||
+ !(value & GDSC_PWR_ON_MASK),
+ GDSC_STATUS_POLL_TIMEOUT_US);
+
+
+ if (ret == -ETIMEDOUT)
+ printf("WARNING: GDSC %lu is stuck during power on/off\n",
+ pwr->id);
+ return ret;
+}
+
+static int qcom_power_on(struct power_domain *pwr)
+{
+ return qcom_power_set(pwr, true);
+}
+
+static int qcom_power_off(struct power_domain *pwr)
+{
+ return qcom_power_set(pwr, false);
+}
+
+static const struct power_domain_ops qcom_power_ops = {
+ .on = qcom_power_on,
+ .off = qcom_power_off,
+};
+
+static int qcom_power_probe(struct udevice *dev)
+{
+ /* Set our priv pointer to the base address */
+ dev_set_priv(dev, (void *)dev_read_addr(dev));
+
+ return 0;
+}
+
+U_BOOT_DRIVER(qcom_power) = {
+ .name = "qcom_power",
+ .id = UCLASS_POWER_DOMAIN,
+ .ops = &qcom_power_ops,
+ .probe = qcom_power_probe,
+ .flags = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/clk/qcom/clock-qcom.h b/drivers/clk/qcom/clock-qcom.h
index 01088c1..a7f833a 100644
--- a/drivers/clk/qcom/clock-qcom.h
+++ b/drivers/clk/qcom/clock-qcom.h
@@ -12,6 +12,11 @@
#define CFG_CLK_SRC_GPLL0_EVEN (6 << 8)
#define CFG_CLK_SRC_MASK (7 << 8)
+#define RCG_CFG_REG 0x4
+#define RCG_M_REG 0x8
+#define RCG_N_REG 0xc
+#define RCG_D_REG 0x10
+
struct pll_vote_clk {
uintptr_t status;
int status_bit;
@@ -24,13 +29,6 @@
uintptr_t ena_vote;
int vote_bit;
};
-struct bcr_regs {
- uintptr_t cfg_rcgr;
- uintptr_t cmd_rcgr;
- uintptr_t M;
- uintptr_t N;
- uintptr_t D;
-};
struct freq_tbl {
uint freq;
@@ -59,9 +57,15 @@
u8 bit;
};
+struct qcom_power_map {
+ unsigned int reg;
+};
+
struct clk;
struct msm_clk_data {
+ const struct qcom_power_map *power_domains;
+ unsigned long num_power_domains;
const struct qcom_reset_map *resets;
unsigned long num_resets;
const struct gate_clk *clks;
@@ -82,9 +86,9 @@
void clk_enable_cbc(phys_addr_t cbcr);
void clk_enable_vote_clk(phys_addr_t base, const struct vote_clk *vclk);
const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate);
-void clk_rcg_set_rate_mnd(phys_addr_t base, const struct bcr_regs *regs,
+void clk_rcg_set_rate_mnd(phys_addr_t base, uint32_t cmd_rcgr,
int div, int m, int n, int source, u8 mnd_width);
-void clk_rcg_set_rate(phys_addr_t base, const struct bcr_regs *regs, int div,
+void clk_rcg_set_rate(phys_addr_t base, uint32_t cmd_rcgr, int div,
int source);
static inline void qcom_gate_clk_en(const struct msm_clk_priv *priv, unsigned long id)
diff --git a/drivers/clk/qcom/clock-qcs404.c b/drivers/clk/qcom/clock-qcs404.c
index 958312b..8a897a5 100644
--- a/drivers/clk/qcom/clock-qcs404.c
+++ b/drivers/clk/qcom/clock-qcs404.c
@@ -28,35 +28,22 @@
#define BLSP1_UART2_BCR (0x3028)
#define BLSP1_UART2_APPS_CBCR (0x302C)
#define BLSP1_UART2_APPS_CMD_RCGR (0x3034)
-#define BLSP1_UART2_APPS_CFG_RCGR (0x3038)
-#define BLSP1_UART2_APPS_M (0x303C)
-#define BLSP1_UART2_APPS_N (0x3040)
-#define BLSP1_UART2_APPS_D (0x3044)
/* I2C controller clock control registerss */
#define BLSP1_QUP0_I2C_APPS_CBCR (0x6028)
#define BLSP1_QUP0_I2C_APPS_CMD_RCGR (0x602C)
-#define BLSP1_QUP0_I2C_APPS_CFG_RCGR (0x6030)
#define BLSP1_QUP1_I2C_APPS_CBCR (0x2008)
#define BLSP1_QUP1_I2C_APPS_CMD_RCGR (0x200C)
-#define BLSP1_QUP1_I2C_APPS_CFG_RCGR (0x2010)
#define BLSP1_QUP2_I2C_APPS_CBCR (0x3010)
#define BLSP1_QUP2_I2C_APPS_CMD_RCGR (0x3000)
-#define BLSP1_QUP2_I2C_APPS_CFG_RCGR (0x3004)
#define BLSP1_QUP3_I2C_APPS_CBCR (0x4020)
#define BLSP1_QUP3_I2C_APPS_CMD_RCGR (0x4000)
-#define BLSP1_QUP3_I2C_APPS_CFG_RCGR (0x4004)
#define BLSP1_QUP4_I2C_APPS_CBCR (0x5020)
#define BLSP1_QUP4_I2C_APPS_CMD_RCGR (0x5000)
-#define BLSP1_QUP4_I2C_APPS_CFG_RCGR (0x5004)
/* SD controller clock control registers */
#define SDCC_BCR(n) (((n) * 0x1000) + 0x41000)
-#define SDCC_CMD_RCGR(n) (((n) * 0x1000) + 0x41004)
-#define SDCC_CFG_RCGR(n) (((n) * 0x1000) + 0x41008)
-#define SDCC_M(n) (((n) * 0x1000) + 0x4100C)
-#define SDCC_N(n) (((n) * 0x1000) + 0x41010)
-#define SDCC_D(n) (((n) * 0x1000) + 0x41014)
+#define SDCC_CMD_RCGR(n) (((n + 1) * 0x1000) + 0x41004)
#define SDCC_APPS_CBCR(n) (((n) * 0x1000) + 0x41018)
#define SDCC_AHB_CBCR(n) (((n) * 0x1000) + 0x4101C)
@@ -70,10 +57,6 @@
#define USB30_MOCK_UTMI_CMD_RCGR (0x3901C)
#define USB30_MOCK_UTMI_CFG_RCGR (0x39020)
#define USB30_MASTER_CMD_RCGR (0x39028)
-#define USB30_MASTER_CFG_RCGR (0x3902C)
-#define USB30_MASTER_M (0x39030)
-#define USB30_MASTER_N (0x39034)
-#define USB30_MASTER_D (0x39038)
#define USB2A_PHY_SLEEP_CBCR (0x4102C)
#define USB_HS_PHY_CFG_AHB_CBCR (0x41030)
@@ -83,12 +66,7 @@
#define ETH_SLAVE_AHB_CBCR (0x4e00c)
#define ETH_AXI_CBCR (0x4e010)
#define EMAC_PTP_CMD_RCGR (0x4e014)
-#define EMAC_PTP_CFG_RCGR (0x4e018)
#define EMAC_CMD_RCGR (0x4e01c)
-#define EMAC_CFG_RCGR (0x4e020)
-#define EMAC_M (0x4e024)
-#define EMAC_N (0x4e028)
-#define EMAC_D (0x4e02c)
/* GPLL0 clock control registers */
@@ -103,22 +81,6 @@
.vote_bit = BIT(10) | BIT(5) | BIT(4),
};
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = BLSP1_UART2_APPS_CFG_RCGR,
- .cmd_rcgr = BLSP1_UART2_APPS_CMD_RCGR,
- .M = BLSP1_UART2_APPS_M,
- .N = BLSP1_UART2_APPS_N,
- .D = BLSP1_UART2_APPS_D,
-};
-
-static const struct bcr_regs sdc_regs = {
- .cfg_rcgr = SDCC_CFG_RCGR(1),
- .cmd_rcgr = SDCC_CMD_RCGR(1),
- .M = SDCC_M(1),
- .N = SDCC_N(1),
- .D = SDCC_D(1),
-};
-
static struct pll_vote_clk gpll0_vote_clk = {
.status = GPLL0_STATUS,
.status_bit = GPLL0_STATUS_ACTIVE,
@@ -133,60 +95,6 @@
.vote_bit = BIT(1),
};
-static const struct bcr_regs usb30_master_regs = {
- .cfg_rcgr = USB30_MASTER_CFG_RCGR,
- .cmd_rcgr = USB30_MASTER_CMD_RCGR,
- .M = USB30_MASTER_M,
- .N = USB30_MASTER_N,
- .D = USB30_MASTER_D,
-};
-
-static const struct bcr_regs emac_regs = {
- .cfg_rcgr = EMAC_CFG_RCGR,
- .cmd_rcgr = EMAC_CMD_RCGR,
- .M = EMAC_M,
- .N = EMAC_N,
- .D = EMAC_D,
-};
-
-static const struct bcr_regs emac_ptp_regs = {
- .cfg_rcgr = EMAC_PTP_CFG_RCGR,
- .cmd_rcgr = EMAC_PTP_CMD_RCGR,
- .M = EMAC_M,
- .N = EMAC_N,
- .D = EMAC_D,
-};
-
-static const struct bcr_regs blsp1_qup0_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP0_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP0_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup1_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP1_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP1_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup2_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP2_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP2_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup3_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP3_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP3_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
-static const struct bcr_regs blsp1_qup4_i2c_apps_regs = {
- .cmd_rcgr = BLSP1_QUP4_I2C_APPS_CMD_RCGR,
- .cfg_rcgr = BLSP1_QUP4_I2C_APPS_CFG_RCGR,
- /* mnd_width = 0 */
-};
-
static ulong qcs404_clk_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
@@ -194,29 +102,29 @@
switch (clk->id) {
case GCC_BLSP1_UART2_APPS_CLK:
/* UART: 1843200Hz for a fixed 115200 baudrate (19200000 * (12/125)) */
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 0, 12, 125,
+ clk_rcg_set_rate_mnd(priv->base, BLSP1_UART2_APPS_CMD_RCGR, 0, 12, 125,
CFG_CLK_SRC_CXO, 16);
clk_enable_cbc(priv->base + BLSP1_UART2_APPS_CBCR);
return 1843200;
case GCC_SDCC1_APPS_CLK:
/* SDCC1: 200MHz */
- clk_rcg_set_rate_mnd(priv->base, &sdc_regs, 7, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, SDCC_CMD_RCGR(0), 7, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
clk_enable_gpll0(priv->base, &gpll0_vote_clk);
clk_enable_cbc(priv->base + SDCC_APPS_CBCR(1));
return rate;
case GCC_ETH_RGMII_CLK:
if (rate == 250000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 3, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
else if (rate == 125000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 7, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 7, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
else if (rate == 50000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 19, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 19, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
else if (rate == 5000000)
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 1, 50,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 3, 1, 50,
CFG_CLK_SRC_GPLL1, 8);
return rate;
}
@@ -237,7 +145,7 @@
switch (clk->id) {
case GCC_USB30_MASTER_CLK:
clk_enable_cbc(priv->base + USB30_MASTER_CBCR);
- clk_rcg_set_rate_mnd(priv->base, &usb30_master_regs, 7, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, USB30_MASTER_CMD_RCGR, 7, 0, 0,
CFG_CLK_SRC_GPLL0, 8);
break;
case GCC_SYS_NOC_USB3_CLK:
@@ -259,14 +167,14 @@
/* SPEED_1000: freq -> 250MHz */
clk_enable_cbc(priv->base + ETH_PTP_CBCR);
clk_enable_gpll0(priv->base, &gpll1_vote_clk);
- clk_rcg_set_rate_mnd(priv->base, &emac_ptp_regs, 3, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_PTP_CMD_RCGR, 3, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
break;
case GCC_ETH_RGMII_CLK:
/* SPEED_1000: freq -> 250MHz */
clk_enable_cbc(priv->base + ETH_RGMII_CBCR);
clk_enable_gpll0(priv->base, &gpll1_vote_clk);
- clk_rcg_set_rate_mnd(priv->base, &emac_regs, 3, 0, 0,
+ clk_rcg_set_rate_mnd(priv->base, EMAC_CMD_RCGR, 3, 0, 0,
CFG_CLK_SRC_GPLL1, 8);
break;
case GCC_ETH_SLAVE_AHB_CLK:
@@ -280,27 +188,27 @@
break;
case GCC_BLSP1_QUP0_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP0_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup0_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP0_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP1_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP1_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup1_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP1_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP2_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP2_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup2_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP2_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP3_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP3_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup3_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP3_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_BLSP1_QUP4_I2C_APPS_CLK:
clk_enable_cbc(priv->base + BLSP1_QUP4_I2C_APPS_CBCR);
- clk_rcg_set_rate(priv->base, &blsp1_qup4_i2c_apps_regs, 0,
+ clk_rcg_set_rate(priv->base, BLSP1_QUP4_I2C_APPS_CMD_RCGR, 0,
CFG_CLK_SRC_CXO);
break;
case GCC_SDCC1_AHB_CLK:
diff --git a/drivers/clk/qcom/clock-sdm845.c b/drivers/clk/qcom/clock-sdm845.c
index 36ffee7..e9c61eb 100644
--- a/drivers/clk/qcom/clock-sdm845.c
+++ b/drivers/clk/qcom/clock-sdm845.c
@@ -19,13 +19,11 @@
#include "clock-qcom.h"
-#define SE9_AHB_CBCR 0x25004
-#define SE9_UART_APPS_CBCR 0x29004
#define SE9_UART_APPS_CMD_RCGR 0x18148
-#define SE9_UART_APPS_CFG_RCGR 0x1814C
-#define SE9_UART_APPS_M 0x18150
-#define SE9_UART_APPS_N 0x18154
-#define SE9_UART_APPS_D 0x18158
+
+#define USB30_PRIM_MASTER_CLK_CMD_RCGR 0xf018
+#define USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR 0xf030
+#define USB3_PRIM_PHY_AUX_CMD_RCGR 0xf05c
static const struct freq_tbl ftbl_gcc_qupv3_wrap0_s0_clk_src[] = {
F(7372800, CFG_CLK_SRC_GPLL0_EVEN, 1, 384, 15625),
@@ -46,14 +44,6 @@
{ }
};
-static const struct bcr_regs uart2_regs = {
- .cfg_rcgr = SE9_UART_APPS_CFG_RCGR,
- .cmd_rcgr = SE9_UART_APPS_CMD_RCGR,
- .M = SE9_UART_APPS_M,
- .N = SE9_UART_APPS_N,
- .D = SE9_UART_APPS_D,
-};
-
static ulong sdm845_clk_set_rate(struct clk *clk, ulong rate)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
@@ -62,7 +52,7 @@
switch (clk->id) {
case GCC_QUPV3_WRAP1_S1_CLK: /* UART9 */
freq = qcom_find_freq(ftbl_gcc_qupv3_wrap0_s0_clk_src, rate);
- clk_rcg_set_rate_mnd(priv->base, &uart2_regs,
+ clk_rcg_set_rate_mnd(priv->base, SE9_UART_APPS_CMD_RCGR,
freq->pre_div, freq->m, freq->n, freq->src, 16);
return freq->freq;
default:
@@ -71,6 +61,8 @@
}
static const struct gate_clk sdm845_clks[] = {
+ GATE_CLK(GCC_AGGRE_USB3_SEC_AXI_CLK, 0x82020, 0x00000001),
+ GATE_CLK(GCC_CFG_NOC_USB3_SEC_AXI_CLK, 0x05030, 0x00000001),
GATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x5200c, 0x00000400),
GATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x5200c, 0x00000800),
GATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x5200c, 0x00001000),
@@ -135,6 +127,25 @@
debug("%s: clk %s\n", __func__, sdm845_clks[clk->id].name);
+ switch (clk->id) {
+ case GCC_USB30_PRIM_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB_PHY_CFG_AHB2PHY_CLK);
+ /* These numbers are just pulled from the frequency tables in the Linux driver */
+ clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MASTER_CLK_CMD_RCGR,
+ (4.5 * 2) - 1, 0, 0, 1 << 8, 8);
+ clk_rcg_set_rate_mnd(priv->base, USB30_PRIM_MOCK_UTMI_CLK_CMD_RCGR,
+ 1, 0, 0, 0, 8);
+ clk_rcg_set_rate_mnd(priv->base, USB3_PRIM_PHY_AUX_CMD_RCGR,
+ 1, 0, 0, 0, 8);
+ break;
+ case GCC_USB30_SEC_MASTER_CLK:
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_AUX_CLK);
+
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_CLKREF_CLK);
+ qcom_gate_clk_en(priv, GCC_USB3_SEC_PHY_COM_AUX_CLK);
+ break;
+ }
+
qcom_gate_clk_en(priv, clk->id);
return 0;
@@ -160,11 +171,29 @@
[GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 },
};
+static const struct qcom_power_map sdm845_gdscs[] = {
+ [PCIE_0_GDSC] = { 0x6b004 },
+ [PCIE_1_GDSC] = { 0x8d004 },
+ [UFS_CARD_GDSC] = { 0x75004 },
+ [UFS_PHY_GDSC] = { 0x77004 },
+ [USB30_PRIM_GDSC] = { 0xf004 },
+ [USB30_SEC_GDSC] = { 0x10004 },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_AUDIO_TBU_GDSC] = { 0x7d030 },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_PCIE_TBU_GDSC] = { 0x7d03c },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_TBU1_GDSC] = { 0x7d034 },
+ [HLOS1_VOTE_AGGRE_NOC_MMU_TBU2_GDSC] = { 0x7d038 },
+ [HLOS1_VOTE_MMNOC_MMU_TBU_HF0_GDSC] = { 0x7d040 },
+ [HLOS1_VOTE_MMNOC_MMU_TBU_HF1_GDSC] = { 0x7d048 },
+ [HLOS1_VOTE_MMNOC_MMU_TBU_SF_GDSC] = { 0x7d044 },
+};
+
static struct msm_clk_data sdm845_clk_data = {
.resets = sdm845_gcc_resets,
.num_resets = ARRAY_SIZE(sdm845_gcc_resets),
.clks = sdm845_clks,
.num_clks = ARRAY_SIZE(sdm845_clks),
+ .power_domains = sdm845_gdscs,
+ .num_power_domains = ARRAY_SIZE(sdm845_gdscs),
.enable = sdm845_clk_enable,
.set_rate = sdm845_clk_set_rate,
@@ -183,5 +212,5 @@
.id = UCLASS_NOP,
.of_match = gcc_sdm845_of_match,
.bind = qcom_cc_bind,
- .flags = DM_FLAG_PRE_RELOC,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a7fb1eb..b050585 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -665,13 +665,6 @@
8-bit gpo expander, all gpo lines are controlled by writing
value into data register.
-config TURRIS_OMNIA_MCU
- bool "Turris Omnia MCU GPIO driver"
- depends on DM_GPIO
- default y if TARGET_TURRIS_OMNIA
- help
- Support for GPIOs on MCU connected to Turris Omnia via i2c.
-
config FTGPIO010
bool "Faraday Technology FTGPIO010 driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9071170..4a29315 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -73,7 +73,6 @@
obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
-obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_FTGPIO010) += ftgpio010.o
obj-$(CONFIG_ADP5585_GPIO) += adp5585_gpio.o
obj-$(CONFIG_RZG2L_GPIO) += rzg2l-gpio.o
diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
index 5e57b0c..f5d9ab5 100644
--- a/drivers/gpio/msm_gpio.c
+++ b/drivers/gpio/msm_gpio.c
@@ -35,19 +35,19 @@
#define GPIO_IN_OUT_REG(dev, x) \
(GPIO_CONFIG_REG(dev, x) + 0x4)
-static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
+static void msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
/* Always NOP for special pins, assume they're in the correct state */
if (qcom_is_special_pin(priv->pin_data, gpio))
- return 0;
+ return;
/* Disable OE bit */
clrsetbits_le32(priv->base + GPIO_CONFIG_REG(dev, gpio),
GPIO_OE_MASK, GPIO_OE_DISABLE);
- return 0;
+ return;
}
static int msm_gpio_set_value(struct udevice *dev, unsigned int gpio, int value)
@@ -84,6 +84,23 @@
return 0;
}
+static int msm_gpio_set_flags(struct udevice *dev, unsigned int gpio, ulong flags)
+{
+ if (flags & GPIOD_IS_OUT_ACTIVE) {
+ return msm_gpio_direction_output(dev, gpio, 1);
+ } else if (flags & GPIOD_IS_OUT) {
+ return msm_gpio_direction_output(dev, gpio, 0);
+ } else if (flags & GPIOD_IS_IN) {
+ msm_gpio_direction_input(dev, gpio);
+ if (flags & GPIOD_PULL_UP)
+ return msm_gpio_set_value(dev, gpio, 1);
+ else if (flags & GPIOD_PULL_DOWN)
+ return msm_gpio_set_value(dev, gpio, 0);
+ }
+
+ return 0;
+}
+
static int msm_gpio_get_value(struct udevice *dev, unsigned int gpio)
{
struct msm_gpio_bank *priv = dev_get_priv(dev);
@@ -110,10 +127,8 @@
}
static const struct dm_gpio_ops gpio_msm_ops = {
- .direction_input = msm_gpio_direction_input,
- .direction_output = msm_gpio_direction_output,
+ .set_flags = msm_gpio_set_flags,
.get_value = msm_gpio_get_value,
- .set_value = msm_gpio_set_value,
.get_function = msm_gpio_get_function,
};
diff --git a/drivers/gpio/turris_omnia_mcu.c b/drivers/gpio/turris_omnia_mcu.c
deleted file mode 100644
index 2d2bf2d..0000000
--- a/drivers/gpio/turris_omnia_mcu.c
+++ /dev/null
@@ -1,316 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-// (C) 2022 Pali Rohár <pali@kernel.org>
-
-#include <common.h>
-#include <dm.h>
-#include <i2c.h>
-#include <asm/gpio.h>
-#include <linux/log2.h>
-
-enum commands_e {
- CMD_GET_STATUS_WORD = 0x01,
- CMD_GENERAL_CONTROL = 0x02,
-
- /* available if STS_FEATURES_SUPPORTED bit set in status word */
- CMD_GET_FEATURES = 0x10,
-
- /* available if FEAT_EXT_CMDS bit is set in features */
- CMD_GET_EXT_STATUS_DWORD = 0x11,
-
- /* available if FEAT_EXT_CMDS and FEAT_PERIPH_MCU bits are set in featurs */
- CMD_EXT_CONTROL = 0x12,
- CMD_GET_EXT_CONTROL_STATUS = 0x13,
-};
-
-/* CMD_GET_STATUS_WORD */
-enum sts_word_e {
- STS_MCU_TYPE_MASK = GENMASK(1, 0),
- STS_MCU_TYPE_STM32 = 0,
- STS_MCU_TYPE_GD32 = 1,
- STS_MCU_TYPE_MKL = 2,
- STS_FEATURES_SUPPORTED = BIT(2),
- STS_USER_REGULATOR_NOT_SUPPORTED = BIT(3),
- STS_CARD_DET = BIT(4),
- STS_MSATA_IND = BIT(5),
- STS_USB30_OVC = BIT(6),
- STS_USB31_OVC = BIT(7),
- STS_USB30_PWRON = BIT(8),
- STS_USB31_PWRON = BIT(9),
- STS_ENABLE_4V5 = BIT(10),
- STS_BUTTON_MODE = BIT(11),
- STS_BUTTON_PRESSED = BIT(12),
- STS_BUTTON_COUNTER_MASK = GENMASK(15, 13)
-};
-
-/* CMD_GENERAL_CONTROL */
-enum ctl_byte_e {
- CTL_LIGHT_RST = BIT(0),
- CTL_HARD_RST = BIT(1),
- /*CTL_RESERVED = BIT(2),*/
- CTL_USB30_PWRON = BIT(3),
- CTL_USB31_PWRON = BIT(4),
- CTL_ENABLE_4V5 = BIT(5),
- CTL_BUTTON_MODE = BIT(6),
- CTL_BOOTLOADER = BIT(7)
-};
-
-/* CMD_GET_FEATURES */
-enum features_e {
- FEAT_PERIPH_MCU = BIT(0),
- FEAT_EXT_CMDS = BIT(1),
-};
-
-struct turris_omnia_mcu_info {
- u16 features;
-};
-
-static int turris_omnia_mcu_get_function(struct udevice *dev, uint offset)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
-
- switch (offset) {
- /* bank 0 */
- case 0 ... 15:
- switch (offset) {
- case ilog2(STS_USB30_PWRON):
- case ilog2(STS_USB31_PWRON):
- case ilog2(STS_ENABLE_4V5):
- case ilog2(STS_BUTTON_MODE):
- return GPIOF_OUTPUT;
- default:
- return GPIOF_INPUT;
- }
-
- /* bank 1 - supported only when FEAT_EXT_CMDS is set */
- case (16 + 0) ... (16 + 31):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- return GPIOF_INPUT;
-
- /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
- case (16 + 32 + 0) ... (16 + 32 + 15):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- if (!(info->features & FEAT_PERIPH_MCU))
- return -EINVAL;
- return GPIOF_OUTPUT;
-
- default:
- return -EINVAL;
- }
-}
-
-static int turris_omnia_mcu_get_value(struct udevice *dev, uint offset)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val16[2];
- u8 val32[4];
- int ret;
-
- switch (offset) {
- /* bank 0 */
- case 0 ... 15:
- ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, val16, 2);
- if (ret)
- return ret;
- return ((((u16)val16[1] << 8) | val16[0]) >> offset) & 0x1;
-
- /* bank 1 - supported only when FEAT_EXT_CMDS is set */
- case (16 + 0) ... (16 + 31):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- ret = dm_i2c_read(dev, CMD_GET_EXT_STATUS_DWORD, val32, 4);
- if (ret)
- return ret;
- return ((((u32)val32[3] << 24) | ((u32)val32[2] << 16) |
- ((u32)val32[1] << 8) | val32[0]) >> (offset - 16)) & 0x1;
-
- /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
- case (16 + 32 + 0) ... (16 + 32 + 15):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- if (!(info->features & FEAT_PERIPH_MCU))
- return -EINVAL;
- ret = dm_i2c_read(dev, CMD_GET_EXT_CONTROL_STATUS, val16, 2);
- if (ret)
- return ret;
- return ((((u16)val16[1] << 8) | val16[0]) >> (offset - 16 - 32)) & 0x1;
-
- default:
- return -EINVAL;
- }
-}
-
-static int turris_omnia_mcu_set_value(struct udevice *dev, uint offset, int value)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- u8 val16[2];
- u8 val32[4];
-
- switch (offset) {
- /* bank 0 */
- case 0 ... 15:
- switch (offset) {
- case ilog2(STS_USB30_PWRON):
- val16[1] = CTL_USB30_PWRON;
- break;
- case ilog2(STS_USB31_PWRON):
- val16[1] = CTL_USB31_PWRON;
- break;
- case ilog2(STS_ENABLE_4V5):
- val16[1] = CTL_ENABLE_4V5;
- break;
- case ilog2(STS_BUTTON_MODE):
- val16[1] = CTL_BUTTON_MODE;
- break;
- default:
- return -EINVAL;
- }
- val16[0] = value ? val16[1] : 0;
- return dm_i2c_write(dev, CMD_GENERAL_CONTROL, val16, sizeof(val16));
-
- /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
- case (16 + 32 + 0) ... (16 + 32 + 15):
- if (!(info->features & FEAT_EXT_CMDS))
- return -EINVAL;
- if (!(info->features & FEAT_PERIPH_MCU))
- return -EINVAL;
- val32[3] = BIT(offset - 16 - 32) >> 8;
- val32[2] = BIT(offset - 16 - 32) & 0xff;
- val32[1] = value ? val32[3] : 0;
- val32[0] = value ? val32[2] : 0;
- return dm_i2c_write(dev, CMD_EXT_CONTROL, val32, sizeof(val32));
-
- default:
- return -EINVAL;
- }
-}
-
-static int turris_omnia_mcu_direction_input(struct udevice *dev, uint offset)
-{
- int ret;
-
- ret = turris_omnia_mcu_get_function(dev, offset);
- if (ret < 0)
- return ret;
- else if (ret != GPIOF_INPUT)
- return -EOPNOTSUPP;
-
- return 0;
-}
-
-static int turris_omnia_mcu_direction_output(struct udevice *dev, uint offset, int value)
-{
- int ret;
-
- ret = turris_omnia_mcu_get_function(dev, offset);
- if (ret < 0)
- return ret;
- else if (ret != GPIOF_OUTPUT)
- return -EOPNOTSUPP;
-
- return turris_omnia_mcu_set_value(dev, offset, value);
-}
-
-static int turris_omnia_mcu_xlate(struct udevice *dev, struct gpio_desc *desc,
- struct ofnode_phandle_args *args)
-{
- uint bank, gpio, flags, offset;
- int ret;
-
- if (args->args_count != 3)
- return -EINVAL;
-
- bank = args->args[0];
- gpio = args->args[1];
- flags = args->args[2];
-
- switch (bank) {
- case 0:
- if (gpio >= 16)
- return -EINVAL;
- offset = gpio;
- break;
- case 1:
- if (gpio >= 32)
- return -EINVAL;
- offset = 16 + gpio;
- break;
- case 2:
- if (gpio >= 16)
- return -EINVAL;
- offset = 16 + 32 + gpio;
- break;
- default:
- return -EINVAL;
- }
-
- ret = turris_omnia_mcu_get_function(dev, offset);
- if (ret < 0)
- return ret;
-
- desc->offset = offset;
- desc->flags = gpio_flags_xlate(flags);
-
- return 0;
-}
-
-static const struct dm_gpio_ops turris_omnia_mcu_ops = {
- .direction_input = turris_omnia_mcu_direction_input,
- .direction_output = turris_omnia_mcu_direction_output,
- .get_value = turris_omnia_mcu_get_value,
- .set_value = turris_omnia_mcu_set_value,
- .get_function = turris_omnia_mcu_get_function,
- .xlate = turris_omnia_mcu_xlate,
-};
-
-static int turris_omnia_mcu_probe(struct udevice *dev)
-{
- struct turris_omnia_mcu_info *info = dev_get_plat(dev);
- struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
- u16 status;
- u8 val[2];
- int ret;
-
- ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, val, 2);
- if (ret) {
- printf("Error: turris_omnia_mcu CMD_GET_STATUS_WORD failed: %d\n", ret);
- return ret;
- }
-
- status = ((u16)val[1] << 8) | val[0];
-
- if (status & STS_FEATURES_SUPPORTED) {
- ret = dm_i2c_read(dev, CMD_GET_FEATURES, val, 2);
- if (ret) {
- printf("Error: turris_omnia_mcu CMD_GET_FEATURES failed: %d\n", ret);
- return ret;
- }
- info->features = ((u16)val[1] << 8) | val[0];
- }
-
- uc_priv->bank_name = "mcu_";
-
- if ((info->features & FEAT_EXT_CMDS) && (info->features & FEAT_PERIPH_MCU))
- uc_priv->gpio_count = 16 + 32 + 16;
- else if (info->features & FEAT_EXT_CMDS)
- uc_priv->gpio_count = 16 + 32;
- else
- uc_priv->gpio_count = 16;
-
- return 0;
-}
-
-static const struct udevice_id turris_omnia_mcu_ids[] = {
- { .compatible = "cznic,turris-omnia-mcu" },
- { }
-};
-
-U_BOOT_DRIVER(turris_omnia_mcu) = {
- .name = "turris-omnia-mcu",
- .id = UCLASS_GPIO,
- .ops = &turris_omnia_mcu_ops,
- .probe = turris_omnia_mcu_probe,
- .plat_auto = sizeof(struct turris_omnia_mcu_info),
- .of_match = turris_omnia_mcu_ids,
-};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 98043fc..6b06888 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -505,6 +505,17 @@
model. This should only be enabled for testing as it is not useful for
anything else.
+config TURRIS_OMNIA_MCU
+ bool "Enable Turris Omnia MCU driver"
+ depends on DM_I2C
+ depends on DM_GPIO
+ depends on DM_RNG
+ depends on SYSRESET
+ default y if TARGET_TURRIS_OMNIA
+ help
+ This enables support for Turris Omnia MCU connected GPIOs and
+ board power off.
+
config USB_HUB_USB251XB
tristate "USB251XB Hub Controller Configuration Driver"
depends on I2C
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 1522f6c..9e82990 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -81,6 +81,7 @@
obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
obj-$(CONFIG_TEST_DRV) += test_drv.o
+obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
diff --git a/drivers/misc/turris_omnia_mcu.c b/drivers/misc/turris_omnia_mcu.c
new file mode 100644
index 0000000..6b2f17c
--- /dev/null
+++ b/drivers/misc/turris_omnia_mcu.c
@@ -0,0 +1,411 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Pali Rohár <pali@kernel.org>
+ * Copyright (C) 2024 Marek Behún <kabel@kernel.org>
+ */
+
+#include <common.h>
+#include <console.h>
+#include <dm.h>
+#include <dm/lists.h>
+#include <i2c.h>
+#include <rng.h>
+#include <sysreset.h>
+#include <turris-omnia-mcu-interface.h>
+#include <asm/byteorder.h>
+#include <asm/gpio.h>
+#include <linux/delay.h>
+#include <linux/log2.h>
+
+#define CMD_TRNG_MAX_ENTROPY_LEN 64
+
+struct turris_omnia_mcu_info {
+ u32 features;
+};
+
+static int omnia_gpio_get_function(struct udevice *dev, uint offset)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+
+ switch (offset) {
+ /* bank 0 */
+ case 0 ... 15:
+ switch (offset) {
+ case ilog2(STS_USB30_PWRON):
+ case ilog2(STS_USB31_PWRON):
+ case ilog2(STS_ENABLE_4V5):
+ case ilog2(STS_BUTTON_MODE):
+ return GPIOF_OUTPUT;
+ default:
+ return GPIOF_INPUT;
+ }
+
+ /* bank 1 - supported only when FEAT_EXT_CMDS is set */
+ case (16 + 0) ... (16 + 31):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ return GPIOF_INPUT;
+
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
+ case (16 + 32 + 0) ... (16 + 32 + 15):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
+ return GPIOF_OUTPUT;
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int omnia_gpio_get_value(struct udevice *dev, uint offset)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+ u32 val32;
+ u16 val16;
+ int ret;
+
+ switch (offset) {
+ /* bank 0 */
+ case 0 ... 15:
+ ret = dm_i2c_read(dev->parent, CMD_GET_STATUS_WORD,
+ (void *)&val16, sizeof(val16));
+ if (ret)
+ return ret;
+
+ return !!(le16_to_cpu(val16) & BIT(offset));
+
+ /* bank 1 - supported only when FEAT_EXT_CMDS is set */
+ case (16 + 0) ... (16 + 31):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+
+ ret = dm_i2c_read(dev->parent, CMD_GET_EXT_STATUS_DWORD,
+ (void *)&val32, sizeof(val32));
+ if (ret)
+ return ret;
+
+ return !!(le32_to_cpu(val32) & BIT(offset - 16));
+
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
+ case (16 + 32 + 0) ... (16 + 32 + 15):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
+
+ ret = dm_i2c_read(dev->parent, CMD_GET_EXT_CONTROL_STATUS,
+ (void *)&val16, sizeof(val16));
+ if (ret)
+ return ret;
+
+ return !!(le16_to_cpu(val16) & BIT(offset - 16 - 32));
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int omnia_gpio_set_value(struct udevice *dev, uint offset, int value)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+ u16 valmask16[2];
+ u8 valmask8[2];
+
+ switch (offset) {
+ /* bank 0 */
+ case 0 ... 15:
+ switch (offset) {
+ case ilog2(STS_USB30_PWRON):
+ valmask8[1] = CTL_USB30_PWRON;
+ break;
+ case ilog2(STS_USB31_PWRON):
+ valmask8[1] = CTL_USB31_PWRON;
+ break;
+ case ilog2(STS_ENABLE_4V5):
+ valmask8[1] = CTL_ENABLE_4V5;
+ break;
+ case ilog2(STS_BUTTON_MODE):
+ valmask8[1] = CTL_BUTTON_MODE;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ valmask8[0] = value ? valmask8[1] : 0;
+
+ return dm_i2c_write(dev->parent, CMD_GENERAL_CONTROL, valmask8,
+ sizeof(valmask8));
+
+ /* bank 2 - supported only when FEAT_EXT_CMDS and FEAT_PERIPH_MCU is set */
+ case (16 + 32 + 0) ... (16 + 32 + 15):
+ if (!(info->features & FEAT_EXT_CMDS))
+ return -EINVAL;
+ if (!(info->features & FEAT_PERIPH_MCU))
+ return -EINVAL;
+
+ valmask16[1] = cpu_to_le16(BIT(offset - 16 - 32));
+ valmask16[0] = value ? valmask16[1] : 0;
+
+ return dm_i2c_write(dev->parent, CMD_EXT_CONTROL,
+ (void *)valmask16, sizeof(valmask16));
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int omnia_gpio_direction_input(struct udevice *dev, uint offset)
+{
+ int ret;
+
+ ret = omnia_gpio_get_function(dev, offset);
+ if (ret < 0)
+ return ret;
+ else if (ret != GPIOF_INPUT)
+ return -EOPNOTSUPP;
+
+ return 0;
+}
+
+static int omnia_gpio_direction_output(struct udevice *dev, uint offset, int value)
+{
+ int ret;
+
+ ret = omnia_gpio_get_function(dev, offset);
+ if (ret < 0)
+ return ret;
+ else if (ret != GPIOF_OUTPUT)
+ return -EOPNOTSUPP;
+
+ return omnia_gpio_set_value(dev, offset, value);
+}
+
+static int omnia_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
+ struct ofnode_phandle_args *args)
+{
+ uint bank, gpio, flags, offset;
+ int ret;
+
+ if (args->args_count != 3)
+ return -EINVAL;
+
+ bank = args->args[0];
+ gpio = args->args[1];
+ flags = args->args[2];
+
+ switch (bank) {
+ case 0:
+ if (gpio >= 16)
+ return -EINVAL;
+ offset = gpio;
+ break;
+ case 1:
+ if (gpio >= 32)
+ return -EINVAL;
+ offset = 16 + gpio;
+ break;
+ case 2:
+ if (gpio >= 16)
+ return -EINVAL;
+ offset = 16 + 32 + gpio;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ ret = omnia_gpio_get_function(dev, offset);
+ if (ret < 0)
+ return ret;
+
+ desc->offset = offset;
+ desc->flags = gpio_flags_xlate(flags);
+
+ return 0;
+}
+
+static const struct dm_gpio_ops omnia_gpio_ops = {
+ .direction_input = omnia_gpio_direction_input,
+ .direction_output = omnia_gpio_direction_output,
+ .get_value = omnia_gpio_get_value,
+ .set_value = omnia_gpio_set_value,
+ .get_function = omnia_gpio_get_function,
+ .xlate = omnia_gpio_xlate,
+};
+
+static int omnia_gpio_probe(struct udevice *dev)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev->parent);
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->bank_name = "mcu_";
+
+ if ((info->features & FEAT_EXT_CMDS) && (info->features & FEAT_PERIPH_MCU))
+ uc_priv->gpio_count = 16 + 32 + 16;
+ else if (info->features & FEAT_EXT_CMDS)
+ uc_priv->gpio_count = 16 + 32;
+ else
+ uc_priv->gpio_count = 16;
+
+ return 0;
+}
+
+U_BOOT_DRIVER(turris_omnia_mcu_gpio) = {
+ .name = "turris-omnia-mcu-gpio",
+ .id = UCLASS_GPIO,
+ .ops = &omnia_gpio_ops,
+ .probe = omnia_gpio_probe,
+};
+
+static int omnia_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+ struct {
+ u16 magic;
+ u16 arg;
+ u32 csum;
+ } __packed args;
+
+ if (type != SYSRESET_POWER_OFF)
+ return -EPROTONOSUPPORT;
+
+ args.magic = CMD_POWER_OFF_MAGIC;
+ args.arg = CMD_POWER_OFF_POWERON_BUTTON;
+ args.csum = 0xba3b7212;
+
+ return dm_i2c_write(dev->parent, CMD_POWER_OFF, (void *)&args,
+ sizeof(args));
+}
+
+static const struct sysreset_ops omnia_sysreset_ops = {
+ .request = omnia_sysreset_request,
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu_sysreset) = {
+ .name = "turris-omnia-mcu-sysreset",
+ .id = UCLASS_SYSRESET,
+ .ops = &omnia_sysreset_ops,
+};
+
+static int omnia_rng_read(struct udevice *dev, void *data, size_t count)
+{
+ u8 buf[1 + CMD_TRNG_MAX_ENTROPY_LEN];
+ size_t len;
+ int ret;
+
+ while (count) {
+ ret = dm_i2c_read(dev->parent, CMD_TRNG_COLLECT_ENTROPY, buf,
+ sizeof(buf));
+ if (ret)
+ return ret;
+
+ len = min_t(size_t, buf[0],
+ min_t(size_t, CMD_TRNG_MAX_ENTROPY_LEN, count));
+
+ if (!len) {
+ /* wait 500ms (fail if interrupted), then try again */
+ for (int i = 0; i < 5; ++i) {
+ mdelay(100);
+ if (ctrlc())
+ return -EINTR;
+ }
+ continue;
+ }
+
+ memcpy(data, &buf[1], len);
+ data += len;
+ count -= len;
+ }
+
+ return 0;
+}
+
+static const struct dm_rng_ops omnia_rng_ops = {
+ .read = omnia_rng_read,
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu_trng) = {
+ .name = "turris-omnia-mcu-trng",
+ .id = UCLASS_RNG,
+ .ops = &omnia_rng_ops,
+};
+
+static int turris_omnia_mcu_bind(struct udevice *dev)
+{
+ /* bind MCU GPIOs as a child device */
+ return device_bind_driver_to_node(dev, "turris-omnia-mcu-gpio",
+ "turris-omnia-mcu-gpio",
+ dev_ofnode(dev), NULL);
+}
+
+static int turris_omnia_mcu_probe(struct udevice *dev)
+{
+ struct turris_omnia_mcu_info *info = dev_get_priv(dev);
+ u32 dword;
+ u16 word;
+ int ret;
+
+ ret = dm_i2c_read(dev, CMD_GET_STATUS_WORD, (void *)&word, sizeof(word));
+ if (ret < 0) {
+ printf("Error: turris_omnia_mcu CMD_GET_STATUS_WORD failed: %d\n",
+ ret);
+ return ret;
+ }
+
+ if (le16_to_cpu(word) & STS_FEATURES_SUPPORTED) {
+ /* try read 32-bit features */
+ ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *)&dword,
+ sizeof(dword));
+ if (ret < 0) {
+ /* try read 16-bit features */
+ ret = dm_i2c_read(dev, CMD_GET_FEATURES, (void *)&word,
+ sizeof(word));
+ if (ret < 0) {
+ printf("Error: turris_omnia_mcu CMD_GET_FEATURES failed: %d\n",
+ ret);
+ return ret;
+ }
+
+ info->features = le16_to_cpu(word);
+ } else {
+ info->features = le32_to_cpu(dword);
+ if (info->features & FEAT_FROM_BIT_16_INVALID)
+ info->features &= GENMASK(15, 0);
+ }
+ }
+
+ /* bind sysreset if poweroff is supported */
+ if (info->features & FEAT_POWEROFF_WAKEUP) {
+ ret = device_bind_driver_to_node(dev,
+ "turris-omnia-mcu-sysreset",
+ "turris-omnia-mcu-sysreset",
+ dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ /* bind rng if trng is supported */
+ if (info->features & FEAT_TRNG) {
+ ret = device_bind_driver_to_node(dev, "turris-omnia-mcu-trng",
+ "turris-omnia-mcu-trng",
+ dev_ofnode(dev), NULL);
+ if (ret < 0)
+ return ret;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id turris_omnia_mcu_ids[] = {
+ { .compatible = "cznic,turris-omnia-mcu" },
+ { }
+};
+
+U_BOOT_DRIVER(turris_omnia_mcu) = {
+ .name = "turris-omnia-mcu",
+ .id = UCLASS_MISC,
+ .bind = turris_omnia_mcu_bind,
+ .probe = turris_omnia_mcu_probe,
+ .priv_auto = sizeof(struct turris_omnia_mcu_info),
+ .of_match = turris_omnia_mcu_ids,
+};
diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig
index f4ca174..b9fe608 100644
--- a/drivers/phy/qcom/Kconfig
+++ b/drivers/phy/qcom/Kconfig
@@ -12,6 +12,21 @@
help
Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
+config PHY_QCOM_QUSB2
+ tristate "Qualcomm USB QUSB2 PHY driver"
+ depends on PHY && ARCH_SNAPDRAGON
+ help
+ Enable this to support the Super-Speed USB transceiver on various
+ Qualcomm chipsets.
+
+config PHY_QCOM_USB_SNPS_FEMTO_V2
+ tristate "Qualcomm SNPS FEMTO USB HS PHY v2"
+ depends on PHY && ARCH_SNAPDRAGON
+ help
+ Enable this to support the Qualcomm Synopsys DesignWare Core 7nm
+ High-Speed PHY driver. This driver supports the Hi-Speed PHY which
+ is usually paired with Synopsys DWC3 USB IPs on MSM SOCs.
+
config PHY_QCOM_USB_HS_28NM
tristate "Qualcomm 28nm High-Speed PHY"
depends on PHY && ARCH_SNAPDRAGON
diff --git a/drivers/phy/qcom/Makefile b/drivers/phy/qcom/Makefile
index 2113f17..5f4db4a 100644
--- a/drivers/phy/qcom/Makefile
+++ b/drivers/phy/qcom/Makefile
@@ -1,4 +1,6 @@
obj-$(CONFIG_PHY_QCOM_IPQ4019_USB) += phy-qcom-ipq4019-usb.o
obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o
+obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o
+obj-$(CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2) += phy-qcom-snps-femto-v2.o
obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o
obj-$(CONFIG_PHY_QCOM_USB_SS) += phy-qcom-usb-ss.o
diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c
new file mode 100644
index 0000000..c91ba18
--- /dev/null
+++ b/drivers/phy/qcom/phy-qcom-qusb2.c
@@ -0,0 +1,429 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2023 Bhupesh Sharma <bhupesh.sharma@linaro.org>
+ *
+ * Based on Linux driver
+ */
+
+#include <dm.h>
+#include <generic-phy.h>
+#include <linux/bitops.h>
+#include <asm/io.h>
+#include <reset.h>
+#include <clk.h>
+#include <linux/delay.h>
+
+#include <dt-bindings/phy/phy-qcom-qusb2.h>
+
+#define QUSB2PHY_PLL 0x0
+#define QUSB2PHY_PLL_TEST 0x04
+#define CLK_REF_SEL BIT(7)
+
+#define QUSB2PHY_PLL_TUNE 0x08
+#define QUSB2PHY_PLL_USER_CTL1 0x0c
+#define QUSB2PHY_PLL_USER_CTL2 0x10
+#define QUSB2PHY_PLL_AUTOPGM_CTL1 0x1c
+#define QUSB2PHY_PLL_PWR_CTRL 0x18
+
+/* QUSB2PHY_PLL_STATUS register bits */
+#define PLL_LOCKED BIT(5)
+
+/* QUSB2PHY_PLL_COMMON_STATUS_ONE register bits */
+#define CORE_READY_STATUS BIT(0)
+
+/* QUSB2PHY_PORT_POWERDOWN register bits */
+#define CLAMP_N_EN BIT(5)
+#define FREEZIO_N BIT(1)
+#define POWER_DOWN BIT(0)
+
+/* QUSB2PHY_PWR_CTRL1 register bits */
+#define PWR_CTRL1_VREF_SUPPLY_TRIM BIT(5)
+#define PWR_CTRL1_CLAMP_N_EN BIT(1)
+
+#define QUSB2PHY_REFCLK_ENABLE BIT(0)
+
+#define PHY_CLK_SCHEME_SEL BIT(0)
+
+/* QUSB2PHY_INTR_CTRL register bits */
+#define DMSE_INTR_HIGH_SEL BIT(4)
+#define DPSE_INTR_HIGH_SEL BIT(3)
+#define CHG_DET_INTR_EN BIT(2)
+#define DMSE_INTR_EN BIT(1)
+#define DPSE_INTR_EN BIT(0)
+
+/* QUSB2PHY_PLL_CORE_INPUT_OVERRIDE register bits */
+#define CORE_PLL_EN_FROM_RESET BIT(4)
+#define CORE_RESET BIT(5)
+#define CORE_RESET_MUX BIT(6)
+
+/* QUSB2PHY_IMP_CTRL1 register bits */
+#define IMP_RES_OFFSET_MASK GENMASK(5, 0)
+#define IMP_RES_OFFSET_SHIFT 0x0
+
+/* QUSB2PHY_PLL_BIAS_CONTROL_2 register bits */
+#define BIAS_CTRL2_RES_OFFSET_MASK GENMASK(5, 0)
+#define BIAS_CTRL2_RES_OFFSET_SHIFT 0x0
+
+/* QUSB2PHY_CHG_CONTROL_2 register bits */
+#define CHG_CTRL2_OFFSET_MASK GENMASK(5, 4)
+#define CHG_CTRL2_OFFSET_SHIFT 0x4
+
+/* QUSB2PHY_PORT_TUNE1 register bits */
+#define HSTX_TRIM_MASK GENMASK(7, 4)
+#define HSTX_TRIM_SHIFT 0x4
+#define PREEMPH_WIDTH_HALF_BIT BIT(2)
+#define PREEMPHASIS_EN_MASK GENMASK(1, 0)
+#define PREEMPHASIS_EN_SHIFT 0x0
+
+/* QUSB2PHY_PORT_TUNE2 register bits */
+#define HSDISC_TRIM_MASK GENMASK(1, 0)
+#define HSDISC_TRIM_SHIFT 0x0
+
+#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO 0x04
+#define QUSB2PHY_PLL_CLOCK_INVERTERS 0x18c
+#define QUSB2PHY_PLL_CMODE 0x2c
+#define QUSB2PHY_PLL_LOCK_DELAY 0x184
+#define QUSB2PHY_PLL_DIGITAL_TIMERS_TWO 0xb4
+#define QUSB2PHY_PLL_BIAS_CONTROL_1 0x194
+#define QUSB2PHY_PLL_BIAS_CONTROL_2 0x198
+#define QUSB2PHY_PWR_CTRL2 0x214
+#define QUSB2PHY_IMP_CTRL1 0x220
+#define QUSB2PHY_IMP_CTRL2 0x224
+#define QUSB2PHY_CHG_CTRL2 0x23c
+
+struct qusb2_phy_init_tbl {
+ unsigned int offset;
+ unsigned int val;
+ /*
+ * register part of layout ?
+ * if yes, then offset gives index in the reg-layout
+ */
+ int in_layout;
+};
+
+struct qusb2_phy_cfg {
+ const struct qusb2_phy_init_tbl *tbl;
+ /* number of entries in the table */
+ unsigned int tbl_num;
+ /* offset to PHY_CLK_SCHEME register in TCSR map */
+ unsigned int clk_scheme_offset;
+
+ /* array of registers with different offsets */
+ const unsigned int *regs;
+ unsigned int mask_core_ready;
+ unsigned int disable_ctrl;
+ unsigned int autoresume_en;
+
+ /* true if PHY has PLL_TEST register to select clk_scheme */
+ bool has_pll_test;
+
+ /* true if TUNE1 register must be updated by fused value, else TUNE2 */
+ bool update_tune1_with_efuse;
+
+ /* true if PHY has PLL_CORE_INPUT_OVERRIDE register to reset PLL */
+ bool has_pll_override;
+};
+
+/* set of registers with offsets different per-PHY */
+enum qusb2phy_reg_layout {
+ QUSB2PHY_PLL_CORE_INPUT_OVERRIDE,
+ QUSB2PHY_PLL_STATUS,
+ QUSB2PHY_PORT_TUNE1,
+ QUSB2PHY_PORT_TUNE2,
+ QUSB2PHY_PORT_TUNE3,
+ QUSB2PHY_PORT_TUNE4,
+ QUSB2PHY_PORT_TUNE5,
+ QUSB2PHY_PORT_TEST1,
+ QUSB2PHY_PORT_TEST2,
+ QUSB2PHY_PORT_POWERDOWN,
+ QUSB2PHY_INTR_CTRL,
+};
+
+#define QUSB2_PHY_INIT_CFG(o, v) \
+ { \
+ .offset = o, .val = v, \
+ }
+
+#define QUSB2_PHY_INIT_CFG_L(o, v) \
+ { \
+ .offset = o, .val = v, .in_layout = 1, \
+ }
+
+static const struct qusb2_phy_init_tbl sm6115_init_tbl[] = {
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xf8),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x53),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0x81),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0x17),
+
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL2, 0x21),
+
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TEST2, 0x14),
+
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9f),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00),
+};
+
+static const unsigned int sm6115_regs_layout[] = {
+ [QUSB2PHY_PLL_STATUS] = 0x38, [QUSB2PHY_PORT_TUNE1] = 0x80,
+ [QUSB2PHY_PORT_TUNE2] = 0x84, [QUSB2PHY_PORT_TUNE3] = 0x88,
+ [QUSB2PHY_PORT_TUNE4] = 0x8c, [QUSB2PHY_PORT_TUNE5] = 0x90,
+ [QUSB2PHY_PORT_TEST1] = 0xb8, [QUSB2PHY_PORT_TEST2] = 0x9c,
+ [QUSB2PHY_PORT_POWERDOWN] = 0xb4, [QUSB2PHY_INTR_CTRL] = 0xbc,
+};
+
+static const struct qusb2_phy_init_tbl qusb2_v2_init_tbl[] = {
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, 0x03),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CLOCK_INVERTERS, 0x7c),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CMODE, 0x80),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_LOCK_DELAY, 0x0a),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_DIGITAL_TIMERS_TWO, 0x19),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_BIAS_CONTROL_1, 0x40),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_BIAS_CONTROL_2, 0x20),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_PWR_CTRL2, 0x21),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_IMP_CTRL1, 0x0),
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_IMP_CTRL2, 0x58),
+
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0x30),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0x29),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0xca),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0x04),
+ QUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE5, 0x03),
+
+ QUSB2_PHY_INIT_CFG(QUSB2PHY_CHG_CTRL2, 0x0),
+};
+
+static const unsigned int qusb2_v2_regs_layout[] = {
+ [QUSB2PHY_PLL_CORE_INPUT_OVERRIDE] = 0xa8,
+ [QUSB2PHY_PLL_STATUS] = 0x1a0,
+ [QUSB2PHY_PORT_TUNE1] = 0x240,
+ [QUSB2PHY_PORT_TUNE2] = 0x244,
+ [QUSB2PHY_PORT_TUNE3] = 0x248,
+ [QUSB2PHY_PORT_TUNE4] = 0x24c,
+ [QUSB2PHY_PORT_TUNE5] = 0x250,
+ [QUSB2PHY_PORT_TEST1] = 0x254,
+ [QUSB2PHY_PORT_TEST2] = 0x258,
+ [QUSB2PHY_PORT_POWERDOWN] = 0x210,
+ [QUSB2PHY_INTR_CTRL] = 0x230,
+};
+
+static const struct qusb2_phy_cfg sm6115_phy_cfg = {
+ .tbl = sm6115_init_tbl,
+ .tbl_num = ARRAY_SIZE(sm6115_init_tbl),
+ .regs = sm6115_regs_layout,
+
+ .has_pll_test = true,
+ .disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),
+ .mask_core_ready = PLL_LOCKED,
+ .autoresume_en = BIT(3),
+};
+
+static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {
+ .tbl = qusb2_v2_init_tbl,
+ .tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl),
+ .regs = qusb2_v2_regs_layout,
+
+ .disable_ctrl = (PWR_CTRL1_VREF_SUPPLY_TRIM | PWR_CTRL1_CLAMP_N_EN |
+ POWER_DOWN),
+ .mask_core_ready = CORE_READY_STATUS,
+ .has_pll_override = true,
+ .autoresume_en = BIT(0),
+ .update_tune1_with_efuse = true,
+};
+
+/**
+ * struct qusb2_phy - structure holding qusb2 phy attributes
+ *
+ * @phy: generic phy
+ * @base: iomapped memory space for qubs2 phy
+ *
+ * @cfg_ahb_clk: AHB2PHY interface clock
+ * @phy_rst: phy reset control
+ *
+ * @cfg: phy config data
+ * @has_se_clk_scheme: indicate if PHY has single-ended ref clock scheme
+ */
+struct qusb2_phy {
+ struct phy *phy;
+ void __iomem *base;
+
+ struct clk cfg_ahb_clk;
+ struct reset_ctl phy_rst;
+
+ const struct qusb2_phy_cfg *cfg;
+ bool has_se_clk_scheme;
+};
+
+static inline void qusb2_phy_configure(void __iomem *base,
+ const unsigned int *regs,
+ const struct qusb2_phy_init_tbl tbl[],
+ int num)
+{
+ int i;
+
+ for (i = 0; i < num; i++) {
+ if (tbl[i].in_layout)
+ writel(tbl[i].val, base + regs[tbl[i].offset]);
+ else
+ writel(tbl[i].val, base + tbl[i].offset);
+ }
+}
+
+static int qusb2phy_do_reset(struct qusb2_phy *qphy)
+{
+ int ret;
+
+ ret = reset_assert(&qphy->phy_rst);
+ if (ret)
+ return ret;
+
+ udelay(500);
+
+ ret = reset_deassert(&qphy->phy_rst);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qusb2phy_power_on(struct phy *phy)
+{
+ struct qusb2_phy *qphy = dev_get_priv(phy->dev);
+ const struct qusb2_phy_cfg *cfg = qphy->cfg;
+ int ret;
+ u32 val;
+
+ ret = qusb2phy_do_reset(qphy);
+ if (ret)
+ return ret;
+
+ /* Disable the PHY */
+ setbits_le32(qphy->base + cfg->regs[QUSB2PHY_PORT_POWERDOWN],
+ qphy->cfg->disable_ctrl);
+
+ if (cfg->has_pll_test) {
+ /* save reset value to override reference clock scheme later */
+ val = readl(qphy->base + QUSB2PHY_PLL_TEST);
+ }
+
+ qusb2_phy_configure(qphy->base, cfg->regs, cfg->tbl, cfg->tbl_num);
+
+ /* Enable the PHY */
+ clrbits_le32(qphy->base + cfg->regs[QUSB2PHY_PORT_POWERDOWN],
+ POWER_DOWN);
+
+ /* Required to get phy pll lock successfully */
+ udelay(150);
+
+ if (cfg->has_pll_test) {
+ val |= CLK_REF_SEL;
+
+ writel(val, qphy->base + QUSB2PHY_PLL_TEST);
+
+ /* ensure above write is through */
+ readl(qphy->base + QUSB2PHY_PLL_TEST);
+ }
+
+ /* Required to get phy pll lock successfully */
+ udelay(100);
+
+ val = readb(qphy->base + cfg->regs[QUSB2PHY_PLL_STATUS]);
+ if (!(val & cfg->mask_core_ready)) {
+ pr_err("QUSB2PHY pll lock failed: status reg = %x\n", val);
+ ret = -EBUSY;
+ return ret;
+ }
+
+ return 0;
+}
+
+static int qusb2phy_power_off(struct phy *phy)
+{
+ struct qusb2_phy *qphy = dev_get_priv(phy->dev);
+
+ /* Disable the PHY */
+ setbits_le32(qphy->base + qphy->cfg->regs[QUSB2PHY_PORT_POWERDOWN],
+ qphy->cfg->disable_ctrl);
+
+ reset_assert(&qphy->phy_rst);
+
+ clk_disable(&qphy->cfg_ahb_clk);
+
+ return 0;
+}
+
+static int qusb2phy_clk_init(struct udevice *dev, struct qusb2_phy *qphy)
+{
+ int ret;
+
+ /* We ignore the ref clock as we currently lack a driver for rpmcc/rpmhcc where
+ * it usually comes from - we assume it's always on.
+ */
+ ret = clk_get_by_name(dev, "cfg_ahb", &qphy->cfg_ahb_clk);
+ if (ret == -ENOSYS || ret == -ENOENT)
+ return 0;
+ if (ret)
+ return ret;
+
+ ret = clk_enable(&qphy->cfg_ahb_clk);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qusb2phy_probe(struct udevice *dev)
+{
+ struct qusb2_phy *qphy = dev_get_priv(dev);
+ int ret;
+
+ qphy->base = (void __iomem *)dev_read_addr(dev);
+ if (IS_ERR(qphy->base))
+ return PTR_ERR(qphy->base);
+
+ ret = qusb2phy_clk_init(dev, qphy);
+ if (ret) {
+ printf("%s: Couldn't get clocks: %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = reset_get_by_index(dev, 0, &qphy->phy_rst);
+ if (ret) {
+ printf("%s: Couldn't get resets: %d\n", __func__, ret);
+ return ret;
+ }
+
+ qphy->cfg = (const struct qusb2_phy_cfg *)dev_get_driver_data(dev);
+ if (!qphy->cfg) {
+ printf("%s: Couldn't get driver data\n", __func__);
+ return -EINVAL;
+ }
+
+ debug("%s success qusb phy cfg %p\n", __func__, qphy->cfg);
+ return 0;
+}
+
+static struct phy_ops qusb2phy_ops = {
+ .power_on = qusb2phy_power_on,
+ .power_off = qusb2phy_power_off,
+};
+
+static const struct udevice_id qusb2phy_ids[] = {
+ { .compatible = "qcom,qusb2-phy" },
+ { .compatible = "qcom,qcm2290-qusb2-phy",
+ .data = (ulong)&sm6115_phy_cfg },
+ { .compatible = "qcom,sm6115-qusb2-phy",
+ .data = (ulong)&sm6115_phy_cfg },
+ { .compatible = "qcom,qusb2-v2-phy", .data = (ulong)&qusb2_v2_phy_cfg },
+ {}
+};
+
+U_BOOT_DRIVER(qcom_qusb2_phy) = {
+ .name = "qcom-qusb2-phy",
+ .id = UCLASS_PHY,
+ .of_match = qusb2phy_ids,
+ .ops = &qusb2phy_ops,
+ .probe = qusb2phy_probe,
+ .priv_auto = sizeof(struct qusb2_phy),
+};
diff --git a/drivers/phy/qcom/phy-qcom-snps-femto-v2.c b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c
new file mode 100644
index 0000000..a1675b6
--- /dev/null
+++ b/drivers/phy/qcom/phy-qcom-snps-femto-v2.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ * Copyright (C) 2023 Bhupesh Sharma <bhupesh.sharma@linaro.org>
+ *
+ * Based on Linux driver
+ */
+
+#include <clk.h>
+#include <clk-uclass.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/devres.h>
+#include <generic-phy.h>
+#include <malloc.h>
+#include <reset.h>
+
+#include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/clk-provider.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+
+#define USB2_PHY_USB_PHY_UTMI_CTRL0 (0x3c)
+#define SLEEPM BIT(0)
+#define OPMODE_MASK GENMASK(4, 3)
+#define OPMODE_NORMAL (0x00)
+#define OPMODE_NONDRIVING BIT(3)
+#define TERMSEL BIT(5)
+
+#define USB2_PHY_USB_PHY_UTMI_CTRL5 (0x50)
+#define POR BIT(1)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0 (0x54)
+#define SIDDQ BIT(2)
+#define RETENABLEN BIT(3)
+#define FSEL_MASK GENMASK(6, 4)
+#define FSEL_DEFAULT (0x3 << 4)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1 (0x58)
+#define VBUSVLDEXTSEL0 BIT(4)
+#define PLLBTUNE BIT(5)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON2 (0x5c)
+#define VREGBYPASS BIT(0)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL1 (0x60)
+#define VBUSVLDEXT0 BIT(0)
+
+#define USB2_PHY_USB_PHY_HS_PHY_CTRL2 (0x64)
+#define USB2_AUTO_RESUME BIT(0)
+#define USB2_SUSPEND_N BIT(2)
+#define USB2_SUSPEND_N_SEL BIT(3)
+
+#define USB2_PHY_USB_PHY_CFG0 (0x94)
+#define UTMI_PHY_DATAPATH_CTRL_OVERRIDE_EN BIT(0)
+#define UTMI_PHY_CMN_CTRL_OVERRIDE_EN BIT(1)
+
+#define USB2_PHY_USB_PHY_REFCLK_CTRL (0xa0)
+#define REFCLK_SEL_MASK GENMASK(1, 0)
+#define REFCLK_SEL_DEFAULT (0x2 << 0)
+
+struct qcom_snps_hsphy {
+ void __iomem *base;
+ struct clk_bulk clks;
+ struct reset_ctl_bulk resets;
+};
+
+/*
+ * We should just be able to use clrsetbits_le32() here, but this results
+ * in crashes on some boards. This is suspected to be because of some bus
+ * arbitration quirks with the PHY (i.e. it takes several bus clock cycles
+ * for the write to actually go through). The readl_relaxed() at the end will
+ * block until the write is completed (and all registers updated), and thus
+ * ensure that we don't access the PHY registers when they're in an
+ * undetermined state.
+ */
+static inline void qcom_snps_hsphy_write_mask(void __iomem *base, u32 offset,
+ u32 mask, u32 val)
+{
+ u32 reg;
+
+ reg = readl_relaxed(base + offset);
+
+ reg &= ~mask;
+ reg |= val & mask;
+ writel_relaxed(reg, base + offset);
+
+ /* Ensure above write is completed */
+ readl_relaxed(base + offset);
+}
+
+static int qcom_snps_hsphy_usb_init(struct phy *phy)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_CFG0,
+ UTMI_PHY_CMN_CTRL_OVERRIDE_EN,
+ UTMI_PHY_CMN_CTRL_OVERRIDE_EN);
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_UTMI_CTRL5, POR,
+ POR);
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0, FSEL_MASK, 0);
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1,
+ PLLBTUNE, PLLBTUNE);
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_REFCLK_CTRL,
+ REFCLK_SEL_DEFAULT, REFCLK_SEL_MASK);
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON1,
+ VBUSVLDEXTSEL0, VBUSVLDEXTSEL0);
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL1,
+ VBUSVLDEXT0, VBUSVLDEXT0);
+
+ qcom_snps_hsphy_write_mask(priv->base,
+ USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON2,
+ VREGBYPASS, VREGBYPASS);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N,
+ USB2_SUSPEND_N_SEL | USB2_SUSPEND_N);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_UTMI_CTRL0,
+ SLEEPM, SLEEPM);
+
+ qcom_snps_hsphy_write_mask(
+ priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL_COMMON0, SIDDQ, 0);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_UTMI_CTRL5, POR,
+ 0);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_HS_PHY_CTRL2,
+ USB2_SUSPEND_N_SEL, 0);
+
+ qcom_snps_hsphy_write_mask(priv->base, USB2_PHY_USB_PHY_CFG0,
+ UTMI_PHY_CMN_CTRL_OVERRIDE_EN, 0);
+
+ return 0;
+}
+
+static int qcom_snps_hsphy_power_on(struct phy *phy)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);
+ int ret;
+
+ clk_enable_bulk(&priv->clks);
+
+ ret = reset_deassert_bulk(&priv->resets);
+ if (ret)
+ return ret;
+
+ ret = qcom_snps_hsphy_usb_init(phy);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static int qcom_snps_hsphy_power_off(struct phy *phy)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(phy->dev);
+
+ reset_assert_bulk(&priv->resets);
+ clk_disable_bulk(&priv->clks);
+
+ return 0;
+}
+
+static int qcom_snps_hsphy_phy_probe(struct udevice *dev)
+{
+ struct qcom_snps_hsphy *priv = dev_get_priv(dev);
+ int ret;
+
+ priv->base = dev_read_addr_ptr(dev);
+ if (IS_ERR(priv->base))
+ return PTR_ERR(priv->base);
+
+ ret = clk_get_bulk(dev, &priv->clks);
+ if (ret < 0 && ret != -ENOENT) {
+ printf("%s: Failed to get clocks %d\n", __func__, ret);
+ return ret;
+ }
+
+ ret = reset_get_bulk(dev, &priv->resets);
+ if (ret < 0) {
+ printf("failed to get resets, ret = %d\n", ret);
+ return ret;
+ }
+
+ clk_enable_bulk(&priv->clks);
+ reset_deassert_bulk(&priv->resets);
+
+ return 0;
+}
+
+static struct phy_ops qcom_snps_hsphy_phy_ops = {
+ .power_on = qcom_snps_hsphy_power_on,
+ .power_off = qcom_snps_hsphy_power_off,
+};
+
+static const struct udevice_id qcom_snps_hsphy_phy_ids[] = {
+ { .compatible = "qcom,sm8150-usb-hs-phy" },
+ { .compatible = "qcom,usb-snps-hs-5nm-phy" },
+ { .compatible = "qcom,usb-snps-hs-7nm-phy" },
+ { .compatible = "qcom,usb-snps-femto-v2-phy" },
+ {}
+};
+
+U_BOOT_DRIVER(qcom_usb_qcom_snps_hsphy) = {
+ .name = "qcom-snps-hsphy",
+ .id = UCLASS_PHY,
+ .of_match = qcom_snps_hsphy_phy_ids,
+ .ops = &qcom_snps_hsphy_phy_ops,
+ .probe = qcom_snps_hsphy_phy_probe,
+ .priv_auto = sizeof(struct qcom_snps_hsphy),
+};
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8016.c b/drivers/pinctrl/qcom/pinctrl-apq8016.c
index db0e212..a9a00f4 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8016.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8016.c
@@ -49,7 +49,8 @@
}
}
-static unsigned int apq8016_get_function_mux(unsigned int selector)
+static unsigned int apq8016_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8096.c b/drivers/pinctrl/qcom/pinctrl-apq8096.c
index 880df8f..9697cb5 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8096.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8096.c
@@ -44,7 +44,8 @@
}
}
-static unsigned int apq8096_get_function_mux(unsigned int selector)
+static unsigned int apq8096_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index 74c04ab..4479230 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -40,7 +40,8 @@
return pin_name;
}
-static unsigned int ipq4019_get_function_mux(unsigned int selector)
+static unsigned int ipq4019_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.c b/drivers/pinctrl/qcom/pinctrl-qcom.c
index ee0624d..909e566 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcom.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcom.c
@@ -83,14 +83,14 @@
unsigned int func_selector)
{
struct msm_pinctrl_priv *priv = dev_get_priv(dev);
+ u32 func = priv->data->get_function_mux(pin_selector, func_selector);
/* Always NOP for special pins, assume they're in the correct state */
if (qcom_is_special_pin(&priv->data->pin_data, pin_selector))
return 0;
clrsetbits_le32(priv->base + GPIO_CONFIG_REG(priv, pin_selector),
- TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
- priv->data->get_function_mux(func_selector) << 2);
+ TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE, func << 2);
return 0;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-qcom.h b/drivers/pinctrl/qcom/pinctrl-qcom.h
index 07f2eae..49b7bfb 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcom.h
+++ b/drivers/pinctrl/qcom/pinctrl-qcom.h
@@ -18,7 +18,8 @@
int functions_count;
const char *(*get_function_name)(struct udevice *dev,
unsigned int selector);
- unsigned int (*get_function_mux)(unsigned int selector);
+ unsigned int (*get_function_mux)(unsigned int pin,
+ unsigned int selector);
const char *(*get_pin_name)(struct udevice *dev,
unsigned int selector);
};
diff --git a/drivers/pinctrl/qcom/pinctrl-qcs404.c b/drivers/pinctrl/qcom/pinctrl-qcs404.c
index 3a2d468..4b7c670 100644
--- a/drivers/pinctrl/qcom/pinctrl-qcs404.c
+++ b/drivers/pinctrl/qcom/pinctrl-qcs404.c
@@ -94,7 +94,8 @@
}
}
-static unsigned int qcs404_get_function_mux(unsigned int selector)
+static unsigned int qcs404_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/pinctrl/qcom/pinctrl-sdm845.c b/drivers/pinctrl/qcom/pinctrl-sdm845.c
index 76bd8c4..459a432 100644
--- a/drivers/pinctrl/qcom/pinctrl-sdm845.c
+++ b/drivers/pinctrl/qcom/pinctrl-sdm845.c
@@ -70,7 +70,8 @@
return pin_name;
}
-static unsigned int sdm845_get_function_mux(unsigned int selector)
+static unsigned int sdm845_get_function_mux(__maybe_unused unsigned int pin,
+ unsigned int selector)
{
return msm_pinctrl_functions[selector].val;
}
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index e5c3dcf..5260474 100644
--- a/drivers/serial/serial_msm_geni.c
+++ b/drivers/serial/serial_msm_geni.c
@@ -603,7 +603,20 @@
.priv_auto = sizeof(struct msm_serial_data),
.probe = msm_serial_probe,
.ops = &msm_serial_ops,
- .flags = DM_FLAG_PRE_RELOC,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
+
+static const struct udevice_id geniqup_ids[] = {
+ { .compatible = "qcom,geni-se-qup" },
+ { }
+};
+
+U_BOOT_DRIVER(geni_se_qup) = {
+ .name = "geni-se-qup",
+ .id = UCLASS_NOP,
+ .of_match = geniqup_ids,
+ .bind = dm_scan_fdt_dev,
+ .flags = DM_FLAG_PRE_RELOC | DM_FLAG_DEFAULT_PD_CTRL_OFF,
};
#ifdef CONFIG_DEBUG_UART_MSM_GENI
diff --git a/include/configs/jethub.h b/include/configs/jethub.h
index e22db49..2c44bfc 100644
--- a/include/configs/jethub.h
+++ b/include/configs/jethub.h
@@ -11,7 +11,7 @@
#if defined(CONFIG_MESON_AXG)
#define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \
"bootcmd_rescue=" \
- "if gpio input 10; then " \
+ "if gpio input periphs-banks10; then " \
"run bootcmd_mmc0; " \
"run bootcmd_usb0;" \
"fi;\0"
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index efab9a6..65fa5f3 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -120,6 +120,12 @@
#include <config_distro_bootcmd.h>
+#ifdef CONFIG_OF_UPSTREAM
+#define FDTFILE_NAME CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#else
+#define FDTFILE_NAME "amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
+#endif
+
#ifndef CFG_EXTRA_ENV_SETTINGS
#define CFG_EXTRA_ENV_SETTINGS \
"stdin=" STDIN_CFG "\0" \
@@ -133,7 +139,7 @@
"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
"fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
"ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \
- "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
+ "fdtfile=" FDTFILE_NAME "\0" \
"dfu_alt_info=fitimage ram " KERNEL_ADDR_R " 0x4000000 \0" \
BOOTENV
#endif
diff --git a/include/dt-bindings/gpio/meson-axg-gpio.h b/include/dt-bindings/gpio/meson-axg-gpio.h
deleted file mode 100644
index 25bb1ff..0000000
--- a/include/dt-bindings/gpio/meson-axg-gpio.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/*
- * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
- * Author: Xingyu Chen <xingyu.chen@amlogic.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef _DT_BINDINGS_MESON_AXG_GPIO_H
-#define _DT_BINDINGS_MESON_AXG_GPIO_H
-
-/* First GPIO chip */
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIOAO_10 10
-#define GPIOAO_11 11
-#define GPIOAO_12 12
-#define GPIOAO_13 13
-#define GPIO_TEST_N 14
-
-/* Second GPIO chip */
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define BOOT_0 11
-#define BOOT_1 12
-#define BOOT_2 13
-#define BOOT_3 14
-#define BOOT_4 15
-#define BOOT_5 16
-#define BOOT_6 17
-#define BOOT_7 18
-#define BOOT_8 19
-#define BOOT_9 20
-#define BOOT_10 21
-#define BOOT_11 22
-#define BOOT_12 23
-#define BOOT_13 24
-#define BOOT_14 25
-#define GPIOA_0 26
-#define GPIOA_1 27
-#define GPIOA_2 28
-#define GPIOA_3 29
-#define GPIOA_4 30
-#define GPIOA_5 31
-#define GPIOA_6 32
-#define GPIOA_7 33
-#define GPIOA_8 34
-#define GPIOA_9 35
-#define GPIOA_10 36
-#define GPIOA_11 37
-#define GPIOA_12 38
-#define GPIOA_13 39
-#define GPIOA_14 40
-#define GPIOA_15 41
-#define GPIOA_16 42
-#define GPIOA_17 43
-#define GPIOA_18 44
-#define GPIOA_19 45
-#define GPIOA_20 46
-#define GPIOX_0 47
-#define GPIOX_1 48
-#define GPIOX_2 49
-#define GPIOX_3 50
-#define GPIOX_4 51
-#define GPIOX_5 52
-#define GPIOX_6 53
-#define GPIOX_7 54
-#define GPIOX_8 55
-#define GPIOX_9 56
-#define GPIOX_10 57
-#define GPIOX_11 58
-#define GPIOX_12 59
-#define GPIOX_13 60
-#define GPIOX_14 61
-#define GPIOX_15 62
-#define GPIOX_16 63
-#define GPIOX_17 64
-#define GPIOX_18 65
-#define GPIOX_19 66
-#define GPIOX_20 67
-#define GPIOX_21 68
-#define GPIOX_22 69
-#define GPIOY_0 70
-#define GPIOY_1 71
-#define GPIOY_2 72
-#define GPIOY_3 73
-#define GPIOY_4 74
-#define GPIOY_5 75
-#define GPIOY_6 76
-#define GPIOY_7 77
-#define GPIOY_8 78
-#define GPIOY_9 79
-#define GPIOY_10 80
-#define GPIOY_11 81
-#define GPIOY_12 82
-#define GPIOY_13 83
-#define GPIOY_14 84
-#define GPIOY_15 85
-
-#endif /* _DT_BINDINGS_MESON_AXG_GPIO_H */
diff --git a/include/dt-bindings/gpio/meson-g12a-gpio.h b/include/dt-bindings/gpio/meson-g12a-gpio.h
deleted file mode 100644
index f7bd693..0000000
--- a/include/dt-bindings/gpio/meson-g12a-gpio.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
- * Author: Xingyu Chen <xingyu.chen@amlogic.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_G12A_GPIO_H
-#define _DT_BINDINGS_MESON_G12A_GPIO_H
-
-/* First GPIO chip */
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIOAO_10 10
-#define GPIOAO_11 11
-#define GPIOE_0 12
-#define GPIOE_1 13
-#define GPIOE_2 14
-
-/* Second GPIO chip */
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define GPIOZ_11 11
-#define GPIOZ_12 12
-#define GPIOZ_13 13
-#define GPIOZ_14 14
-#define GPIOZ_15 15
-#define GPIOH_0 16
-#define GPIOH_1 17
-#define GPIOH_2 18
-#define GPIOH_3 19
-#define GPIOH_4 20
-#define GPIOH_5 21
-#define GPIOH_6 22
-#define GPIOH_7 23
-#define GPIOH_8 24
-#define BOOT_0 25
-#define BOOT_1 26
-#define BOOT_2 27
-#define BOOT_3 28
-#define BOOT_4 29
-#define BOOT_5 30
-#define BOOT_6 31
-#define BOOT_7 32
-#define BOOT_8 33
-#define BOOT_9 34
-#define BOOT_10 35
-#define BOOT_11 36
-#define BOOT_12 37
-#define BOOT_13 38
-#define BOOT_14 39
-#define BOOT_15 40
-#define GPIOC_0 41
-#define GPIOC_1 42
-#define GPIOC_2 43
-#define GPIOC_3 44
-#define GPIOC_4 45
-#define GPIOC_5 46
-#define GPIOC_6 47
-#define GPIOC_7 48
-#define GPIOA_0 49
-#define GPIOA_1 50
-#define GPIOA_2 51
-#define GPIOA_3 52
-#define GPIOA_4 53
-#define GPIOA_5 54
-#define GPIOA_6 55
-#define GPIOA_7 56
-#define GPIOA_8 57
-#define GPIOA_9 58
-#define GPIOA_10 59
-#define GPIOA_11 60
-#define GPIOA_12 61
-#define GPIOA_13 62
-#define GPIOA_14 63
-#define GPIOA_15 64
-#define GPIOX_0 65
-#define GPIOX_1 66
-#define GPIOX_2 67
-#define GPIOX_3 68
-#define GPIOX_4 69
-#define GPIOX_5 70
-#define GPIOX_6 71
-#define GPIOX_7 72
-#define GPIOX_8 73
-#define GPIOX_9 74
-#define GPIOX_10 75
-#define GPIOX_11 76
-#define GPIOX_12 77
-#define GPIOX_13 78
-#define GPIOX_14 79
-#define GPIOX_15 80
-#define GPIOX_16 81
-#define GPIOX_17 82
-#define GPIOX_18 83
-#define GPIOX_19 84
-
-#endif /* _DT_BINDINGS_MESON_G12A_GPIO_H */
diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h
deleted file mode 100644
index 489c75b..0000000
--- a/include/dt-bindings/gpio/meson-gxbb-gpio.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * GPIO definitions for Amlogic Meson GXBB SoCs
- *
- * Copyright (C) 2016 Endless Mobile, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H
-#define _DT_BINDINGS_MESON_GXBB_GPIO_H
-
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIOAO_10 10
-#define GPIOAO_11 11
-#define GPIOAO_12 12
-#define GPIOAO_13 13
-#define GPIO_TEST_N 14
-
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define GPIOZ_11 11
-#define GPIOZ_12 12
-#define GPIOZ_13 13
-#define GPIOZ_14 14
-#define GPIOZ_15 15
-#define GPIOH_0 16
-#define GPIOH_1 17
-#define GPIOH_2 18
-#define GPIOH_3 19
-#define BOOT_0 20
-#define BOOT_1 21
-#define BOOT_2 22
-#define BOOT_3 23
-#define BOOT_4 24
-#define BOOT_5 25
-#define BOOT_6 26
-#define BOOT_7 27
-#define BOOT_8 28
-#define BOOT_9 29
-#define BOOT_10 30
-#define BOOT_11 31
-#define BOOT_12 32
-#define BOOT_13 33
-#define BOOT_14 34
-#define BOOT_15 35
-#define BOOT_16 36
-#define BOOT_17 37
-#define CARD_0 38
-#define CARD_1 39
-#define CARD_2 40
-#define CARD_3 41
-#define CARD_4 42
-#define CARD_5 43
-#define CARD_6 44
-#define GPIODV_0 45
-#define GPIODV_1 46
-#define GPIODV_2 47
-#define GPIODV_3 48
-#define GPIODV_4 49
-#define GPIODV_5 50
-#define GPIODV_6 51
-#define GPIODV_7 52
-#define GPIODV_8 53
-#define GPIODV_9 54
-#define GPIODV_10 55
-#define GPIODV_11 56
-#define GPIODV_12 57
-#define GPIODV_13 58
-#define GPIODV_14 59
-#define GPIODV_15 60
-#define GPIODV_16 61
-#define GPIODV_17 62
-#define GPIODV_18 63
-#define GPIODV_19 64
-#define GPIODV_20 65
-#define GPIODV_21 66
-#define GPIODV_22 67
-#define GPIODV_23 68
-#define GPIODV_24 69
-#define GPIODV_25 70
-#define GPIODV_26 71
-#define GPIODV_27 72
-#define GPIODV_28 73
-#define GPIODV_29 74
-#define GPIOY_0 75
-#define GPIOY_1 76
-#define GPIOY_2 77
-#define GPIOY_3 78
-#define GPIOY_4 79
-#define GPIOY_5 80
-#define GPIOY_6 81
-#define GPIOY_7 82
-#define GPIOY_8 83
-#define GPIOY_9 84
-#define GPIOY_10 85
-#define GPIOY_11 86
-#define GPIOY_12 87
-#define GPIOY_13 88
-#define GPIOY_14 89
-#define GPIOY_15 90
-#define GPIOY_16 91
-#define GPIOX_0 92
-#define GPIOX_1 93
-#define GPIOX_2 94
-#define GPIOX_3 95
-#define GPIOX_4 96
-#define GPIOX_5 97
-#define GPIOX_6 98
-#define GPIOX_7 99
-#define GPIOX_8 100
-#define GPIOX_9 101
-#define GPIOX_10 102
-#define GPIOX_11 103
-#define GPIOX_12 104
-#define GPIOX_13 105
-#define GPIOX_14 106
-#define GPIOX_15 107
-#define GPIOX_16 108
-#define GPIOX_17 109
-#define GPIOX_18 110
-#define GPIOX_19 111
-#define GPIOX_20 112
-#define GPIOX_21 113
-#define GPIOX_22 114
-#define GPIOCLK_0 115
-#define GPIOCLK_1 116
-#define GPIOCLK_2 117
-#define GPIOCLK_3 118
-
-#endif
diff --git a/include/dt-bindings/gpio/meson-gxl-gpio.h b/include/dt-bindings/gpio/meson-gxl-gpio.h
deleted file mode 100644
index 0a001ae..0000000
--- a/include/dt-bindings/gpio/meson-gxl-gpio.h
+++ /dev/null
@@ -1,125 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * GPIO definitions for Amlogic Meson GXL SoCs
- *
- * Copyright (C) 2016 Endless Mobile, Inc.
- * Author: Carlo Caione <carlo@endlessm.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXL_GPIO_H
-#define _DT_BINDINGS_MESON_GXL_GPIO_H
-
-#define GPIOAO_0 0
-#define GPIOAO_1 1
-#define GPIOAO_2 2
-#define GPIOAO_3 3
-#define GPIOAO_4 4
-#define GPIOAO_5 5
-#define GPIOAO_6 6
-#define GPIOAO_7 7
-#define GPIOAO_8 8
-#define GPIOAO_9 9
-#define GPIO_TEST_N 10
-
-#define GPIOZ_0 0
-#define GPIOZ_1 1
-#define GPIOZ_2 2
-#define GPIOZ_3 3
-#define GPIOZ_4 4
-#define GPIOZ_5 5
-#define GPIOZ_6 6
-#define GPIOZ_7 7
-#define GPIOZ_8 8
-#define GPIOZ_9 9
-#define GPIOZ_10 10
-#define GPIOZ_11 11
-#define GPIOZ_12 12
-#define GPIOZ_13 13
-#define GPIOZ_14 14
-#define GPIOZ_15 15
-#define GPIOH_0 16
-#define GPIOH_1 17
-#define GPIOH_2 18
-#define GPIOH_3 19
-#define GPIOH_4 20
-#define GPIOH_5 21
-#define GPIOH_6 22
-#define GPIOH_7 23
-#define GPIOH_8 24
-#define GPIOH_9 25
-#define BOOT_0 26
-#define BOOT_1 27
-#define BOOT_2 28
-#define BOOT_3 29
-#define BOOT_4 30
-#define BOOT_5 31
-#define BOOT_6 32
-#define BOOT_7 33
-#define BOOT_8 34
-#define BOOT_9 35
-#define BOOT_10 36
-#define BOOT_11 37
-#define BOOT_12 38
-#define BOOT_13 39
-#define BOOT_14 40
-#define BOOT_15 41
-#define CARD_0 42
-#define CARD_1 43
-#define CARD_2 44
-#define CARD_3 45
-#define CARD_4 46
-#define CARD_5 47
-#define CARD_6 48
-#define GPIODV_0 49
-#define GPIODV_1 50
-#define GPIODV_2 51
-#define GPIODV_3 52
-#define GPIODV_4 53
-#define GPIODV_5 54
-#define GPIODV_6 55
-#define GPIODV_7 56
-#define GPIODV_8 57
-#define GPIODV_9 58
-#define GPIODV_10 59
-#define GPIODV_11 60
-#define GPIODV_12 61
-#define GPIODV_13 62
-#define GPIODV_14 63
-#define GPIODV_15 64
-#define GPIODV_16 65
-#define GPIODV_17 66
-#define GPIODV_18 67
-#define GPIODV_19 68
-#define GPIODV_20 69
-#define GPIODV_21 70
-#define GPIODV_22 71
-#define GPIODV_23 72
-#define GPIODV_24 73
-#define GPIODV_25 74
-#define GPIODV_26 75
-#define GPIODV_27 76
-#define GPIODV_28 77
-#define GPIODV_29 78
-#define GPIOX_0 79
-#define GPIOX_1 80
-#define GPIOX_2 81
-#define GPIOX_3 82
-#define GPIOX_4 83
-#define GPIOX_5 84
-#define GPIOX_6 85
-#define GPIOX_7 86
-#define GPIOX_8 87
-#define GPIOX_9 88
-#define GPIOX_10 89
-#define GPIOX_11 90
-#define GPIOX_12 91
-#define GPIOX_13 92
-#define GPIOX_14 93
-#define GPIOX_15 94
-#define GPIOX_16 95
-#define GPIOX_17 96
-#define GPIOX_18 97
-#define GPIOCLK_0 98
-#define GPIOCLK_1 99
-
-#endif
diff --git a/include/dt-bindings/power/meson-axg-power.h b/include/dt-bindings/power/meson-axg-power.h
deleted file mode 100644
index e524388..0000000
--- a/include/dt-bindings/power/meson-axg-power.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2020 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_AXG_POWER_H
-#define _DT_BINDINGS_MESON_AXG_POWER_H
-
-#define PWRC_AXG_VPU_ID 0
-#define PWRC_AXG_ETHERNET_MEM_ID 1
-#define PWRC_AXG_AUDIO_ID 2
-
-#endif
diff --git a/include/dt-bindings/power/meson-g12a-power.h b/include/dt-bindings/power/meson-g12a-power.h
deleted file mode 100644
index bb5e67a..0000000
--- a/include/dt-bindings/power/meson-g12a-power.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_G12A_POWER_H
-#define _DT_BINDINGS_MESON_G12A_POWER_H
-
-#define PWRC_G12A_VPU_ID 0
-#define PWRC_G12A_ETH_ID 1
-
-#endif
diff --git a/include/dt-bindings/power/meson-gxbb-power.h b/include/dt-bindings/power/meson-gxbb-power.h
deleted file mode 100644
index 1262dac..0000000
--- a/include/dt-bindings/power/meson-gxbb-power.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_GXBB_POWER_H
-#define _DT_BINDINGS_MESON_GXBB_POWER_H
-
-#define PWRC_GXBB_VPU_ID 0
-#define PWRC_GXBB_ETHERNET_MEM_ID 1
-
-#endif
diff --git a/include/dt-bindings/power/meson-sm1-power.h b/include/dt-bindings/power/meson-sm1-power.h
deleted file mode 100644
index a020ab0..0000000
--- a/include/dt-bindings/power/meson-sm1-power.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_MESON_SM1_POWER_H
-#define _DT_BINDINGS_MESON_SM1_POWER_H
-
-#define PWRC_SM1_VPU_ID 0
-#define PWRC_SM1_NNA_ID 1
-#define PWRC_SM1_USB_ID 2
-#define PWRC_SM1_PCIE_ID 3
-#define PWRC_SM1_GE2D_ID 4
-#define PWRC_SM1_AUDIO_ID 5
-#define PWRC_SM1_ETH_ID 6
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h b/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
deleted file mode 100644
index 1ef8078..0000000
--- a/include/dt-bindings/reset/amlogic,meson-axg-audio-arb.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
- *
- * Copyright (c) 2018 Baylibre SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
-#define _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H
-
-#define AXG_ARB_TODDR_A 0
-#define AXG_ARB_TODDR_B 1
-#define AXG_ARB_TODDR_C 2
-#define AXG_ARB_FRDDR_A 3
-#define AXG_ARB_FRDDR_B 4
-#define AXG_ARB_FRDDR_C 5
-#define AXG_ARB_TODDR_D 6
-#define AXG_ARB_FRDDR_D 7
-
-#endif /* _DT_BINDINGS_AMLOGIC_MESON_AXG_AUDIO_ARB_H */
diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h
deleted file mode 100644
index 0f2e0fe..0000000
--- a/include/dt-bindings/reset/amlogic,meson-axg-reset.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
-/*
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- *
- * Copyright (c) 2017 Amlogic, inc.
- * Author: Yixun Lan <yixun.lan@amlogic.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
-
-/* RESET0 */
-#define RESET_HIU 0
-#define RESET_PCIE_A 1
-#define RESET_PCIE_B 2
-#define RESET_DDR_TOP 3
-/* 4 */
-#define RESET_VIU 5
-#define RESET_PCIE_PHY 6
-#define RESET_PCIE_APB 7
-/* 8 */
-/* 9 */
-#define RESET_VENC 10
-#define RESET_ASSIST 11
-/* 12 */
-#define RESET_VCBUS 13
-/* 14 */
-/* 15 */
-#define RESET_GIC 16
-#define RESET_CAPB3_DECODE 17
-/* 18-21 */
-#define RESET_SYS_CPU_CAPB3 22
-#define RESET_CBUS_CAPB3 23
-#define RESET_AHB_CNTL 24
-#define RESET_AHB_DATA 25
-#define RESET_VCBUS_CLK81 26
-#define RESET_MMC 27
-/* 28-31 */
-/* RESET1 */
-/* 32 */
-/* 33 */
-#define RESET_USB_OTG 34
-#define RESET_DDR 35
-#define RESET_AO_RESET 36
-/* 37 */
-#define RESET_AHB_SRAM 38
-/* 39 */
-/* 40 */
-#define RESET_DMA 41
-#define RESET_ISA 42
-#define RESET_ETHERNET 43
-/* 44 */
-#define RESET_SD_EMMC_B 45
-#define RESET_SD_EMMC_C 46
-#define RESET_ROM_BOOT 47
-#define RESET_SYS_CPU_0 48
-#define RESET_SYS_CPU_1 49
-#define RESET_SYS_CPU_2 50
-#define RESET_SYS_CPU_3 51
-#define RESET_SYS_CPU_CORE_0 52
-#define RESET_SYS_CPU_CORE_1 53
-#define RESET_SYS_CPU_CORE_2 54
-#define RESET_SYS_CPU_CORE_3 55
-#define RESET_SYS_PLL_DIV 56
-#define RESET_SYS_CPU_AXI 57
-#define RESET_SYS_CPU_L2 58
-#define RESET_SYS_CPU_P 59
-#define RESET_SYS_CPU_MBIST 60
-/* 61-63 */
-/* RESET2 */
-/* 64 */
-/* 65 */
-#define RESET_AUDIO 66
-/* 67 */
-#define RESET_MIPI_HOST 68
-#define RESET_AUDIO_LOCKER 69
-#define RESET_GE2D 70
-/* 71-76 */
-#define RESET_AO_CPU_RESET 77
-/* 78-95 */
-/* RESET3 */
-#define RESET_RING_OSCILLATOR 96
-/* 97-127 */
-/* RESET4 */
-/* 128 */
-/* 129 */
-#define RESET_MIPI_PHY 130
-/* 131-140 */
-#define RESET_VENCL 141
-#define RESET_I2C_MASTER_2 142
-#define RESET_I2C_MASTER_1 143
-/* 144-159 */
-/* RESET5 */
-/* 160-191 */
-/* RESET6 */
-#define RESET_PERIPHS_GENERAL 192
-#define RESET_PERIPHS_SPICC 193
-/* 194 */
-/* 195 */
-#define RESET_PERIPHS_I2C_MASTER_0 196
-/* 197-200 */
-#define RESET_PERIPHS_UART_0 201
-#define RESET_PERIPHS_UART_1 202
-/* 203-204 */
-#define RESET_PERIPHS_SPI_0 205
-#define RESET_PERIPHS_I2C_MASTER_3 206
-/* 207-223 */
-/* RESET7 */
-#define RESET_USB_DDR_0 224
-#define RESET_USB_DDR_1 225
-#define RESET_USB_DDR_2 226
-#define RESET_USB_DDR_3 227
-/* 228 */
-#define RESET_DEVICE_MMC_ARB 229
-/* 230 */
-#define RESET_VID_LOCK 231
-#define RESET_A9_DMC_PIPEL 232
-#define RESET_DMC_VPU_PIPEL 233
-/* 234-255 */
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
deleted file mode 100644
index f805129..0000000
--- a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2019 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
-
-#define AUD_RESET_PDM 0
-#define AUD_RESET_TDMIN_A 1
-#define AUD_RESET_TDMIN_B 2
-#define AUD_RESET_TDMIN_C 3
-#define AUD_RESET_TDMIN_LB 4
-#define AUD_RESET_LOOPBACK 5
-#define AUD_RESET_TODDR_A 6
-#define AUD_RESET_TODDR_B 7
-#define AUD_RESET_TODDR_C 8
-#define AUD_RESET_FRDDR_A 9
-#define AUD_RESET_FRDDR_B 10
-#define AUD_RESET_FRDDR_C 11
-#define AUD_RESET_TDMOUT_A 12
-#define AUD_RESET_TDMOUT_B 13
-#define AUD_RESET_TDMOUT_C 14
-#define AUD_RESET_SPDIFOUT 15
-#define AUD_RESET_SPDIFOUT_B 16
-#define AUD_RESET_SPDIFIN 17
-#define AUD_RESET_EQDRC 18
-#define AUD_RESET_RESAMPLE 19
-#define AUD_RESET_DDRARB 20
-#define AUD_RESET_POWDET 21
-#define AUD_RESET_TORAM 22
-#define AUD_RESET_TOACODEC 23
-#define AUD_RESET_TOHDMITX 24
-#define AUD_RESET_CLKTREE 25
-
-/* SM1 added resets */
-#define AUD_RESET_RESAMPLE_B 26
-#define AUD_RESET_TOVAD 27
-#define AUD_RESET_LOCKER 28
-#define AUD_RESET_SPDIFIN_LB 29
-#define AUD_RESET_FRATV 30
-#define AUD_RESET_FRHDMIRX 31
-#define AUD_RESET_FRDDR_D 32
-#define AUD_RESET_TODDR_D 33
-#define AUD_RESET_LOOPBACK_B 34
-#define AUD_RESET_EARCTX 35
-#define AUD_RESET_EARCRX 36
-#define AUD_RESET_FRDDR_E 37
-#define AUD_RESET_TODDR_E 38
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
deleted file mode 100644
index 6d487c5..0000000
--- a/include/dt-bindings/reset/amlogic,meson-g12a-reset.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
-/*
- * Copyright (c) 2019 BayLibre, SAS.
- * Author: Jerome Brunet <jbrunet@baylibre.com>
- *
- */
-
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_G12A_RESET_H
-
-/* RESET0 */
-#define RESET_HIU 0
-/* 1 */
-#define RESET_DOS 2
-/* 3-4 */
-#define RESET_VIU 5
-#define RESET_AFIFO 6
-#define RESET_VID_PLL_DIV 7
-/* 8-9 */
-#define RESET_VENC 10
-#define RESET_ASSIST 11
-#define RESET_PCIE_CTRL_A 12
-#define RESET_VCBUS 13
-#define RESET_PCIE_PHY 14
-#define RESET_PCIE_APB 15
-#define RESET_GIC 16
-#define RESET_CAPB3_DECODE 17
-/* 18 */
-#define RESET_HDMITX_CAPB3 19
-#define RESET_DVALIN_CAPB3 20
-#define RESET_DOS_CAPB3 21
-/* 22 */
-#define RESET_CBUS_CAPB3 23
-#define RESET_AHB_CNTL 24
-#define RESET_AHB_DATA 25
-#define RESET_VCBUS_CLK81 26
-/* 27-31 */
-/* RESET1 */
-/* 32 */
-#define RESET_DEMUX 33
-#define RESET_USB 34
-#define RESET_DDR 35
-/* 36 */
-#define RESET_BT656 37
-#define RESET_AHB_SRAM 38
-/* 39 */
-#define RESET_PARSER 40
-/* 41 */
-#define RESET_ISA 42
-#define RESET_ETHERNET 43
-#define RESET_SD_EMMC_A 44
-#define RESET_SD_EMMC_B 45
-#define RESET_SD_EMMC_C 46
-/* 47 */
-#define RESET_USB_PHY20 48
-#define RESET_USB_PHY21 49
-/* 50-60 */
-#define RESET_AUDIO_CODEC 61
-/* 62-63 */
-/* RESET2 */
-/* 64 */
-#define RESET_AUDIO 65
-#define RESET_HDMITX_PHY 66
-/* 67 */
-#define RESET_MIPI_DSI_HOST 68
-#define RESET_ALOCKER 69
-#define RESET_GE2D 70
-#define RESET_PARSER_REG 71
-#define RESET_PARSER_FETCH 72
-#define RESET_CTL 73
-#define RESET_PARSER_TOP 74
-/* 75-77 */
-#define RESET_DVALIN 78
-#define RESET_HDMITX 79
-/* 80-95 */
-/* RESET3 */
-/* 96-95 */
-#define RESET_DEMUX_TOP 105
-#define RESET_DEMUX_DES_PL 106
-#define RESET_DEMUX_S2P_0 107
-#define RESET_DEMUX_S2P_1 108
-#define RESET_DEMUX_0 109
-#define RESET_DEMUX_1 110
-#define RESET_DEMUX_2 111
-/* 112-127 */
-/* RESET4 */
-/* 128-129 */
-#define RESET_MIPI_DSI_PHY 130
-/* 131-132 */
-#define RESET_RDMA 133
-#define RESET_VENCI 134
-#define RESET_VENCP 135
-/* 136 */
-#define RESET_VDAC 137
-/* 138-139 */
-#define RESET_VDI6 140
-#define RESET_VENCL 141
-#define RESET_I2C_M1 142
-#define RESET_I2C_M2 143
-/* 144-159 */
-/* RESET5 */
-/* 160-191 */
-/* RESET6 */
-#define RESET_GEN 192
-#define RESET_SPICC0 193
-#define RESET_SC 194
-#define RESET_SANA_3 195
-#define RESET_I2C_M0 196
-#define RESET_TS_PLL 197
-#define RESET_SPICC1 198
-#define RESET_STREAM 199
-#define RESET_TS_CPU 200
-#define RESET_UART0 201
-#define RESET_UART1_2 202
-#define RESET_ASYNC0 203
-#define RESET_ASYNC1 204
-#define RESET_SPIFC0 205
-#define RESET_I2C_M3 206
-/* 207-223 */
-/* RESET7 */
-#define RESET_USB_DDR_0 224
-#define RESET_USB_DDR_1 225
-#define RESET_USB_DDR_2 226
-#define RESET_USB_DDR_3 227
-#define RESET_TS_GPU 228
-#define RESET_DEVICE_MMC_ARB 229
-#define RESET_DVALIN_DMC_PIPL 230
-#define RESET_VID_LOCK 231
-#define RESET_NIC_DMC_PIPL 232
-#define RESET_DMC_VPU_PIPL 233
-#define RESET_GE2D_DMC_PIPL 234
-#define RESET_HCODEC_DMC_PIPL 235
-#define RESET_WAVE420_DMC_PIPL 236
-#define RESET_HEVCF_DMC_PIPL 237
-/* 238-255 */
-
-#endif
diff --git a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h b/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
deleted file mode 100644
index 883bfd3..0000000
--- a/include/dt-bindings/reset/amlogic,meson-gxbb-reset.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
-/*
- * Copyright (c) 2016 BayLibre, SAS.
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-#ifndef _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
-#define _DT_BINDINGS_AMLOGIC_MESON_GXBB_RESET_H
-
-/* RESET0 */
-#define RESET_HIU 0
-/* 1 */
-#define RESET_DOS_RESET 2
-#define RESET_DDR_TOP 3
-#define RESET_DCU_RESET 4
-#define RESET_VIU 5
-#define RESET_AIU 6
-#define RESET_VID_PLL_DIV 7
-/* 8 */
-#define RESET_PMUX 9
-#define RESET_VENC 10
-#define RESET_ASSIST 11
-#define RESET_AFIFO2 12
-#define RESET_VCBUS 13
-/* 14 */
-/* 15 */
-#define RESET_GIC 16
-#define RESET_CAPB3_DECODE 17
-#define RESET_NAND_CAPB3 18
-#define RESET_HDMITX_CAPB3 19
-#define RESET_MALI_CAPB3 20
-#define RESET_DOS_CAPB3 21
-#define RESET_SYS_CPU_CAPB3 22
-#define RESET_CBUS_CAPB3 23
-#define RESET_AHB_CNTL 24
-#define RESET_AHB_DATA 25
-#define RESET_VCBUS_CLK81 26
-#define RESET_MMC 27
-#define RESET_MIPI_0 28
-#define RESET_MIPI_1 29
-#define RESET_MIPI_2 30
-#define RESET_MIPI_3 31
-/* RESET1 */
-#define RESET_CPPM 32
-#define RESET_DEMUX 33
-#define RESET_USB_OTG 34
-#define RESET_DDR 35
-#define RESET_AO_RESET 36
-#define RESET_BT656 37
-#define RESET_AHB_SRAM 38
-/* 39 */
-#define RESET_PARSER 40
-#define RESET_BLKMV 41
-#define RESET_ISA 42
-#define RESET_ETHERNET 43
-#define RESET_SD_EMMC_A 44
-#define RESET_SD_EMMC_B 45
-#define RESET_SD_EMMC_C 46
-#define RESET_ROM_BOOT 47
-#define RESET_SYS_CPU_0 48
-#define RESET_SYS_CPU_1 49
-#define RESET_SYS_CPU_2 50
-#define RESET_SYS_CPU_3 51
-#define RESET_SYS_CPU_CORE_0 52
-#define RESET_SYS_CPU_CORE_1 53
-#define RESET_SYS_CPU_CORE_2 54
-#define RESET_SYS_CPU_CORE_3 55
-#define RESET_SYS_PLL_DIV 56
-#define RESET_SYS_CPU_AXI 57
-#define RESET_SYS_CPU_L2 58
-#define RESET_SYS_CPU_P 59
-#define RESET_SYS_CPU_MBIST 60
-#define RESET_ACODEC 61
-/* 62 */
-/* 63 */
-/* RESET2 */
-#define RESET_VD_RMEM 64
-#define RESET_AUDIN 65
-#define RESET_HDMI_TX 66
-/* 67 */
-/* 68 */
-/* 69 */
-#define RESET_GE2D 70
-#define RESET_PARSER_REG 71
-#define RESET_PARSER_FETCH 72
-#define RESET_PARSER_CTL 73
-#define RESET_PARSER_TOP 74
-/* 75 */
-/* 76 */
-#define RESET_AO_CPU_RESET 77
-#define RESET_MALI 78
-#define RESET_HDMI_SYSTEM_RESET 79
-/* 80-95 */
-/* RESET3 */
-#define RESET_RING_OSCILLATOR 96
-#define RESET_SYS_CPU 97
-#define RESET_EFUSE 98
-#define RESET_SYS_CPU_BVCI 99
-#define RESET_AIFIFO 100
-#define RESET_TVFE 101
-#define RESET_AHB_BRIDGE_CNTL 102
-/* 103 */
-#define RESET_AUDIO_DAC 104
-#define RESET_DEMUX_TOP 105
-#define RESET_DEMUX_DES 106
-#define RESET_DEMUX_S2P_0 107
-#define RESET_DEMUX_S2P_1 108
-#define RESET_DEMUX_RESET_0 109
-#define RESET_DEMUX_RESET_1 110
-#define RESET_DEMUX_RESET_2 111
-/* 112-127 */
-/* RESET4 */
-/* 128 */
-/* 129 */
-/* 130 */
-/* 131 */
-#define RESET_DVIN_RESET 132
-#define RESET_RDMA 133
-#define RESET_VENCI 134
-#define RESET_VENCP 135
-/* 136 */
-#define RESET_VDAC 137
-#define RESET_RTC 138
-/* 139 */
-#define RESET_VDI6 140
-#define RESET_VENCL 141
-#define RESET_I2C_MASTER_2 142
-#define RESET_I2C_MASTER_1 143
-/* 144-159 */
-/* RESET5 */
-/* 160-191 */
-/* RESET6 */
-#define RESET_PERIPHS_GENERAL 192
-#define RESET_PERIPHS_SPICC 193
-#define RESET_PERIPHS_SMART_CARD 194
-#define RESET_PERIPHS_SAR_ADC 195
-#define RESET_PERIPHS_I2C_MASTER_0 196
-#define RESET_SANA 197
-/* 198 */
-#define RESET_PERIPHS_STREAM_INTERFACE 199
-#define RESET_PERIPHS_SDIO 200
-#define RESET_PERIPHS_UART_0 201
-#define RESET_PERIPHS_UART_1_2 202
-#define RESET_PERIPHS_ASYNC_0 203
-#define RESET_PERIPHS_ASYNC_1 204
-#define RESET_PERIPHS_SPI_0 205
-#define RESET_PERIPHS_SDHC 206
-#define RESET_UART_SLIP 207
-/* 208-223 */
-/* RESET7 */
-#define RESET_USB_DDR_0 224
-#define RESET_USB_DDR_1 225
-#define RESET_USB_DDR_2 226
-#define RESET_USB_DDR_3 227
-/* 228 */
-#define RESET_DEVICE_MMC_ARB 229
-/* 230 */
-#define RESET_VID_LOCK 231
-#define RESET_A9_DMC_PIPEL 232
-/* 233-255 */
-
-#endif
diff --git a/include/dt-bindings/sound/meson-aiu.h b/include/dt-bindings/sound/meson-aiu.h
deleted file mode 100644
index 1051b8a..0000000
--- a/include/dt-bindings/sound/meson-aiu.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_AIU_H
-#define __DT_MESON_AIU_H
-
-#define AIU_CPU 0
-#define AIU_HDMI 1
-#define AIU_ACODEC 2
-
-#define CPU_I2S_FIFO 0
-#define CPU_SPDIF_FIFO 1
-#define CPU_I2S_ENCODER 2
-#define CPU_SPDIF_ENCODER 3
-
-#define CTRL_I2S 0
-#define CTRL_PCM 1
-#define CTRL_OUT 2
-
-#endif /* __DT_MESON_AIU_H */
diff --git a/include/dt-bindings/sound/meson-g12a-toacodec.h b/include/dt-bindings/sound/meson-g12a-toacodec.h
deleted file mode 100644
index 69d7a75..0000000
--- a/include/dt-bindings/sound/meson-g12a-toacodec.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_G12A_TOACODEC_H
-#define __DT_MESON_G12A_TOACODEC_H
-
-#define TOACODEC_IN_A 0
-#define TOACODEC_IN_B 1
-#define TOACODEC_IN_C 2
-#define TOACODEC_OUT 3
-
-#endif /* __DT_MESON_G12A_TOACODEC_H */
diff --git a/include/dt-bindings/sound/meson-g12a-tohdmitx.h b/include/dt-bindings/sound/meson-g12a-tohdmitx.h
deleted file mode 100644
index c5e1f48..0000000
--- a/include/dt-bindings/sound/meson-g12a-tohdmitx.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __DT_MESON_G12A_TOHDMITX_H
-#define __DT_MESON_G12A_TOHDMITX_H
-
-#define TOHDMITX_I2S_IN_A 0
-#define TOHDMITX_I2S_IN_B 1
-#define TOHDMITX_I2S_IN_C 2
-#define TOHDMITX_I2S_OUT 3
-#define TOHDMITX_SPDIF_IN_A 4
-#define TOHDMITX_SPDIF_IN_B 5
-#define TOHDMITX_SPDIF_OUT 6
-
-#endif /* __DT_MESON_G12A_TOHDMITX_H */
diff --git a/include/turris-omnia-mcu-interface.h b/include/turris-omnia-mcu-interface.h
new file mode 100644
index 0000000..3c4638f
--- /dev/null
+++ b/include/turris-omnia-mcu-interface.h
@@ -0,0 +1,248 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * CZ.NIC's Turris Omnia MCU I2C interface commands definitions
+ *
+ * 2023 by Marek Behún <kabel@kernel.org>
+ */
+
+#ifndef __TURRIS_OMNIA_MCU_INTERFACE_H
+#define __TURRIS_OMNIA_MCU_INTERFACE_H
+
+#include <linux/bitops.h>
+
+enum omnia_commands_e {
+ CMD_GET_STATUS_WORD = 0x01, /* slave sends status word back */
+ CMD_GENERAL_CONTROL = 0x02,
+ CMD_LED_MODE = 0x03, /* default/user */
+ CMD_LED_STATE = 0x04, /* LED on/off */
+ CMD_LED_COLOR = 0x05, /* LED number + RED + GREEN + BLUE */
+ CMD_USER_VOLTAGE = 0x06,
+ CMD_SET_BRIGHTNESS = 0x07,
+ CMD_GET_BRIGHTNESS = 0x08,
+ CMD_GET_RESET = 0x09,
+ CMD_GET_FW_VERSION_APP = 0x0A, /* 20B git hash number */
+ CMD_SET_WATCHDOG_STATE = 0x0B, /* 0 - disable
+ * 1 - enable / ping
+ * after boot watchdog is started
+ * with 2 minutes timeout
+ */
+
+ /* CMD_WATCHDOG_STATUS = 0x0C, not implemented anymore */
+
+ CMD_GET_WATCHDOG_STATE = 0x0D,
+ CMD_GET_FW_VERSION_BOOT = 0x0E, /* 20B git hash number */
+ CMD_GET_FW_CHECKSUM = 0x0F, /* 4B length, 4B checksum */
+
+ /* available if FEATURES_SUPPORTED bit set in status word */
+ CMD_GET_FEATURES = 0x10,
+
+ /* available if EXT_CMD bit set in features */
+ CMD_GET_EXT_STATUS_DWORD = 0x11,
+ CMD_EXT_CONTROL = 0x12,
+ CMD_GET_EXT_CONTROL_STATUS = 0x13,
+
+ /* available if NEW_INT_API bit set in features */
+ CMD_GET_INT_AND_CLEAR = 0x14,
+ CMD_GET_INT_MASK = 0x15,
+ CMD_SET_INT_MASK = 0x16,
+
+ /* available if FLASHING bit set in features */
+ CMD_FLASH = 0x19,
+
+ /* available if WDT_PING bit set in features */
+ CMD_SET_WDT_TIMEOUT = 0x20,
+ CMD_GET_WDT_TIMELEFT = 0x21,
+
+ /* available if POWEROFF_WAKEUP bit set in features */
+ CMD_SET_WAKEUP = 0x22,
+ CMD_GET_UPTIME_AND_WAKEUP = 0x23,
+ CMD_POWER_OFF = 0x24,
+
+ /* available if USB_OVC_PROT_SETTING bit set in features */
+ CMD_SET_USB_OVC_PROT = 0x25,
+ CMD_GET_USB_OVC_PROT = 0x26,
+
+ /* available if TRNG bit set in features */
+ CMD_TRNG_COLLECT_ENTROPY = 0x28,
+
+ /* available if CRYPTO bit set in features */
+ CMD_CRYPTO_GET_PUBLIC_KEY = 0x29,
+ CMD_CRYPTO_SIGN_MESSAGE = 0x2A,
+ CMD_CRYPTO_COLLECT_SIGNATURE = 0x2B,
+
+ /* available if BOARD_INFO it set in features */
+ CMD_BOARD_INFO_GET = 0x2C,
+ CMD_BOARD_INFO_BURN = 0x2D,
+
+ /* available only at address 0x2b (led-controller) */
+ /* available only if LED_GAMMA_CORRECTION bit set in features */
+ CMD_SET_GAMMA_CORRECTION = 0x30,
+ CMD_GET_GAMMA_CORRECTION = 0x31,
+
+ /* available only at address 0x2b (led-controller) */
+ /* available only if PER_LED_CORRECTION bit set in features */
+ /* available only if FROM_BIT_16_INVALID bit NOT set in features */
+ CMD_SET_LED_CORRECTIONS = 0x32,
+ CMD_GET_LED_CORRECTIONS = 0x33,
+};
+
+enum omnia_flashing_commands_e {
+ FLASH_CMD_UNLOCK = 0x01,
+ FLASH_CMD_SIZE_AND_CSUM = 0x02,
+ FLASH_CMD_PROGRAM = 0x03,
+ FLASH_CMD_RESET = 0x04,
+};
+
+enum omnia_sts_word_e {
+ STS_MCU_TYPE_MASK = GENMASK(1, 0),
+ STS_MCU_TYPE_STM32 = 0 << 0,
+ STS_MCU_TYPE_GD32 = 1 << 0,
+ STS_MCU_TYPE_MKL = 2 << 0,
+ STS_FEATURES_SUPPORTED = BIT(2),
+ STS_USER_REGULATOR_NOT_SUPPORTED = BIT(3),
+ STS_CARD_DET = BIT(4),
+ STS_MSATA_IND = BIT(5),
+ STS_USB30_OVC = BIT(6),
+ STS_USB31_OVC = BIT(7),
+ STS_USB30_PWRON = BIT(8),
+ STS_USB31_PWRON = BIT(9),
+ STS_ENABLE_4V5 = BIT(10),
+ STS_BUTTON_MODE = BIT(11),
+ STS_BUTTON_PRESSED = BIT(12),
+ STS_BUTTON_COUNTER_MASK = GENMASK(15, 13)
+};
+
+enum omnia_ctl_byte_e {
+ CTL_LIGHT_RST = BIT(0),
+ CTL_HARD_RST = BIT(1),
+ /* BIT(2) is currently reserved */
+ CTL_USB30_PWRON = BIT(3),
+ CTL_USB31_PWRON = BIT(4),
+ CTL_ENABLE_4V5 = BIT(5),
+ CTL_BUTTON_MODE = BIT(6),
+ CTL_BOOTLOADER = BIT(7)
+};
+
+enum omnia_features_e {
+ FEAT_PERIPH_MCU = BIT(0),
+ FEAT_EXT_CMDS = BIT(1),
+ FEAT_WDT_PING = BIT(2),
+ FEAT_LED_STATE_EXT_MASK = GENMASK(4, 3),
+ FEAT_LED_STATE_EXT = 1 << 3,
+ FEAT_LED_STATE_EXT_V32 = 2 << 3,
+ FEAT_LED_GAMMA_CORRECTION = BIT(5),
+ FEAT_NEW_INT_API = BIT(6),
+ FEAT_BOOTLOADER = BIT(7),
+ FEAT_FLASHING = BIT(8),
+ FEAT_NEW_MESSAGE_API = BIT(9),
+ FEAT_BRIGHTNESS_INT = BIT(10),
+ FEAT_POWEROFF_WAKEUP = BIT(11),
+ FEAT_CAN_OLD_MESSAGE_API = BIT(12),
+ FEAT_TRNG = BIT(13),
+ FEAT_CRYPTO = BIT(14),
+ FEAT_BOARD_INFO = BIT(15),
+
+ /*
+ * Orginally the features command replied only 16 bits. If more were
+ * read, either the I2C transaction failed or 0xff bytes were sent.
+ * Therefore to consider bits 16 - 31 valid, one bit (20) was reserved
+ * to be zero.
+ */
+
+ /* Bits 16 - 19 correspond to bits 0 - 3 of status word */
+ FEAT_MCU_TYPE_MASK = GENMASK(17, 16),
+ FEAT_MCU_TYPE_STM32 = 0 << 16,
+ FEAT_MCU_TYPE_GD32 = 1 << 16,
+ FEAT_MCU_TYPE_MKL = 2 << 16,
+ FEAT_FEATURES_SUPPORTED = BIT(18),
+ FEAT_USER_REGULATOR_NOT_SUPPORTED = BIT(19),
+
+ /* must not be set */
+ FEAT_FROM_BIT_16_INVALID = BIT(20),
+
+ FEAT_PER_LED_CORRECTION = BIT(21),
+ FEAT_USB_OVC_PROT_SETTING = BIT(22),
+};
+
+enum omnia_ext_sts_dword_e {
+ EXT_STS_SFP_nDET = BIT(0),
+ EXT_STS_LED_STATES_MASK = GENMASK(31, 12),
+ EXT_STS_WLAN0_MSATA_LED = BIT(12),
+ EXT_STS_WLAN1_LED = BIT(13),
+ EXT_STS_WLAN2_LED = BIT(14),
+ EXT_STS_WPAN0_LED = BIT(15),
+ EXT_STS_WPAN1_LED = BIT(16),
+ EXT_STS_WPAN2_LED = BIT(17),
+ EXT_STS_WAN_LED0 = BIT(18),
+ EXT_STS_WAN_LED1 = BIT(19),
+ EXT_STS_LAN0_LED0 = BIT(20),
+ EXT_STS_LAN0_LED1 = BIT(21),
+ EXT_STS_LAN1_LED0 = BIT(22),
+ EXT_STS_LAN1_LED1 = BIT(23),
+ EXT_STS_LAN2_LED0 = BIT(24),
+ EXT_STS_LAN2_LED1 = BIT(25),
+ EXT_STS_LAN3_LED0 = BIT(26),
+ EXT_STS_LAN3_LED1 = BIT(27),
+ EXT_STS_LAN4_LED0 = BIT(28),
+ EXT_STS_LAN4_LED1 = BIT(29),
+ EXT_STS_LAN5_LED0 = BIT(30),
+ EXT_STS_LAN5_LED1 = BIT(31),
+};
+
+enum omnia_ext_ctl_e {
+ EXT_CTL_nRES_MMC = BIT(0),
+ EXT_CTL_nRES_LAN = BIT(1),
+ EXT_CTL_nRES_PHY = BIT(2),
+ EXT_CTL_nPERST0 = BIT(3),
+ EXT_CTL_nPERST1 = BIT(4),
+ EXT_CTL_nPERST2 = BIT(5),
+ EXT_CTL_PHY_SFP = BIT(6),
+ EXT_CTL_PHY_SFP_AUTO = BIT(7),
+ EXT_CTL_nVHV_CTRL = BIT(8),
+};
+
+enum omnia_int_e {
+ INT_CARD_DET = BIT(0),
+ INT_MSATA_IND = BIT(1),
+ INT_USB30_OVC = BIT(2),
+ INT_USB31_OVC = BIT(3),
+ INT_BUTTON_PRESSED = BIT(4),
+ INT_SFP_nDET = BIT(5),
+ INT_BRIGHTNESS_CHANGED = BIT(6),
+ INT_TRNG = BIT(7),
+ INT_MESSAGE_SIGNED = BIT(8),
+
+ INT_LED_STATES_MASK = GENMASK(31, 12),
+ INT_WLAN0_MSATA_LED = BIT(12),
+ INT_WLAN1_LED = BIT(13),
+ INT_WLAN2_LED = BIT(14),
+ INT_WPAN0_LED = BIT(15),
+ INT_WPAN1_LED = BIT(16),
+ INT_WPAN2_LED = BIT(17),
+ INT_WAN_LED0 = BIT(18),
+ INT_WAN_LED1 = BIT(19),
+ INT_LAN0_LED0 = BIT(20),
+ INT_LAN0_LED1 = BIT(21),
+ INT_LAN1_LED0 = BIT(22),
+ INT_LAN1_LED1 = BIT(23),
+ INT_LAN2_LED0 = BIT(24),
+ INT_LAN2_LED1 = BIT(25),
+ INT_LAN3_LED0 = BIT(26),
+ INT_LAN3_LED1 = BIT(27),
+ INT_LAN4_LED0 = BIT(28),
+ INT_LAN4_LED1 = BIT(29),
+ INT_LAN5_LED0 = BIT(30),
+ INT_LAN5_LED1 = BIT(31),
+};
+
+enum omnia_cmd_poweroff_e {
+ CMD_POWER_OFF_POWERON_BUTTON = BIT(0),
+ CMD_POWER_OFF_MAGIC = 0xdead,
+};
+
+enum cmd_usb_ovc_prot_e {
+ CMD_xET_USB_OVC_PROT_PORT_MASK = GENMASK(3, 0),
+ CMD_xET_USB_OVC_PROT_ENABLE = BIT(4),
+};
+
+#endif /* __TURRIS_OMNIA_MCU_INTERFACE_H */