diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c
index a68947f..7c6638c 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -156,6 +156,14 @@
 	}
 }
 
+void omap_die_id(unsigned int *die_id)
+{
+	die_id[0] = readl((*ctrl)->control_std_fuse_die_id_0);
+	die_id[1] = readl((*ctrl)->control_std_fuse_die_id_1);
+	die_id[2] = readl((*ctrl)->control_std_fuse_die_id_2);
+	die_id[3] = readl((*ctrl)->control_std_fuse_die_id_3);
+}
+
 #ifndef CONFIG_SYS_L2CACHE_OFF
 void v7_outer_cache_enable(void)
 {
diff --git a/arch/arm/cpu/armv7/omap4/prcm-regs.c b/arch/arm/cpu/armv7/omap4/prcm-regs.c
index 8698ec7..a09581e 100644
--- a/arch/arm/cpu/armv7/omap4/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap4/prcm-regs.c
@@ -280,7 +280,10 @@
 
 struct omap_sys_ctrl_regs const omap4_ctrl = {
 	.control_status				= 0x4A0022C4,
-	.control_id_code			= 0x4A002204,
+	.control_std_fuse_die_id_0		= 0x4A002200,
+	.control_std_fuse_die_id_1		= 0x4A002208,
+	.control_std_fuse_die_id_2		= 0x4A00220C,
+	.control_std_fuse_die_id_3		= 0x4A002210,
 	.control_std_fuse_opp_bgap		= 0x4a002260,
 	.control_status				= 0x4a0022c4,
 	.control_ldosram_iva_voltage_ctrl	= 0x4A002320,