diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index c645cef..c0ae947 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -29,25 +29,23 @@
 
 #include <common.h>
 #include <watchdog.h>
-
+#include <asm/io.h>
 #include "serial_pl01x.h"
 
-#define IO_WRITE(addr, val) (*(volatile unsigned int *)(addr) = (val))
-#define IO_READ(addr) (*(volatile unsigned int *)(addr))
-
 /*
  * Integrator AP has two UARTs, we use the first one, at 38400-8-N-1
  * Integrator CP has two UARTs, use the first one, at 38400-8-N-1
  * Versatile PB has four UARTs.
  */
 #define CONSOLE_PORT CONFIG_CONS_INDEX
-#define baudRate CONFIG_BAUDRATE
 static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
 
 static void pl01x_putc (int portnum, char c);
 static int pl01x_getc (int portnum);
 static int pl01x_tstc (int portnum);
+unsigned int baudrate = CONFIG_BAUDRATE;
+DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_PL010_SERIAL
 
@@ -55,16 +53,11 @@
 {
 	unsigned int divisor;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL010_CR);
 
-	/*
-	 ** Set baud rate
-	 **
-	 */
-	switch (baudRate) {
+	/* Set baud rate */
+	switch (baudrate) {
 	case 9600:
 		divisor = UART_PL010_BAUD_9600;
 		break;
@@ -89,20 +82,15 @@
 		divisor = UART_PL010_BAUD_38400;
 	}
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRM,
-		  ((divisor & 0xf00) >> 8));
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRL, (divisor & 0xff));
+	writel(((divisor & 0xf00) >> 8), port[CONSOLE_PORT] + UART_PL010_LCRM);
+	writel((divisor & 0xff), port[CONSOLE_PORT] + UART_PL010_LCRL);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_LCRH,
-		  (UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL010_LCRH_WLEN_8 | UART_PL010_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL010_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL010_CR, (UART_PL010_CR_UARTEN));
+	/* Finally, enable the UART */
+	writel((UART_PL010_CR_UARTEN), port[CONSOLE_PORT] + UART_PL010_CR);
 
 	return 0;
 }
@@ -118,38 +106,31 @@
 	unsigned int remainder;
 	unsigned int fraction;
 
-	/*
-	 ** First, disable everything.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR, 0x0);
+	/* First, disable everything */
+	writel(0x0, port[CONSOLE_PORT] + UART_PL011_CR);
 
 	/*
-	 ** Set baud rate
-	 **
-	 ** IBRD = UART_CLK / (16 * BAUD_RATE)
-	 ** FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
+	 * Set baud rate
+	 *
+	 * IBRD = UART_CLK / (16 * BAUD_RATE)
+	 * FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
 	 */
-	temp = 16 * baudRate;
+	temp = 16 * baudrate;
 	divider = CONFIG_PL011_CLOCK / temp;
 	remainder = CONFIG_PL011_CLOCK % temp;
-	temp = (8 * remainder) / baudRate;
+	temp = (8 * remainder) / baudrate;
 	fraction = (temp >> 1) + (temp & 1);
 
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_IBRD, divider);
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_FBRD, fraction);
+	writel(divider, port[CONSOLE_PORT] + UART_PL011_IBRD);
+	writel(fraction, port[CONSOLE_PORT] + UART_PL011_FBRD);
 
-	/*
-	 ** Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled.
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH,
-		  (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN));
+	/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
+	writel((UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN),
+		port[CONSOLE_PORT] + UART_PL011_LCRH);
 
-	/*
-	 ** Finally, enable the UART
-	 */
-	IO_WRITE (port[CONSOLE_PORT] + UART_PL011_CR,
-		  (UART_PL011_CR_UARTEN | UART_PL011_CR_TXE |
-		   UART_PL011_CR_RXE));
+	/* Finally, enable the UART */
+	writel((UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE),
+		port[CONSOLE_PORT] + UART_PL011_CR);
 
 	return 0;
 }
@@ -183,16 +164,18 @@
 
 void serial_setbrg (void)
 {
+	baudrate = gd->baudrate;
+	serial_init();
 }
 
 static void pl01x_putc (int portnum, char c)
 {
 	/* Wait until there is space in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_TXFF)
 		WATCHDOG_RESET();
 
 	/* Send the character */
-	IO_WRITE (port[portnum] + UART_PL01x_DR, c);
+	writel(c, port[portnum] + UART_PL01x_DR);
 }
 
 static int pl01x_getc (int portnum)
@@ -200,15 +183,15 @@
 	unsigned int data;
 
 	/* Wait until there is data in the FIFO */
-	while (IO_READ (port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
+	while (readl(port[portnum] + UART_PL01x_FR) & UART_PL01x_FR_RXFE)
 		WATCHDOG_RESET();
 
-	data = IO_READ (port[portnum] + UART_PL01x_DR);
+	data = readl(port[portnum] + UART_PL01x_DR);
 
 	/* Check for an error flag */
 	if (data & 0xFFFFFF00) {
 		/* Clear the error */
-		IO_WRITE (port[portnum] + UART_PL01x_ECR, 0xFFFFFFFF);
+		writel(0xFFFFFFFF, port[portnum] + UART_PL01x_ECR);
 		return -1;
 	}
 
@@ -218,6 +201,6 @@
 static int pl01x_tstc (int portnum)
 {
 	WATCHDOG_RESET();
-	return !(IO_READ (port[portnum] + UART_PL01x_FR) &
+	return !(readl(port[portnum] + UART_PL01x_FR) &
 		 UART_PL01x_FR_RXFE);
 }