clk: sunxi: Add Allwinner V3S CLK driver
Add initial clock driver for Allwinner V3S.
- Implement USB bus and USB clocks via ccu_clk_gate table
for V3S, so it can accessed in common clk enable and disable
functions from clk_sunxi.c
- Implement USB bus and USB resets via ccu_reset table
for V3S, so it can accessed in common reset deassert
and assert functions from reset-sunxi.c
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig
index c45a4ba..a6f84e9 100644
--- a/drivers/clk/sunxi/Kconfig
+++ b/drivers/clk/sunxi/Kconfig
@@ -51,6 +51,13 @@
This enables common clock driver support for platforms based
on Allwinner R40 SoC.
+config CLK_SUN8I_V3S
+ bool "Clock driver for Allwinner V3S"
+ default MACH_SUN8I_V3S
+ help
+ This enables common clock driver support for platforms based
+ on Allwinner V3S SoC.
+
config CLK_SUN8I_H3
bool "Clock driver for Allwinner H3/H5"
default MACH_SUNXI_H3_H5