imx: imx8ulp: Get chip revision from Sentinel
In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 3498cf9..9b12d3d 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -70,9 +70,18 @@
}
#endif
+static void set_cpu_info(struct sentinel_get_info_data *info)
+{
+ gd->arch.soc_rev = info->soc;
+ gd->arch.lifecycle = info->lc;
+ memcpy((void *)&gd->arch.uid, &info->uid, 4 * sizeof(u32));
+}
+
u32 get_cpu_rev(void)
{
- return (MXC_CPU_IMX8ULP << 12) | CHIP_REV_1_0;
+ u32 rev = (gd->arch.soc_rev >> 24) - 0xa0;
+
+ return (MXC_CPU_IMX8ULP << 12) | (CHIP_REV_1_0 + rev);
}
enum bt_mode get_boot_mode(void)
@@ -670,10 +679,12 @@
return 0;
}
-static int imx8ulp_check_mu(void *ctx, struct event *event)
+int imx8ulp_dm_post_init(void)
{
struct udevice *devp;
int ret;
+ u32 res;
+ struct sentinel_get_info_data *info = (struct sentinel_get_info_data *)SRAM0_BASE;
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(imx8ulp_mu), &devp);
if (ret) {
@@ -681,9 +692,24 @@
return ret;
}
+ ret = ahab_get_info(info, &res);
+ if (ret) {
+ printf("ahab_get_info failed %d\n", ret);
+ /* fallback to A0.1 revision */
+ memset((void *)info, 0, sizeof(struct sentinel_get_info_data));
+ info->soc = 0xa000084d;
+ }
+
+ set_cpu_info(info);
+
return 0;
}
-EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu);
+
+static int imx8ulp_evt_dm_post_init(void *ctx, struct event *event)
+{
+ return imx8ulp_dm_post_init();
+}
+EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_evt_dm_post_init);
#if defined(CONFIG_SPL_BUILD)
__weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)