diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index 15cd375..2067d53 100644
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -672,7 +672,6 @@
 		rcw_en = 1;
 		ap_en = popts->ap_en;
 	} else {
-		rcw_en = 0;
 		ap_en = 0;
 	}
 
@@ -702,9 +701,7 @@
 		| ((obc_cfg & 0x1) << 6)
 		| ((ap_en & 0x1) << 5)
 		| ((d_init & 0x1) << 4)
-#ifdef CONFIG_FSL_DDR3
 		| ((rcw_en & 0x1) << 2)
-#endif
 		| ((md_en & 0x1) << 0)
 		);
 	debug("FSLDDR: ddr_sdram_cfg_2 = 0x%08x\n", ddr->ddr_sdram_cfg_2);
@@ -745,7 +742,7 @@
 
 #ifdef CONFIG_FSL_DDR3
 	if (unq_mrs_en) {	/* unique mode registers are supported */
-		for (i = 1; i < 4; i++) {
+		for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
 			if (popts->rtt_override)
 				rtt_wr = popts->rtt_wr_override_value;
 			else
@@ -944,7 +941,7 @@
 	debug("FSLDDR: ddr_sdram_mode = 0x%08x\n", ddr->ddr_sdram_mode);
 
 	if (unq_mrs_en) {	/* unique mode registers are supported */
-		for (i = 1; i < 4; i++) {
+		for (i = 1; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
 			if (popts->rtt_override)
 				rtt = popts->rtt_override_value;
 			else