Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-usb
- DWC3 bugfix
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9d647b9..7a577de 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -442,6 +442,7 @@
socfpga_agilex_socdk.dtb \
socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \
+ socfpga_arria10_chameleonv3_270_2.dtb \
socfpga_arria10_chameleonv3_270_3.dtb \
socfpga_arria10_chameleonv3_480_2.dtb \
socfpga_arria10_socdk_sdmmc.dtb \
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi
similarity index 100%
rename from arch/arm/dts/socfpga_arria10_chameleonv3.dts
rename to arch/arm/dts/socfpga_arria10_chameleonv3.dtsi
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
new file mode 100644
index 0000000..05b4485
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10_chameleonv3_480_2_handoff.h"
+#include "socfpga_arria10-handoff.dtsi"
+#include "socfpga_arria10_handoff_u-boot.dtsi"
+#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+ altr,bitstream = "fpga-270-2.itb";
+};
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
new file mode 100644
index 0000000..bef0280
--- /dev/null
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts
@@ -0,0 +1,5 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 Google LLC
+ */
+#include "socfpga_arria10_chameleonv3.dtsi"
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
index e789d49..a7aa17b 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi
@@ -6,3 +6,7 @@
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+ altr,bitstream = "fpga-270-3.itb";
+};
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
index 5f40af6..bef0280 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts
@@ -2,4 +2,4 @@
/*
* Copyright 2022 Google LLC
*/
-#include "socfpga_arria10_chameleonv3.dts"
+#include "socfpga_arria10_chameleonv3.dtsi"
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
index 7bbcc47..82a9489 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi
@@ -6,3 +6,7 @@
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"
+
+&fpga_mgr {
+ altr,bitstream = "fpga-480-2.itb";
+};
diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
index 5f40af6..bef0280 100644
--- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
+++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts
@@ -2,4 +2,4 @@
/*
* Copyright 2022 Google LLC
*/
-#include "socfpga_arria10_chameleonv3.dts"
+#include "socfpga_arria10_chameleonv3.dtsi"
diff --git a/board/google/chameleonv3/environment.txt b/board/google/chameleonv3/environment.txt
new file mode 100644
index 0000000..52aedbb
--- /dev/null
+++ b/board/google/chameleonv3/environment.txt
@@ -0,0 +1,13 @@
+# MMC boot command
+bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm
+
+# Network boot command and vars
+bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm
+autoload=no
+serverip=192.168.0.1
+
+# U-Boot will run this after loading this file
+bootcmd_txt=run bootcmd_mmc
+
+# Kernel cmdline
+bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rootflags=subvol=root rw rootwait
diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig
index 4bbce35..41231e2 100644
--- a/configs/socfpga_chameleonv3_defconfig
+++ b/configs/socfpga_chameleonv3_defconfig
@@ -5,8 +5,10 @@
CONFIG_ENV_OFFSET=0x4400
CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2"
CONFIG_SPL_TEXT_BASE=0xFFE00000
+CONFIG_SPL_MAX_SIZE=0x40000
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y
+CONFIG_SPL_FS_EXT4=y
CONFIG_SPL_FS_FAT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h
index 2ce7011..fc08e74 100644
--- a/include/configs/socfpga_chameleonv3.h
+++ b/include/configs/socfpga_chameleonv3.h
@@ -20,11 +20,10 @@
#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
#define CFG_EXTRA_ENV_SETTINGS \
- "autoload=no\0" \
- "bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \
- "distro_bootcmd=bridge enable; run bootcmd_mmc\0" \
- "bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm\0" \
- "bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm\0"
+ "distro_bootcmd=bridge enable; " \
+ "load mmc 0:1 ${loadaddr} u-boot.txt; " \
+ "env import -t ${loadaddr}; " \
+ "run bootcmd_txt\0"
/*
* L4 OSC1 Timer 0