commit | c07588ed7aa754c84ac91ffe4cfd1059f507a9c1 | [log] [tgz] |
---|---|---|
author | Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu> | Wed Jan 20 08:00:11 2010 +0100 |
committer | Tom Rix <Tom.Rix@windriver.com> | Thu Jan 21 17:20:10 2010 -0600 |
tree | 898b79aceceb0e978195e7714cb7f4eaa781494e | |
parent | 0ec8c9740ff5739b69f242ac86a5c09f090ec7be [diff] |
at91: Enable slow master clock on meesc board Normally the processor clock has a divisor of 2. In some cases this this needs to be set to 4. Check the user has set environment mdiv to 4 to change the divisor. Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>