| commit | ac6c4e75e34ce0b35e800c646c7f568efced6943 | [log] [tgz] |
|---|---|---|
| author | Wolfgang Denk <wd@pollux.denx.de> | Mon Mar 13 00:46:05 2006 +0100 |
| committer | Wolfgang Denk <wd@pollux.denx.de> | Mon Mar 13 00:46:05 2006 +0100 |
| tree | 5141e4352c2db17593f8c30b0f19cb6ab3ba354d | |
| parent | c5203f9606e212a4f420da6dce9787bc6ea84c0a [diff] |
Fix bug in [id]cache_status commands for MPC85xx processors; should look at LSB of L1CSRn registers to determine if L1 cache is enabled, not the MSB. Patch by Murray Jensen, 19 Jul 2005