diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
index fed8f52..0a961cc 100644
--- a/board/phytec/pfla02/pfla02.c
+++ b/board/phytec/pfla02/pfla02.c
@@ -117,7 +117,7 @@
 	IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)),
 };
 
-#ifdef CONFIG_CMD_NAND
+#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
 /* NAND */
 static iomux_v3_cfg_t const nfc_pads[] = {
 	IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE	| MUX_PAD_CTRL(NAND_PAD_CTRL)),
@@ -274,7 +274,7 @@
 	SETUP_IOMUX_PADS(gpios_pads);
 }
 
-#ifdef CONFIG_CMD_NAND
+#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
 static void setup_gpmi_nand(void)
 {
 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
@@ -361,7 +361,7 @@
 
 	setup_gpios();
 
-#ifdef CONFIG_CMD_NAND
+#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
 	setup_gpmi_nand();
 #endif
 	return 0;
@@ -657,7 +657,7 @@
 		.refr = 7,	/* 8 refresh commands per refresh cycle */
 	};
 
-#ifdef CONFIG_CMD_NAND
+#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_SPL_BUILD)
 	/* Enable NAND */
 	setup_gpmi_nand();
 #endif