Merge branch 'master' of git://git.denx.de/u-boot-sh
diff --git a/arch/arm/dts/r8a7792-blanche-u-boot.dts b/arch/arm/dts/r8a7792-blanche-u-boot.dts
index 8eb263e..3555663 100644
--- a/arch/arm/dts/r8a7792-blanche-u-boot.dts
+++ b/arch/arm/dts/r8a7792-blanche-u-boot.dts
@@ -7,3 +7,7 @@
#include "r8a7792-blanche.dts"
#include "r8a7792-u-boot.dtsi"
+
+&scif0 {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32
index 1ceb329..c0b5b24 100644
--- a/arch/arm/mach-rmobile/Kconfig.32
+++ b/arch/arm/mach-rmobile/Kconfig.32
@@ -41,6 +41,7 @@
bool "Blanche board"
select DM
select DM_SERIAL
+ select USE_TINY_PRINTF
config TARGET_GOSE
bool "Gose board"
diff --git a/arch/arm/mach-rmobile/Makefile b/arch/arm/mach-rmobile/Makefile
index 51453a8..1f26ada 100644
--- a/arch/arm/mach-rmobile/Makefile
+++ b/arch/arm/mach-rmobile/Makefile
@@ -8,12 +8,8 @@
obj-$(CONFIG_DISPLAY_BOARDINFO) += board.o
obj-$(CONFIG_GLOBAL_TIMER) += timer.o
+obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o
+obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o
obj-$(CONFIG_R8A7740) += lowlevel_init.o cpu_info-r8a7740.o pfc-r8a7740.o
-obj-$(CONFIG_R8A7790) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7790.o
-obj-$(CONFIG_R8A7791) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7791.o
-obj-$(CONFIG_R8A7792) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7792.o
-obj-$(CONFIG_R8A7793) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7793.o
-obj-$(CONFIG_R8A7794) += lowlevel_init_ca15.o cpu_info-rcar.o pfc-r8a7794.o
+obj-$(CONFIG_RCAR_GEN2) += lowlevel_init_ca15.o cpu_info-rcar.o
obj-$(CONFIG_RCAR_GEN3) += lowlevel_init_gen3.o cpu_info-rcar.o memmap-gen3.o
-obj-$(CONFIG_SH73A0) += lowlevel_init.o cpu_info-sh73a0.o pfc-sh73a0.o
-obj-$(CONFIG_TMU_TIMER) += ../../sh/lib/time.o
diff --git a/arch/arm/mach-rmobile/include/mach/gpio.h b/arch/arm/mach-rmobile/include/mach/gpio.h
index 448d189..6b5e4ed 100644
--- a/arch/arm/mach-rmobile/include/mach/gpio.h
+++ b/arch/arm/mach-rmobile/include/mach/gpio.h
@@ -7,21 +7,6 @@
#elif defined(CONFIG_R8A7740)
#include "r8a7740-gpio.h"
void r8a7740_pinmux_init(void);
-#elif defined(CONFIG_R8A7790)
-#include "r8a7790-gpio.h"
-void r8a7790_pinmux_init(void);
-#elif defined(CONFIG_R8A7791)
-#include "r8a7791-gpio.h"
-void r8a7791_pinmux_init(void);
-#elif defined(CONFIG_R8A7792)
-#include "r8a7792-gpio.h"
-void r8a7792_pinmux_init(void);
-#elif defined(CONFIG_R8A7793)
-#include "r8a7793-gpio.h"
-void r8a7793_pinmux_init(void);
-#elif defined(CONFIG_R8A7794)
-#include "r8a7794-gpio.h"
-void r8a7794_pinmux_init(void);
#endif
#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h
deleted file mode 100644
index 74b5f1d..0000000
--- a/arch/arm/mach-rmobile/include/mach/r8a7790-gpio.h
+++ /dev/null
@@ -1,387 +0,0 @@
-#ifndef __ASM_R8A7790_GPIO_H__
-#define __ASM_R8A7790_GPIO_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
- */
-enum {
- GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
- GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
- GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
- GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
- GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
- GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
- GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
- GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
-
- GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
- GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
- GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
- GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
- GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
- GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
- GPIO_GP_1_24, GPIO_GP_1_25, GPIO_GP_1_26, GPIO_GP_1_27,
- GPIO_GP_1_28, GPIO_GP_1_29,
-
- GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
- GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
- GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
- GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
- GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
- GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
- GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
- GPIO_GP_2_28, GPIO_GP_2_29,
-
- GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
- GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
- GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
- GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
- GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
- GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
- GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
- GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
-
- GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
- GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
- GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
- GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
- GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
- GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
- GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
- GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
-
- GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
- GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
- GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
- GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
- GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
- GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
- GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
- GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,
-
- GPIO_FN_VI1_DATA7_VI1_B7, GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC_VBUS,
- GPIO_FN_USB2_PWEN, GPIO_FN_USB2_OVC, GPIO_FN_AVS1, GPIO_FN_AVS2,
- GPIO_FN_DU_DOTCLKIN0, GPIO_FN_DU_DOTCLKIN2,
-
- /* IPSR0 */
- GPIO_FN_D1, GPIO_FN_MSIOF3_SYNC_B, GPIO_FN_VI3_DATA1, GPIO_FN_VI0_G5,
- GPIO_FN_VI0_G5_B, GPIO_FN_D2, GPIO_FN_MSIOF3_RXD_B, GPIO_FN_VI3_DATA2,
- GPIO_FN_VI0_G6, GPIO_FN_VI0_G6_B, GPIO_FN_D3, GPIO_FN_MSIOF3_TXD_B,
- GPIO_FN_VI3_DATA3, GPIO_FN_VI0_G7, GPIO_FN_VI0_G7_B, GPIO_FN_D4,
- GPIO_FN_SCIFB1_RXD_F, GPIO_FN_SCIFB0_RXD_C, GPIO_FN_VI3_DATA4,
- GPIO_FN_VI0_R0, GPIO_FN_VI0_R0_B, GPIO_FN_RX0_B, GPIO_FN_D5,
- GPIO_FN_SCIFB1_TXD_F, GPIO_FN_SCIFB0_TXD_C, GPIO_FN_VI3_DATA5,
- GPIO_FN_VI0_R1, GPIO_FN_VI0_R1_B, GPIO_FN_TX0_B, GPIO_FN_D6,
- GPIO_FN_SCL2_C, GPIO_FN_VI3_DATA6, GPIO_FN_VI0_R2, GPIO_FN_VI0_R2_B,
- GPIO_FN_SCL2_CIS_C, GPIO_FN_D7, GPIO_FN_AD_DI_B, GPIO_FN_SDA2_C,
- GPIO_FN_VI3_DATA7, GPIO_FN_VI0_R3, GPIO_FN_VI0_R3_B, GPIO_FN_SDA2_CIS_C,
- GPIO_FN_D8, GPIO_FN_SCIFA1_SCK_C, GPIO_FN_AVB_TXD0, GPIO_FN_MII_TXD0,
- GPIO_FN_VI0_G0, GPIO_FN_VI0_G0_B, GPIO_FN_VI2_DATA0_VI2_B0,
-
- /* IPSR1 */
- GPIO_FN_D9, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_AVB_TXD1, GPIO_FN_MII_TXD1,
- GPIO_FN_VI0_G1, GPIO_FN_VI0_G1_B, GPIO_FN_VI2_DATA1_VI2_B1, GPIO_FN_D10,
- GPIO_FN_SCIFA1_TXD_C, GPIO_FN_AVB_TXD2, GPIO_FN_MII_TXD2,
- GPIO_FN_VI0_G2, GPIO_FN_VI0_G2_B, GPIO_FN_VI2_DATA2_VI2_B2, GPIO_FN_D11,
- GPIO_FN_SCIFA1_CTS_N_C, GPIO_FN_AVB_TXD3, GPIO_FN_MII_TXD3,
- GPIO_FN_VI0_G3, GPIO_FN_VI0_G3_B, GPIO_FN_VI2_DATA3_VI2_B3,
- GPIO_FN_D12, GPIO_FN_SCIFA1_RTS_N_C, GPIO_FN_AVB_TXD4,
- GPIO_FN_VI0_HSYNC_N, GPIO_FN_VI0_HSYNC_N_B, GPIO_FN_VI2_DATA4_VI2_B4,
- GPIO_FN_D13, GPIO_FN_AVB_TXD5, GPIO_FN_VI0_VSYNC_N,
- GPIO_FN_VI0_VSYNC_N_B, GPIO_FN_VI2_DATA5_VI2_B5, GPIO_FN_D14,
- GPIO_FN_SCIFB1_RXD_C, GPIO_FN_AVB_TXD6, GPIO_FN_RX1_B,
- GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_CLKENB_B, GPIO_FN_VI2_DATA6_VI2_B6,
- GPIO_FN_D15, GPIO_FN_SCIFB1_TXD_C, GPIO_FN_AVB_TXD7, GPIO_FN_TX1_B,
- GPIO_FN_VI0_FIELD, GPIO_FN_VI0_FIELD_B, GPIO_FN_VI2_DATA7_VI2_B7,
- GPIO_FN_A0, GPIO_FN_PWM3, GPIO_FN_A1, GPIO_FN_PWM4,
-
- /* IPSR2 */
- GPIO_FN_A2, GPIO_FN_PWM5, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_A3,
- GPIO_FN_PWM6, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF1_TXD_B,
- GPIO_FN_TPU0TO0, GPIO_FN_A5, GPIO_FN_SCIFA1_TXD_B, GPIO_FN_TPU0TO1,
- GPIO_FN_A6, GPIO_FN_SCIFA1_RTS_N_B, GPIO_FN_TPU0TO2, GPIO_FN_A7,
- GPIO_FN_SCIFA1_SCK_B, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_TPU0TO3,
- GPIO_FN_A8, GPIO_FN_SCIFA1_RXD_B, GPIO_FN_SSI_SCK5_B, GPIO_FN_VI0_R4,
- GPIO_FN_VI0_R4_B, GPIO_FN_SCIFB2_RXD_C, GPIO_FN_VI2_DATA0_VI2_B0_B,
- GPIO_FN_A9, GPIO_FN_SCIFA1_CTS_N_B, GPIO_FN_SSI_WS5_B, GPIO_FN_VI0_R5,
- GPIO_FN_VI0_R5_B, GPIO_FN_SCIFB2_TXD_C, GPIO_FN_VI2_DATA1_VI2_B1_B,
- GPIO_FN_A10, GPIO_FN_SSI_SDATA5_B, GPIO_FN_MSIOF2_SYNC, GPIO_FN_VI0_R6,
- GPIO_FN_VI0_R6_B, GPIO_FN_VI2_DATA2_VI2_B2_B,
-
- /* IPSR3 */
- GPIO_FN_A11, GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_MSIOF2_SCK, GPIO_FN_VI1_R0,
- GPIO_FN_VI1_R0_B, GPIO_FN_VI2_G0, GPIO_FN_VI2_DATA3_VI2_B3_B,
- GPIO_FN_A12, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_MSIOF2_TXD, GPIO_FN_VI1_R1,
- GPIO_FN_VI1_R1_B, GPIO_FN_VI2_G1, GPIO_FN_VI2_DATA4_VI2_B4_B,
- GPIO_FN_A13, GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_EX_WAIT2,
- GPIO_FN_MSIOF2_RXD, GPIO_FN_VI1_R2, GPIO_FN_VI1_R2_B, GPIO_FN_VI2_G2,
- GPIO_FN_VI2_DATA5_VI2_B5_B, GPIO_FN_A14, GPIO_FN_SCIFB2_TXD_B,
- GPIO_FN_ATACS11_N, GPIO_FN_MSIOF2_SS1, GPIO_FN_A15,
- GPIO_FN_SCIFB2_SCK_B, GPIO_FN_ATARD1_N, GPIO_FN_MSIOF2_SS2, GPIO_FN_A16,
- GPIO_FN_ATAWR1_N, GPIO_FN_A17, GPIO_FN_AD_DO_B, GPIO_FN_ATADIR1_N,
- GPIO_FN_A18, GPIO_FN_AD_CLK_B, GPIO_FN_ATAG1_N, GPIO_FN_A19,
- GPIO_FN_AD_NCS_N_B, GPIO_FN_ATACS01_N, GPIO_FN_EX_WAIT0_B, GPIO_FN_A20,
- GPIO_FN_SPCLK, GPIO_FN_VI1_R3, GPIO_FN_VI1_R3_B, GPIO_FN_VI2_G4,
-
- /* IPSR4 */
- GPIO_FN_A21, GPIO_FN_MOSI_IO0, GPIO_FN_VI1_R4, GPIO_FN_VI1_R4_B,
- GPIO_FN_VI2_G5, GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_VI1_R5,
- GPIO_FN_VI1_R5_B, GPIO_FN_VI2_G6, GPIO_FN_A23, GPIO_FN_IO2,
- GPIO_FN_VI1_G7, GPIO_FN_VI1_G7_B, GPIO_FN_VI2_G7, GPIO_FN_A24,
- GPIO_FN_IO3, GPIO_FN_VI1_R7, GPIO_FN_VI1_R7_B, GPIO_FN_VI2_CLKENB,
- GPIO_FN_VI2_CLKENB_B, GPIO_FN_A25, GPIO_FN_SSL, GPIO_FN_VI1_G6,
- GPIO_FN_VI1_G6_B, GPIO_FN_VI2_FIELD, GPIO_FN_VI2_FIELD_B, GPIO_FN_CS0_N,
- GPIO_FN_VI1_R6, GPIO_FN_VI1_R6_B, GPIO_FN_VI2_G3, GPIO_FN_MSIOF0_SS2_B,
- GPIO_FN_CS1_N_A26, GPIO_FN_SPEEDIN, GPIO_FN_VI0_R7, GPIO_FN_VI0_R7_B,
- GPIO_FN_VI2_CLK, GPIO_FN_VI2_CLK_B, GPIO_FN_EX_CS0_N, GPIO_FN_HRX1_B,
- GPIO_FN_VI1_G5, GPIO_FN_VI1_G5_B, GPIO_FN_VI2_R0, GPIO_FN_HTX0_B,
- GPIO_FN_MSIOF0_SS1_B, GPIO_FN_EX_CS1_N, GPIO_FN_GPS_CLK,
- GPIO_FN_HCTS1_N_B, GPIO_FN_VI1_FIELD, GPIO_FN_VI1_FIELD_B,
- GPIO_FN_VI2_R1, GPIO_FN_EX_CS2_N, GPIO_FN_GPS_SIGN, GPIO_FN_HRTS1_N_B,
- GPIO_FN_VI3_CLKENB, GPIO_FN_VI1_G0, GPIO_FN_VI1_G0_B, GPIO_FN_VI2_R2,
-
- /* IPSR5 */
- GPIO_FN_EX_CS3_N, GPIO_FN_GPS_MAG, GPIO_FN_VI3_FIELD, GPIO_FN_VI1_G1,
- GPIO_FN_VI1_G1_B, GPIO_FN_VI2_R3, GPIO_FN_EX_CS4_N,
- GPIO_FN_MSIOF1_SCK_B, GPIO_FN_VI3_HSYNC_N,
- GPIO_FN_VI2_HSYNC_N, GPIO_FN_SCL1, GPIO_FN_VI2_HSYNC_N_B,
- GPIO_FN_INTC_EN0_N, GPIO_FN_SCL1_CIS, GPIO_FN_EX_CS5_N, GPIO_FN_CAN0_RX,
- GPIO_FN_MSIOF1_RXD_B, GPIO_FN_VI3_VSYNC_N, GPIO_FN_VI1_G2,
- GPIO_FN_VI1_G2_B, GPIO_FN_VI2_R4, GPIO_FN_SDA1, GPIO_FN_INTC_EN1_N,
- GPIO_FN_SDA1_CIS, GPIO_FN_BS_N, GPIO_FN_IETX, GPIO_FN_HTX1_B,
- GPIO_FN_CAN1_TX, GPIO_FN_DRACK0, GPIO_FN_IETX_C, GPIO_FN_RD_N,
- GPIO_FN_CAN0_TX, GPIO_FN_SCIFA0_SCK_B, GPIO_FN_RD_WR_N, GPIO_FN_VI1_G3,
- GPIO_FN_VI1_G3_B, GPIO_FN_VI2_R5, GPIO_FN_SCIFA0_RXD_B,
- GPIO_FN_INTC_IRQ4_N, GPIO_FN_WE0_N, GPIO_FN_IECLK, GPIO_FN_CAN_CLK,
- GPIO_FN_VI2_VSYNC_N, GPIO_FN_SCIFA0_TXD_B, GPIO_FN_VI2_VSYNC_N_B,
- GPIO_FN_WE1_N, GPIO_FN_IERX, GPIO_FN_CAN1_RX, GPIO_FN_VI1_G4,
- GPIO_FN_VI1_G4_B, GPIO_FN_VI2_R6, GPIO_FN_SCIFA0_CTS_N_B,
- GPIO_FN_IERX_C, GPIO_FN_EX_WAIT0, GPIO_FN_IRQ3, GPIO_FN_INTC_IRQ3_N,
- GPIO_FN_VI3_CLK, GPIO_FN_SCIFA0_RTS_N_B, GPIO_FN_HRX0_B,
- GPIO_FN_MSIOF0_SCK_B, GPIO_FN_DREQ0_N, GPIO_FN_VI1_HSYNC_N,
- GPIO_FN_VI1_HSYNC_N_B, GPIO_FN_VI2_R7, GPIO_FN_SSI_SCK78_C,
- GPIO_FN_SSI_WS78_B,
-
- /* IPSR6 */
- GPIO_FN_DACK0, GPIO_FN_IRQ0, GPIO_FN_INTC_IRQ0_N, GPIO_FN_SSI_SCK6_B,
- GPIO_FN_VI1_VSYNC_N, GPIO_FN_VI1_VSYNC_N_B, GPIO_FN_SSI_WS78_C,
- GPIO_FN_DREQ1_N, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_CLKENB_B,
- GPIO_FN_SSI_SDATA7_C, GPIO_FN_SSI_SCK78_B, GPIO_FN_DACK1, GPIO_FN_IRQ1,
- GPIO_FN_INTC_IRQ1_N, GPIO_FN_SSI_WS6_B, GPIO_FN_SSI_SDATA8_C,
- GPIO_FN_DREQ2_N, GPIO_FN_HSCK1_B, GPIO_FN_HCTS0_N_B,
- GPIO_FN_MSIOF0_TXD_B, GPIO_FN_DACK2, GPIO_FN_IRQ2, GPIO_FN_INTC_IRQ2_N,
- GPIO_FN_SSI_SDATA6_B, GPIO_FN_HRTS0_N_B, GPIO_FN_MSIOF0_RXD_B,
- GPIO_FN_ETH_CRS_DV, GPIO_FN_RMII_CRS_DV, GPIO_FN_STP_ISCLK_0_B,
- GPIO_FN_TS_SDEN0_D, GPIO_FN_GLO_Q0_C, GPIO_FN_SCL2_E,
- GPIO_FN_SCL2_CIS_E, GPIO_FN_ETH_RX_ER, GPIO_FN_RMII_RX_ER,
- GPIO_FN_STP_ISD_0_B, GPIO_FN_TS_SPSYNC0_D, GPIO_FN_GLO_Q1_C,
- GPIO_FN_SDA2_E, GPIO_FN_SDA2_CIS_E, GPIO_FN_ETH_RXD0, GPIO_FN_RMII_RXD0,
- GPIO_FN_STP_ISEN_0_B, GPIO_FN_TS_SDAT0_D, GPIO_FN_GLO_I0_C,
- GPIO_FN_SCIFB1_SCK_G, GPIO_FN_SCK1_E, GPIO_FN_ETH_RXD1,
- GPIO_FN_RMII_RXD1, GPIO_FN_HRX0_E, GPIO_FN_STP_ISSYNC_0_B,
- GPIO_FN_TS_SCK0_D, GPIO_FN_GLO_I1_C, GPIO_FN_SCIFB1_RXD_G,
- GPIO_FN_RX1_E, GPIO_FN_ETH_LINK, GPIO_FN_RMII_LINK, GPIO_FN_HTX0_E,
- GPIO_FN_STP_IVCXO27_0_B, GPIO_FN_SCIFB1_TXD_G, GPIO_FN_TX1_E,
- GPIO_FN_ETH_REF_CLK, GPIO_FN_RMII_REF_CLK, GPIO_FN_HCTS0_N_E,
- GPIO_FN_STP_IVCXO27_1_B, GPIO_FN_HRX0_F,
-
- /* IPSR7 */
- GPIO_FN_ETH_MDIO, GPIO_FN_RMII_MDIO, GPIO_FN_HRTS0_N_E,
- GPIO_FN_SIM0_D_C, GPIO_FN_HCTS0_N_F, GPIO_FN_ETH_TXD1,
- GPIO_FN_RMII_TXD1, GPIO_FN_HTX0_F, GPIO_FN_BPFCLK_G, GPIO_FN_RDS_CLK_F,
- GPIO_FN_ETH_TX_EN, GPIO_FN_RMII_TX_EN, GPIO_FN_SIM0_CLK_C,
- GPIO_FN_HRTS0_N_F, GPIO_FN_ETH_MAGIC, GPIO_FN_RMII_MAGIC,
- GPIO_FN_SIM0_RST_C, GPIO_FN_ETH_TXD0, GPIO_FN_RMII_TXD0,
- GPIO_FN_STP_ISCLK_1_B, GPIO_FN_TS_SDEN1_C, GPIO_FN_GLO_SCLK_C,
- GPIO_FN_ETH_MDC, GPIO_FN_RMII_MDC, GPIO_FN_STP_ISD_1_B,
- GPIO_FN_TS_SPSYNC1_C, GPIO_FN_GLO_SDATA_C, GPIO_FN_PWM0,
- GPIO_FN_SCIFA2_SCK_C, GPIO_FN_STP_ISEN_1_B, GPIO_FN_TS_SDAT1_C,
- GPIO_FN_GLO_SS_C, GPIO_FN_PWM1, GPIO_FN_SCIFA2_TXD_C,
- GPIO_FN_STP_ISSYNC_1_B, GPIO_FN_TS_SCK1_C, GPIO_FN_GLO_RFON_C,
- GPIO_FN_PCMOE_N, GPIO_FN_PWM2, GPIO_FN_PWMFSW0, GPIO_FN_SCIFA2_RXD_C,
- GPIO_FN_PCMWE_N, GPIO_FN_IECLK_C, GPIO_FN_DU1_DOTCLKIN,
- GPIO_FN_AUDIO_CLKC, GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_VI0_CLK,
- GPIO_FN_ATACS00_N, GPIO_FN_AVB_RXD1, GPIO_FN_MII_RXD1,
- GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_ATACS10_N, GPIO_FN_AVB_RXD2,
- GPIO_FN_MII_RXD2,
-
- /* IPSR8 */
- GPIO_FN_VI0_DATA1_VI0_B1, GPIO_FN_ATARD0_N, GPIO_FN_AVB_RXD3,
- GPIO_FN_MII_RXD3, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_ATAWR0_N,
- GPIO_FN_AVB_RXD4, GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_ATADIR0_N,
- GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA4_VI0_B4, GPIO_FN_ATAG0_N,
- GPIO_FN_AVB_RXD6, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_EX_WAIT1,
- GPIO_FN_AVB_RXD7, GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RX_ER,
- GPIO_FN_MII_RX_ER, GPIO_FN_VI0_DATA7_VI0_B7, GPIO_FN_AVB_RX_CLK,
- GPIO_FN_MII_RX_CLK, GPIO_FN_VI1_CLK, GPIO_FN_AVB_RX_DV,
- GPIO_FN_MII_RX_DV, GPIO_FN_VI1_DATA0_VI1_B0, GPIO_FN_SCIFA1_SCK_D,
- GPIO_FN_AVB_CRS, GPIO_FN_MII_CRS, GPIO_FN_VI1_DATA1_VI1_B1,
- GPIO_FN_SCIFA1_RXD_D, GPIO_FN_AVB_MDC, GPIO_FN_MII_MDC,
- GPIO_FN_VI1_DATA2_VI1_B2, GPIO_FN_SCIFA1_TXD_D, GPIO_FN_AVB_MDIO,
- GPIO_FN_MII_MDIO, GPIO_FN_VI1_DATA3_VI1_B3, GPIO_FN_SCIFA1_CTS_N_D,
- GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI1_DATA4_VI1_B4, GPIO_FN_SCIFA1_RTS_N_D,
- GPIO_FN_AVB_MAGIC, GPIO_FN_MII_MAGIC, GPIO_FN_VI1_DATA5_VI1_B5,
- GPIO_FN_AVB_PHY_INT, GPIO_FN_VI1_DATA6_VI1_B6, GPIO_FN_AVB_GTXREFCLK,
- GPIO_FN_SD0_CLK, GPIO_FN_VI1_DATA0_VI1_B0_B, GPIO_FN_SD0_CMD,
- GPIO_FN_SCIFB1_SCK_B, GPIO_FN_VI1_DATA1_VI1_B1_B,
-
- /* IPSR9 */
- GPIO_FN_SD0_DAT0, GPIO_FN_SCIFB1_RXD_B, GPIO_FN_VI1_DATA2_VI1_B2_B,
- GPIO_FN_SD0_DAT1, GPIO_FN_SCIFB1_TXD_B, GPIO_FN_VI1_DATA3_VI1_B3_B,
- GPIO_FN_SD0_DAT2, GPIO_FN_SCIFB1_CTS_N_B, GPIO_FN_VI1_DATA4_VI1_B4_B,
- GPIO_FN_SD0_DAT3, GPIO_FN_SCIFB1_RTS_N_B, GPIO_FN_VI1_DATA5_VI1_B5_B,
- GPIO_FN_SD0_CD, GPIO_FN_MMC0_D6, GPIO_FN_TS_SDEN0_B, GPIO_FN_USB0_EXTP,
- GPIO_FN_GLO_SCLK, GPIO_FN_VI1_DATA6_VI1_B6_B, GPIO_FN_SCL1_B,
- GPIO_FN_SCL1_CIS_B, GPIO_FN_VI2_DATA6_VI2_B6_B, GPIO_FN_SD0_WP,
- GPIO_FN_MMC0_D7, GPIO_FN_TS_SPSYNC0_B, GPIO_FN_USB0_IDIN,
- GPIO_FN_GLO_SDATA, GPIO_FN_VI1_DATA7_VI1_B7_B, GPIO_FN_SDA1_B,
- GPIO_FN_SDA1_CIS_B, GPIO_FN_VI2_DATA7_VI2_B7_B, GPIO_FN_SD1_CLK,
- GPIO_FN_AVB_TX_EN, GPIO_FN_MII_TX_EN, GPIO_FN_SD1_CMD,
- GPIO_FN_AVB_TX_ER, GPIO_FN_MII_TX_ER, GPIO_FN_SCIFB0_SCK_B,
- GPIO_FN_SD1_DAT0, GPIO_FN_AVB_TX_CLK, GPIO_FN_MII_TX_CLK,
- GPIO_FN_SCIFB0_RXD_B, GPIO_FN_SD1_DAT1, GPIO_FN_AVB_LINK,
- GPIO_FN_MII_LINK, GPIO_FN_SCIFB0_TXD_B, GPIO_FN_SD1_DAT2,
- GPIO_FN_AVB_COL, GPIO_FN_MII_COL, GPIO_FN_SCIFB0_CTS_N_B,
- GPIO_FN_SD1_DAT3, GPIO_FN_AVB_RXD0, GPIO_FN_MII_RXD0,
- GPIO_FN_SCIFB0_RTS_N_B, GPIO_FN_SD1_CD, GPIO_FN_MMC1_D6,
- GPIO_FN_TS_SDEN1, GPIO_FN_USB1_EXTP, GPIO_FN_GLO_SS, GPIO_FN_VI0_CLK_B,
- GPIO_FN_SCL2_D, GPIO_FN_SCL2_CIS_D, GPIO_FN_SIM0_CLK_B,
- GPIO_FN_VI3_CLK_B,
-
- /* IPSR10 */
- GPIO_FN_SD1_WP, GPIO_FN_MMC1_D7, GPIO_FN_TS_SPSYNC1, GPIO_FN_USB1_IDIN,
- GPIO_FN_GLO_RFON, GPIO_FN_VI1_CLK_B, GPIO_FN_SDA2_D, GPIO_FN_SDA2_CIS_D,
- GPIO_FN_SIM0_D_B, GPIO_FN_SD2_CLK, GPIO_FN_MMC0_CLK, GPIO_FN_SIM0_CLK,
- GPIO_FN_VI0_DATA0_VI0_B0_B, GPIO_FN_TS_SDEN0_C, GPIO_FN_GLO_SCLK_B,
- GPIO_FN_VI3_DATA0_B, GPIO_FN_SD2_CMD, GPIO_FN_MMC0_CMD, GPIO_FN_SIM0_D,
- GPIO_FN_VI0_DATA1_VI0_B1_B, GPIO_FN_SCIFB1_SCK_E, GPIO_FN_SCK1_D,
- GPIO_FN_TS_SPSYNC0_C, GPIO_FN_GLO_SDATA_B, GPIO_FN_VI3_DATA1_B,
- GPIO_FN_SD2_DAT0, GPIO_FN_MMC0_D0, GPIO_FN_FMCLK_B,
- GPIO_FN_VI0_DATA2_VI0_B2_B, GPIO_FN_SCIFB1_RXD_E, GPIO_FN_RX1_D,
- GPIO_FN_TS_SDAT0_C, GPIO_FN_GLO_SS_B, GPIO_FN_VI3_DATA2_B,
- GPIO_FN_SD2_DAT1, GPIO_FN_MMC0_D1, GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA,
- GPIO_FN_VI0_DATA3_VI0_B3_B, GPIO_FN_SCIFB1_TXD_E, GPIO_FN_TX1_D,
- GPIO_FN_TS_SCK0_C, GPIO_FN_GLO_RFON_B, GPIO_FN_VI3_DATA3_B,
- GPIO_FN_SD2_DAT2, GPIO_FN_MMC0_D2, GPIO_FN_BPFCLK_B, GPIO_FN_RDS_CLK,
- GPIO_FN_VI0_DATA4_VI0_B4_B, GPIO_FN_HRX0_D, GPIO_FN_TS_SDEN1_B,
- GPIO_FN_GLO_Q0_B, GPIO_FN_VI3_DATA4_B, GPIO_FN_SD2_DAT3,
- GPIO_FN_MMC0_D3, GPIO_FN_SIM0_RST, GPIO_FN_VI0_DATA5_VI0_B5_B,
- GPIO_FN_HTX0_D, GPIO_FN_TS_SPSYNC1_B, GPIO_FN_GLO_Q1_B,
- GPIO_FN_VI3_DATA5_B, GPIO_FN_SD2_CD, GPIO_FN_MMC0_D4,
- GPIO_FN_TS_SDAT0_B, GPIO_FN_USB2_EXTP, GPIO_FN_GLO_I0,
- GPIO_FN_VI0_DATA6_VI0_B6_B, GPIO_FN_HCTS0_N_D, GPIO_FN_TS_SDAT1_B,
- GPIO_FN_GLO_I0_B, GPIO_FN_VI3_DATA6_B,
-
- /* IPSR11 */
- GPIO_FN_SD2_WP, GPIO_FN_MMC0_D5, GPIO_FN_TS_SCK0_B, GPIO_FN_USB2_IDIN,
- GPIO_FN_GLO_I1, GPIO_FN_VI0_DATA7_VI0_B7_B, GPIO_FN_HRTS0_N_D,
- GPIO_FN_TS_SCK1_B, GPIO_FN_GLO_I1_B, GPIO_FN_VI3_DATA7_B,
- GPIO_FN_SD3_CLK, GPIO_FN_MMC1_CLK, GPIO_FN_SD3_CMD, GPIO_FN_MMC1_CMD,
- GPIO_FN_MTS_N, GPIO_FN_SD3_DAT0, GPIO_FN_MMC1_D0, GPIO_FN_STM_N,
- GPIO_FN_SD3_DAT1, GPIO_FN_MMC1_D1, GPIO_FN_MDATA, GPIO_FN_SD3_DAT2,
- GPIO_FN_MMC1_D2, GPIO_FN_SDATA, GPIO_FN_SD3_DAT3, GPIO_FN_MMC1_D3,
- GPIO_FN_SCKZ, GPIO_FN_SD3_CD, GPIO_FN_MMC1_D4, GPIO_FN_TS_SDAT1,
- GPIO_FN_VSP, GPIO_FN_GLO_Q0, GPIO_FN_SIM0_RST_B, GPIO_FN_SD3_WP,
- GPIO_FN_MMC1_D5, GPIO_FN_TS_SCK1, GPIO_FN_GLO_Q1, GPIO_FN_FMIN_C,
- GPIO_FN_RDS_DATA_B, GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D, GPIO_FN_FMIN_F,
- GPIO_FN_RDS_DATA_E, GPIO_FN_MLB_CLK, GPIO_FN_SCL2_B, GPIO_FN_SCL2_CIS_B,
- GPIO_FN_MLB_SIG, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_RX1_C, GPIO_FN_SDA2_B,
- GPIO_FN_SDA2_CIS_B, GPIO_FN_MLB_DAT, GPIO_FN_SPV_EVEN,
- GPIO_FN_SCIFB1_TXD_D, GPIO_FN_TX1_C, GPIO_FN_BPFCLK_C,
- GPIO_FN_RDS_CLK_B, GPIO_FN_SSI_SCK0129, GPIO_FN_CAN_CLK_B,
- GPIO_FN_MOUT0,
-
- /* IPSR12 */
- GPIO_FN_SSI_WS0129, GPIO_FN_CAN0_TX_B, GPIO_FN_MOUT1,
- GPIO_FN_SSI_SDATA0, GPIO_FN_CAN0_RX_B, GPIO_FN_MOUT2,
- GPIO_FN_SSI_SDATA1, GPIO_FN_CAN1_TX_B, GPIO_FN_MOUT5,
- GPIO_FN_SSI_SDATA2, GPIO_FN_CAN1_RX_B, GPIO_FN_SSI_SCK1, GPIO_FN_MOUT6,
- GPIO_FN_SSI_SCK34, GPIO_FN_STP_OPWM_0, GPIO_FN_SCIFB0_SCK,
- GPIO_FN_MSIOF1_SCK, GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_SSI_WS34,
- GPIO_FN_STP_IVCXO27_0, GPIO_FN_SCIFB0_RXD, GPIO_FN_MSIOF1_SYNC,
- GPIO_FN_CAN_STEP0, GPIO_FN_SSI_SDATA3, GPIO_FN_STP_ISCLK_0,
- GPIO_FN_SCIFB0_TXD, GPIO_FN_MSIOF1_SS1, GPIO_FN_CAN_TXCLK,
- GPIO_FN_SSI_SCK4, GPIO_FN_STP_ISD_0, GPIO_FN_SCIFB0_CTS_N,
- GPIO_FN_MSIOF1_SS2, GPIO_FN_SSI_SCK5_C, GPIO_FN_CAN_DEBUGOUT0,
- GPIO_FN_SSI_WS4, GPIO_FN_STP_ISEN_0, GPIO_FN_SCIFB0_RTS_N,
- GPIO_FN_MSIOF1_TXD, GPIO_FN_SSI_WS5_C, GPIO_FN_CAN_DEBUGOUT1,
- GPIO_FN_SSI_SDATA4, GPIO_FN_STP_ISSYNC_0, GPIO_FN_MSIOF1_RXD,
- GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_SSI_SCK5, GPIO_FN_SCIFB1_SCK,
- GPIO_FN_IERX_B, GPIO_FN_DU2_EXHSYNC_DU2_HSYNC, GPIO_FN_QSTH_QHS,
- GPIO_FN_CAN_DEBUGOUT3, GPIO_FN_SSI_WS5, GPIO_FN_SCIFB1_RXD,
- GPIO_FN_IECLK_B, GPIO_FN_DU2_EXVSYNC_DU2_VSYNC, GPIO_FN_QSTB_QHE,
- GPIO_FN_CAN_DEBUGOUT4,
-
- /* IPSR13 */
- GPIO_FN_SSI_SDATA5, GPIO_FN_SCIFB1_TXD, GPIO_FN_IETX_B, GPIO_FN_DU2_DR2,
- GPIO_FN_LCDOUT2, GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_SSI_SCK6,
- GPIO_FN_SCIFB1_CTS_N, GPIO_FN_BPFCLK_D, GPIO_FN_RDS_CLK_C,
- GPIO_FN_DU2_DR3, GPIO_FN_LCDOUT3, GPIO_FN_CAN_DEBUGOUT6,
- GPIO_FN_BPFCLK_F, GPIO_FN_RDS_CLK_E, GPIO_FN_SSI_WS6,
- GPIO_FN_SCIFB1_RTS_N, GPIO_FN_CAN0_TX_D, GPIO_FN_DU2_DR4,
- GPIO_FN_LCDOUT4, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_SSI_SDATA6,
- GPIO_FN_FMIN_D, GPIO_FN_RDS_DATA_C, GPIO_FN_DU2_DR5, GPIO_FN_LCDOUT5,
- GPIO_FN_CAN_DEBUGOUT8, GPIO_FN_SSI_SCK78, GPIO_FN_STP_IVCXO27_1,
- GPIO_FN_SCK1, GPIO_FN_SCIFA1_SCK, GPIO_FN_DU2_DR6, GPIO_FN_LCDOUT6,
- GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_WS78, GPIO_FN_STP_ISCLK_1,
- GPIO_FN_SCIFB2_SCK, GPIO_FN_SCIFA2_CTS_N, GPIO_FN_DU2_DR7,
- GPIO_FN_LCDOUT7, GPIO_FN_CAN_DEBUGOUT10, GPIO_FN_SSI_SDATA7,
- GPIO_FN_STP_ISD_1, GPIO_FN_SCIFB2_RXD, GPIO_FN_SCIFA2_RTS_N,
- GPIO_FN_TCLK2, GPIO_FN_QSTVA_QVS, GPIO_FN_CAN_DEBUGOUT11,
- GPIO_FN_BPFCLK_E, GPIO_FN_RDS_CLK_D, GPIO_FN_SSI_SDATA7_B,
- GPIO_FN_FMIN_G, GPIO_FN_RDS_DATA_F, GPIO_FN_SSI_SDATA8,
- GPIO_FN_STP_ISEN_1, GPIO_FN_SCIFB2_TXD, GPIO_FN_CAN0_TX_C,
- GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SDATA8_B, GPIO_FN_SSI_SDATA9,
- GPIO_FN_STP_ISSYNC_1, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_SSI_WS1,
- GPIO_FN_SSI_SDATA5_C, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_AUDIO_CLKA,
- GPIO_FN_SCIFB2_RTS_N, GPIO_FN_CAN_DEBUGOUT14,
-
- /* IPSR14 */
- GPIO_FN_AUDIO_CLKB, GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_RX_D,
- GPIO_FN_DVC_MUTE, GPIO_FN_CAN0_RX_C, GPIO_FN_CAN_DEBUGOUT15,
- GPIO_FN_REMOCON, GPIO_FN_SCIFA0_SCK, GPIO_FN_HSCK1, GPIO_FN_SCK0,
- GPIO_FN_MSIOF3_SS2, GPIO_FN_DU2_DG2, GPIO_FN_LCDOUT10, GPIO_FN_SDA1_C,
- GPIO_FN_SDA1_CIS_C, GPIO_FN_SCIFA0_RXD, GPIO_FN_HRX1, GPIO_FN_RX0,
- GPIO_FN_DU2_DR0, GPIO_FN_LCDOUT0, GPIO_FN_SCIFA0_TXD, GPIO_FN_HTX1,
- GPIO_FN_TX0, GPIO_FN_DU2_DR1, GPIO_FN_LCDOUT1, GPIO_FN_SCIFA0_CTS_N,
- GPIO_FN_HCTS1_N, GPIO_FN_CTS0_N, GPIO_FN_MSIOF3_SYNC, GPIO_FN_DU2_DG3,
- GPIO_FN_LCDOUT11, GPIO_FN_PWM0_B, GPIO_FN_SCL1_C, GPIO_FN_SCL1_CIS_C,
- GPIO_FN_SCIFA0_RTS_N, GPIO_FN_HRTS1_N, GPIO_FN_RTS0_N_TANS,
- GPIO_FN_MSIOF3_SS1, GPIO_FN_DU2_DG0, GPIO_FN_LCDOUT8, GPIO_FN_PWM1_B,
- GPIO_FN_SCIFA1_RXD, GPIO_FN_AD_DI, GPIO_FN_RX1,
- GPIO_FN_DU2_EXODDF_DU2_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
- GPIO_FN_SCIFA1_TXD, GPIO_FN_AD_DO, GPIO_FN_TX1, GPIO_FN_DU2_DG1,
- GPIO_FN_LCDOUT9, GPIO_FN_SCIFA1_CTS_N, GPIO_FN_AD_CLK,
- GPIO_FN_CTS1_N, GPIO_FN_MSIOF3_RXD, GPIO_FN_DU0_DOTCLKOUT, GPIO_FN_QCLK,
- GPIO_FN_SCIFA1_RTS_N, GPIO_FN_AD_NCS_N, GPIO_FN_RTS1_N_TANS,
- GPIO_FN_MSIOF3_TXD, GPIO_FN_DU1_DOTCLKOUT, GPIO_FN_QSTVB_QVE,
- GPIO_FN_HRTS0_N_C,
-
- /* IPSR15 */
- GPIO_FN_SCIFA2_SCK, GPIO_FN_FMCLK, GPIO_FN_MSIOF3_SCK, GPIO_FN_DU2_DG7,
- GPIO_FN_LCDOUT15, GPIO_FN_SCIF_CLK_B, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN,
- GPIO_FN_DU2_DB0, GPIO_FN_LCDOUT16, GPIO_FN_SCL2, GPIO_FN_SCL2_CIS,
- GPIO_FN_SCIFA2_TXD, GPIO_FN_BPFCLK, GPIO_FN_DU2_DB1, GPIO_FN_LCDOUT17,
- GPIO_FN_SDA2, GPIO_FN_SDA2_CIS, GPIO_FN_HSCK0, GPIO_FN_TS_SDEN0,
- GPIO_FN_DU2_DG4, GPIO_FN_LCDOUT12, GPIO_FN_HCTS0_N_C, GPIO_FN_HRX0,
- GPIO_FN_DU2_DB2, GPIO_FN_LCDOUT18, GPIO_FN_HTX0, GPIO_FN_DU2_DB3,
- GPIO_FN_LCDOUT19, GPIO_FN_HCTS0_N, GPIO_FN_SSI_SCK9, GPIO_FN_DU2_DB4,
- GPIO_FN_LCDOUT20, GPIO_FN_HRTS0_N, GPIO_FN_SSI_WS9, GPIO_FN_DU2_DB5,
- GPIO_FN_LCDOUT21, GPIO_FN_MSIOF0_SCK, GPIO_FN_TS_SDAT0, GPIO_FN_ADICLK,
- GPIO_FN_DU2_DB6, GPIO_FN_LCDOUT22, GPIO_FN_MSIOF0_SYNC, GPIO_FN_TS_SCK0,
- GPIO_FN_SSI_SCK2, GPIO_FN_ADIDATA, GPIO_FN_DU2_DB7, GPIO_FN_LCDOUT23,
- GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF0_SS1, GPIO_FN_ADICHS0,
- GPIO_FN_DU2_DG5, GPIO_FN_LCDOUT13, GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICHS1,
- GPIO_FN_DU2_DG6, GPIO_FN_LCDOUT14,
-
- /* IPSR16 */
- GPIO_FN_MSIOF0_SS2, GPIO_FN_AUDIO_CLKOUT, GPIO_FN_ADICHS2,
- GPIO_FN_DU2_DISP, GPIO_FN_QPOLA, GPIO_FN_HTX0_C, GPIO_FN_SCIFA2_TXD_B,
- GPIO_FN_MSIOF0_RXD, GPIO_FN_TS_SPSYNC0, GPIO_FN_SSI_WS2,
- GPIO_FN_ADICS_SAMP, GPIO_FN_DU2_CDE, GPIO_FN_QPOLB, GPIO_FN_HRX0_C,
- GPIO_FN_USB1_PWEN, GPIO_FN_AUDIO_CLKOUT_D, GPIO_FN_USB1_OVC,
- GPIO_FN_TCLK1_B,
-};
-
-#endif /* __ASM_R8A7790_GPIO_H__ */
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h
deleted file mode 100644
index 42e8259..0000000
--- a/arch/arm/mach-rmobile/include/mach/r8a7791-gpio.h
+++ /dev/null
@@ -1,438 +0,0 @@
-#ifndef __ASM_R8A7791_GPIO_H__
-#define __ASM_R8A7791_GPIO_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
- */
-enum {
- GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
- GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
- GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
- GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
- GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
- GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
- GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
- GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
-
- GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
- GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
- GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
- GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
- GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
- GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
- GPIO_GP_1_24, GPIO_GP_1_25,
-
- GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
- GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
- GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
- GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
- GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
- GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
- GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
- GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,
-
- GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
- GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
- GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
- GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
- GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
- GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
- GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
- GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
-
- GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
- GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
- GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
- GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
- GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
- GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
- GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
- GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
-
- GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
- GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
- GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
- GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
- GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
- GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
- GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
- GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,
-
- GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,
- GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,
- GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,
- GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,
- GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,
- GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,
- GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,
- GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,
-
- GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,
- GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,
- GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,
- GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,
- GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,
- GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,
- GPIO_GP_7_24, GPIO_GP_7_25,
-
- GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,
- GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0,
- GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2,
- GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5,
- GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7,
- GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,
-
- /* IPSR0 */
- GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,
- GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,
- GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,
- GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,
- GPIO_FN_SCL0_C, GPIO_FN_PWM2_B,
- GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,
- GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,
- GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,
-
- /* IPSR1 */
- GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,
- GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0,
- GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,
- GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,
- GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,
- GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,
- GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,
- GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,
- GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D,
- GPIO_FN_A15, GPIO_FN_BPFCLK_C,
- GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,
- GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,
- GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,
-
- /* IPSR2 */
- GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,
- GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B,
- GPIO_FN_A20, GPIO_FN_SPCLK,
- GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,
- GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,
- GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD,
- GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,
- GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD,
- GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,
- GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD,
- GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,
- GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD,
- GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,
- GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,
- GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK,
- GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,
- GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,
- GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1,
-
- /* IPSR3 */
- GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N,
- GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2,
- GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,
- GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B,
- GPIO_FN_PWM1, GPIO_FN_TPU_TO1,
- GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,
- GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B,
- GPIO_FN_PWM2, GPIO_FN_TPU_TO2,
- GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,
- GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D,
- GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,
- GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B,
- GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B,
- GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,
- GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,
- GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,
- GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,
- GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B,
- GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D,
- GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,
- GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C,
- GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,
- GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C,
-
- /* IPSR4 */
- GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B,
- GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C,
- GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,
- GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D,
- GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,
- GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D,
- GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B,
- GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C,
- GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,
- GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E,
- GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,
- GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,
- GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B,
- GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E,
- GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,
- GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D,
- GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D,
- GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D,
- GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C,
- GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0,
- GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B,
-
- /* IPSR5 */
- GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,
- GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,
- GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,
- GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,
- GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,
- GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,
- GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK,
- GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B,
- GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B,
- GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B,
- GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,
- GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,
- GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,
- GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,
- GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,
- GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,
- GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,
-
- /* IPSR6 */
- GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,
- GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E,
- GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,
- GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,
- GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B,
- GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD,
- GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,
- GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,
- GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,
- GPIO_FN_IRQ3, GPIO_FN_SCL4_C,
- GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N,
- GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,
- GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N,
- GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,
- GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,
- GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E,
- GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,
- GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D,
- GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,
- GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D,
-
- /* IPSR7 */
- GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,
- GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,
- GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,
- GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B,
- GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,
- GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B,
- GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,
- GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,
- GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,
- GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,
- GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,
- GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,
- GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,
- GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B,
- GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,
- GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B,
- GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,
- GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,
-
- /* IPSR8 */
- GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11,
- GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B,
- GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,
- GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,
- GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,
- GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,
- GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,
- GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B,
- GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,
- GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B,
- GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,
- GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B,
- GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,
- GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,
- GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,
- GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,
- GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,
- GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20,
- GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX,
- GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,
- GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX,
-
- /* IPSR9 */
- GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,
- GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD,
- GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,
- GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK,
- GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS,
- GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK,
- GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,
- GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,
- GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS,
- GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE,
- GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
- GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,
- GPIO_FN_DU1_DISP, GPIO_FN_QPOLA,
- GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,
- GPIO_FN_VI0_CLKENB, GPIO_FN_TX4,
- GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D,
- GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,
- GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5,
- GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D,
- GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5,
- GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D,
- GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,
- GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,
- GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,
-
- /* IPSR10 */
- GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,
- GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,
- GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,
- GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,
- GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,
- GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,
- GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,
- GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,
- GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,
- GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E,
- GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D,
- GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,
- GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,
- GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,
- GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N,
- GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,
- GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N,
- GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3,
- GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C,
- GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4,
- GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C,
- GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,
- GPIO_FN_TX0_C, GPIO_FN_SCL1_D,
-
- /* IPSR11 */
- GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,
- GPIO_FN_RX0_C, GPIO_FN_SDA1_D,
- GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,
- GPIO_FN_TX1_C, GPIO_FN_SCL4_B,
- GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,
- GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,
- GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,
- GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B,
- GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,
- GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B,
- GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,
- GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,
- GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,
- GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6,
- GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7,
- GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER,
- GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO,
- GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV,
- GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC,
- GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC,
- GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,
- GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,
-
- /* IPSR12 */
- GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,
- GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,
- GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,
- GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E,
- GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,
- GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E,
- GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,
- GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E,
- GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,
- GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E,
- GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3,
- GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B,
- GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,
- GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,
- GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,
- GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,
- GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C,
- GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,
- GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C,
-
- /* IPSR13 */
- GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,
- GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C,
- GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK,
- GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C,
- GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL,
- GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C,
- GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,
- GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C,
- GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,
- GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B,
- GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B,
- GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,
- GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B,
- GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F,
- GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C,
- GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,
- GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C,
- GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B,
- GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B,
- GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,
- GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B,
- GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,
-
- /* IPSR14 */
- GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,
- GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,
- GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,
- GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,
- GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,
- GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C,
- GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,
- GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C,
- GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,
- GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B,
- GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,
- GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B,
- GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK,
- GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B,
- GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0,
- GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B,
- GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,
- GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,
- GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,
- GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,
-
- /* IPSR15 */
- GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,
- GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,
- GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,
- GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,
- GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C,
- GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,
- GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C,
- GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,
- GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C,
- GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,
- GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C,
- GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N,
- GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C,
- GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,
- GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C,
- GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,
- GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C,
- GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,
- GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C,
-
- /* IPSR16 */
- GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,
- GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C,
- GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,
- GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C,
- GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,
- GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N,
- GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B,
- GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N,
- GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B,
-};
-
-#endif /* __ASM_R8A7791_GPIO_H__ */
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h
deleted file mode 100644
index 86931c3..0000000
--- a/arch/arm/mach-rmobile/include/mach/r8a7792-gpio.h
+++ /dev/null
@@ -1,220 +0,0 @@
-#ifndef __ASM_R8A7792_GPIO_H__
-#define __ASM_R8A7792_GPIO_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
- */
-enum {
- GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
- GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
- GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
- GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
- GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
- GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
- GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
- GPIO_GP_0_28,
-
- GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
- GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
- GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
- GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
- GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
- GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22,
-
- GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
- GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
- GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
- GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
- GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
- GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
- GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
- GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,
-
- GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
- GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
- GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
- GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
- GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
- GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
- GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
- GPIO_GP_3_28,
-
- GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
- GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
- GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
- GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
- GPIO_GP_4_16,
-
- GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
- GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
- GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
- GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
- GPIO_GP_5_16,
-
- GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,
- GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,
- GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,
- GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,
- GPIO_GP_6_16,
-
- GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,
- GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,
- GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,
- GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,
- GPIO_GP_7_16,
-
- GPIO_GP_8_0, GPIO_GP_8_1, GPIO_GP_8_2, GPIO_GP_8_3,
- GPIO_GP_8_4, GPIO_GP_8_5, GPIO_GP_8_6, GPIO_GP_8_7,
- GPIO_GP_8_8, GPIO_GP_8_9, GPIO_GP_8_10, GPIO_GP_8_11,
- GPIO_GP_8_12, GPIO_GP_8_13, GPIO_GP_8_14, GPIO_GP_8_15,
- GPIO_GP_8_16,
-
- GPIO_GP_9_0, GPIO_GP_9_1, GPIO_GP_9_2, GPIO_GP_9_3,
- GPIO_GP_9_4, GPIO_GP_9_5, GPIO_GP_9_6, GPIO_GP_9_7,
- GPIO_GP_9_8, GPIO_GP_9_9, GPIO_GP_9_10, GPIO_GP_9_11,
- GPIO_GP_9_12, GPIO_GP_9_13, GPIO_GP_9_14, GPIO_GP_9_15,
- GPIO_GP_9_16,
-
- GPIO_GP_10_0, GPIO_GP_10_1, GPIO_GP_10_2, GPIO_GP_10_3,
- GPIO_GP_10_4, GPIO_GP_10_5, GPIO_GP_10_6, GPIO_GP_10_7,
- GPIO_GP_10_8, GPIO_GP_10_9, GPIO_GP_10_10, GPIO_GP_10_11,
- GPIO_GP_10_12, GPIO_GP_10_13, GPIO_GP_10_14, GPIO_GP_10_15,
- GPIO_GP_10_16, GPIO_GP_10_17, GPIO_GP_10_18, GPIO_GP_10_19,
- GPIO_GP_10_20, GPIO_GP_10_21, GPIO_GP_10_22, GPIO_GP_10_23,
- GPIO_GP_10_24, GPIO_GP_10_25, GPIO_GP_10_26, GPIO_GP_10_27,
- GPIO_GP_10_28, GPIO_GP_10_29, GPIO_GP_10_30, GPIO_GP_10_31,
-
- GPIO_GP_11_0, GPIO_GP_11_1, GPIO_GP_11_2, GPIO_GP_11_3,
- GPIO_GP_11_4, GPIO_GP_11_5, GPIO_GP_11_6, GPIO_GP_11_7,
- GPIO_GP_11_8, GPIO_GP_11_9, GPIO_GP_11_10, GPIO_GP_11_11,
- GPIO_GP_11_12, GPIO_GP_11_13, GPIO_GP_11_14, GPIO_GP_11_15,
- GPIO_GP_11_16, GPIO_GP_11_17, GPIO_GP_11_18, GPIO_GP_11_19,
- GPIO_GP_11_20, GPIO_GP_11_21, GPIO_GP_11_22, GPIO_GP_11_23,
- GPIO_GP_11_24, GPIO_GP_11_25, GPIO_GP_11_26, GPIO_GP_11_27,
- GPIO_GP_11_28, GPIO_GP_11_29,
-
- GPIO_FN_DU1_DB2_C0_DATA12, GPIO_FN_DU1_DB3_C1_DATA13,
- GPIO_FN_DU1_DB4_C2_DATA14, GPIO_FN_DU1_DB5_C3_DATA15,
- GPIO_FN_DU1_DB6_C4, GPIO_FN_DU1_DB7_C5, GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC,
- GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_DU1_DISP, GPIO_FN_DU1_CDE,
-
- GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,
- GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10, GPIO_FN_D11,
- GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15, GPIO_FN_A0, GPIO_FN_A1,
- GPIO_FN_A2, GPIO_FN_A3, GPIO_FN_A4, GPIO_FN_A5, GPIO_FN_A6, GPIO_FN_A7,
- GPIO_FN_A8, GPIO_FN_A9, GPIO_FN_A10, GPIO_FN_A11, GPIO_FN_A12, GPIO_FN_A13,
- GPIO_FN_A14, GPIO_FN_A15,
-
- GPIO_FN_A16, GPIO_FN_A17, GPIO_FN_A18, GPIO_FN_A19,
- GPIO_FN_CS1_A26, GPIO_FN_EX_CS0, GPIO_FN_EX_CS1, GPIO_FN_EX_CS2,
- GPIO_FN_EX_CS3, GPIO_FN_EX_CS4, GPIO_FN_EX_CS5, GPIO_FN_BS,
- GPIO_FN_RD, GPIO_FN_RD_WR, GPIO_FN_WE0, GPIO_FN_WE1, GPIO_FN_EX_WAIT0,
- GPIO_FN_IRQ0, GPIO_FN_IRQ1, GPIO_FN_IRQ2, GPIO_FN_IRQ3, GPIO_FN_CS0,
-
- GPIO_FN_VI0_CLK, GPIO_FN_VI0_CLKENB, GPIO_FN_VI0_HSYNC, GPIO_FN_VI0_VSYNC,
- GPIO_FN_VI0_D0_B0_C0, GPIO_FN_VI0_D1_B1_C1, GPIO_FN_VI0_D2_B2_C2, GPIO_FN_VI0_D3_B3_C3,
- GPIO_FN_VI0_D4_B4_C4, GPIO_FN_VI0_D5_B5_C5, GPIO_FN_VI0_D6_B6_C6, GPIO_FN_VI0_D7_B7_C7,
- GPIO_FN_VI0_D8_G0_Y0, GPIO_FN_VI0_D9_G1_Y1, GPIO_FN_VI0_D10_G2_Y2, GPIO_FN_VI0_D11_G3_Y3,
- GPIO_FN_VI0_FIELD,
-
- GPIO_FN_VI1_CLK, GPIO_FN_VI1_CLKENB, GPIO_FN_VI1_HSYNC,
- GPIO_FN_VI1_VSYNC, GPIO_FN_VI1_D0_B0_C0, GPIO_FN_VI1_D1_B1_C1,
- GPIO_FN_VI1_D2_B2_C2, GPIO_FN_VI1_D3_B3_C3, GPIO_FN_VI1_D4_B4_C4,
- GPIO_FN_VI1_D5_B5_C5, GPIO_FN_VI1_D6_B6_C6, GPIO_FN_VI1_D7_B7_C7,
- GPIO_FN_VI1_D8_G0_Y0, GPIO_FN_VI1_D9_G1_Y1, GPIO_FN_VI1_D10_G2_Y2,
- GPIO_FN_VI1_D11_G3_Y3, GPIO_FN_VI1_FIELD,
-
- GPIO_FN_VI3_D10_Y2, GPIO_FN_VI3_FIELD,
-
- GPIO_FN_VI4_CLK,
-
- GPIO_FN_VI5_CLK, GPIO_FN_VI5_D9_Y1, GPIO_FN_VI5_D10_Y2, GPIO_FN_VI5_D11_Y3, GPIO_FN_VI5_FIELD,
-
- GPIO_FN_HRTS0, GPIO_FN_HCTS1, GPIO_FN_SCK0, GPIO_FN_CTS0, GPIO_FN_RTS0, GPIO_FN_TX0,
- GPIO_FN_RX0, GPIO_FN_SCK1, GPIO_FN_CTS1, GPIO_FN_RTS1, GPIO_FN_TX1, GPIO_FN_RX1,
- GPIO_FN_SCIF_CLK, GPIO_FN_CAN0_TX, GPIO_FN_CAN0_RX,
- GPIO_FN_CAN_CLK, GPIO_FN_CAN1_TX, GPIO_FN_CAN1_RX,
-
- GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD, GPIO_FN_SD0_DAT0,
- GPIO_FN_SD0_DAT1, GPIO_FN_SD0_DAT2, GPIO_FN_SD0_DAT3,
- GPIO_FN_SD0_CD, GPIO_FN_SD0_WP, GPIO_FN_ADICLK,
- GPIO_FN_ADICS_SAMP, GPIO_FN_ADIDATA, GPIO_FN_ADICHS0,
- GPIO_FN_ADICHS1, GPIO_FN_ADICHS2, GPIO_FN_AVS1, GPIO_FN_AVS2,
-
- GPIO_FN_DU0_DR0_DATA0, GPIO_FN_DU0_DR1_DATA1, GPIO_FN_DU0_DR2_Y4_DATA2,
- GPIO_FN_DU0_DR3_Y5_DATA3, GPIO_FN_DU0_DR4_Y6_DATA4, GPIO_FN_DU0_DR5_Y7_DATA5,
- GPIO_FN_DU0_DR6_Y8_DATA6, GPIO_FN_DU0_DR7_Y9_DATA7, GPIO_FN_DU0_DG0_DATA8,
- GPIO_FN_DU0_DG1_DATA9, GPIO_FN_DU0_DG2_C6_DATA10, GPIO_FN_DU0_DG3_C7_DATA11,
- GPIO_FN_DU0_DG4_Y0_DATA12, GPIO_FN_DU0_DG5_Y1_DATA13, GPIO_FN_DU0_DG6_Y2_DATA14,
- GPIO_FN_DU0_DG7_Y3_DATA15, GPIO_FN_DU0_DB0, GPIO_FN_DU0_DB1,
- GPIO_FN_DU0_DB2_C0, GPIO_FN_DU0_DB3_C1, GPIO_FN_DU0_DB4_C2,
- GPIO_FN_DU0_DB5_C3, GPIO_FN_DU0_DB6_C4, GPIO_FN_DU0_DB7_C5,
-
- GPIO_FN_DU0_EXHSYNC_DU0_HSYNC, GPIO_FN_DU0_EXVSYNC_DU0_VSYNC,
- GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_DU0_DISP, GPIO_FN_DU0_CDE,
- GPIO_FN_DU1_DR2_Y4_DATA0, GPIO_FN_DU1_DR3_Y5_DATA1, GPIO_FN_DU1_DR4_Y6_DATA2,
- GPIO_FN_DU1_DR5_Y7_DATA3, GPIO_FN_DU1_DR6_DATA4, GPIO_FN_DU1_DR7_DATA5,
- GPIO_FN_DU1_DG2_C6_DATA6, GPIO_FN_DU1_DG3_C7_DATA7, GPIO_FN_DU1_DG4_Y0_DATA8,
- GPIO_FN_DU1_DG5_Y1_DATA9, GPIO_FN_DU1_DG6_Y2_DATA10, GPIO_FN_DU1_DG7_Y3_DATA11,
- GPIO_FN_A20, GPIO_FN_MOSI_IO0, GPIO_FN_A21, GPIO_FN_MISO_IO1, GPIO_FN_A22, GPIO_FN_IO2,
- GPIO_FN_A23, GPIO_FN_IO3, GPIO_FN_A24, GPIO_FN_SPCLK, GPIO_FN_A25, GPIO_FN_SSL,
-
- GPIO_FN_VI2_CLK, GPIO_FN_AVB_RX_CLK, GPIO_FN_VI2_CLKENB, GPIO_FN_AVB_RX_DV,
- GPIO_FN_VI2_HSYNC, GPIO_FN_AVB_RXD0, GPIO_FN_VI2_VSYNC, GPIO_FN_AVB_RXD1,
- GPIO_FN_VI2_D0_C0, GPIO_FN_AVB_RXD2, GPIO_FN_VI2_D1_C1, GPIO_FN_AVB_RXD3,
- GPIO_FN_VI2_D2_C2, GPIO_FN_AVB_RXD4, GPIO_FN_VI2_D3_C3, GPIO_FN_AVB_RXD5,
- GPIO_FN_VI2_D4_C4, GPIO_FN_AVB_RXD6, GPIO_FN_VI2_D5_C5, GPIO_FN_AVB_RXD7,
- GPIO_FN_VI2_D6_C6, GPIO_FN_AVB_RX_ER, GPIO_FN_VI2_D7_C7, GPIO_FN_AVB_COL,
- GPIO_FN_VI2_D8_Y0, GPIO_FN_AVB_TXD3, GPIO_FN_VI2_D9_Y1, GPIO_FN_AVB_TX_EN,
- GPIO_FN_VI2_D10_Y2, GPIO_FN_AVB_TXD0, GPIO_FN_VI2_D11_Y3, GPIO_FN_AVB_TXD1,
- GPIO_FN_VI2_FIELD, GPIO_FN_AVB_TXD2,
-
- GPIO_FN_VI3_CLK, GPIO_FN_AVB_TX_CLK, GPIO_FN_VI3_CLKENB, GPIO_FN_AVB_TXD4,
- GPIO_FN_VI3_HSYNC, GPIO_FN_AVB_TXD5, GPIO_FN_VI3_VSYNC, GPIO_FN_AVB_TXD6,
- GPIO_FN_VI3_D0_C0, GPIO_FN_AVB_TXD7, GPIO_FN_VI3_D1_C1, GPIO_FN_AVB_TX_ER,
- GPIO_FN_VI3_D2_C2, GPIO_FN_AVB_GTX_CLK, GPIO_FN_VI3_D3_C3, GPIO_FN_AVB_MDC,
- GPIO_FN_VI3_D4_C4, GPIO_FN_AVB_MDIO, GPIO_FN_VI3_D5_C5, GPIO_FN_AVB_LINK,
- GPIO_FN_VI3_D6_C6, GPIO_FN_AVB_MAGIC, GPIO_FN_VI3_D7_C7, GPIO_FN_AVB_PHY_INT,
- GPIO_FN_VI3_D8_Y0, GPIO_FN_AVB_CRS, GPIO_FN_VI3_D9_Y1, GPIO_FN_AVB_GTXREFCLK,
- GPIO_FN_VI3_D11_Y3,
-
- GPIO_FN_VI4_CLKENB, GPIO_FN_VI0_D12_G4_Y4, GPIO_FN_VI4_HSYNC, GPIO_FN_VI0_D13_G5_Y5,
- GPIO_FN_VI4_VSYNC, GPIO_FN_VI0_D14_G6_Y6, GPIO_FN_VI4_D0_C0, GPIO_FN_VI0_D15_G7_Y7,
- GPIO_FN_VI4_D1_C1, GPIO_FN_VI0_D16_R0, GPIO_FN_VI1_D12_G4_Y4_0,
- GPIO_FN_VI4_D2_C2, GPIO_FN_VI0_D17_R1, GPIO_FN_VI1_D13_G5_Y5_0,
- GPIO_FN_VI4_D3_C3, GPIO_FN_VI0_D18_R2, GPIO_FN_VI1_D14_G6_Y6_0,
- GPIO_FN_VI4_D4_C4, GPIO_FN_VI0_D19_R3, GPIO_FN_VI1_D15_G7_Y7_0,
- GPIO_FN_VI4_D5_C5, GPIO_FN_VI0_D20_R4, GPIO_FN_VI2_D12_Y4,
- GPIO_FN_VI4_D6_C6, GPIO_FN_VI0_D21_R5, GPIO_FN_VI2_D13_Y5,
- GPIO_FN_VI4_D7_C7, GPIO_FN_VI0_D22_R6, GPIO_FN_VI2_D14_Y6,
- GPIO_FN_VI4_D8_Y0, GPIO_FN_VI0_D23_R7, GPIO_FN_VI2_D15_Y7,
- GPIO_FN_VI4_D9_Y1, GPIO_FN_VI3_D12_Y4, GPIO_FN_VI4_D10_Y2, GPIO_FN_VI3_D13_Y5,
- GPIO_FN_VI4_D11_Y3, GPIO_FN_VI3_D14_Y6, GPIO_FN_VI4_FIELD, GPIO_FN_VI3_D15_Y7,
-
- GPIO_FN_VI5_CLKENB, GPIO_FN_VI1_D12_G4_Y4_1, GPIO_FN_VI5_HSYNC, GPIO_FN_VI1_D13_G5_Y5_1,
- GPIO_FN_VI5_VSYNC, GPIO_FN_VI1_D14_G6_Y6_1, GPIO_FN_VI5_D0_C0, GPIO_FN_VI1_D15_G7_Y7_1,
- GPIO_FN_VI5_D1_C1, GPIO_FN_VI1_D16_R0, GPIO_FN_VI5_D2_C2, GPIO_FN_VI1_D17_R1,
- GPIO_FN_VI5_D3_C3, GPIO_FN_VI1_D18_R2, GPIO_FN_VI5_D4_C4, GPIO_FN_VI1_D19_R3,
- GPIO_FN_VI5_D5_C5, GPIO_FN_VI1_D20_R4, GPIO_FN_VI5_D6_C6, GPIO_FN_VI1_D21_R5,
- GPIO_FN_VI5_D7_C7, GPIO_FN_VI1_D22_R6, GPIO_FN_VI5_D8_Y0, GPIO_FN_VI1_D23_R7,
-
- GPIO_FN_MSIOF0_SCK, GPIO_FN_HSCK0, GPIO_FN_MSIOF0_SYNC, GPIO_FN_HCTS0,
- GPIO_FN_MSIOF0_TXD, GPIO_FN_HTX0, GPIO_FN_MSIOF0_RXD, GPIO_FN_HRX0,
- GPIO_FN_MSIOF1_SCK, GPIO_FN_HSCK1, GPIO_FN_MSIOF1_SYNC, GPIO_FN_HRTS1,
- GPIO_FN_MSIOF1_TXD, GPIO_FN_HTX1, GPIO_FN_MSIOF1_RXD, GPIO_FN_HRX1,
- GPIO_FN_DRACK0, GPIO_FN_SCK2, GPIO_FN_DACK0, GPIO_FN_TX2,
- GPIO_FN_DREQ0, GPIO_FN_RX2, GPIO_FN_DACK1, GPIO_FN_SCK3,
- GPIO_FN_TX3, GPIO_FN_DREQ1, GPIO_FN_RX3,
-
- GPIO_FN_PWM0, GPIO_FN_TCLK1, GPIO_FN_FSO_CFE_0,
- GPIO_FN_PWM1, GPIO_FN_TCLK2, GPIO_FN_FSO_CFE_1,
- GPIO_FN_PWM2, GPIO_FN_TCLK3, GPIO_FN_FSO_TOE,
- GPIO_FN_PWM3, GPIO_FN_PWM4, GPIO_FN_SSI_SCK3, GPIO_FN_TPU0TO0,
- GPIO_FN_SSI_WS3, GPIO_FN_TPU0TO1, GPIO_FN_SSI_SDATA3, GPIO_FN_TPU0TO2,
- GPIO_FN_SSI_SCK4, GPIO_FN_TPU0TO3, GPIO_FN_SSI_WS4,
- GPIO_FN_SSI_SDATA4, GPIO_FN_AUDIO_CLKOUT,
- GPIO_FN_AUDIO_CLKA, GPIO_FN_AUDIO_CLKB,
-};
-
-#endif /* __ASM_R8A7792_GPIO_H__ */
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h
deleted file mode 100644
index f9a29fc..0000000
--- a/arch/arm/mach-rmobile/include/mach/r8a7793-gpio.h
+++ /dev/null
@@ -1,438 +0,0 @@
-#ifndef __ASM_R8A7793_H__
-#define __ASM_R8A7793_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
- */
-enum {
- GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
- GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
- GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
- GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
- GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
- GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
- GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
- GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
-
- GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
- GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
- GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
- GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
- GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
- GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
- GPIO_GP_1_24, GPIO_GP_1_25,
-
- GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
- GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
- GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
- GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
- GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
- GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
- GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
- GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,
-
- GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
- GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
- GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
- GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
- GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
- GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
- GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
- GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
-
- GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
- GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
- GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
- GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
- GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
- GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
- GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
- GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
-
- GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
- GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
- GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
- GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
- GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
- GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
- GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
- GPIO_GP_5_28, GPIO_GP_5_29, GPIO_GP_5_30, GPIO_GP_5_31,
-
- GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,
- GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,
- GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,
- GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,
- GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,
- GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,
- GPIO_GP_6_24, GPIO_GP_6_25, GPIO_GP_6_26, GPIO_GP_6_27,
- GPIO_GP_6_28, GPIO_GP_6_29, GPIO_GP_6_30, GPIO_GP_6_31,
-
- GPIO_GP_7_0, GPIO_GP_7_1, GPIO_GP_7_2, GPIO_GP_7_3,
- GPIO_GP_7_4, GPIO_GP_7_5, GPIO_GP_7_6, GPIO_GP_7_7,
- GPIO_GP_7_8, GPIO_GP_7_9, GPIO_GP_7_10, GPIO_GP_7_11,
- GPIO_GP_7_12, GPIO_GP_7_13, GPIO_GP_7_14, GPIO_GP_7_15,
- GPIO_GP_7_16, GPIO_GP_7_17, GPIO_GP_7_18, GPIO_GP_7_19,
- GPIO_GP_7_20, GPIO_GP_7_21, GPIO_GP_7_22, GPIO_GP_7_23,
- GPIO_GP_7_24, GPIO_GP_7_25,
-
- GPIO_FN_EX_CS0_N, GPIO_FN_RD_N, GPIO_FN_AUDIO_CLKA,
- GPIO_FN_VI0_CLK, GPIO_FN_VI0_DATA0_VI0_B0,
- GPIO_FN_VI0_DATA0_VI0_B1, GPIO_FN_VI0_DATA0_VI0_B2,
- GPIO_FN_VI0_DATA0_VI0_B4, GPIO_FN_VI0_DATA0_VI0_B5,
- GPIO_FN_VI0_DATA0_VI0_B6, GPIO_FN_VI0_DATA0_VI0_B7,
- GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,
-
- /* IPSR0 */
- GPIO_FN_D0, GPIO_FN_D1, GPIO_FN_D2, GPIO_FN_D3, GPIO_FN_D4, GPIO_FN_D5,
- GPIO_FN_D6, GPIO_FN_D7, GPIO_FN_D8, GPIO_FN_D9, GPIO_FN_D10,
- GPIO_FN_D11, GPIO_FN_D12, GPIO_FN_D13, GPIO_FN_D14, GPIO_FN_D15,
- GPIO_FN_A0, GPIO_FN_ATAWR0_N_C, GPIO_FN_MSIOF0_SCK_B,
- GPIO_FN_SCL0_C, GPIO_FN_PWM2_B,
- GPIO_FN_A1, GPIO_FN_MSIOF0_SYNC_B, GPIO_FN_A2, GPIO_FN_MSIOF0_SS1_B,
- GPIO_FN_A3, GPIO_FN_MSIOF0_SS2_B, GPIO_FN_A4, GPIO_FN_MSIOF0_TXD_B,
- GPIO_FN_A5, GPIO_FN_MSIOF0_RXD_B, GPIO_FN_A6, GPIO_FN_MSIOF1_SCK,
-
- /* IPSR1 */
- GPIO_FN_A7, GPIO_FN_MSIOF1_SYNC, GPIO_FN_A8,
- GPIO_FN_MSIOF1_SS1, GPIO_FN_SCL0,
- GPIO_FN_A9, GPIO_FN_MSIOF1_SS2, GPIO_FN_SDA0,
- GPIO_FN_A10, GPIO_FN_MSIOF1_TXD, GPIO_FN_MSIOF1_TXD_D,
- GPIO_FN_A11, GPIO_FN_MSIOF1_RXD, GPIO_FN_SCL3_D, GPIO_FN_MSIOF1_RXD_D,
- GPIO_FN_A12, GPIO_FN_FMCLK, GPIO_FN_SDA3_D, GPIO_FN_MSIOF1_SCK_D,
- GPIO_FN_A13, GPIO_FN_ATAG0_N_C, GPIO_FN_BPFCLK, GPIO_FN_MSIOF1_SS1_D,
- GPIO_FN_A14, GPIO_FN_ATADIR0_N_C, GPIO_FN_FMIN,
- GPIO_FN_FMIN_C, GPIO_FN_MSIOF1_SYNC_D,
- GPIO_FN_A15, GPIO_FN_BPFCLK_C,
- GPIO_FN_A16, GPIO_FN_DREQ2_B, GPIO_FN_FMCLK_C, GPIO_FN_SCIFA1_SCK_B,
- GPIO_FN_A17, GPIO_FN_DACK2_B, GPIO_FN_SDA0_C,
- GPIO_FN_A18, GPIO_FN_DREQ1, GPIO_FN_SCIFA1_RXD_C, GPIO_FN_SCIFB1_RXD_C,
-
- /* IPSR2 */
- GPIO_FN_A19, GPIO_FN_DACK1, GPIO_FN_SCIFA1_TXD_C,
- GPIO_FN_SCIFB1_TXD_C, GPIO_FN_SCIFB1_SCK_B,
- GPIO_FN_A20, GPIO_FN_SPCLK,
- GPIO_FN_A21, GPIO_FN_ATAWR0_N_B, GPIO_FN_MOSI_IO0,
- GPIO_FN_A22, GPIO_FN_MISO_IO1, GPIO_FN_FMCLK_B,
- GPIO_FN_TX0, GPIO_FN_SCIFA0_TXD,
- GPIO_FN_A23, GPIO_FN_IO2, GPIO_FN_BPFCLK_B,
- GPIO_FN_RX0, GPIO_FN_SCIFA0_RXD,
- GPIO_FN_A24, GPIO_FN_DREQ2, GPIO_FN_IO3,
- GPIO_FN_TX1, GPIO_FN_SCIFA1_TXD,
- GPIO_FN_A25, GPIO_FN_DACK2, GPIO_FN_SSL, GPIO_FN_DREQ1_C,
- GPIO_FN_RX1, GPIO_FN_SCIFA1_RXD,
- GPIO_FN_CS0_N, GPIO_FN_ATAG0_N_B, GPIO_FN_SCL1,
- GPIO_FN_CS1_N_A26, GPIO_FN_ATADIR0_N_B, GPIO_FN_SDA1,
- GPIO_FN_EX_CS1_N, GPIO_FN_MSIOF2_SCK,
- GPIO_FN_EX_CS2_N, GPIO_FN_ATAWR0_N, GPIO_FN_MSIOF2_SYNC,
- GPIO_FN_EX_CS3_N, GPIO_FN_ATADIR0_N, GPIO_FN_MSIOF2_TXD,
- GPIO_FN_ATAG0_N, GPIO_FN_EX_WAIT1,
-
- /* IPSR3 */
- GPIO_FN_EX_CS4_N, GPIO_FN_ATARD0_N,
- GPIO_FN_MSIOF2_RXD, GPIO_FN_EX_WAIT2,
- GPIO_FN_EX_CS5_N, GPIO_FN_ATACS00_N, GPIO_FN_MSIOF2_SS1,
- GPIO_FN_HRX1_B, GPIO_FN_SCIFB1_RXD_B,
- GPIO_FN_PWM1, GPIO_FN_TPU_TO1,
- GPIO_FN_BS_N, GPIO_FN_ATACS10_N, GPIO_FN_MSIOF2_SS2,
- GPIO_FN_HTX1_B, GPIO_FN_SCIFB1_TXD_B,
- GPIO_FN_PWM2, GPIO_FN_TPU_TO2,
- GPIO_FN_RD_WR_N, GPIO_FN_HRX2_B, GPIO_FN_FMIN_B,
- GPIO_FN_SCIFB0_RXD_B, GPIO_FN_DREQ1_D,
- GPIO_FN_WE0_N, GPIO_FN_HCTS2_N_B, GPIO_FN_SCIFB0_TXD_B,
- GPIO_FN_WE1_N, GPIO_FN_ATARD0_N_B,
- GPIO_FN_HTX2_B, GPIO_FN_SCIFB0_RTS_N_B,
- GPIO_FN_EX_WAIT0, GPIO_FN_HRTS2_N_B, GPIO_FN_SCIFB0_CTS_N_B,
- GPIO_FN_DREQ0, GPIO_FN_PWM3, GPIO_FN_TPU_TO3,
- GPIO_FN_DACK0, GPIO_FN_DRACK0, GPIO_FN_REMOCON,
- GPIO_FN_SPEEDIN, GPIO_FN_HSCK0_C, GPIO_FN_HSCK2_C,
- GPIO_FN_SCIFB0_SCK_B, GPIO_FN_SCIFB2_SCK_B,
- GPIO_FN_DREQ2_C, GPIO_FN_HTX2_D,
- GPIO_FN_SSI_SCK0129, GPIO_FN_HRX0_C, GPIO_FN_HRX2_C,
- GPIO_FN_SCIFB0_RXD_C, GPIO_FN_SCIFB2_RXD_C,
- GPIO_FN_SSI_WS0129, GPIO_FN_HTX0_C, GPIO_FN_HTX2_C,
- GPIO_FN_SCIFB0_TXD_C, GPIO_FN_SCIFB2_TXD_C,
-
- /* IPSR4 */
- GPIO_FN_SSI_SDATA0, GPIO_FN_SCL0_B,
- GPIO_FN_SCL7_B, GPIO_FN_MSIOF2_SCK_C,
- GPIO_FN_SSI_SCK1, GPIO_FN_SDA0_B, GPIO_FN_SDA7_B,
- GPIO_FN_MSIOF2_SYNC_C, GPIO_FN_GLO_I0_D,
- GPIO_FN_SSI_WS1, GPIO_FN_SCL1_B, GPIO_FN_SCL8_B,
- GPIO_FN_MSIOF2_TXD_C, GPIO_FN_GLO_I1_D,
- GPIO_FN_SSI_SDATA1, GPIO_FN_SDA1_B,
- GPIO_FN_SDA8_B, GPIO_FN_MSIOF2_RXD_C,
- GPIO_FN_SSI_SCK2, GPIO_FN_SCL2, GPIO_FN_GPS_CLK_B,
- GPIO_FN_GLO_Q0_D, GPIO_FN_HSCK1_E,
- GPIO_FN_SSI_WS2, GPIO_FN_SDA2, GPIO_FN_GPS_SIGN_B,
- GPIO_FN_RX2_E, GPIO_FN_GLO_Q1_D, GPIO_FN_HCTS1_N_E,
- GPIO_FN_SSI_SDATA2, GPIO_FN_GPS_MAG_B,
- GPIO_FN_TX2_E, GPIO_FN_HRTS1_N_E,
- GPIO_FN_SSI_SCK34, GPIO_FN_SSI_WS34, GPIO_FN_SSI_SDATA3,
- GPIO_FN_SSI_SCK4, GPIO_FN_GLO_SS_D,
- GPIO_FN_SSI_WS4, GPIO_FN_GLO_RFON_D,
- GPIO_FN_SSI_SDATA4, GPIO_FN_MSIOF2_SCK_D,
- GPIO_FN_SSI_SCK5, GPIO_FN_MSIOF1_SCK_C,
- GPIO_FN_TS_SDATA0, GPIO_FN_GLO_I0,
- GPIO_FN_MSIOF2_SYNC_D, GPIO_FN_VI1_R2_B,
-
- /* IPSR5 */
- GPIO_FN_SSI_WS5, GPIO_FN_MSIOF1_SYNC_C, GPIO_FN_TS_SCK0,
- GPIO_FN_GLO_I1, GPIO_FN_MSIOF2_TXD_D, GPIO_FN_VI1_R3_B,
- GPIO_FN_SSI_SDATA5, GPIO_FN_MSIOF1_TXD_C, GPIO_FN_TS_SDEN0,
- GPIO_FN_GLO_Q0, GPIO_FN_MSIOF2_SS1_D, GPIO_FN_VI1_R4_B,
- GPIO_FN_SSI_SCK6, GPIO_FN_MSIOF1_RXD_C, GPIO_FN_TS_SPSYNC0,
- GPIO_FN_GLO_Q1, GPIO_FN_MSIOF2_RXD_D, GPIO_FN_VI1_R5_B,
- GPIO_FN_SSI_WS6, GPIO_FN_GLO_SCLK,
- GPIO_FN_MSIOF2_SS2_D, GPIO_FN_VI1_R6_B,
- GPIO_FN_SSI_SDATA6, GPIO_FN_STP_IVCXO27_0_B,
- GPIO_FN_GLO_SDATA, GPIO_FN_VI1_R7_B,
- GPIO_FN_SSI_SCK78, GPIO_FN_STP_ISCLK_0_B, GPIO_FN_GLO_SS,
- GPIO_FN_SSI_WS78, GPIO_FN_TX0_D, GPIO_FN_STP_ISD_0_B, GPIO_FN_GLO_RFON,
- GPIO_FN_SSI_SDATA7, GPIO_FN_RX0_D, GPIO_FN_STP_ISEN_0_B,
- GPIO_FN_SSI_SDATA8, GPIO_FN_TX1_D, GPIO_FN_STP_ISSYNC_0_B,
- GPIO_FN_SSI_SCK9, GPIO_FN_RX1_D, GPIO_FN_GLO_SCLK_D,
- GPIO_FN_SSI_WS9, GPIO_FN_TX3_D, GPIO_FN_CAN0_TX_D, GPIO_FN_GLO_SDATA_D,
- GPIO_FN_SSI_SDATA9, GPIO_FN_RX3_D, GPIO_FN_CAN0_RX_D,
-
- /* IPSR6 */
- GPIO_FN_AUDIO_CLKB, GPIO_FN_STP_OPWM_0_B, GPIO_FN_MSIOF1_SCK_B,
- GPIO_FN_SCIF_CLK, GPIO_FN_BPFCLK_E,
- GPIO_FN_AUDIO_CLKC, GPIO_FN_SCIFB0_SCK_C, GPIO_FN_MSIOF1_SYNC_B,
- GPIO_FN_RX2, GPIO_FN_SCIFA2_RXD, GPIO_FN_FMIN_E,
- GPIO_FN_AUDIO_CLKOUT, GPIO_FN_MSIOF1_SS1_B,
- GPIO_FN_TX2, GPIO_FN_SCIFA2_TXD,
- GPIO_FN_IRQ0, GPIO_FN_SCIFB1_RXD_D, GPIO_FN_INTC_IRQ0_N,
- GPIO_FN_IRQ1, GPIO_FN_SCIFB1_SCK_C, GPIO_FN_INTC_IRQ1_N,
- GPIO_FN_IRQ2, GPIO_FN_SCIFB1_TXD_D, GPIO_FN_INTC_IRQ2_N,
- GPIO_FN_IRQ3, GPIO_FN_SCL4_C,
- GPIO_FN_MSIOF2_TXD_E, GPIO_FN_INTC_IRQ3_N,
- GPIO_FN_IRQ4, GPIO_FN_HRX1_C, GPIO_FN_SDA4_C,
- GPIO_FN_MSIOF2_RXD_E, GPIO_FN_INTC_IRQ4_N,
- GPIO_FN_IRQ5, GPIO_FN_HTX1_C, GPIO_FN_SCL1_E, GPIO_FN_MSIOF2_SCK_E,
- GPIO_FN_IRQ6, GPIO_FN_HSCK1_C, GPIO_FN_MSIOF1_SS2_B,
- GPIO_FN_SDA1_E, GPIO_FN_MSIOF2_SYNC_E,
- GPIO_FN_IRQ7, GPIO_FN_HCTS1_N_C, GPIO_FN_MSIOF1_TXD_B,
- GPIO_FN_GPS_CLK_C, GPIO_FN_GPS_CLK_D,
- GPIO_FN_IRQ8, GPIO_FN_HRTS1_N_C, GPIO_FN_MSIOF1_RXD_B,
- GPIO_FN_GPS_SIGN_C, GPIO_FN_GPS_SIGN_D,
-
- /* IPSR7 */
- GPIO_FN_IRQ9, GPIO_FN_DU1_DOTCLKIN_B, GPIO_FN_CAN_CLK_D,
- GPIO_FN_GPS_MAG_C, GPIO_FN_SCIF_CLK_B, GPIO_FN_GPS_MAG_D,
- GPIO_FN_DU1_DR0, GPIO_FN_LCDOUT0, GPIO_FN_VI1_DATA0_B, GPIO_FN_TX0_B,
- GPIO_FN_SCIFA0_TXD_B, GPIO_FN_MSIOF2_SCK_B,
- GPIO_FN_DU1_DR1, GPIO_FN_LCDOUT1, GPIO_FN_VI1_DATA1_B, GPIO_FN_RX0_B,
- GPIO_FN_SCIFA0_RXD_B, GPIO_FN_MSIOF2_SYNC_B,
- GPIO_FN_DU1_DR2, GPIO_FN_LCDOUT2, GPIO_FN_SSI_SCK0129_B,
- GPIO_FN_DU1_DR3, GPIO_FN_LCDOUT3, GPIO_FN_SSI_WS0129_B,
- GPIO_FN_DU1_DR4, GPIO_FN_LCDOUT4, GPIO_FN_SSI_SDATA0_B,
- GPIO_FN_DU1_DR5, GPIO_FN_LCDOUT5, GPIO_FN_SSI_SCK1_B,
- GPIO_FN_DU1_DR6, GPIO_FN_LCDOUT6, GPIO_FN_SSI_WS1_B,
- GPIO_FN_DU1_DR7, GPIO_FN_LCDOUT7, GPIO_FN_SSI_SDATA1_B,
- GPIO_FN_DU1_DG0, GPIO_FN_LCDOUT8, GPIO_FN_VI1_DATA2_B, GPIO_FN_TX1_B,
- GPIO_FN_SCIFA1_TXD_B, GPIO_FN_MSIOF2_SS1_B,
- GPIO_FN_DU1_DG1, GPIO_FN_LCDOUT9, GPIO_FN_VI1_DATA3_B, GPIO_FN_RX1_B,
- GPIO_FN_SCIFA1_RXD_B, GPIO_FN_MSIOF2_SS2_B,
- GPIO_FN_DU1_DG2, GPIO_FN_LCDOUT10, GPIO_FN_VI1_DATA4_B,
- GPIO_FN_SCIF1_SCK_B, GPIO_FN_SCIFA1_SCK, GPIO_FN_SSI_SCK78_B,
-
- /* IPSR8 */
- GPIO_FN_DU1_DG3, GPIO_FN_LCDOUT11,
- GPIO_FN_VI1_DATA5_B, GPIO_FN_SSI_WS78_B,
- GPIO_FN_DU1_DG4, GPIO_FN_LCDOUT12, GPIO_FN_VI1_DATA6_B,
- GPIO_FN_HRX0_B, GPIO_FN_SCIFB2_RXD_B, GPIO_FN_SSI_SDATA7_B,
- GPIO_FN_DU1_DG5, GPIO_FN_LCDOUT13, GPIO_FN_VI1_DATA7_B,
- GPIO_FN_HCTS0_N_B, GPIO_FN_SCIFB2_TXD_B, GPIO_FN_SSI_SDATA8_B,
- GPIO_FN_DU1_DG6, GPIO_FN_LCDOUT14, GPIO_FN_HRTS0_N_B,
- GPIO_FN_SCIFB2_CTS_N_B, GPIO_FN_SSI_SCK9_B,
- GPIO_FN_DU1_DG7, GPIO_FN_LCDOUT15, GPIO_FN_HTX0_B,
- GPIO_FN_SCIFB2_RTS_N_B, GPIO_FN_SSI_WS9_B,
- GPIO_FN_DU1_DB0, GPIO_FN_LCDOUT16, GPIO_FN_VI1_CLK_B, GPIO_FN_TX2_B,
- GPIO_FN_SCIFA2_TXD_B, GPIO_FN_MSIOF2_TXD_B,
- GPIO_FN_DU1_DB1, GPIO_FN_LCDOUT17, GPIO_FN_VI1_HSYNC_N_B,
- GPIO_FN_RX2_B, GPIO_FN_SCIFA2_RXD_B, GPIO_FN_MSIOF2_RXD_B,
- GPIO_FN_DU1_DB2, GPIO_FN_LCDOUT18, GPIO_FN_VI1_VSYNC_N_B,
- GPIO_FN_SCIF2_SCK_B, GPIO_FN_SCIFA2_SCK, GPIO_FN_SSI_SDATA9_B,
- GPIO_FN_DU1_DB3, GPIO_FN_LCDOUT19, GPIO_FN_VI1_CLKENB_B,
- GPIO_FN_DU1_DB4, GPIO_FN_LCDOUT20,
- GPIO_FN_VI1_FIELD_B, GPIO_FN_CAN1_RX,
- GPIO_FN_DU1_DB5, GPIO_FN_LCDOUT21, GPIO_FN_TX3,
- GPIO_FN_SCIFA3_TXD, GPIO_FN_CAN1_TX,
-
- /* IPSR9 */
- GPIO_FN_DU1_DB6, GPIO_FN_LCDOUT22, GPIO_FN_SCL3_C,
- GPIO_FN_RX3, GPIO_FN_SCIFA3_RXD,
- GPIO_FN_DU1_DB7, GPIO_FN_LCDOUT23, GPIO_FN_SDA3_C,
- GPIO_FN_SCIF3_SCK, GPIO_FN_SCIFA3_SCK,
- GPIO_FN_DU1_DOTCLKIN, GPIO_FN_QSTVA_QVS,
- GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_QCLK,
- GPIO_FN_DU1_DOTCLKOUT1, GPIO_FN_QSTVB_QVE, GPIO_FN_CAN0_TX,
- GPIO_FN_TX3_B, GPIO_FN_SCL2_B, GPIO_FN_PWM4,
- GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_QSTH_QHS,
- GPIO_FN_DU1_EXVSYNC_DU1_VSYNC, GPIO_FN_QSTB_QHE,
- GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
- GPIO_FN_CAN0_RX, GPIO_FN_RX3_B, GPIO_FN_SDA2_B,
- GPIO_FN_DU1_DISP, GPIO_FN_QPOLA,
- GPIO_FN_DU1_CDE, GPIO_FN_QPOLB, GPIO_FN_PWM4_B,
- GPIO_FN_VI0_CLKENB, GPIO_FN_TX4,
- GPIO_FN_SCIFA4_TXD, GPIO_FN_TS_SDATA0_D,
- GPIO_FN_VI0_FIELD, GPIO_FN_RX4, GPIO_FN_SCIFA4_RXD, GPIO_FN_TS_SCK0_D,
- GPIO_FN_VI0_HSYNC_N, GPIO_FN_TX5,
- GPIO_FN_SCIFA5_TXD, GPIO_FN_TS_SDEN0_D,
- GPIO_FN_VI0_VSYNC_N, GPIO_FN_RX5,
- GPIO_FN_SCIFA5_RXD, GPIO_FN_TS_SPSYNC0_D,
- GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_SCIF3_SCK_B, GPIO_FN_SCIFA3_SCK_B,
- GPIO_FN_VI0_G0, GPIO_FN_SCL8, GPIO_FN_STP_IVCXO27_0_C, GPIO_FN_SCL4,
- GPIO_FN_HCTS2_N, GPIO_FN_SCIFB2_CTS_N, GPIO_FN_ATAWR1_N,
-
- /* IPSR10 */
- GPIO_FN_VI0_G1, GPIO_FN_SDA8, GPIO_FN_STP_ISCLK_0_C, GPIO_FN_SDA4,
- GPIO_FN_HRTS2_N, GPIO_FN_SCIFB2_RTS_N, GPIO_FN_ATADIR1_N,
- GPIO_FN_VI0_G2, GPIO_FN_VI2_HSYNC_N, GPIO_FN_STP_ISD_0_C,
- GPIO_FN_SCL3_B, GPIO_FN_HSCK2, GPIO_FN_SCIFB2_SCK, GPIO_FN_ATARD1_N,
- GPIO_FN_VI0_G3, GPIO_FN_VI2_VSYNC_N, GPIO_FN_STP_ISEN_0_C,
- GPIO_FN_SDA3_B, GPIO_FN_HRX2, GPIO_FN_SCIFB2_RXD, GPIO_FN_ATACS01_N,
- GPIO_FN_VI0_G4, GPIO_FN_VI2_CLKENB, GPIO_FN_STP_ISSYNC_0_C,
- GPIO_FN_HTX2, GPIO_FN_SCIFB2_TXD, GPIO_FN_SCIFB0_SCK_D,
- GPIO_FN_VI0_G5, GPIO_FN_VI2_FIELD, GPIO_FN_STP_OPWM_0_C,
- GPIO_FN_FMCLK_D, GPIO_FN_CAN0_TX_E,
- GPIO_FN_HTX1_D, GPIO_FN_SCIFB0_TXD_D,
- GPIO_FN_VI0_G6, GPIO_FN_VI2_CLK, GPIO_FN_BPFCLK_D,
- GPIO_FN_VI0_G7, GPIO_FN_VI2_DATA0, GPIO_FN_FMIN_D,
- GPIO_FN_VI0_R0, GPIO_FN_VI2_DATA1, GPIO_FN_GLO_I0_B,
- GPIO_FN_TS_SDATA0_C, GPIO_FN_ATACS11_N,
- GPIO_FN_VI0_R1, GPIO_FN_VI2_DATA2, GPIO_FN_GLO_I1_B,
- GPIO_FN_TS_SCK0_C, GPIO_FN_ATAG1_N,
- GPIO_FN_VI0_R2, GPIO_FN_VI2_DATA3,
- GPIO_FN_GLO_Q0_B, GPIO_FN_TS_SDEN0_C,
- GPIO_FN_VI0_R3, GPIO_FN_VI2_DATA4,
- GPIO_FN_GLO_Q1_B, GPIO_FN_TS_SPSYNC0_C,
- GPIO_FN_VI0_R4, GPIO_FN_VI2_DATA5, GPIO_FN_GLO_SCLK_B,
- GPIO_FN_TX0_C, GPIO_FN_SCL1_D,
-
- /* IPSR11 */
- GPIO_FN_VI0_R5, GPIO_FN_VI2_DATA6, GPIO_FN_GLO_SDATA_B,
- GPIO_FN_RX0_C, GPIO_FN_SDA1_D,
- GPIO_FN_VI0_R6, GPIO_FN_VI2_DATA7, GPIO_FN_GLO_SS_B,
- GPIO_FN_TX1_C, GPIO_FN_SCL4_B,
- GPIO_FN_VI0_R7, GPIO_FN_GLO_RFON_B, GPIO_FN_RX1_C, GPIO_FN_CAN0_RX_E,
- GPIO_FN_SDA4_B, GPIO_FN_HRX1_D, GPIO_FN_SCIFB0_RXD_D,
- GPIO_FN_VI1_HSYNC_N, GPIO_FN_AVB_RXD0, GPIO_FN_TS_SDATA0_B,
- GPIO_FN_TX4_B, GPIO_FN_SCIFA4_TXD_B,
- GPIO_FN_VI1_VSYNC_N, GPIO_FN_AVB_RXD1, GPIO_FN_TS_SCK0_B,
- GPIO_FN_RX4_B, GPIO_FN_SCIFA4_RXD_B,
- GPIO_FN_VI1_CLKENB, GPIO_FN_AVB_RXD2, GPIO_FN_TS_SDEN0_B,
- GPIO_FN_VI1_FIELD, GPIO_FN_AVB_RXD3, GPIO_FN_TS_SPSYNC0_B,
- GPIO_FN_VI1_CLK, GPIO_FN_AVB_RXD4, GPIO_FN_VI1_DATA0, GPIO_FN_AVB_RXD5,
- GPIO_FN_VI1_DATA1, GPIO_FN_AVB_RXD6,
- GPIO_FN_VI1_DATA2, GPIO_FN_AVB_RXD7,
- GPIO_FN_VI1_DATA3, GPIO_FN_AVB_RX_ER,
- GPIO_FN_VI1_DATA4, GPIO_FN_AVB_MDIO,
- GPIO_FN_VI1_DATA5, GPIO_FN_AVB_RX_DV,
- GPIO_FN_VI1_DATA6, GPIO_FN_AVB_MAGIC,
- GPIO_FN_VI1_DATA7, GPIO_FN_AVB_MDC,
- GPIO_FN_ETH_MDIO, GPIO_FN_AVB_RX_CLK, GPIO_FN_SCL2_C,
- GPIO_FN_ETH_CRS_DV, GPIO_FN_AVB_LINK, GPIO_FN_SDA2_C,
-
- /* IPSR12 */
- GPIO_FN_ETH_RX_ER, GPIO_FN_AVB_CRS, GPIO_FN_SCL3, GPIO_FN_SCL7,
- GPIO_FN_ETH_RXD0, GPIO_FN_AVB_PHY_INT, GPIO_FN_SDA3, GPIO_FN_SDA7,
- GPIO_FN_ETH_RXD1, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN0_TX_C,
- GPIO_FN_SCL2_D, GPIO_FN_MSIOF1_RXD_E,
- GPIO_FN_ETH_LINK, GPIO_FN_AVB_TXD0, GPIO_FN_CAN0_RX_C,
- GPIO_FN_SDA2_D, GPIO_FN_MSIOF1_SCK_E,
- GPIO_FN_ETH_REFCLK, GPIO_FN_AVB_TXD1, GPIO_FN_SCIFA3_RXD_B,
- GPIO_FN_CAN1_RX_C, GPIO_FN_MSIOF1_SYNC_E,
- GPIO_FN_ETH_TXD1, GPIO_FN_AVB_TXD2, GPIO_FN_SCIFA3_TXD_B,
- GPIO_FN_CAN1_TX_C, GPIO_FN_MSIOF1_TXD_E,
- GPIO_FN_ETH_TX_EN, GPIO_FN_AVB_TXD3,
- GPIO_FN_TCLK1_B, GPIO_FN_CAN_CLK_B,
- GPIO_FN_ETH_MAGIC, GPIO_FN_AVB_TXD4, GPIO_FN_IETX_C,
- GPIO_FN_ETH_TXD0, GPIO_FN_AVB_TXD5, GPIO_FN_IECLK_C,
- GPIO_FN_ETH_MDC, GPIO_FN_AVB_TXD6, GPIO_FN_IERX_C,
- GPIO_FN_STP_IVCXO27_0, GPIO_FN_AVB_TXD7, GPIO_FN_SCIFB2_TXD_D,
- GPIO_FN_ADIDATA_B, GPIO_FN_MSIOF0_SYNC_C,
- GPIO_FN_STP_ISCLK_0, GPIO_FN_AVB_TX_EN, GPIO_FN_SCIFB2_RXD_D,
- GPIO_FN_ADICS_SAMP_B, GPIO_FN_MSIOF0_SCK_C,
-
- /* IPSR13 */
- GPIO_FN_STP_ISD_0, GPIO_FN_AVB_TX_ER, GPIO_FN_SCIFB2_SCK_C,
- GPIO_FN_ADICLK_B, GPIO_FN_MSIOF0_SS1_C,
- GPIO_FN_STP_ISEN_0, GPIO_FN_AVB_TX_CLK,
- GPIO_FN_ADICHS0_B, GPIO_FN_MSIOF0_SS2_C,
- GPIO_FN_STP_ISSYNC_0, GPIO_FN_AVB_COL,
- GPIO_FN_ADICHS1_B, GPIO_FN_MSIOF0_RXD_C,
- GPIO_FN_STP_OPWM_0, GPIO_FN_AVB_GTX_CLK, GPIO_FN_PWM0_B,
- GPIO_FN_ADICHS2_B, GPIO_FN_MSIOF0_TXD_C,
- GPIO_FN_SD0_CLK, GPIO_FN_SPCLK_B, GPIO_FN_SD0_CMD, GPIO_FN_MOSI_IO0_B,
- GPIO_FN_SD0_DATA0, GPIO_FN_MISO_IO1_B,
- GPIO_FN_SD0_DATA1, GPIO_FN_IO2_B,
- GPIO_FN_SD0_DATA2, GPIO_FN_IO3_B, GPIO_FN_SD0_DATA3, GPIO_FN_SSL_B,
- GPIO_FN_SD0_CD, GPIO_FN_MMC_D6_B,
- GPIO_FN_SIM0_RST_B, GPIO_FN_CAN0_RX_F,
- GPIO_FN_SCIFA5_TXD_B, GPIO_FN_TX3_C,
- GPIO_FN_SD0_WP, GPIO_FN_MMC_D7_B, GPIO_FN_SIM0_D_B, GPIO_FN_CAN0_TX_F,
- GPIO_FN_SCIFA5_RXD_B, GPIO_FN_RX3_C,
- GPIO_FN_SD1_CMD, GPIO_FN_REMOCON_B,
- GPIO_FN_SD1_DATA0, GPIO_FN_SPEEDIN_B,
- GPIO_FN_SD1_DATA1, GPIO_FN_IETX_B, GPIO_FN_SD1_DATA2, GPIO_FN_IECLK_B,
- GPIO_FN_SD1_DATA3, GPIO_FN_IERX_B,
- GPIO_FN_SD1_CD, GPIO_FN_PWM0, GPIO_FN_TPU_TO0, GPIO_FN_SCL1_C,
-
- /* IPSR14 */
- GPIO_FN_SD1_WP, GPIO_FN_PWM1_B, GPIO_FN_SDA1_C,
- GPIO_FN_SD2_CLK, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CMD, GPIO_FN_MMC_CMD,
- GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D1,
- GPIO_FN_SD2_DATA2, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D3,
- GPIO_FN_SD2_CD, GPIO_FN_MMC_D4, GPIO_FN_SCL8_C,
- GPIO_FN_TX5_B, GPIO_FN_SCIFA5_TXD_C,
- GPIO_FN_SD2_WP, GPIO_FN_MMC_D5, GPIO_FN_SDA8_C,
- GPIO_FN_RX5_B, GPIO_FN_SCIFA5_RXD_C,
- GPIO_FN_MSIOF0_SCK, GPIO_FN_RX2_C, GPIO_FN_ADIDATA,
- GPIO_FN_VI1_CLK_C, GPIO_FN_VI1_G0_B,
- GPIO_FN_MSIOF0_SYNC, GPIO_FN_TX2_C, GPIO_FN_ADICS_SAMP,
- GPIO_FN_VI1_CLKENB_C, GPIO_FN_VI1_G1_B,
- GPIO_FN_MSIOF0_TXD, GPIO_FN_ADICLK,
- GPIO_FN_VI1_FIELD_C, GPIO_FN_VI1_G2_B,
- GPIO_FN_MSIOF0_RXD, GPIO_FN_ADICHS0,
- GPIO_FN_VI1_DATA0_C, GPIO_FN_VI1_G3_B,
- GPIO_FN_MSIOF0_SS1, GPIO_FN_MMC_D6, GPIO_FN_ADICHS1, GPIO_FN_TX0_E,
- GPIO_FN_VI1_HSYNC_N_C, GPIO_FN_SCL7_C, GPIO_FN_VI1_G4_B,
- GPIO_FN_MSIOF0_SS2, GPIO_FN_MMC_D7, GPIO_FN_ADICHS2, GPIO_FN_RX0_E,
- GPIO_FN_VI1_VSYNC_N_C, GPIO_FN_SDA7_C, GPIO_FN_VI1_G5_B,
-
- /* IPSR15 */
- GPIO_FN_SIM0_RST, GPIO_FN_IETX, GPIO_FN_CAN1_TX_D,
- GPIO_FN_SIM0_CLK, GPIO_FN_IECLK, GPIO_FN_CAN_CLK_C,
- GPIO_FN_SIM0_D, GPIO_FN_IERX, GPIO_FN_CAN1_RX_D,
- GPIO_FN_GPS_CLK, GPIO_FN_DU1_DOTCLKIN_C, GPIO_FN_AUDIO_CLKB_B,
- GPIO_FN_PWM5_B, GPIO_FN_SCIFA3_TXD_C,
- GPIO_FN_GPS_SIGN, GPIO_FN_TX4_C, GPIO_FN_SCIFA4_TXD_C, GPIO_FN_PWM5,
- GPIO_FN_VI1_G6_B, GPIO_FN_SCIFA3_RXD_C,
- GPIO_FN_GPS_MAG, GPIO_FN_RX4_C, GPIO_FN_SCIFA4_RXD_C, GPIO_FN_PWM6,
- GPIO_FN_VI1_G7_B, GPIO_FN_SCIFA3_SCK_C,
- GPIO_FN_HCTS0_N, GPIO_FN_SCIFB0_CTS_N, GPIO_FN_GLO_I0_C,
- GPIO_FN_TCLK1, GPIO_FN_VI1_DATA1_C,
- GPIO_FN_HRTS0_N, GPIO_FN_SCIFB0_RTS_N,
- GPIO_FN_GLO_I1_C, GPIO_FN_VI1_DATA2_C,
- GPIO_FN_HSCK0, GPIO_FN_SCIFB0_SCK, GPIO_FN_GLO_Q0_C, GPIO_FN_CAN_CLK,
- GPIO_FN_TCLK2, GPIO_FN_VI1_DATA3_C,
- GPIO_FN_HRX0, GPIO_FN_SCIFB0_RXD, GPIO_FN_GLO_Q1_C,
- GPIO_FN_CAN0_RX_B, GPIO_FN_VI1_DATA4_C,
- GPIO_FN_HTX0, GPIO_FN_SCIFB0_TXD, GPIO_FN_GLO_SCLK_C,
- GPIO_FN_CAN0_TX_B, GPIO_FN_VI1_DATA5_C,
-
- /* IPSR16 */
- GPIO_FN_HRX1, GPIO_FN_SCIFB1_RXD, GPIO_FN_VI1_R0_B,
- GPIO_FN_GLO_SDATA_C, GPIO_FN_VI1_DATA6_C,
- GPIO_FN_HTX1, GPIO_FN_SCIFB1_TXD, GPIO_FN_VI1_R1_B,
- GPIO_FN_GLO_SS_C, GPIO_FN_VI1_DATA7_C,
- GPIO_FN_HSCK1, GPIO_FN_SCIFB1_SCK, GPIO_FN_MLB_CK, GPIO_FN_GLO_RFON_C,
- GPIO_FN_HCTS1_N, GPIO_FN_SCIFB1_CTS_N,
- GPIO_FN_MLB_SIG, GPIO_FN_CAN1_TX_B,
- GPIO_FN_HRTS1_N, GPIO_FN_SCIFB1_RTS_N,
- GPIO_FN_MLB_DAT, GPIO_FN_CAN1_RX_B,
-};
-
-#endif /* __ASM_R8A7793_H__ */
diff --git a/arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h b/arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h
deleted file mode 100644
index 8a002a8..0000000
--- a/arch/arm/mach-rmobile/include/mach/r8a7794-gpio.h
+++ /dev/null
@@ -1,276 +0,0 @@
-#ifndef __ASM_R8A7794_H__
-#define __ASM_R8A7794_H__
-
-/* Pin Function Controller:
- * GPIO_FN_xx - GPIO used to select pin function
- * GPIO_GP_x_x - GPIO mapped to real I/O pin on CPU
- */
-enum {
- GPIO_GP_0_0, GPIO_GP_0_1, GPIO_GP_0_2, GPIO_GP_0_3,
- GPIO_GP_0_4, GPIO_GP_0_5, GPIO_GP_0_6, GPIO_GP_0_7,
- GPIO_GP_0_8, GPIO_GP_0_9, GPIO_GP_0_10, GPIO_GP_0_11,
- GPIO_GP_0_12, GPIO_GP_0_13, GPIO_GP_0_14, GPIO_GP_0_15,
- GPIO_GP_0_16, GPIO_GP_0_17, GPIO_GP_0_18, GPIO_GP_0_19,
- GPIO_GP_0_20, GPIO_GP_0_21, GPIO_GP_0_22, GPIO_GP_0_23,
- GPIO_GP_0_24, GPIO_GP_0_25, GPIO_GP_0_26, GPIO_GP_0_27,
- GPIO_GP_0_28, GPIO_GP_0_29, GPIO_GP_0_30, GPIO_GP_0_31,
-
- GPIO_GP_1_0, GPIO_GP_1_1, GPIO_GP_1_2, GPIO_GP_1_3,
- GPIO_GP_1_4, GPIO_GP_1_5, GPIO_GP_1_6, GPIO_GP_1_7,
- GPIO_GP_1_8, GPIO_GP_1_9, GPIO_GP_1_10, GPIO_GP_1_11,
- GPIO_GP_1_12, GPIO_GP_1_13, GPIO_GP_1_14, GPIO_GP_1_15,
- GPIO_GP_1_16, GPIO_GP_1_17, GPIO_GP_1_18, GPIO_GP_1_19,
- GPIO_GP_1_20, GPIO_GP_1_21, GPIO_GP_1_22, GPIO_GP_1_23,
- GPIO_GP_1_24, GPIO_GP_1_25,
-
- GPIO_GP_2_0, GPIO_GP_2_1, GPIO_GP_2_2, GPIO_GP_2_3,
- GPIO_GP_2_4, GPIO_GP_2_5, GPIO_GP_2_6, GPIO_GP_2_7,
- GPIO_GP_2_8, GPIO_GP_2_9, GPIO_GP_2_10, GPIO_GP_2_11,
- GPIO_GP_2_12, GPIO_GP_2_13, GPIO_GP_2_14, GPIO_GP_2_15,
- GPIO_GP_2_16, GPIO_GP_2_17, GPIO_GP_2_18, GPIO_GP_2_19,
- GPIO_GP_2_20, GPIO_GP_2_21, GPIO_GP_2_22, GPIO_GP_2_23,
- GPIO_GP_2_24, GPIO_GP_2_25, GPIO_GP_2_26, GPIO_GP_2_27,
- GPIO_GP_2_28, GPIO_GP_2_29, GPIO_GP_2_30, GPIO_GP_2_31,
-
- GPIO_GP_3_0, GPIO_GP_3_1, GPIO_GP_3_2, GPIO_GP_3_3,
- GPIO_GP_3_4, GPIO_GP_3_5, GPIO_GP_3_6, GPIO_GP_3_7,
- GPIO_GP_3_8, GPIO_GP_3_9, GPIO_GP_3_10, GPIO_GP_3_11,
- GPIO_GP_3_12, GPIO_GP_3_13, GPIO_GP_3_14, GPIO_GP_3_15,
- GPIO_GP_3_16, GPIO_GP_3_17, GPIO_GP_3_18, GPIO_GP_3_19,
- GPIO_GP_3_20, GPIO_GP_3_21, GPIO_GP_3_22, GPIO_GP_3_23,
- GPIO_GP_3_24, GPIO_GP_3_25, GPIO_GP_3_26, GPIO_GP_3_27,
- GPIO_GP_3_28, GPIO_GP_3_29, GPIO_GP_3_30, GPIO_GP_3_31,
-
- GPIO_GP_4_0, GPIO_GP_4_1, GPIO_GP_4_2, GPIO_GP_4_3,
- GPIO_GP_4_4, GPIO_GP_4_5, GPIO_GP_4_6, GPIO_GP_4_7,
- GPIO_GP_4_8, GPIO_GP_4_9, GPIO_GP_4_10, GPIO_GP_4_11,
- GPIO_GP_4_12, GPIO_GP_4_13, GPIO_GP_4_14, GPIO_GP_4_15,
- GPIO_GP_4_16, GPIO_GP_4_17, GPIO_GP_4_18, GPIO_GP_4_19,
- GPIO_GP_4_20, GPIO_GP_4_21, GPIO_GP_4_22, GPIO_GP_4_23,
- GPIO_GP_4_24, GPIO_GP_4_25, GPIO_GP_4_26, GPIO_GP_4_27,
- GPIO_GP_4_28, GPIO_GP_4_29, GPIO_GP_4_30, GPIO_GP_4_31,
-
- GPIO_GP_5_0, GPIO_GP_5_1, GPIO_GP_5_2, GPIO_GP_5_3,
- GPIO_GP_5_4, GPIO_GP_5_5, GPIO_GP_5_6, GPIO_GP_5_7,
- GPIO_GP_5_8, GPIO_GP_5_9, GPIO_GP_5_10, GPIO_GP_5_11,
- GPIO_GP_5_12, GPIO_GP_5_13, GPIO_GP_5_14, GPIO_GP_5_15,
- GPIO_GP_5_16, GPIO_GP_5_17, GPIO_GP_5_18, GPIO_GP_5_19,
- GPIO_GP_5_20, GPIO_GP_5_21, GPIO_GP_5_22, GPIO_GP_5_23,
- GPIO_GP_5_24, GPIO_GP_5_25, GPIO_GP_5_26, GPIO_GP_5_27,
-
- GPIO_GP_6_0, GPIO_GP_6_1, GPIO_GP_6_2, GPIO_GP_6_3,
- GPIO_GP_6_4, GPIO_GP_6_5, GPIO_GP_6_6, GPIO_GP_6_7,
- GPIO_GP_6_8, GPIO_GP_6_9, GPIO_GP_6_10, GPIO_GP_6_11,
- GPIO_GP_6_12, GPIO_GP_6_13, GPIO_GP_6_14, GPIO_GP_6_15,
- GPIO_GP_6_16, GPIO_GP_6_17, GPIO_GP_6_18, GPIO_GP_6_19,
- GPIO_GP_6_20, GPIO_GP_6_21, GPIO_GP_6_22, GPIO_GP_6_23,
- GPIO_GP_6_24, GPIO_GP_6_25,
-
- GPIO_FN_A2, GPIO_FN_WE0_N, GPIO_FN_WE1_N, GPIO_FN_DACK0,
- GPIO_FN_USB0_PWEN, GPIO_FN_USB0_OVC, GPIO_FN_USB1_PWEN,
- GPIO_FN_USB1_OVC, GPIO_FN_SD0_CLK, GPIO_FN_SD0_CMD,
- GPIO_FN_SD0_DATA0, GPIO_FN_SD0_DATA1, GPIO_FN_SD0_DATA2,
- GPIO_FN_SD0_DATA3, GPIO_FN_SD0_CD, GPIO_FN_SD0_WP,
- GPIO_FN_SD1_CLK, GPIO_FN_SD1_CMD, GPIO_FN_SD1_DATA0,
- GPIO_FN_SD1_DATA1, GPIO_FN_SD1_DATA2, GPIO_FN_SD1_DATA3,
-
- /* IPSR0 */
- GPIO_FN_SD1_CD, GPIO_FN_CAN0_RX, GPIO_FN_SD1_WP, GPIO_FN_IRQ7,
- GPIO_FN_CAN0_TX, GPIO_FN_MMC_CLK, GPIO_FN_SD2_CLK, GPIO_FN_MMC_CMD,
- GPIO_FN_SD2_CMD, GPIO_FN_MMC_D0, GPIO_FN_SD2_DATA0, GPIO_FN_MMC_D1,
- GPIO_FN_SD2_DATA1, GPIO_FN_MMC_D2, GPIO_FN_SD2_DATA2,
- GPIO_FN_MMC_D3, GPIO_FN_SD2_DATA3, GPIO_FN_MMC_D4,
- GPIO_FN_SD2_CD, GPIO_FN_MMC_D5, GPIO_FN_SD2_WP, GPIO_FN_MMC_D6,
- GPIO_FN_SCIF0_RXD, GPIO_FN_I2C2_SCL_B, GPIO_FN_CAN1_RX, GPIO_FN_MMC_D7,
- GPIO_FN_SCIF0_TXD, GPIO_FN_I2C2_SDA_B, GPIO_FN_CAN1_TX, GPIO_FN_D0,
- GPIO_FN_SCIFA3_SCK_B, GPIO_FN_IRQ4, GPIO_FN_D1, GPIO_FN_SCIFA3_RXD_B,
- GPIO_FN_D2, GPIO_FN_SCIFA3_TXD_B, GPIO_FN_D3, GPIO_FN_I2C3_SCL_B,
- GPIO_FN_SCIF5_RXD_B, GPIO_FN_D4, GPIO_FN_I2C3_SDA_B,
- GPIO_FN_SCIF5_TXD_B, GPIO_FN_D5, GPIO_FN_SCIF4_RXD_B,
- GPIO_FN_I2C0_SCL_D,
-
- /*
- * From IPSR1 to IPSR5 have been removed because they does not use.
- */
-
- /* IPSR6 */
- GPIO_FN_DU0_EXVSYNC_DU0_VSYNC, GPIO_FN_QSTB_QHE, GPIO_FN_CC50_STATE28,
- GPIO_FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, GPIO_FN_QCPV_QDE,
- GPIO_FN_CC50_STATE29, GPIO_FN_DU0_DISP, GPIO_FN_QPOLA,
- GPIO_FN_CC50_STATE30, GPIO_FN_DU0_CDE, GPIO_FN_QPOLB,
- GPIO_FN_CC50_STATE31, GPIO_FN_VI0_CLK, GPIO_FN_AVB_RX_CLK,
- GPIO_FN_VI0_DATA0_VI0_B0, GPIO_FN_AVB_RX_DV, GPIO_FN_VI0_DATA1_VI0_B1,
- GPIO_FN_AVB_RXD0, GPIO_FN_VI0_DATA2_VI0_B2, GPIO_FN_AVB_RXD1,
- GPIO_FN_VI0_DATA3_VI0_B3, GPIO_FN_AVB_RXD2, GPIO_FN_VI0_DATA4_VI0_B4,
- GPIO_FN_AVB_RXD3, GPIO_FN_VI0_DATA5_VI0_B5, GPIO_FN_AVB_RXD4,
- GPIO_FN_VI0_DATA6_VI0_B6, GPIO_FN_AVB_RXD5, GPIO_FN_VI0_DATA7_VI0_B7,
- GPIO_FN_AVB_RXD6, GPIO_FN_VI0_CLKENB, GPIO_FN_I2C3_SCL,
- GPIO_FN_SCIFA5_RXD_C, GPIO_FN_IETX_C, GPIO_FN_AVB_RXD7,
- GPIO_FN_VI0_FIELD, GPIO_FN_I2C3_SDA, GPIO_FN_SCIFA5_TXD_C,
- GPIO_FN_IECLK_C, GPIO_FN_AVB_RX_ER, GPIO_FN_VI0_HSYNC_N,
- GPIO_FN_SCIF0_RXD_B, GPIO_FN_I2C0_SCL_C, GPIO_FN_IERX_C,
- GPIO_FN_AVB_COL, GPIO_FN_VI0_VSYNC_N, GPIO_FN_SCIF0_TXD_B,
- GPIO_FN_I2C0_SDA_C, GPIO_FN_AUDIO_CLKOUT_B, GPIO_FN_AVB_TX_EN,
- GPIO_FN_ETH_MDIO, GPIO_FN_VI0_G0, GPIO_FN_MSIOF2_RXD_B,
- GPIO_FN_IIC0_SCL_D, GPIO_FN_AVB_TX_CLK, GPIO_FN_ADIDATA, GPIO_FN_AD_DI,
-
- /* IPSR7 */
- GPIO_FN_ETH_CRS_DV, GPIO_FN_VI0_G1, GPIO_FN_MSIOF2_TXD_B,
- GPIO_FN_IIC0_SDA_D, GPIO_FN_AVB_TXD0, GPIO_FN_ADICS_SAMP, GPIO_FN_AD_DO,
- GPIO_FN_ETH_RX_ER, GPIO_FN_VI0_G2, GPIO_FN_MSIOF2_SCK_B,
- GPIO_FN_CAN0_RX_B, GPIO_FN_AVB_TXD1, GPIO_FN_ADICLK, GPIO_FN_AD_CLK,
- GPIO_FN_ETH_RXD0, GPIO_FN_VI0_G3, GPIO_FN_MSIOF2_SYNC_B,
- GPIO_FN_CAN0_TX_B, GPIO_FN_AVB_TXD2, GPIO_FN_ADICHS0, GPIO_FN_AD_NCS_N,
- GPIO_FN_ETH_RXD1, GPIO_FN_VI0_G4, GPIO_FN_MSIOF2_SS1_B,
- GPIO_FN_SCIF4_RXD_D, GPIO_FN_AVB_TXD3, GPIO_FN_ADICHS1,
- GPIO_FN_ETH_LINK, GPIO_FN_VI0_G5, GPIO_FN_MSIOF2_SS2_B,
- GPIO_FN_SCIF4_TXD_D, GPIO_FN_AVB_TXD4, GPIO_FN_ADICHS2,
- GPIO_FN_ETH_REFCLK, GPIO_FN_VI0_G6, GPIO_FN_SCIF2_SCK_C,
- GPIO_FN_AVB_TXD5, GPIO_FN_SSI_SCK5_B, GPIO_FN_ETH_TXD1, GPIO_FN_VI0_G7,
- GPIO_FN_SCIF2_RXD_C, GPIO_FN_IIC1_SCL_D, GPIO_FN_AVB_TXD6,
- GPIO_FN_SSI_WS5_B, GPIO_FN_ETH_TX_EN, GPIO_FN_VI0_R0,
- GPIO_FN_SCIF2_TXD_C, GPIO_FN_IIC1_SDA_D, GPIO_FN_AVB_TXD7,
- GPIO_FN_SSI_SDATA5_B, GPIO_FN_ETH_MAGIC, GPIO_FN_VI0_R1,
- GPIO_FN_SCIF3_SCK_B, GPIO_FN_AVB_TX_ER, GPIO_FN_SSI_SCK6_B,
- GPIO_FN_ETH_TXD0, GPIO_FN_VI0_R2, GPIO_FN_SCIF3_RXD_B,
- GPIO_FN_I2C4_SCL_E, GPIO_FN_AVB_GTX_CLK, GPIO_FN_SSI_WS6_B,
- GPIO_FN_DREQ0_N, GPIO_FN_SCIFB1_RXD,
-
- /* IPSR8 */
- GPIO_FN_ETH_MDC, GPIO_FN_VI0_R3, GPIO_FN_SCIF3_TXD_B,
- GPIO_FN_I2C4_SDA_E, GPIO_FN_AVB_MDC, GPIO_FN_SSI_SDATA6_B,
- GPIO_FN_HSCIF0_HRX, GPIO_FN_VI0_R4, GPIO_FN_I2C1_SCL_C,
- GPIO_FN_AUDIO_CLKA_B, GPIO_FN_AVB_MDIO, GPIO_FN_SSI_SCK78_B,
- GPIO_FN_HSCIF0_HTX, GPIO_FN_VI0_R5, GPIO_FN_I2C1_SDA_C,
- GPIO_FN_AUDIO_CLKB_B, GPIO_FN_AVB_LINK, GPIO_FN_SSI_WS78_B,
- GPIO_FN_HSCIF0_HCTS_N, GPIO_FN_VI0_R6, GPIO_FN_SCIF0_RXD_D,
- GPIO_FN_I2C0_SCL_E, GPIO_FN_AVB_MAGIC, GPIO_FN_SSI_SDATA7_B,
- GPIO_FN_HSCIF0_HRTS_N, GPIO_FN_VI0_R7, GPIO_FN_SCIF0_TXD_D,
- GPIO_FN_I2C0_SDA_E, GPIO_FN_AVB_PHY_INT, GPIO_FN_SSI_SDATA8_B,
- GPIO_FN_HSCIF0_HSCK, GPIO_FN_SCIF_CLK_B, GPIO_FN_AVB_CRS,
- GPIO_FN_AUDIO_CLKC_B, GPIO_FN_I2C0_SCL, GPIO_FN_SCIF0_RXD_C,
- GPIO_FN_PWM5, GPIO_FN_TCLK1_B, GPIO_FN_AVB_GTXREFCLK, GPIO_FN_CAN1_RX_D,
- GPIO_FN_TPUTO0_B, GPIO_FN_I2C0_SDA, GPIO_FN_SCIF0_TXD_C, GPIO_FN_TPUTO0,
- GPIO_FN_CAN_CLK, GPIO_FN_DVC_MUTE, GPIO_FN_CAN1_TX_D, GPIO_FN_I2C1_SCL,
- GPIO_FN_SCIF4_RXD, GPIO_FN_PWM5_B, GPIO_FN_DU1_DR0, GPIO_FN_RIF1_SYNC_B,
- GPIO_FN_TS_SDATA_D, GPIO_FN_TPUTO1_B, GPIO_FN_I2C1_SDA,
- GPIO_FN_SCIF4_TXD, GPIO_FN_IRQ5, GPIO_FN_DU1_DR1, GPIO_FN_RIF1_CLK_B,
- GPIO_FN_TS_SCK_D, GPIO_FN_BPFCLK_C, GPIO_FN_MSIOF0_RXD,
- GPIO_FN_SCIF5_RXD, GPIO_FN_I2C2_SCL_C, GPIO_FN_DU1_DR2,
- GPIO_FN_RIF1_D0_B, GPIO_FN_TS_SDEN_D, GPIO_FN_FMCLK_C, GPIO_FN_RDS_CLK,
-
- /* IPSR9 */
- GPIO_FN_MSIOF0_TXD, GPIO_FN_SCIF5_TXD, GPIO_FN_I2C2_SDA_C,
- GPIO_FN_DU1_DR3, GPIO_FN_RIF1_D1_B, GPIO_FN_TS_SPSYNC_D, GPIO_FN_FMIN_C,
- GPIO_FN_RDS_DATA, GPIO_FN_MSIOF0_SCK, GPIO_FN_IRQ0, GPIO_FN_TS_SDATA,
- GPIO_FN_DU1_DR4, GPIO_FN_RIF1_SYNC, GPIO_FN_TPUTO1_C,
- GPIO_FN_MSIOF0_SYNC, GPIO_FN_PWM1, GPIO_FN_TS_SCK, GPIO_FN_DU1_DR5,
- GPIO_FN_RIF1_CLK, GPIO_FN_BPFCLK_B, GPIO_FN_MSIOF0_SS1,
- GPIO_FN_SCIFA0_RXD, GPIO_FN_TS_SDEN, GPIO_FN_DU1_DR6, GPIO_FN_RIF1_D0,
- GPIO_FN_FMCLK_B, GPIO_FN_RDS_CLK_B, GPIO_FN_MSIOF0_SS2,
- GPIO_FN_SCIFA0_TXD, GPIO_FN_TS_SPSYNC, GPIO_FN_DU1_DR7, GPIO_FN_RIF1_D1,
- GPIO_FN_FMIN_B, GPIO_FN_RDS_DATA_B, GPIO_FN_HSCIF1_HRX,
- GPIO_FN_I2C4_SCL, GPIO_FN_PWM6, GPIO_FN_DU1_DG0, GPIO_FN_HSCIF1_HTX,
- GPIO_FN_I2C4_SDA, GPIO_FN_TPUTO1, GPIO_FN_DU1_DG1, GPIO_FN_HSCIF1_HSCK,
- GPIO_FN_PWM2, GPIO_FN_IETX, GPIO_FN_DU1_DG2, GPIO_FN_REMOCON_B,
- GPIO_FN_SPEEDIN_B, GPIO_FN_VSP_B, GPIO_FN_HSCIF1_HCTS_N,
- GPIO_FN_SCIFA4_RXD, GPIO_FN_IECLK, GPIO_FN_DU1_DG3, GPIO_FN_SSI_SCK1_B,
- GPIO_FN_CAN_DEBUG_HW_TRIGGER, GPIO_FN_CC50_STATE32,
- GPIO_FN_HSCIF1_HRTS_N, GPIO_FN_SCIFA4_TXD, GPIO_FN_IERX,
- GPIO_FN_DU1_DG4, GPIO_FN_SSI_WS1_B, GPIO_FN_CAN_STEP0,
- GPIO_FN_CC50_STATE33, GPIO_FN_SCIF1_SCK, GPIO_FN_PWM3, GPIO_FN_TCLK2,
- GPIO_FN_DU1_DG5, GPIO_FN_SSI_SDATA1_B, GPIO_FN_CAN_TXCLK,
- GPIO_FN_CC50_STATE34,
-
- /* IPSR10 */
- GPIO_FN_SCIF1_RXD, GPIO_FN_IIC0_SCL, GPIO_FN_DU1_DG6,
- GPIO_FN_SSI_SCK2_B, GPIO_FN_CAN_DEBUGOUT0, GPIO_FN_CC50_STATE35,
- GPIO_FN_SCIF1_TXD, GPIO_FN_IIC0_SDA, GPIO_FN_DU1_DG7, GPIO_FN_SSI_WS2_B,
- GPIO_FN_CAN_DEBUGOUT1, GPIO_FN_CC50_STATE36, GPIO_FN_SCIF2_RXD,
- GPIO_FN_IIC1_SCL, GPIO_FN_DU1_DB0, GPIO_FN_SSI_SDATA2_B,
- GPIO_FN_USB0_EXTLP, GPIO_FN_CAN_DEBUGOUT2, GPIO_FN_CC50_STATE37,
- GPIO_FN_SCIF2_TXD, GPIO_FN_IIC1_SDA, GPIO_FN_DU1_DB1,
- GPIO_FN_SSI_SCK9_B, GPIO_FN_USB0_OVC1, GPIO_FN_CAN_DEBUGOUT3,
- GPIO_FN_CC50_STATE38, GPIO_FN_SCIF2_SCK, GPIO_FN_IRQ1, GPIO_FN_DU1_DB2,
- GPIO_FN_SSI_WS9_B, GPIO_FN_USB0_IDIN, GPIO_FN_CAN_DEBUGOUT4,
- GPIO_FN_CC50_STATE39, GPIO_FN_SCIF3_SCK, GPIO_FN_IRQ2, GPIO_FN_BPFCLK_D,
- GPIO_FN_DU1_DB3, GPIO_FN_SSI_SDATA9_B, GPIO_FN_TANS2,
- GPIO_FN_CAN_DEBUGOUT5, GPIO_FN_CC50_OSCOUT, GPIO_FN_SCIF3_RXD,
- GPIO_FN_I2C1_SCL_E, GPIO_FN_FMCLK_D, GPIO_FN_DU1_DB4,
- GPIO_FN_AUDIO_CLKA_C, GPIO_FN_SSI_SCK4_B, GPIO_FN_CAN_DEBUGOUT6,
- GPIO_FN_RDS_CLK_C, GPIO_FN_SCIF3_TXD, GPIO_FN_I2C1_SDA_E,
- GPIO_FN_FMIN_D, GPIO_FN_DU1_DB5, GPIO_FN_AUDIO_CLKB_C,
- GPIO_FN_SSI_WS4_B, GPIO_FN_CAN_DEBUGOUT7, GPIO_FN_RDS_DATA_C,
- GPIO_FN_I2C2_SCL, GPIO_FN_SCIFA5_RXD, GPIO_FN_DU1_DB6,
- GPIO_FN_AUDIO_CLKC_C, GPIO_FN_SSI_SDATA4_B, GPIO_FN_CAN_DEBUGOUT8,
- GPIO_FN_I2C2_SDA, GPIO_FN_SCIFA5_TXD, GPIO_FN_DU1_DB7,
- GPIO_FN_AUDIO_CLKOUT_C, GPIO_FN_CAN_DEBUGOUT9, GPIO_FN_SSI_SCK5,
- GPIO_FN_SCIFA3_SCK, GPIO_FN_CAN_DEBUGOUT10,
- GPIO_FN_DU1_DOTCLKIN,
-
- /* IPSR11 */
- GPIO_FN_SSI_WS5, GPIO_FN_SCIFA3_RXD, GPIO_FN_I2C3_SCL_C,
- GPIO_FN_DU1_DOTCLKOUT0, GPIO_FN_CAN_DEBUGOUT11, GPIO_FN_SSI_SDATA5,
- GPIO_FN_SCIFA3_TXD, GPIO_FN_I2C3_SDA_C, GPIO_FN_DU1_DOTCLKOUT1,
- GPIO_FN_CAN_DEBUGOUT12, GPIO_FN_SSI_SCK6, GPIO_FN_SCIFA1_SCK_B,
- GPIO_FN_DU1_EXHSYNC_DU1_HSYNC, GPIO_FN_CAN_DEBUGOUT13, GPIO_FN_SSI_WS6,
- GPIO_FN_SCIFA1_RXD_B, GPIO_FN_I2C4_SCL_C, GPIO_FN_DU1_EXVSYNC_DU1_VSYNC,
- GPIO_FN_CAN_DEBUGOUT14, GPIO_FN_SSI_SDATA6, GPIO_FN_SCIFA1_TXD_B,
- GPIO_FN_I2C4_SDA_C, GPIO_FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
- GPIO_FN_CAN_DEBUGOUT15, GPIO_FN_SSI_SCK78, GPIO_FN_SCIFA2_SCK_B,
- GPIO_FN_IIC0_SDA_C, GPIO_FN_DU1_DISP, GPIO_FN_SSI_WS78,
- GPIO_FN_SCIFA2_RXD_B, GPIO_FN_IIC0_SCL_C, GPIO_FN_DU1_CDE,
- GPIO_FN_SSI_SDATA7, GPIO_FN_SCIFA2_TXD_B, GPIO_FN_IRQ8,
- GPIO_FN_AUDIO_CLKA_D, GPIO_FN_CAN_CLK_D, GPIO_FN_PCMOE_N,
- GPIO_FN_SSI_SCK0129, GPIO_FN_MSIOF1_RXD_B, GPIO_FN_SCIF5_RXD_D,
- GPIO_FN_ADIDATA_B, GPIO_FN_AD_DI_B, GPIO_FN_PCMWE_N, GPIO_FN_SSI_WS0129,
- GPIO_FN_MSIOF1_TXD_B, GPIO_FN_SCIF5_TXD_D, GPIO_FN_ADICS_SAMP_B,
- GPIO_FN_AD_DO_B, GPIO_FN_SSI_SDATA0, GPIO_FN_MSIOF1_SCK_B,
- GPIO_FN_PWM0_B, GPIO_FN_ADICLK_B, GPIO_FN_AD_CLK_B,
-
- /* IPSR12 */
- GPIO_FN_SSI_SCK34, GPIO_FN_MSIOF1_SYNC_B, GPIO_FN_SCIFA1_SCK_C,
- GPIO_FN_ADICHS0_B, GPIO_FN_AD_NCS_N_B, GPIO_FN_DREQ1_N_B,
- GPIO_FN_SSI_WS34, GPIO_FN_MSIOF1_SS1_B, GPIO_FN_SCIFA1_RXD_C,
- GPIO_FN_ADICHS1_B, GPIO_FN_CAN1_RX_C, GPIO_FN_DACK1_B,
- GPIO_FN_SSI_SDATA3, GPIO_FN_MSIOF1_SS2_B, GPIO_FN_SCIFA1_TXD_C,
- GPIO_FN_ADICHS2_B, GPIO_FN_CAN1_TX_C, GPIO_FN_DREQ2_N, GPIO_FN_SSI_SCK4,
- GPIO_FN_MLB_CK, GPIO_FN_IETX_B, GPIO_FN_IRD_TX, GPIO_FN_SSI_WS4,
- GPIO_FN_MLB_SIG, GPIO_FN_IECLK_B, GPIO_FN_IRD_RX, GPIO_FN_SSI_SDATA4,
- GPIO_FN_MLB_DAT, GPIO_FN_IERX_B, GPIO_FN_IRD_SCK, GPIO_FN_SSI_SDATA8,
- GPIO_FN_SCIF1_SCK_B, GPIO_FN_PWM1_B, GPIO_FN_IRQ9, GPIO_FN_REMOCON,
- GPIO_FN_DACK2, GPIO_FN_ETH_MDIO_B, GPIO_FN_SSI_SCK1,
- GPIO_FN_SCIF1_RXD_B, GPIO_FN_IIC1_SCL_C, GPIO_FN_VI1_CLK,
- GPIO_FN_CAN0_RX_D, GPIO_FN_AVB_AVTP_CAPTURE, GPIO_FN_ETH_CRS_DV_B,
- GPIO_FN_SSI_WS1, GPIO_FN_SCIF1_TXD_B, GPIO_FN_IIC1_SDA_C,
- GPIO_FN_VI1_DATA0, GPIO_FN_CAN0_TX_D, GPIO_FN_AVB_AVTP_MATCH,
- GPIO_FN_ETH_RX_ER_B, GPIO_FN_SSI_SDATA1, GPIO_FN_HSCIF1_HRX_B,
- GPIO_FN_VI1_DATA1, GPIO_FN_SDATA, GPIO_FN_ATAG0_N, GPIO_FN_ETH_RXD0_B,
- GPIO_FN_SSI_SCK2, GPIO_FN_HSCIF1_HTX_B, GPIO_FN_VI1_DATA2,
- GPIO_FN_MDATA, GPIO_FN_ATAWR0_N, GPIO_FN_ETH_RXD1_B,
-
- /* IPSR13 */
- GPIO_FN_SSI_WS2, GPIO_FN_HSCIF1_HCTS_N_B, GPIO_FN_SCIFA0_RXD_D,
- GPIO_FN_VI1_DATA3, GPIO_FN_SCKZ, GPIO_FN_ATACS00_N, GPIO_FN_ETH_LINK_B,
- GPIO_FN_SSI_SDATA2, GPIO_FN_HSCIF1_HRTS_N_B, GPIO_FN_SCIFA0_TXD_D,
- GPIO_FN_VI1_DATA4, GPIO_FN_STM_N, GPIO_FN_ATACS10_N,
- GPIO_FN_ETH_REFCLK_B, GPIO_FN_SSI_SCK9, GPIO_FN_SCIF2_SCK_B,
- GPIO_FN_PWM2_B, GPIO_FN_VI1_DATA5, GPIO_FN_MTS_N, GPIO_FN_EX_WAIT1,
- GPIO_FN_ETH_TXD1_B, GPIO_FN_SSI_WS9, GPIO_FN_SCIF2_RXD_B,
- GPIO_FN_I2C3_SCL_E, GPIO_FN_VI1_DATA6, GPIO_FN_ATARD0_N,
- GPIO_FN_ETH_TX_EN_B, GPIO_FN_SSI_SDATA9, GPIO_FN_SCIF2_TXD_B,
- GPIO_FN_I2C3_SDA_E, GPIO_FN_VI1_DATA7, GPIO_FN_ATADIR0_N,
- GPIO_FN_ETH_MAGIC_B, GPIO_FN_AUDIO_CLKA, GPIO_FN_I2C0_SCL_B,
- GPIO_FN_SCIFA4_RXD_D, GPIO_FN_VI1_CLKENB, GPIO_FN_TS_SDATA_C,
- GPIO_FN_RIF0_SYNC_B, GPIO_FN_ETH_TXD0_B, GPIO_FN_AUDIO_CLKB,
- GPIO_FN_I2C0_SDA_B, GPIO_FN_SCIFA4_TXD_D, GPIO_FN_VI1_FIELD,
- GPIO_FN_TS_SCK_C, GPIO_FN_RIF0_CLK_B, GPIO_FN_BPFCLK_E,
- GPIO_FN_ETH_MDC_B, GPIO_FN_AUDIO_CLKC, GPIO_FN_I2C4_SCL_B,
- GPIO_FN_SCIFA5_RXD_D, GPIO_FN_VI1_HSYNC_N, GPIO_FN_TS_SDEN_C,
- GPIO_FN_RIF0_D0_B, GPIO_FN_FMCLK_E, GPIO_FN_RDS_CLK_D,
- GPIO_FN_AUDIO_CLKOUT, GPIO_FN_I2C4_SDA_B, GPIO_FN_SCIFA5_TXD_D,
- GPIO_FN_VI1_VSYNC_N, GPIO_FN_TS_SPSYNC_C, GPIO_FN_RIF0_D1_B,
- GPIO_FN_FMIN_E, GPIO_FN_RDS_DATA_D,
-};
-
-#endif /* __ASM_R8A7794_H__ */
diff --git a/arch/arm/mach-rmobile/pfc-r8a7790.c b/arch/arm/mach-rmobile/pfc-r8a7790.c
deleted file mode 100644
index 31be1bb..0000000
--- a/arch/arm/mach-rmobile/pfc-r8a7790.c
+++ /dev/null
@@ -1,1813 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/arm/cpu/armv7/rmobile/pfc-r8a7790.c
- * This file is r8a7790 processor support - PFC hardware block.
- *
- * Copy from linux-kernel:drivers/pinctrl/sh-pfc/pfc-r8a7790.c
- *
- * Copyright (C) 2013 Renesas Electronics Corporation
- * Copyright (C) 2013 Magnus Damm
- * Copyright (C) 2012 Renesas Solutions Corp.
- * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- */
-
-#include <common.h>
-#include <sh_pfc.h>
-#include <asm/gpio.h>
-#include "pfc-r8a7790.h"
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- GP_ALL(DATA),
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- GP_ALL(IN),
- PINMUX_INPUT_END,
-
- PINMUX_OUTPUT_BEGIN,
- GP_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- GP_ALL(FN),
-
- /* GPSR0 */
- FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,
- FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,
- FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,
- FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,
- FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,
- FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,
- FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,
- FN_IP3_14_12, FN_IP3_17_15,
-
- /* GPSR1 */
- FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,
- FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,
- FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,
- FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,
- FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,
- FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,
- FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,
-
- /* GPSR2 */
- FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,
- FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,
- FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,
- FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,
- FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,
- FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,
- FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,
-
- /* GPSR3 */
- FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,
- FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,
- FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,
- FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,
- FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,
- FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,
- FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,
-
- /* GPSR4 */
- FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,
- FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,
- FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,
- FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,
- FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,
- FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,
- FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,
- FN_IP14_15_12, FN_IP14_18_16,
-
- /* GPSR5 */
- FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,
- FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,
- FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,
- FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,
- FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,
- FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,
- FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,
-
- /* IPSR0 - IPSR5 */
- /* IPSR6 */
- FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
- FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,
- FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
- FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,
- FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,
- FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,
- FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
- FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,
- FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
- FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
- FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
- FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,
- FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,
- FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,
- FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,
- FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
- FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,
- FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
- FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,
- FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
- FN_STP_IVCXO27_1_B, FN_HRX0_F,
-
- /* IPSR7 */
- FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
- FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,
- FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
- FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,
- FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,
- FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,
- FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,
- FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
- FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,
- FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
- FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
- FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
- FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
- FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
- FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
- FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
- FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
- FN_MII_RXD2,
-
- /* IPSR8 */
- FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3,
- FN_MII_RXD3, FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N,
- FN_AVB_RXD4, FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N,
- FN_AVB_RXD5, FN_VI0_DATA4_VI0_B4, FN_ATAG0_N,
- FN_AVB_RXD6, FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1,
- FN_AVB_RXD7, FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER,
- FN_MII_RX_ER, FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK,
- FN_MII_RX_CLK, FN_VI1_CLK, FN_AVB_RX_DV,
- FN_MII_RX_DV, FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D,
- FN_AVB_CRS, FN_MII_CRS, FN_VI1_DATA1_VI1_B1,
- FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
- FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
- FN_MII_MDIO, FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D,
- FN_AVB_GTX_CLK, FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
- FN_AVB_MAGIC, FN_MII_MAGIC, FN_VI1_DATA5_VI1_B5,
- FN_AVB_PHY_INT, FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
- FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B, FN_SD0_CMD,
- FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B,
-
- /* IPSR9 */
- FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B,
- FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B,
- FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B,
- FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B,
- FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
- FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
- FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, FN_SD0_WP,
- FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
- FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
- FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, FN_SD1_CLK,
- FN_AVB_TX_EN, FN_MII_TX_EN, FN_SD1_CMD,
- FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
- FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK,
- FN_SCIFB0_RXD_B, FN_SD1_DAT1, FN_AVB_LINK,
- FN_MII_LINK, FN_SCIFB0_TXD_B, FN_SD1_DAT2,
- FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
- FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0,
- FN_SCIFB0_RTS_N_B, FN_SD1_CD, FN_MMC1_D6,
- FN_TS_SDEN1, FN_USB1_EXTP, FN_GLO_SS, FN_VI0_CLK_B,
- FN_SCL2_D, FN_SCL2_CIS_D, FN_SIM0_CLK_B,
- FN_VI3_CLK_B,
-
- /* IPSR10 */
- FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
- FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
- FN_SIM0_D_B, FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
- FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
- FN_VI3_DATA0_B, FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
- FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,
- FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,
- FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
- FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
- FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
- FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
- FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
- FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
- FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
- FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
- FN_GLO_Q0_B, FN_VI3_DATA4_B, FN_SD2_DAT3,
- FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
- FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B,
- FN_VI3_DATA5_B, FN_SD2_CD, FN_MMC0_D4,
- FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,
- FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,
- FN_GLO_I0_B, FN_VI3_DATA6_B,
-
- /* IPSR11 */
- FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,
- FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,
- FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B,
- FN_SD3_CLK, FN_MMC1_CLK, FN_SD3_CMD, FN_MMC1_CMD,
- FN_MTS_N, FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N,
- FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, FN_SD3_DAT2,
- FN_MMC1_D2, FN_SDATA, FN_SD3_DAT3, FN_MMC1_D3,
- FN_SCKZ, FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
- FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, FN_SD3_WP,
- FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
- FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
- FN_RDS_DATA_E, FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B,
- FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B,
- FN_SDA2_CIS_B, FN_MLB_DAT, FN_SPV_EVEN,
- FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
- FN_RDS_CLK_B, FN_SSI_SCK0129, FN_CAN_CLK_B,
- FN_MOUT0,
-
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
- FN_SEL_SCIF1_4,
- FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,
- FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,
- FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
- FN_SEL_SCIFB1_4,
- FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6,
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
- FN_SEL_SCFA_0, FN_SEL_SCFA_1,
- FN_SEL_SOF1_0, FN_SEL_SOF1_1,
- FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,
- FN_SEL_SSI6_0, FN_SEL_SSI6_1,
- FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,
- FN_SEL_VI3_0, FN_SEL_VI3_1,
- FN_SEL_VI2_0, FN_SEL_VI2_1,
- FN_SEL_VI1_0, FN_SEL_VI1_1,
- FN_SEL_VI0_0, FN_SEL_VI0_1,
- FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,
- FN_SEL_LBS_0, FN_SEL_LBS_1,
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- FN_SEL_SOF3_0, FN_SEL_SOF3_1,
- FN_SEL_SOF0_0, FN_SEL_SOF0_1,
-
- FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
- FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,
- FN_SEL_CAN1_0, FN_SEL_CAN1_1,
- FN_SEL_ADI_0, FN_SEL_ADI_1,
- FN_SEL_SSP_0, FN_SEL_SSP_1,
- FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
- FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,
- FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,
- FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,
- FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
- FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,
- FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,
- FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,
-
- FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
- FN_SEL_IIC0_0, FN_SEL_IIC0_1,
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
- FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
- FN_SEL_IIC2_4,
- FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,
- FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
- FN_SEL_I2C2_4,
- FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
-
- VI1_DATA7_VI1_B7_MARK,
-
- USB0_PWEN_MARK, USB0_OVC_VBUS_MARK,
- USB2_PWEN_MARK, USB2_OVC_MARK, AVS1_MARK, AVS2_MARK,
- DU_DOTCLKIN0_MARK, DU_DOTCLKIN2_MARK,
-
- D0_MARK, MSIOF3_SCK_B_MARK, VI3_DATA0_MARK, VI0_G4_MARK, VI0_G4_B_MARK,
- D1_MARK, MSIOF3_SYNC_B_MARK, VI3_DATA1_MARK, VI0_G5_MARK,
- VI0_G5_B_MARK, D2_MARK, MSIOF3_RXD_B_MARK, VI3_DATA2_MARK,
- VI0_G6_MARK, VI0_G6_B_MARK, D3_MARK, MSIOF3_TXD_B_MARK,
- VI3_DATA3_MARK, VI0_G7_MARK, VI0_G7_B_MARK, D4_MARK,
- SCIFB1_RXD_F_MARK, SCIFB0_RXD_C_MARK, VI3_DATA4_MARK,
- VI0_R0_MARK, VI0_R0_B_MARK, RX0_B_MARK, D5_MARK,
- SCIFB1_TXD_F_MARK, SCIFB0_TXD_C_MARK, VI3_DATA5_MARK,
- VI0_R1_MARK, VI0_R1_B_MARK, TX0_B_MARK, D6_MARK,
- SCL2_C_MARK, VI3_DATA6_MARK, VI0_R2_MARK, VI0_R2_B_MARK,
- SCL2_CIS_C_MARK, D7_MARK, AD_DI_B_MARK, SDA2_C_MARK,
- VI3_DATA7_MARK, VI0_R3_MARK, VI0_R3_B_MARK, SDA2_CIS_C_MARK,
- D8_MARK, SCIFA1_SCK_C_MARK, AVB_TXD0_MARK, MII_TXD0_MARK,
- VI0_G0_MARK, VI0_G0_B_MARK, VI2_DATA0_VI2_B0_MARK,
-
- D9_MARK, SCIFA1_RXD_C_MARK, AVB_TXD1_MARK, MII_TXD1_MARK,
- VI0_G1_MARK, VI0_G1_B_MARK, VI2_DATA1_VI2_B1_MARK, D10_MARK,
- SCIFA1_TXD_C_MARK, AVB_TXD2_MARK, MII_TXD2_MARK,
- VI0_G2_MARK, VI0_G2_B_MARK, VI2_DATA2_VI2_B2_MARK, D11_MARK,
- SCIFA1_CTS_N_C_MARK, AVB_TXD3_MARK, MII_TXD3_MARK,
- VI0_G3_MARK, VI0_G3_B_MARK, VI2_DATA3_VI2_B3_MARK,
- D12_MARK, SCIFA1_RTS_N_C_MARK, AVB_TXD4_MARK,
- VI0_HSYNC_N_MARK, VI0_HSYNC_N_B_MARK, VI2_DATA4_VI2_B4_MARK,
- D13_MARK, AVB_TXD5_MARK, VI0_VSYNC_N_MARK,
- VI0_VSYNC_N_B_MARK, VI2_DATA5_VI2_B5_MARK, D14_MARK,
- SCIFB1_RXD_C_MARK, AVB_TXD6_MARK, RX1_B_MARK,
- VI0_CLKENB_MARK, VI0_CLKENB_B_MARK, VI2_DATA6_VI2_B6_MARK,
- D15_MARK, SCIFB1_TXD_C_MARK, AVB_TXD7_MARK, TX1_B_MARK,
- VI0_FIELD_MARK, VI0_FIELD_B_MARK, VI2_DATA7_VI2_B7_MARK,
- A0_MARK, PWM3_MARK, A1_MARK, PWM4_MARK,
-
- A2_MARK, PWM5_MARK, MSIOF1_SS1_B_MARK, A3_MARK,
- PWM6_MARK, MSIOF1_SS2_B_MARK, A4_MARK, MSIOF1_TXD_B_MARK,
- TPU0TO0_MARK, A5_MARK, SCIFA1_TXD_B_MARK, TPU0TO1_MARK,
- A6_MARK, SCIFA1_RTS_N_B_MARK, TPU0TO2_MARK, A7_MARK,
- SCIFA1_SCK_B_MARK, AUDIO_CLKOUT_B_MARK, TPU0TO3_MARK,
- A8_MARK, SCIFA1_RXD_B_MARK, SSI_SCK5_B_MARK, VI0_R4_MARK,
- VI0_R4_B_MARK, SCIFB2_RXD_C_MARK, VI2_DATA0_VI2_B0_B_MARK,
- A9_MARK, SCIFA1_CTS_N_B_MARK, SSI_WS5_B_MARK, VI0_R5_MARK,
- VI0_R5_B_MARK, SCIFB2_TXD_C_MARK, VI2_DATA1_VI2_B1_B_MARK,
- A10_MARK, SSI_SDATA5_B_MARK, MSIOF2_SYNC_MARK, VI0_R6_MARK,
- VI0_R6_B_MARK, VI2_DATA2_VI2_B2_B_MARK,
-
- A11_MARK, SCIFB2_CTS_N_B_MARK, MSIOF2_SCK_MARK, VI1_R0_MARK,
- VI1_R0_B_MARK, VI2_G0_MARK, VI2_DATA3_VI2_B3_B_MARK,
- A12_MARK, SCIFB2_RXD_B_MARK, MSIOF2_TXD_MARK, VI1_R1_MARK,
- VI1_R1_B_MARK, VI2_G1_MARK, VI2_DATA4_VI2_B4_B_MARK,
- A13_MARK, SCIFB2_RTS_N_B_MARK, EX_WAIT2_MARK,
- MSIOF2_RXD_MARK, VI1_R2_MARK, VI1_R2_B_MARK, VI2_G2_MARK,
- VI2_DATA5_VI2_B5_B_MARK, A14_MARK, SCIFB2_TXD_B_MARK,
- ATACS11_N_MARK, MSIOF2_SS1_MARK, A15_MARK, SCIFB2_SCK_B_MARK,
- ATARD1_N_MARK, MSIOF2_SS2_MARK, A16_MARK, ATAWR1_N_MARK,
- A17_MARK, AD_DO_B_MARK, ATADIR1_N_MARK, A18_MARK,
- AD_CLK_B_MARK, ATAG1_N_MARK, A19_MARK, AD_NCS_N_B_MARK,
- ATACS01_N_MARK, EX_WAIT0_B_MARK, A20_MARK, SPCLK_MARK,
- VI1_R3_MARK, VI1_R3_B_MARK, VI2_G4_MARK,
-
- A21_MARK, MOSI_IO0_MARK, VI1_R4_MARK, VI1_R4_B_MARK, VI2_G5_MARK,
- A22_MARK, MISO_IO1_MARK, VI1_R5_MARK, VI1_R5_B_MARK,
- VI2_G6_MARK, A23_MARK, IO2_MARK, VI1_G7_MARK,
- VI1_G7_B_MARK, VI2_G7_MARK, A24_MARK, IO3_MARK,
- VI1_R7_MARK, VI1_R7_B_MARK, VI2_CLKENB_MARK,
- VI2_CLKENB_B_MARK, A25_MARK, SSL_MARK, VI1_G6_MARK,
- VI1_G6_B_MARK, VI2_FIELD_MARK, VI2_FIELD_B_MARK, CS0_N_MARK,
- VI1_R6_MARK, VI1_R6_B_MARK, VI2_G3_MARK, MSIOF0_SS2_B_MARK,
- CS1_N_A26_MARK, SPEEDIN_MARK, VI0_R7_MARK, VI0_R7_B_MARK,
- VI2_CLK_MARK, VI2_CLK_B_MARK, EX_CS0_N_MARK, HRX1_B_MARK,
- VI1_G5_MARK, VI1_G5_B_MARK, VI2_R0_MARK, HTX0_B_MARK,
- MSIOF0_SS1_B_MARK, EX_CS1_N_MARK, GPS_CLK_MARK,
- HCTS1_N_B_MARK, VI1_FIELD_MARK, VI1_FIELD_B_MARK,
- VI2_R1_MARK, EX_CS2_N_MARK, GPS_SIGN_MARK, HRTS1_N_B_MARK,
- VI3_CLKENB_MARK, VI1_G0_MARK, VI1_G0_B_MARK, VI2_R2_MARK,
-
- EX_CS3_N_MARK, GPS_MAG_MARK, VI3_FIELD_MARK,
- VI1_G1_MARK, VI1_G1_B_MARK, VI2_R3_MARK,
- EX_CS4_N_MARK, MSIOF1_SCK_B_MARK, VI3_HSYNC_N_MARK,
- VI2_HSYNC_N_MARK, SCL1_MARK, VI2_HSYNC_N_B_MARK,
- INTC_EN0_N_MARK, SCL1_CIS_MARK, EX_CS5_N_MARK, CAN0_RX_MARK,
- MSIOF1_RXD_B_MARK, VI3_VSYNC_N_MARK, VI1_G2_MARK,
- VI1_G2_B_MARK, VI2_R4_MARK, SDA1_MARK, INTC_EN1_N_MARK,
- SDA1_CIS_MARK, BS_N_MARK, IETX_MARK, HTX1_B_MARK,
- CAN1_TX_MARK, DRACK0_MARK, IETX_C_MARK, RD_N_MARK,
- CAN0_TX_MARK, SCIFA0_SCK_B_MARK, RD_WR_N_MARK, VI1_G3_MARK,
- VI1_G3_B_MARK, VI2_R5_MARK, SCIFA0_RXD_B_MARK,
- INTC_IRQ4_N_MARK, WE0_N_MARK, IECLK_MARK, CAN_CLK_MARK,
- VI2_VSYNC_N_MARK, SCIFA0_TXD_B_MARK, VI2_VSYNC_N_B_MARK,
- WE1_N_MARK, IERX_MARK, CAN1_RX_MARK, VI1_G4_MARK,
- VI1_G4_B_MARK, VI2_R6_MARK, SCIFA0_CTS_N_B_MARK,
- IERX_C_MARK, EX_WAIT0_MARK, IRQ3_MARK, INTC_IRQ3_N_MARK,
- VI3_CLK_MARK, SCIFA0_RTS_N_B_MARK, HRX0_B_MARK,
- MSIOF0_SCK_B_MARK, DREQ0_N_MARK, VI1_HSYNC_N_MARK,
- VI1_HSYNC_N_B_MARK, VI2_R7_MARK, SSI_SCK78_C_MARK,
- SSI_WS78_B_MARK,
-
- DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,
- VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,
- DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,
- SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,
- INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,
- DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,
- MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,
- SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,
- ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
- TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,
- SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
- STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,
- SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
- STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,
- SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,
- RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
- TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,
- RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,
- STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,
- ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,
- STP_IVCXO27_1_B_MARK, HRX0_F_MARK,
-
- ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,
- SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,
- RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
- ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,
- HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,
- SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,
- STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,
- ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,
- TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,
- SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,
- GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
- STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
- PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
- PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
- AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
- ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,
- VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
- MII_RXD2_MARK,
-
- VI0_DATA1_VI0_B1_MARK, ATARD0_N_MARK, AVB_RXD3_MARK,
- MII_RXD3_MARK, VI0_DATA2_VI0_B2_MARK, ATAWR0_N_MARK,
- AVB_RXD4_MARK, VI0_DATA3_VI0_B3_MARK, ATADIR0_N_MARK,
- AVB_RXD5_MARK, VI0_DATA4_VI0_B4_MARK, ATAG0_N_MARK,
- AVB_RXD6_MARK, VI0_DATA5_VI0_B5_MARK, EX_WAIT1_MARK,
- AVB_RXD7_MARK, VI0_DATA6_VI0_B6_MARK, AVB_RX_ER_MARK,
- MII_RX_ER_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RX_CLK_MARK,
- MII_RX_CLK_MARK, VI1_CLK_MARK, AVB_RX_DV_MARK,
- MII_RX_DV_MARK, VI1_DATA0_VI1_B0_MARK, SCIFA1_SCK_D_MARK,
- AVB_CRS_MARK, MII_CRS_MARK, VI1_DATA1_VI1_B1_MARK,
- SCIFA1_RXD_D_MARK, AVB_MDC_MARK, MII_MDC_MARK,
- VI1_DATA2_VI1_B2_MARK, SCIFA1_TXD_D_MARK, AVB_MDIO_MARK,
- MII_MDIO_MARK, VI1_DATA3_VI1_B3_MARK, SCIFA1_CTS_N_D_MARK,
- AVB_GTX_CLK_MARK, VI1_DATA4_VI1_B4_MARK, SCIFA1_RTS_N_D_MARK,
- AVB_MAGIC_MARK, MII_MAGIC_MARK, VI1_DATA5_VI1_B5_MARK,
- AVB_PHY_INT_MARK, VI1_DATA6_VI1_B6_MARK, AVB_GTXREFCLK_MARK,
- SD0_CLK_MARK, VI1_DATA0_VI1_B0_B_MARK, SD0_CMD_MARK,
- SCIFB1_SCK_B_MARK, VI1_DATA1_VI1_B1_B_MARK,
-
- SD0_DAT0_MARK, SCIFB1_RXD_B_MARK, VI1_DATA2_VI1_B2_B_MARK,
- SD0_DAT1_MARK, SCIFB1_TXD_B_MARK, VI1_DATA3_VI1_B3_B_MARK,
- SD0_DAT2_MARK, SCIFB1_CTS_N_B_MARK, VI1_DATA4_VI1_B4_B_MARK,
- SD0_DAT3_MARK, SCIFB1_RTS_N_B_MARK, VI1_DATA5_VI1_B5_B_MARK,
- SD0_CD_MARK, MMC0_D6_MARK, TS_SDEN0_B_MARK, USB0_EXTP_MARK,
- GLO_SCLK_MARK, VI1_DATA6_VI1_B6_B_MARK, SCL1_B_MARK,
- SCL1_CIS_B_MARK, VI2_DATA6_VI2_B6_B_MARK, SD0_WP_MARK,
- MMC0_D7_MARK, TS_SPSYNC0_B_MARK, USB0_IDIN_MARK,
- GLO_SDATA_MARK, VI1_DATA7_VI1_B7_B_MARK, SDA1_B_MARK,
- SDA1_CIS_B_MARK, VI2_DATA7_VI2_B7_B_MARK, SD1_CLK_MARK,
- AVB_TX_EN_MARK, MII_TX_EN_MARK, SD1_CMD_MARK,
- AVB_TX_ER_MARK, MII_TX_ER_MARK, SCIFB0_SCK_B_MARK,
- SD1_DAT0_MARK, AVB_TX_CLK_MARK, MII_TX_CLK_MARK,
- SCIFB0_RXD_B_MARK, SD1_DAT1_MARK, AVB_LINK_MARK,
- MII_LINK_MARK, SCIFB0_TXD_B_MARK, SD1_DAT2_MARK,
- AVB_COL_MARK, MII_COL_MARK, SCIFB0_CTS_N_B_MARK,
- SD1_DAT3_MARK, AVB_RXD0_MARK, MII_RXD0_MARK,
- SCIFB0_RTS_N_B_MARK, SD1_CD_MARK, MMC1_D6_MARK,
- TS_SDEN1_MARK, USB1_EXTP_MARK, GLO_SS_MARK, VI0_CLK_B_MARK,
- SCL2_D_MARK, SCL2_CIS_D_MARK, SIM0_CLK_B_MARK,
- VI3_CLK_B_MARK,
-
- SD1_WP_MARK, MMC1_D7_MARK, TS_SPSYNC1_MARK, USB1_IDIN_MARK,
- GLO_RFON_MARK, VI1_CLK_B_MARK, SDA2_D_MARK, SDA2_CIS_D_MARK,
- SIM0_D_B_MARK, SD2_CLK_MARK, MMC0_CLK_MARK, SIM0_CLK_MARK,
- VI0_DATA0_VI0_B0_B_MARK, TS_SDEN0_C_MARK, GLO_SCLK_B_MARK,
- VI3_DATA0_B_MARK, SD2_CMD_MARK, MMC0_CMD_MARK, SIM0_D_MARK,
- VI0_DATA1_VI0_B1_B_MARK, SCIFB1_SCK_E_MARK, SCK1_D_MARK,
- TS_SPSYNC0_C_MARK, GLO_SDATA_B_MARK, VI3_DATA1_B_MARK,
- SD2_DAT0_MARK, MMC0_D0_MARK, FMCLK_B_MARK,
- VI0_DATA2_VI0_B2_B_MARK, SCIFB1_RXD_E_MARK, RX1_D_MARK,
- TS_SDAT0_C_MARK, GLO_SS_B_MARK, VI3_DATA2_B_MARK,
- SD2_DAT1_MARK, MMC0_D1_MARK, FMIN_B_MARK, RDS_DATA_MARK,
- VI0_DATA3_VI0_B3_B_MARK, SCIFB1_TXD_E_MARK, TX1_D_MARK,
- TS_SCK0_C_MARK, GLO_RFON_B_MARK, VI3_DATA3_B_MARK,
- SD2_DAT2_MARK, MMC0_D2_MARK, BPFCLK_B_MARK, RDS_CLK_MARK,
- VI0_DATA4_VI0_B4_B_MARK, HRX0_D_MARK, TS_SDEN1_B_MARK,
- GLO_Q0_B_MARK, VI3_DATA4_B_MARK, SD2_DAT3_MARK,
- MMC0_D3_MARK, SIM0_RST_MARK, VI0_DATA5_VI0_B5_B_MARK,
- HTX0_D_MARK, TS_SPSYNC1_B_MARK, GLO_Q1_B_MARK,
- VI3_DATA5_B_MARK, SD2_CD_MARK, MMC0_D4_MARK,
- TS_SDAT0_B_MARK, USB2_EXTP_MARK, GLO_I0_MARK,
- VI0_DATA6_VI0_B6_B_MARK, HCTS0_N_D_MARK, TS_SDAT1_B_MARK,
- GLO_I0_B_MARK, VI3_DATA6_B_MARK,
-
- SD2_WP_MARK, MMC0_D5_MARK, TS_SCK0_B_MARK, USB2_IDIN_MARK,
- GLO_I1_MARK, VI0_DATA7_VI0_B7_B_MARK, HRTS0_N_D_MARK,
- TS_SCK1_B_MARK, GLO_I1_B_MARK, VI3_DATA7_B_MARK,
- SD3_CLK_MARK, MMC1_CLK_MARK, SD3_CMD_MARK, MMC1_CMD_MARK,
- MTS_N_MARK, SD3_DAT0_MARK, MMC1_D0_MARK, STM_N_MARK,
- SD3_DAT1_MARK, MMC1_D1_MARK, MDATA_MARK, SD3_DAT2_MARK,
- MMC1_D2_MARK, SDATA_MARK, SD3_DAT3_MARK, MMC1_D3_MARK,
- SCKZ_MARK, SD3_CD_MARK, MMC1_D4_MARK, TS_SDAT1_MARK,
- VSP_MARK, GLO_Q0_MARK, SIM0_RST_B_MARK, SD3_WP_MARK,
- MMC1_D5_MARK, TS_SCK1_MARK, GLO_Q1_MARK, FMIN_C_MARK,
- RDS_DATA_B_MARK, FMIN_E_MARK, RDS_DATA_D_MARK, FMIN_F_MARK,
- RDS_DATA_E_MARK, MLB_CLK_MARK, SCL2_B_MARK, SCL2_CIS_B_MARK,
- MLB_SIG_MARK, SCIFB1_RXD_D_MARK, RX1_C_MARK, SDA2_B_MARK,
- SDA2_CIS_B_MARK, MLB_DAT_MARK, SPV_EVEN_MARK,
- SCIFB1_TXD_D_MARK, TX1_C_MARK, BPFCLK_C_MARK,
- RDS_CLK_B_MARK, SSI_SCK0129_MARK, CAN_CLK_B_MARK,
- MOUT0_MARK,
-
- SSI_WS0129_MARK, CAN0_TX_B_MARK, MOUT1_MARK,
- SSI_SDATA0_MARK, CAN0_RX_B_MARK, MOUT2_MARK,
- SSI_SDATA1_MARK, CAN1_TX_B_MARK, MOUT5_MARK,
- SSI_SDATA2_MARK, CAN1_RX_B_MARK, SSI_SCK1_MARK, MOUT6_MARK,
- SSI_SCK34_MARK, STP_OPWM_0_MARK, SCIFB0_SCK_MARK,
- MSIOF1_SCK_MARK, CAN_DEBUG_HW_TRIGGER_MARK, SSI_WS34_MARK,
- STP_IVCXO27_0_MARK, SCIFB0_RXD_MARK, MSIOF1_SYNC_MARK,
- CAN_STEP0_MARK, SSI_SDATA3_MARK, STP_ISCLK_0_MARK,
- SCIFB0_TXD_MARK, MSIOF1_SS1_MARK, CAN_TXCLK_MARK,
- SSI_SCK4_MARK, STP_ISD_0_MARK, SCIFB0_CTS_N_MARK,
- MSIOF1_SS2_MARK, SSI_SCK5_C_MARK, CAN_DEBUGOUT0_MARK,
- SSI_WS4_MARK, STP_ISEN_0_MARK, SCIFB0_RTS_N_MARK,
- MSIOF1_TXD_MARK, SSI_WS5_C_MARK, CAN_DEBUGOUT1_MARK,
- SSI_SDATA4_MARK, STP_ISSYNC_0_MARK, MSIOF1_RXD_MARK,
- CAN_DEBUGOUT2_MARK, SSI_SCK5_MARK, SCIFB1_SCK_MARK,
- IERX_B_MARK, DU2_EXHSYNC_DU2_HSYNC_MARK, QSTH_QHS_MARK,
- CAN_DEBUGOUT3_MARK, SSI_WS5_MARK, SCIFB1_RXD_MARK,
- IECLK_B_MARK, DU2_EXVSYNC_DU2_VSYNC_MARK, QSTB_QHE_MARK,
- CAN_DEBUGOUT4_MARK,
-
- SSI_SDATA5_MARK, SCIFB1_TXD_MARK, IETX_B_MARK, DU2_DR2_MARK,
- LCDOUT2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK6_MARK,
- SCIFB1_CTS_N_MARK, BPFCLK_D_MARK, RDS_CLK_C_MARK,
- DU2_DR3_MARK, LCDOUT3_MARK, CAN_DEBUGOUT6_MARK,
- BPFCLK_F_MARK, RDS_CLK_E_MARK, SSI_WS6_MARK,
- SCIFB1_RTS_N_MARK, CAN0_TX_D_MARK, DU2_DR4_MARK,
- LCDOUT4_MARK, CAN_DEBUGOUT7_MARK, SSI_SDATA6_MARK,
- FMIN_D_MARK, RDS_DATA_C_MARK, DU2_DR5_MARK, LCDOUT5_MARK,
- CAN_DEBUGOUT8_MARK, SSI_SCK78_MARK, STP_IVCXO27_1_MARK,
- SCK1_MARK, SCIFA1_SCK_MARK, DU2_DR6_MARK, LCDOUT6_MARK,
- CAN_DEBUGOUT9_MARK, SSI_WS78_MARK, STP_ISCLK_1_MARK,
- SCIFB2_SCK_MARK, SCIFA2_CTS_N_MARK, DU2_DR7_MARK,
- LCDOUT7_MARK, CAN_DEBUGOUT10_MARK, SSI_SDATA7_MARK,
- STP_ISD_1_MARK, SCIFB2_RXD_MARK, SCIFA2_RTS_N_MARK,
- TCLK2_MARK, QSTVA_QVS_MARK, CAN_DEBUGOUT11_MARK,
- BPFCLK_E_MARK, RDS_CLK_D_MARK, SSI_SDATA7_B_MARK,
- FMIN_G_MARK, RDS_DATA_F_MARK, SSI_SDATA8_MARK,
- STP_ISEN_1_MARK, SCIFB2_TXD_MARK, CAN0_TX_C_MARK,
- CAN_DEBUGOUT12_MARK, SSI_SDATA8_B_MARK, SSI_SDATA9_MARK,
- STP_ISSYNC_1_MARK, SCIFB2_CTS_N_MARK, SSI_WS1_MARK,
- SSI_SDATA5_C_MARK, CAN_DEBUGOUT13_MARK, AUDIO_CLKA_MARK,
- SCIFB2_RTS_N_MARK, CAN_DEBUGOUT14_MARK,
-
- AUDIO_CLKB_MARK, SCIF_CLK_MARK, CAN0_RX_D_MARK,
- DVC_MUTE_MARK, CAN0_RX_C_MARK, CAN_DEBUGOUT15_MARK,
- REMOCON_MARK, SCIFA0_SCK_MARK, HSCK1_MARK, SCK0_MARK,
- MSIOF3_SS2_MARK, DU2_DG2_MARK, LCDOUT10_MARK, SDA1_C_MARK,
- SDA1_CIS_C_MARK, SCIFA0_RXD_MARK, HRX1_MARK, RX0_MARK,
- DU2_DR0_MARK, LCDOUT0_MARK, SCIFA0_TXD_MARK, HTX1_MARK,
- TX0_MARK, DU2_DR1_MARK, LCDOUT1_MARK, SCIFA0_CTS_N_MARK,
- HCTS1_N_MARK, CTS0_N_MARK, MSIOF3_SYNC_MARK, DU2_DG3_MARK,
- LCDOUT11_MARK, PWM0_B_MARK, SCL1_C_MARK, SCL1_CIS_C_MARK,
- SCIFA0_RTS_N_MARK, HRTS1_N_MARK, RTS0_N_TANS_MARK,
- MSIOF3_SS1_MARK, DU2_DG0_MARK, LCDOUT8_MARK, PWM1_B_MARK,
- SCIFA1_RXD_MARK, AD_DI_MARK, RX1_MARK,
- DU2_EXODDF_DU2_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK,
- SCIFA1_TXD_MARK, AD_DO_MARK, TX1_MARK, DU2_DG1_MARK,
- LCDOUT9_MARK, SCIFA1_CTS_N_MARK, AD_CLK_MARK,
- CTS1_N_MARK, MSIOF3_RXD_MARK, DU0_DOTCLKOUT_MARK, QCLK_MARK,
- SCIFA1_RTS_N_MARK, AD_NCS_N_MARK, RTS1_N_TANS_MARK,
- MSIOF3_TXD_MARK, DU1_DOTCLKOUT_MARK, QSTVB_QVE_MARK,
- HRTS0_N_C_MARK,
-
- SCIFA2_SCK_MARK, FMCLK_MARK, MSIOF3_SCK_MARK, DU2_DG7_MARK,
- LCDOUT15_MARK, SCIF_CLK_B_MARK, SCIFA2_RXD_MARK, FMIN_MARK,
- DU2_DB0_MARK, LCDOUT16_MARK, SCL2_MARK, SCL2_CIS_MARK,
- SCIFA2_TXD_MARK, BPFCLK_MARK, DU2_DB1_MARK, LCDOUT17_MARK,
- SDA2_MARK, SDA2_CIS_MARK, HSCK0_MARK, TS_SDEN0_MARK,
- DU2_DG4_MARK, LCDOUT12_MARK, HCTS0_N_C_MARK, HRX0_MARK,
- DU2_DB2_MARK, LCDOUT18_MARK, HTX0_MARK, DU2_DB3_MARK,
- LCDOUT19_MARK, HCTS0_N_MARK, SSI_SCK9_MARK, DU2_DB4_MARK,
- LCDOUT20_MARK, HRTS0_N_MARK, SSI_WS9_MARK, DU2_DB5_MARK,
- LCDOUT21_MARK, MSIOF0_SCK_MARK, TS_SDAT0_MARK, ADICLK_MARK,
- DU2_DB6_MARK, LCDOUT22_MARK, MSIOF0_SYNC_MARK, TS_SCK0_MARK,
- SSI_SCK2_MARK, ADIDATA_MARK, DU2_DB7_MARK, LCDOUT23_MARK,
- SCIFA2_RXD_B_MARK, MSIOF0_SS1_MARK, ADICHS0_MARK,
- DU2_DG5_MARK, LCDOUT13_MARK, MSIOF0_TXD_MARK, ADICHS1_MARK,
- DU2_DG6_MARK, LCDOUT14_MARK,
-
- MSIOF0_SS2_MARK, AUDIO_CLKOUT_MARK, ADICHS2_MARK,
- DU2_DISP_MARK, QPOLA_MARK, HTX0_C_MARK, SCIFA2_TXD_B_MARK,
- MSIOF0_RXD_MARK, TS_SPSYNC0_MARK, SSI_WS2_MARK,
- ADICS_SAMP_MARK, DU2_CDE_MARK, QPOLB_MARK, HRX0_C_MARK,
- USB1_PWEN_MARK, AUDIO_CLKOUT_D_MARK, USB1_OVC_MARK,
- TCLK1_B_MARK,
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-
- PINMUX_DATA(VI1_DATA7_VI1_B7_MARK, FN_VI1_DATA7_VI1_B7),
- PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
- PINMUX_DATA(USB0_OVC_VBUS_MARK, FN_USB0_OVC_VBUS),
- PINMUX_DATA(USB2_PWEN_MARK, FN_USB2_PWEN),
- PINMUX_DATA(USB2_OVC_MARK, FN_USB2_OVC),
- PINMUX_DATA(AVS1_MARK, FN_AVS1),
- PINMUX_DATA(AVS2_MARK, FN_AVS2),
- PINMUX_DATA(DU_DOTCLKIN0_MARK, FN_DU_DOTCLKIN0),
- PINMUX_DATA(DU_DOTCLKIN2_MARK, FN_DU_DOTCLKIN2),
-
- PINMUX_IPSR_DATA(IP6_2_0, DACK0),
- PINMUX_IPSR_DATA(IP6_2_0, IRQ0),
- PINMUX_IPSR_DATA(IP6_2_0, INTC_IRQ0_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_WS78_C, SEL_SSI7_2),
- PINMUX_IPSR_DATA(IP6_5_3, DREQ1_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1),
- PINMUX_IPSR_DATA(IP6_8_6, DACK1),
- PINMUX_IPSR_DATA(IP6_8_6, IRQ1),
- PINMUX_IPSR_DATA(IP6_8_6, INTC_IRQ1_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_WS6_B, SEL_SSI6_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2),
- PINMUX_IPSR_DATA(IP6_10_9, DREQ2_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HSCK1_B, SEL_HSCIF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1),
- PINMUX_IPSR_DATA(IP6_13_11, DACK2),
- PINMUX_IPSR_DATA(IP6_13_11, IRQ2),
- PINMUX_IPSR_DATA(IP6_13_11, INTC_IRQ2_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1),
- PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV),
- PINMUX_IPSR_DATA(IP6_16_14, RMII_CRS_DV),
- PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_E, SEL_IIC2_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_CIS_E, SEL_I2C2_4),
- PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER),
- PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_E, SEL_IIC2_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_CIS_E, SEL_I2C2_4),
- PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0),
- PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4),
- PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1),
- PINMUX_IPSR_DATA(IP6_25_23, RMII_RXD1),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, GLO_I1_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4),
- PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK),
- PINMUX_IPSR_DATA(IP6_28_26, RMII_LINK),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4),
- PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK),
- PINMUX_IPSR_DATA(IP6_31_29, RMII_REF_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5),
-
- PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO),
- PINMUX_IPSR_DATA(IP7_2_0, RMII_MDIO),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5),
- PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
- PINMUX_IPSR_DATA(IP7_5_3, RMII_TXD1),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5),
- PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
- PINMUX_IPSR_DATA(IP7_7_6, RMII_TX_EN),
- PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
- PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC),
- PINMUX_IPSR_DATA(IP7_9_8, RMII_MAGIC),
- PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2),
- PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0),
- PINMUX_IPSR_DATA(IP7_12_10, RMII_TXD0),
- PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2),
- PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC),
- PINMUX_IPSR_DATA(IP7_15_13, RMII_MDC),
- PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2),
- PINMUX_IPSR_DATA(IP7_18_16, PWM0),
- PINMUX_IPSR_MODSEL_DATA(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_18_16, GLO_SS_C, SEL_GPS_2),
- PINMUX_IPSR_DATA(IP7_21_19, PWM1),
- PINMUX_IPSR_MODSEL_DATA(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_21_19, GLO_RFON_C, SEL_GPS_2),
- PINMUX_IPSR_DATA(IP7_21_19, PCMOE_N),
- PINMUX_IPSR_DATA(IP7_24_22, PWM2),
- PINMUX_IPSR_DATA(IP7_24_22, PWMFSW0),
- PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
- PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
- PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN),
- PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
- PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
- PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N),
- PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1),
- PINMUX_IPSR_DATA(IP7_28_27, MII_RXD1),
- PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N),
- PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2),
- PINMUX_IPSR_DATA(IP7_30_29, MII_RXD2),
-
- PINMUX_IPSR_MODSEL_DATA(IP8_1_0, VI0_DATA1_VI0_B1, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_1_0, ATARD0_N),
- PINMUX_IPSR_DATA(IP8_1_0, AVB_RXD3),
- PINMUX_IPSR_DATA(IP8_1_0, MII_RXD3),
- PINMUX_IPSR_MODSEL_DATA(IP8_3_2, VI0_DATA2_VI0_B2, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_3_2, ATAWR0_N),
- PINMUX_IPSR_DATA(IP8_3_2, AVB_RXD4),
- PINMUX_IPSR_MODSEL_DATA(IP8_5_4, VI0_DATA3_VI0_B3, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_5_4, ATADIR0_N),
- PINMUX_IPSR_DATA(IP8_5_4, AVB_RXD5),
- PINMUX_IPSR_MODSEL_DATA(IP8_7_6, VI0_DATA4_VI0_B4, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_7_6, ATAG0_N),
- PINMUX_IPSR_DATA(IP8_7_6, AVB_RXD6),
- PINMUX_IPSR_MODSEL_DATA(IP8_9_8, VI0_DATA5_VI0_B5, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_9_8, EX_WAIT1),
- PINMUX_IPSR_DATA(IP8_9_8, AVB_RXD7),
- PINMUX_IPSR_MODSEL_DATA(IP8_11_10, VI0_DATA6_VI0_B6, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_11_10, AVB_RX_ER),
- PINMUX_IPSR_DATA(IP8_11_10, MII_RX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP8_13_12, VI0_DATA7_VI0_B7, SEL_VI0_0),
- PINMUX_IPSR_DATA(IP8_13_12, AVB_RX_CLK),
- PINMUX_IPSR_DATA(IP8_13_12, MII_RX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP8_15_14, VI1_CLK, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP8_15_14, AVB_RX_DV),
- PINMUX_IPSR_DATA(IP8_15_14, MII_RX_DV),
- PINMUX_IPSR_MODSEL_DATA(IP8_17_16, VI1_DATA0_VI1_B0, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_17_16, SCIFA1_SCK_D, SEL_SCIFA1_3),
- PINMUX_IPSR_DATA(IP8_17_16, AVB_CRS),
- PINMUX_IPSR_DATA(IP8_17_16, MII_CRS),
- PINMUX_IPSR_MODSEL_DATA(IP8_19_18, VI1_DATA1_VI1_B1, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_19_18, SCIFA1_RXD_D, SEL_SCIFA1_3),
- PINMUX_IPSR_DATA(IP8_19_18, AVB_MDC),
- PINMUX_IPSR_DATA(IP8_19_18, MII_MDC),
- PINMUX_IPSR_MODSEL_DATA(IP8_21_20, VI1_DATA2_VI1_B2, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_21_20, SCIFA1_TXD_D, SEL_SCIFA1_3),
- PINMUX_IPSR_DATA(IP8_21_20, AVB_MDIO),
- PINMUX_IPSR_DATA(IP8_21_20, MII_MDIO),
- PINMUX_IPSR_MODSEL_DATA(IP8_23_22, VI1_DATA3_VI1_B3, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_23_22, SCIFA1_CTS_N_D, SEL_SCIFA1_3),
- PINMUX_IPSR_DATA(IP8_23_22, AVB_GTX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP8_25_24, VI1_DATA4_VI1_B4, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3),
- PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC),
- PINMUX_IPSR_DATA(IP8_25_24, MII_MAGIC),
- PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3),
- PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK),
- PINMUX_IPSR_DATA(IP8_28, SD0_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP8_28, VI1_DATA0_VI1_B0_B, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP8_30_29, SD0_CMD),
- PINMUX_IPSR_MODSEL_DATA(IP8_30_29, SCIFB1_SCK_B, SEL_SCIFB1_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_30_29, VI1_DATA1_VI1_B1_B, SEL_VI1_1),
-
- PINMUX_IPSR_DATA(IP9_1_0, SD0_DAT0),
- PINMUX_IPSR_MODSEL_DATA(IP9_1_0, SCIFB1_RXD_B, SEL_SCIFB1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_DATA2_VI1_B2_B, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP9_3_2, SD0_DAT1),
- PINMUX_IPSR_MODSEL_DATA(IP9_3_2, SCIFB1_TXD_B, SEL_SCIFB1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_DATA3_VI1_B3_B, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP9_5_4, SD0_DAT2),
- PINMUX_IPSR_MODSEL_DATA(IP9_5_4, SCIFB1_CTS_N_B, SEL_SCIFB1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_DATA4_VI1_B4_B, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP9_7_6, SD0_DAT3),
- PINMUX_IPSR_MODSEL_DATA(IP9_7_6, SCIFB1_RTS_N_B, SEL_SCIFB1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_DATA5_VI1_B5_B, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP9_11_8, SD0_CD),
- PINMUX_IPSR_DATA(IP9_11_8, MMC0_D6),
- PINMUX_IPSR_MODSEL_DATA(IP9_11_8, TS_SDEN0_B, SEL_TSIF0_1),
- PINMUX_IPSR_DATA(IP9_11_8, USB0_EXTP),
- PINMUX_IPSR_MODSEL_DATA(IP9_11_8, GLO_SCLK, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI1_DATA6_VI1_B6_B, SEL_VI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_B, SEL_IIC1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_11_8, SCL1_CIS_B, SEL_I2C1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_11_8, VI2_DATA6_VI2_B6_B, SEL_VI2_1),
- PINMUX_IPSR_DATA(IP9_15_12, SD0_WP),
- PINMUX_IPSR_DATA(IP9_15_12, MMC0_D7),
- PINMUX_IPSR_MODSEL_DATA(IP9_15_12, TS_SPSYNC0_B, SEL_TSIF0_1),
- PINMUX_IPSR_DATA(IP9_15_12, USB0_IDIN),
- PINMUX_IPSR_MODSEL_DATA(IP9_15_12, GLO_SDATA, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI1_DATA7_VI1_B7_B, SEL_VI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_B, SEL_IIC1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_15_12, SDA1_CIS_B, SEL_I2C1_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_15_12, VI2_DATA7_VI2_B7_B, SEL_VI2_1),
- PINMUX_IPSR_DATA(IP9_17_16, SD1_CLK),
- PINMUX_IPSR_DATA(IP9_17_16, AVB_TX_EN),
- PINMUX_IPSR_DATA(IP9_17_16, MII_TX_EN),
- PINMUX_IPSR_DATA(IP9_19_18, SD1_CMD),
- PINMUX_IPSR_DATA(IP9_19_18, AVB_TX_ER),
- PINMUX_IPSR_DATA(IP9_19_18, MII_TX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SCIFB0_SCK_B, SEL_SCIFB_1),
- PINMUX_IPSR_DATA(IP9_21_20, SD1_DAT0),
- PINMUX_IPSR_DATA(IP9_21_20, AVB_TX_CLK),
- PINMUX_IPSR_DATA(IP9_21_20, MII_TX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SCIFB0_RXD_B, SEL_SCIFB_1),
- PINMUX_IPSR_DATA(IP9_23_22, SD1_DAT1),
- PINMUX_IPSR_DATA(IP9_23_22, AVB_LINK),
- PINMUX_IPSR_DATA(IP9_23_22, MII_LINK),
- PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SCIFB0_TXD_B, SEL_SCIFB_1),
- PINMUX_IPSR_DATA(IP9_25_24, SD1_DAT2),
- PINMUX_IPSR_DATA(IP9_25_24, AVB_COL),
- PINMUX_IPSR_DATA(IP9_25_24, MII_COL),
- PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SCIFB0_CTS_N_B, SEL_SCIFB_1),
- PINMUX_IPSR_DATA(IP9_27_26, SD1_DAT3),
- PINMUX_IPSR_DATA(IP9_27_26, AVB_RXD0),
- PINMUX_IPSR_DATA(IP9_27_26, MII_RXD0),
- PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SCIFB0_RTS_N_B, SEL_SCIFB_1),
- PINMUX_IPSR_DATA(IP9_31_28, SD1_CD),
- PINMUX_IPSR_DATA(IP9_31_28, MMC1_D6),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, TS_SDEN1, SEL_TSIF1_0),
- PINMUX_IPSR_DATA(IP9_31_28, USB1_EXTP),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, GLO_SS, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI0_CLK_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_D, SEL_IIC2_3),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SCL2_CIS_D, SEL_I2C2_3),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, SIM0_CLK_B, SEL_SIM_1),
- PINMUX_IPSR_MODSEL_DATA(IP9_31_28, VI3_CLK_B, SEL_VI3_1),
-
- PINMUX_IPSR_DATA(IP10_3_0, SD1_WP),
- PINMUX_IPSR_DATA(IP10_3_0, MMC1_D7),
- PINMUX_IPSR_MODSEL_DATA(IP10_3_0, TS_SPSYNC1, SEL_TSIF1_0),
- PINMUX_IPSR_DATA(IP10_3_0, USB1_IDIN),
- PINMUX_IPSR_MODSEL_DATA(IP10_3_0, GLO_RFON, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_3_0, VI1_CLK_B, SEL_VI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_D, SEL_IIC2_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SDA2_CIS_D, SEL_I2C2_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_3_0, SIM0_D_B, SEL_SIM_1),
- PINMUX_IPSR_DATA(IP10_6_4, SD2_CLK),
- PINMUX_IPSR_DATA(IP10_6_4, MMC0_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP10_6_4, SIM0_CLK, SEL_SIM_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI0_DATA0_VI0_B0_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_6_4, TS_SDEN0_C, SEL_TSIF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP10_6_4, GLO_SCLK_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_6_4, VI3_DATA0_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP10_10_7, SD2_CMD),
- PINMUX_IPSR_DATA(IP10_10_7, MMC0_CMD),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SIM0_D, SEL_SIM_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI0_DATA1_VI0_B1_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCIFB1_SCK_E, SEL_SCIFB1_4),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, SCK1_D, SEL_SCIF1_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, TS_SPSYNC0_C, SEL_TSIF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, GLO_SDATA_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_10_7, VI3_DATA1_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP10_14_11, SD2_DAT0),
- PINMUX_IPSR_DATA(IP10_14_11, MMC0_D0),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, FMCLK_B, SEL_FM_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI0_DATA2_VI0_B2_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, SCIFB1_RXD_E, SEL_SCIFB1_4),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, RX1_D, SEL_SCIF1_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, TS_SDAT0_C, SEL_TSIF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, GLO_SS_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_14_11, VI3_DATA2_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP10_18_15, SD2_DAT1),
- PINMUX_IPSR_DATA(IP10_18_15, MMC0_D1),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, FMIN_B, SEL_FM_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, RDS_DATA, SEL_RDS_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI0_DATA3_VI0_B3_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, SCIFB1_TXD_E, SEL_SCIFB1_4),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TX1_D, SEL_SCIF1_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, TS_SCK0_C, SEL_TSIF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, GLO_RFON_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_18_15, VI3_DATA3_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP10_22_19, SD2_DAT2),
- PINMUX_IPSR_DATA(IP10_22_19, MMC0_D2),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, BPFCLK_B, SEL_FM_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, RDS_CLK, SEL_RDS_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI0_DATA4_VI0_B4_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, HRX0_D, SEL_HSCIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, TS_SDEN1_B, SEL_TSIF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, GLO_Q0_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_22_19, VI3_DATA4_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP10_25_23, SD2_DAT3),
- PINMUX_IPSR_DATA(IP10_25_23, MMC0_D3),
- PINMUX_IPSR_MODSEL_DATA(IP10_25_23, SIM0_RST, SEL_SIM_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI0_DATA5_VI0_B5_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_25_23, HTX0_D, SEL_HSCIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_25_23, TS_SPSYNC1_B, SEL_TSIF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_25_23, GLO_Q1_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_25_23, VI3_DATA5_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP10_29_26, SD2_CD),
- PINMUX_IPSR_DATA(IP10_29_26, MMC0_D4),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT0_B, SEL_TSIF0_1),
- PINMUX_IPSR_DATA(IP10_29_26, USB2_EXTP),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI0_DATA6_VI0_B6_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, HCTS0_N_D, SEL_HSCIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, TS_SDAT1_B, SEL_TSIF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, GLO_I0_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP10_29_26, VI3_DATA6_B, SEL_VI3_1),
-
- PINMUX_IPSR_DATA(IP11_3_0, SD2_WP),
- PINMUX_IPSR_DATA(IP11_3_0, MMC0_D5),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK0_B, SEL_TSIF0_1),
- PINMUX_IPSR_DATA(IP11_3_0, USB2_IDIN),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI0_DATA7_VI0_B7_B, SEL_VI0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, HRTS0_N_D, SEL_HSCIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, TS_SCK1_B, SEL_TSIF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, GLO_I1_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_3_0, VI3_DATA7_B, SEL_VI3_1),
- PINMUX_IPSR_DATA(IP11_4, SD3_CLK),
- PINMUX_IPSR_DATA(IP11_4, MMC1_CLK),
- PINMUX_IPSR_DATA(IP11_6_5, SD3_CMD),
- PINMUX_IPSR_DATA(IP11_6_5, MMC1_CMD),
- PINMUX_IPSR_DATA(IP11_6_5, MTS_N),
- PINMUX_IPSR_DATA(IP11_8_7, SD3_DAT0),
- PINMUX_IPSR_DATA(IP11_8_7, MMC1_D0),
- PINMUX_IPSR_DATA(IP11_8_7, STM_N),
- PINMUX_IPSR_DATA(IP11_10_9, SD3_DAT1),
- PINMUX_IPSR_DATA(IP11_10_9, MMC1_D1),
- PINMUX_IPSR_DATA(IP11_10_9, MDATA),
- PINMUX_IPSR_DATA(IP11_12_11, SD3_DAT2),
- PINMUX_IPSR_DATA(IP11_12_11, MMC1_D2),
- PINMUX_IPSR_DATA(IP11_12_11, SDATA),
- PINMUX_IPSR_DATA(IP11_14_13, SD3_DAT3),
- PINMUX_IPSR_DATA(IP11_14_13, MMC1_D3),
- PINMUX_IPSR_DATA(IP11_14_13, SCKZ),
- PINMUX_IPSR_DATA(IP11_17_15, SD3_CD),
- PINMUX_IPSR_DATA(IP11_17_15, MMC1_D4),
- PINMUX_IPSR_MODSEL_DATA(IP11_17_15, TS_SDAT1, SEL_TSIF1_0),
- PINMUX_IPSR_DATA(IP11_17_15, VSP),
- PINMUX_IPSR_MODSEL_DATA(IP11_17_15, GLO_Q0, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SIM0_RST_B, SEL_SIM_1),
- PINMUX_IPSR_DATA(IP11_21_18, SD3_WP),
- PINMUX_IPSR_DATA(IP11_21_18, MMC1_D5),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, TS_SCK1, SEL_TSIF1_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, GLO_Q1, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_C, SEL_FM_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_B, SEL_RDS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_E, SEL_FM_4),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_D, SEL_RDS_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, FMIN_F, SEL_FM_5),
- PINMUX_IPSR_MODSEL_DATA(IP11_21_18, RDS_DATA_E, SEL_RDS_4),
- PINMUX_IPSR_DATA(IP11_23_22, MLB_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_B, SEL_IIC2_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_23_22, SCL2_CIS_B, SEL_I2C2_1),
- PINMUX_IPSR_DATA(IP11_26_24, MLB_SIG),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIFB1_RXD_D, SEL_SCIFB1_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, RX1_C, SEL_SCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_B, SEL_IIC2_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SDA2_CIS_B, SEL_I2C2_1),
- PINMUX_IPSR_DATA(IP11_29_27, MLB_DAT),
- PINMUX_IPSR_DATA(IP11_29_27, SPV_EVEN),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, SCIFB1_TXD_D, SEL_SCIFB1_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, TX1_C, SEL_SCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, BPFCLK_C, SEL_FM_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RDS_CLK_B, SEL_RDS_1),
- PINMUX_IPSR_DATA(IP11_31_30, SSI_SCK0129),
- PINMUX_IPSR_MODSEL_DATA(IP11_31_30, CAN_CLK_B, SEL_CANCLK_1),
- PINMUX_IPSR_DATA(IP11_31_30, MOUT0),
-
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- PINMUX_GPIO_GP_ALL(),
-
- GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC_VBUS),
- GPIO_FN(USB2_PWEN), GPIO_FN(USB2_OVC), GPIO_FN(AVS1), GPIO_FN(AVS2),
- GPIO_FN(DU_DOTCLKIN0), GPIO_FN(DU_DOTCLKIN2),
-
- /* IPSR0 - IPSR5 */
- /*IPSR6*/
- GPIO_FN(DACK0), GPIO_FN(IRQ0), GPIO_FN(INTC_IRQ0_N),
- GPIO_FN(SSI_SCK6_B), GPIO_FN(VI1_VSYNC_N), GPIO_FN(VI1_VSYNC_N_B),
- GPIO_FN(SSI_WS78_C), GPIO_FN(DREQ1_N), GPIO_FN(VI1_CLKENB),
- GPIO_FN(VI1_CLKENB_B), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SSI_SCK78_B),
- GPIO_FN(DACK1), GPIO_FN(IRQ1), GPIO_FN(INTC_IRQ1_N), GPIO_FN(SSI_WS6_B),
- GPIO_FN(SSI_SDATA8_C), GPIO_FN(DREQ2_N), GPIO_FN(HSCK1_B),
- GPIO_FN(HCTS0_N_B), GPIO_FN(MSIOF0_TXD_B), GPIO_FN(DACK2),
- GPIO_FN(IRQ2), GPIO_FN(INTC_IRQ2_N), GPIO_FN(SSI_SDATA6_B),
- GPIO_FN(HRTS0_N_B), GPIO_FN(MSIOF0_RXD_B), GPIO_FN(ETH_CRS_DV),
- GPIO_FN(RMII_CRS_DV), GPIO_FN(STP_ISCLK_0_B), GPIO_FN(TS_SDEN0_D),
- GPIO_FN(GLO_Q0_C), GPIO_FN(SCL2_E), GPIO_FN(SCL2_CIS_E),
- GPIO_FN(ETH_RX_ER), GPIO_FN(RMII_RX_ER), GPIO_FN(STP_ISD_0_B),
- GPIO_FN(TS_SPSYNC0_D), GPIO_FN(GLO_Q1_C), GPIO_FN(SDA2_E),
- GPIO_FN(SDA2_CIS_E), GPIO_FN(ETH_RXD0), GPIO_FN(RMII_RXD0),
- GPIO_FN(STP_ISEN_0_B), GPIO_FN(TS_SDAT0_D), GPIO_FN(GLO_I0_C),
- GPIO_FN(SCIFB1_SCK_G), GPIO_FN(SCK1_E), GPIO_FN(ETH_RXD1),
- GPIO_FN(RMII_RXD1), GPIO_FN(HRX0_E), GPIO_FN(STP_ISSYNC_0_B),
- GPIO_FN(TS_SCK0_D), GPIO_FN(GLO_I1_C), GPIO_FN(SCIFB1_RXD_G),
- GPIO_FN(RX1_E), GPIO_FN(ETH_LINK), GPIO_FN(RMII_LINK), GPIO_FN(HTX0_E),
- GPIO_FN(STP_IVCXO27_0_B), GPIO_FN(SCIFB1_TXD_G), GPIO_FN(TX1_E),
- GPIO_FN(ETH_REF_CLK), GPIO_FN(RMII_REF_CLK), GPIO_FN(HCTS0_N_E),
- GPIO_FN(STP_IVCXO27_1_B), GPIO_FN(HRX0_F),
-
- /*IPSR7*/
- GPIO_FN(ETH_MDIO), GPIO_FN(RMII_MDIO), GPIO_FN(HRTS0_N_E),
- GPIO_FN(SIM0_D_C), GPIO_FN(HCTS0_N_F), GPIO_FN(ETH_TXD1),
- GPIO_FN(RMII_TXD1), GPIO_FN(HTX0_F), GPIO_FN(BPFCLK_G),
- GPIO_FN(RDS_CLK_F), GPIO_FN(ETH_TX_EN), GPIO_FN(RMII_TX_EN),
- GPIO_FN(SIM0_CLK_C), GPIO_FN(HRTS0_N_F), GPIO_FN(ETH_MAGIC),
- GPIO_FN(RMII_MAGIC), GPIO_FN(SIM0_RST_C), GPIO_FN(ETH_TXD0),
- GPIO_FN(RMII_TXD0), GPIO_FN(STP_ISCLK_1_B), GPIO_FN(TS_SDEN1_C),
- GPIO_FN(GLO_SCLK_C), GPIO_FN(ETH_MDC), GPIO_FN(RMII_MDC),
- GPIO_FN(STP_ISD_1_B), GPIO_FN(TS_SPSYNC1_C), GPIO_FN(GLO_SDATA_C),
- GPIO_FN(PWM0), GPIO_FN(SCIFA2_SCK_C), GPIO_FN(STP_ISEN_1_B),
- GPIO_FN(TS_SDAT1_C), GPIO_FN(GLO_SS_C), GPIO_FN(PWM1),
- GPIO_FN(SCIFA2_TXD_C), GPIO_FN(STP_ISSYNC_1_B), GPIO_FN(TS_SCK1_C),
- GPIO_FN(GLO_RFON_C), GPIO_FN(PCMOE_N), GPIO_FN(PWM2), GPIO_FN(PWMFSW0),
- GPIO_FN(SCIFA2_RXD_C), GPIO_FN(PCMWE_N), GPIO_FN(IECLK_C),
- GPIO_FN(DU1_DOTCLKIN), GPIO_FN(AUDIO_CLKC), GPIO_FN(AUDIO_CLKOUT_C),
- GPIO_FN(VI0_CLK), GPIO_FN(ATACS00_N), GPIO_FN(AVB_RXD1),
- GPIO_FN(MII_RXD1), GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(ATACS10_N),
- GPIO_FN(AVB_RXD2), GPIO_FN(MII_RXD2),
-
- /*IPSR8*/
- GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(ATARD0_N), GPIO_FN(AVB_RXD3),
- GPIO_FN(MII_RXD3), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(ATAWR0_N),
- GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ATADIR0_N),
- GPIO_FN(AVB_RXD5), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ATAG0_N),
- GPIO_FN(AVB_RXD6), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(EX_WAIT1),
- GPIO_FN(AVB_RXD7), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RX_ER),
- GPIO_FN(MII_RX_ER), GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RX_CLK),
- GPIO_FN(MII_RX_CLK), GPIO_FN(VI1_CLK), GPIO_FN(AVB_RX_DV),
- GPIO_FN(MII_RX_DV), GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SCIFA1_SCK_D),
- GPIO_FN(AVB_CRS), GPIO_FN(MII_CRS), GPIO_FN(VI1_DATA1_VI1_B1),
- GPIO_FN(SCIFA1_RXD_D), GPIO_FN(AVB_MDC), GPIO_FN(MII_MDC),
- GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SCIFA1_TXD_D), GPIO_FN(AVB_MDIO),
- GPIO_FN(MII_MDIO), GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SCIFA1_CTS_N_D),
- GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI1_DATA4_VI1_B4),
- GPIO_FN(SCIFA1_RTS_N_D), GPIO_FN(AVB_MAGIC), GPIO_FN(MII_MAGIC),
- GPIO_FN(VI1_DATA5_VI1_B5), GPIO_FN(AVB_PHY_INT),
- GPIO_FN(VI1_DATA6_VI1_B6), GPIO_FN(AVB_GTXREFCLK),
- GPIO_FN(SD0_CLK), GPIO_FN(VI1_DATA0_VI1_B0_B), GPIO_FN(SD0_CMD),
- GPIO_FN(SCIFB1_SCK_B), GPIO_FN(VI1_DATA1_VI1_B1_B),
-
- /*IPSR9*/
- GPIO_FN(SD0_DAT0), GPIO_FN(SCIFB1_RXD_B), GPIO_FN(VI1_DATA2_VI1_B2_B),
- GPIO_FN(SD0_DAT1), GPIO_FN(SCIFB1_TXD_B), GPIO_FN(VI1_DATA3_VI1_B3_B),
- GPIO_FN(SD0_DAT2), GPIO_FN(SCIFB1_CTS_N_B), GPIO_FN(VI1_DATA4_VI1_B4_B),
- GPIO_FN(SD0_DAT3), GPIO_FN(SCIFB1_RTS_N_B), GPIO_FN(VI1_DATA5_VI1_B5_B),
- GPIO_FN(SD0_CD), GPIO_FN(MMC0_D6), GPIO_FN(TS_SDEN0_B),
- GPIO_FN(USB0_EXTP), GPIO_FN(GLO_SCLK), GPIO_FN(VI1_DATA6_VI1_B6_B),
- GPIO_FN(SCL1_B), GPIO_FN(SCL1_CIS_B), GPIO_FN(VI2_DATA6_VI2_B6_B),
- GPIO_FN(SD0_WP), GPIO_FN(MMC0_D7), GPIO_FN(TS_SPSYNC0_B),
- GPIO_FN(USB0_IDIN), GPIO_FN(GLO_SDATA), GPIO_FN(VI1_DATA7_VI1_B7_B),
- GPIO_FN(SDA1_B), GPIO_FN(SDA1_CIS_B), GPIO_FN(VI2_DATA7_VI2_B7_B),
- GPIO_FN(SD1_CLK), GPIO_FN(AVB_TX_EN), GPIO_FN(MII_TX_EN),
- GPIO_FN(SD1_CMD), GPIO_FN(AVB_TX_ER), GPIO_FN(MII_TX_ER),
- GPIO_FN(SCIFB0_SCK_B), GPIO_FN(SD1_DAT0), GPIO_FN(AVB_TX_CLK),
- GPIO_FN(MII_TX_CLK), GPIO_FN(SCIFB0_RXD_B), GPIO_FN(SD1_DAT1),
- GPIO_FN(AVB_LINK), GPIO_FN(MII_LINK), GPIO_FN(SCIFB0_TXD_B),
- GPIO_FN(SD1_DAT2), GPIO_FN(AVB_COL), GPIO_FN(MII_COL),
- GPIO_FN(SCIFB0_CTS_N_B), GPIO_FN(SD1_DAT3), GPIO_FN(AVB_RXD0),
- GPIO_FN(MII_RXD0), GPIO_FN(SCIFB0_RTS_N_B), GPIO_FN(SD1_CD),
- GPIO_FN(MMC1_D6), GPIO_FN(TS_SDEN1), GPIO_FN(USB1_EXTP),
- GPIO_FN(GLO_SS), GPIO_FN(VI0_CLK_B), GPIO_FN(SCL2_D),
- GPIO_FN(SCL2_CIS_D), GPIO_FN(SIM0_CLK_B), GPIO_FN(VI3_CLK_B),
-
- /*IPSR10*/
- GPIO_FN(SD1_WP), GPIO_FN(MMC1_D7), GPIO_FN(TS_SPSYNC1),
- GPIO_FN(USB1_IDIN), GPIO_FN(GLO_RFON), GPIO_FN(VI1_CLK_B),
- GPIO_FN(SDA2_D), GPIO_FN(SDA2_CIS_D), GPIO_FN(SIM0_D_B),
- GPIO_FN(SD2_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(SIM0_CLK),
- GPIO_FN(VI0_DATA0_VI0_B0_B), GPIO_FN(TS_SDEN0_C), GPIO_FN(GLO_SCLK_B),
- GPIO_FN(VI3_DATA0_B), GPIO_FN(SD2_CMD), GPIO_FN(MMC0_CMD),
- GPIO_FN(SIM0_D), GPIO_FN(VI0_DATA1_VI0_B1_B), GPIO_FN(SCIFB1_SCK_E),
- GPIO_FN(SCK1_D), GPIO_FN(TS_SPSYNC0_C), GPIO_FN(GLO_SDATA_B),
- GPIO_FN(VI3_DATA1_B), GPIO_FN(SD2_DAT0), GPIO_FN(MMC0_D0),
- GPIO_FN(FMCLK_B), GPIO_FN(VI0_DATA2_VI0_B2_B), GPIO_FN(SCIFB1_RXD_E),
- GPIO_FN(RX1_D), GPIO_FN(TS_SDAT0_C), GPIO_FN(GLO_SS_B),
- GPIO_FN(VI3_DATA2_B), GPIO_FN(SD2_DAT1), GPIO_FN(MMC0_D1),
- GPIO_FN(FMIN_B), GPIO_FN(RDS_DATA), GPIO_FN(VI0_DATA3_VI0_B3_B),
- GPIO_FN(SCIFB1_TXD_E), GPIO_FN(TX1_D), GPIO_FN(TS_SCK0_C),
- GPIO_FN(GLO_RFON_B), GPIO_FN(VI3_DATA3_B), GPIO_FN(SD2_DAT2),
- GPIO_FN(MMC0_D2), GPIO_FN(BPFCLK_B), GPIO_FN(RDS_CLK),
- GPIO_FN(VI0_DATA4_VI0_B4_B), GPIO_FN(HRX0_D), GPIO_FN(TS_SDEN1_B),
- GPIO_FN(GLO_Q0_B), GPIO_FN(VI3_DATA4_B), GPIO_FN(SD2_DAT3),
- GPIO_FN(MMC0_D3), GPIO_FN(SIM0_RST), GPIO_FN(VI0_DATA5_VI0_B5_B),
- GPIO_FN(HTX0_D), GPIO_FN(TS_SPSYNC1_B), GPIO_FN(GLO_Q1_B),
- GPIO_FN(VI3_DATA5_B), GPIO_FN(SD2_CD), GPIO_FN(MMC0_D4),
- GPIO_FN(TS_SDAT0_B), GPIO_FN(USB2_EXTP), GPIO_FN(GLO_I0),
- GPIO_FN(VI0_DATA6_VI0_B6_B), GPIO_FN(HCTS0_N_D), GPIO_FN(TS_SDAT1_B),
- GPIO_FN(GLO_I0_B), GPIO_FN(VI3_DATA6_B),
-
- /*IPSR11*/
- GPIO_FN(SD2_WP), GPIO_FN(MMC0_D5), GPIO_FN(TS_SCK0_B),
- GPIO_FN(USB2_IDIN), GPIO_FN(GLO_I1), GPIO_FN(VI0_DATA7_VI0_B7_B),
- GPIO_FN(HRTS0_N_D), GPIO_FN(TS_SCK1_B), GPIO_FN(GLO_I1_B),
- GPIO_FN(VI3_DATA7_B), GPIO_FN(SD3_CLK), GPIO_FN(MMC1_CLK),
- GPIO_FN(SD3_CMD), GPIO_FN(MMC1_CMD), GPIO_FN(MTS_N), GPIO_FN(SD3_DAT0),
- GPIO_FN(MMC1_D0), GPIO_FN(STM_N), GPIO_FN(SD3_DAT1), GPIO_FN(MMC1_D1),
- GPIO_FN(MDATA), GPIO_FN(SD3_DAT2), GPIO_FN(MMC1_D2), GPIO_FN(SDATA),
- GPIO_FN(SD3_DAT3), GPIO_FN(MMC1_D3), GPIO_FN(SCKZ), GPIO_FN(SD3_CD),
- GPIO_FN(MMC1_D4), GPIO_FN(TS_SDAT1), GPIO_FN(VSP), GPIO_FN(GLO_Q0),
- GPIO_FN(SIM0_RST_B), GPIO_FN(SD3_WP), GPIO_FN(MMC1_D5),
- GPIO_FN(TS_SCK1), GPIO_FN(GLO_Q1), GPIO_FN(FMIN_C), GPIO_FN(RDS_DATA_B),
- GPIO_FN(FMIN_E), GPIO_FN(RDS_DATA_D), GPIO_FN(FMIN_F),
- GPIO_FN(RDS_DATA_E), GPIO_FN(MLB_CLK), GPIO_FN(SCL2_B),
- GPIO_FN(SCL2_CIS_B), GPIO_FN(MLB_SIG), GPIO_FN(SCIFB1_RXD_D),
- GPIO_FN(RX1_C), GPIO_FN(SDA2_B), GPIO_FN(SDA2_CIS_B), GPIO_FN(MLB_DAT),
- GPIO_FN(SPV_EVEN), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(TX1_C),
- GPIO_FN(BPFCLK_C), GPIO_FN(RDS_CLK_B), GPIO_FN(SSI_SCK0129),
- GPIO_FN(CAN_CLK_B), GPIO_FN(MOUT0),
-
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
- GP_0_31_FN, FN_IP3_17_15,
- GP_0_30_FN, FN_IP3_14_12,
- GP_0_29_FN, FN_IP3_11_8,
- GP_0_28_FN, FN_IP3_7_4,
- GP_0_27_FN, FN_IP3_3_0,
- GP_0_26_FN, FN_IP2_28_26,
- GP_0_25_FN, FN_IP2_25_22,
- GP_0_24_FN, FN_IP2_21_18,
- GP_0_23_FN, FN_IP2_17_15,
- GP_0_22_FN, FN_IP2_14_12,
- GP_0_21_FN, FN_IP2_11_9,
- GP_0_20_FN, FN_IP2_8_6,
- GP_0_19_FN, FN_IP2_5_3,
- GP_0_18_FN, FN_IP2_2_0,
- GP_0_17_FN, FN_IP1_29_28,
- GP_0_16_FN, FN_IP1_27_26,
- GP_0_15_FN, FN_IP1_25_22,
- GP_0_14_FN, FN_IP1_21_18,
- GP_0_13_FN, FN_IP1_17_15,
- GP_0_12_FN, FN_IP1_14_12,
- GP_0_11_FN, FN_IP1_11_8,
- GP_0_10_FN, FN_IP1_7_4,
- GP_0_9_FN, FN_IP1_3_0,
- GP_0_8_FN, FN_IP0_30_27,
- GP_0_7_FN, FN_IP0_26_23,
- GP_0_6_FN, FN_IP0_22_20,
- GP_0_5_FN, FN_IP0_19_16,
- GP_0_4_FN, FN_IP0_15_12,
- GP_0_3_FN, FN_IP0_11_9,
- GP_0_2_FN, FN_IP0_8_6,
- GP_0_1_FN, FN_IP0_5_3,
- GP_0_0_FN, FN_IP0_2_0 }
- },
- { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
- 0, 0,
- 0, 0,
- GP_1_29_FN, FN_IP6_13_11,
- GP_1_28_FN, FN_IP6_10_9,
- GP_1_27_FN, FN_IP6_8_6,
- GP_1_26_FN, FN_IP6_5_3,
- GP_1_25_FN, FN_IP6_2_0,
- GP_1_24_FN, FN_IP5_29_27,
- GP_1_23_FN, FN_IP5_26_24,
- GP_1_22_FN, FN_IP5_23_21,
- GP_1_21_FN, FN_IP5_20_18,
- GP_1_20_FN, FN_IP5_17_15,
- GP_1_19_FN, FN_IP5_14_13,
- GP_1_18_FN, FN_IP5_12_10,
- GP_1_17_FN, FN_IP5_9_6,
- GP_1_16_FN, FN_IP5_5_3,
- GP_1_15_FN, FN_IP5_2_0,
- GP_1_14_FN, FN_IP4_29_27,
- GP_1_13_FN, FN_IP4_26_24,
- GP_1_12_FN, FN_IP4_23_21,
- GP_1_11_FN, FN_IP4_20_18,
- GP_1_10_FN, FN_IP4_17_15,
- GP_1_9_FN, FN_IP4_14_12,
- GP_1_8_FN, FN_IP4_11_9,
- GP_1_7_FN, FN_IP4_8_6,
- GP_1_6_FN, FN_IP4_5_3,
- GP_1_5_FN, FN_IP4_2_0,
- GP_1_4_FN, FN_IP3_31_29,
- GP_1_3_FN, FN_IP3_28_26,
- GP_1_2_FN, FN_IP3_25_23,
- GP_1_1_FN, FN_IP3_22_20,
- GP_1_0_FN, FN_IP3_19_18, }
- },
- { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
- 0, 0,
- 0, 0,
- GP_2_29_FN, FN_IP7_15_13,
- GP_2_28_FN, FN_IP7_12_10,
- GP_2_27_FN, FN_IP7_9_8,
- GP_2_26_FN, FN_IP7_7_6,
- GP_2_25_FN, FN_IP7_5_3,
- GP_2_24_FN, FN_IP7_2_0,
- GP_2_23_FN, FN_IP6_31_29,
- GP_2_22_FN, FN_IP6_28_26,
- GP_2_21_FN, FN_IP6_25_23,
- GP_2_20_FN, FN_IP6_22_20,
- GP_2_19_FN, FN_IP6_19_17,
- GP_2_18_FN, FN_IP6_16_14,
- GP_2_17_FN, FN_VI1_DATA7_VI1_B7,
- GP_2_16_FN, FN_IP8_27,
- GP_2_15_FN, FN_IP8_26,
- GP_2_14_FN, FN_IP8_25_24,
- GP_2_13_FN, FN_IP8_23_22,
- GP_2_12_FN, FN_IP8_21_20,
- GP_2_11_FN, FN_IP8_19_18,
- GP_2_10_FN, FN_IP8_17_16,
- GP_2_9_FN, FN_IP8_15_14,
- GP_2_8_FN, FN_IP8_13_12,
- GP_2_7_FN, FN_IP8_11_10,
- GP_2_6_FN, FN_IP8_9_8,
- GP_2_5_FN, FN_IP8_7_6,
- GP_2_4_FN, FN_IP8_5_4,
- GP_2_3_FN, FN_IP8_3_2,
- GP_2_2_FN, FN_IP8_1_0,
- GP_2_1_FN, FN_IP7_30_29,
- GP_2_0_FN, FN_IP7_28_27 }
- },
- { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
- GP_3_31_FN, FN_IP11_21_18,
- GP_3_30_FN, FN_IP11_17_15,
- GP_3_29_FN, FN_IP11_14_13,
- GP_3_28_FN, FN_IP11_12_11,
- GP_3_27_FN, FN_IP11_10_9,
- GP_3_26_FN, FN_IP11_8_7,
- GP_3_25_FN, FN_IP11_6_5,
- GP_3_24_FN, FN_IP11_4,
- GP_3_23_FN, FN_IP11_3_0,
- GP_3_22_FN, FN_IP10_29_26,
- GP_3_21_FN, FN_IP10_25_23,
- GP_3_20_FN, FN_IP10_22_19,
- GP_3_19_FN, FN_IP10_18_15,
- GP_3_18_FN, FN_IP10_14_11,
- GP_3_17_FN, FN_IP10_10_7,
- GP_3_16_FN, FN_IP10_6_4,
- GP_3_15_FN, FN_IP10_3_0,
- GP_3_14_FN, FN_IP9_31_28,
- GP_3_13_FN, FN_IP9_27_26,
- GP_3_12_FN, FN_IP9_25_24,
- GP_3_11_FN, FN_IP9_23_22,
- GP_3_10_FN, FN_IP9_21_20,
- GP_3_9_FN, FN_IP9_19_18,
- GP_3_8_FN, FN_IP9_17_16,
- GP_3_7_FN, FN_IP9_15_12,
- GP_3_6_FN, FN_IP9_11_8,
- GP_3_5_FN, FN_IP9_7_6,
- GP_3_4_FN, FN_IP9_5_4,
- GP_3_3_FN, FN_IP9_3_2,
- GP_3_2_FN, FN_IP9_1_0,
- GP_3_1_FN, FN_IP8_30_29,
- GP_3_0_FN, FN_IP8_28 }
- },
- { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
- GP_4_31_FN, FN_IP14_18_16,
- GP_4_30_FN, FN_IP14_15_12,
- GP_4_29_FN, FN_IP14_11_9,
- GP_4_28_FN, FN_IP14_8_6,
- GP_4_27_FN, FN_IP14_5_3,
- GP_4_26_FN, FN_IP14_2_0,
- GP_4_25_FN, FN_IP13_30_29,
- GP_4_24_FN, FN_IP13_28_26,
- GP_4_23_FN, FN_IP13_25_23,
- GP_4_22_FN, FN_IP13_22_19,
- GP_4_21_FN, FN_IP13_18_16,
- GP_4_20_FN, FN_IP13_15_13,
- GP_4_19_FN, FN_IP13_12_10,
- GP_4_18_FN, FN_IP13_9_7,
- GP_4_17_FN, FN_IP13_6_3,
- GP_4_16_FN, FN_IP13_2_0,
- GP_4_15_FN, FN_IP12_30_28,
- GP_4_14_FN, FN_IP12_27_25,
- GP_4_13_FN, FN_IP12_24_23,
- GP_4_12_FN, FN_IP12_22_20,
- GP_4_11_FN, FN_IP12_19_17,
- GP_4_10_FN, FN_IP12_16_14,
- GP_4_9_FN, FN_IP12_13_11,
- GP_4_8_FN, FN_IP12_10_8,
- GP_4_7_FN, FN_IP12_7_6,
- GP_4_6_FN, FN_IP12_5_4,
- GP_4_5_FN, FN_IP12_3_2,
- GP_4_4_FN, FN_IP12_1_0,
- GP_4_3_FN, FN_IP11_31_30,
- GP_4_2_FN, FN_IP11_29_27,
- GP_4_1_FN, FN_IP11_26_24,
- GP_4_0_FN, FN_IP11_23_22 }
- },
- { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
- GP_5_31_FN, FN_IP7_24_22,
- GP_5_30_FN, FN_IP7_21_19,
- GP_5_29_FN, FN_IP7_18_16,
- GP_5_28_FN, FN_DU_DOTCLKIN2,
- GP_5_27_FN, FN_IP7_26_25,
- GP_5_26_FN, FN_DU_DOTCLKIN0,
- GP_5_25_FN, FN_AVS2,
- GP_5_24_FN, FN_AVS1,
- GP_5_23_FN, FN_USB2_OVC,
- GP_5_22_FN, FN_USB2_PWEN,
- GP_5_21_FN, FN_IP16_7,
- GP_5_20_FN, FN_IP16_6,
- GP_5_19_FN, FN_USB0_OVC_VBUS,
- GP_5_18_FN, FN_USB0_PWEN,
- GP_5_17_FN, FN_IP16_5_3,
- GP_5_16_FN, FN_IP16_2_0,
- GP_5_15_FN, FN_IP15_29_28,
- GP_5_14_FN, FN_IP15_27_26,
- GP_5_13_FN, FN_IP15_25_23,
- GP_5_12_FN, FN_IP15_22_20,
- GP_5_11_FN, FN_IP15_19_18,
- GP_5_10_FN, FN_IP15_17_16,
- GP_5_9_FN, FN_IP15_15_14,
- GP_5_8_FN, FN_IP15_13_12,
- GP_5_7_FN, FN_IP15_11_9,
- GP_5_6_FN, FN_IP15_8_6,
- GP_5_5_FN, FN_IP15_5_3,
- GP_5_4_FN, FN_IP15_2_0,
- GP_5_3_FN, FN_IP14_30_28,
- GP_5_2_FN, FN_IP14_27_25,
- GP_5_1_FN, FN_IP14_24_22,
- GP_5_0_FN, FN_IP14_21_19 }
- },
- /* IPSR0 - IPSR5 */
- { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
- 3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3) {
- /* IP6_31_29 [3] */
- FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
- FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0,
- /* IP6_28_26 [3] */
- FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
- FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0,
- /* IP6_25_23 [3] */
- FN_ETH_RXD1, FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
- FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E,
- /* IP6_22_20 [3] */
- FN_ETH_RXD0, FN_RMII_RXD0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D,
- FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0,
- /* IP6_19_17 [3] */
- FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B,
- FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_SDA2_E, FN_SDA2_CIS_E, 0,
- /* IP6_16_14 [3] */
- FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
- FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
- FN_SCL2_CIS_E, 0,
- /* IP6_13_11 [3] */
- FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
- FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 0, 0,
- /* IP6_10_9 [2] */
- FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, FN_MSIOF0_TXD_B,
- /* IP6_8_6 [3] */
- FN_DACK1, FN_IRQ1, FN_INTC_IRQ1_N, FN_SSI_WS6_B,
- FN_SSI_SDATA8_C, 0, 0, 0,
- /* IP6_5_3 [3] */
- FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
- FN_SSI_SDATA7_C, FN_SSI_SCK78_B, 0, 0, 0,
- /* IP6_2_0 [3] */
- FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
- FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
- 1, 2, 2, 2, 3, 3, 3, 3, 3, 2, 2, 3, 3) {
- /* IP7_31 [1] */
- 0, 0,
- /* IP7_30_29 [2] */
- FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
- FN_MII_RXD2,
- /* IP7_28_27 [2] */
- FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
- /* IP7_26_25 [2] */
- FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
- /* IP7_24_22 [3] */
- FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
- 0, 0, 0,
- /* IP7_21_19 [3] */
- FN_PWM1, FN_SCIFA2_TXD_C, FN_STP_ISSYNC_1_B, FN_TS_SCK1_C,
- FN_GLO_RFON_C, FN_PCMOE_N, 0, 0,
- /* IP7_18_16 [3] */
- FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
- FN_GLO_SS_C, 0, 0, 0,
- /* IP7_15_13 [3] */
- FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
- FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0,
- /* IP7_12_10 [3] */
- FN_ETH_TXD0, FN_RMII_TXD0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C,
- FN_GLO_SCLK_C, 0, 0, 0,
- /* IP7_9_8 [2] */
- FN_ETH_MAGIC, FN_RMII_MAGIC, FN_SIM0_RST_C, 0,
- /* IP7_7_6 [2] */
- FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, FN_HRTS0_N_F,
- /* IP7_5_3 [3] */
- FN_ETH_TXD1, FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
- 0, 0, 0,
- /* IP7_2_0 [3] */
- FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
- FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
- 1, 2, 1, 1, 1, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2) {
- /* IP8_31 [1] */
- 0, 0,
- /* IP8_30_29 [2] */
- FN_SD0_CMD, FN_SCIFB1_SCK_B, FN_VI1_DATA1_VI1_B1_B, 0,
- /* IP8_28 [1] */
- FN_SD0_CLK, FN_VI1_DATA0_VI1_B0_B,
- /* IP8_27 [1] */
- FN_VI1_DATA6_VI1_B6, FN_AVB_GTXREFCLK,
- /* IP8_26 [1] */
- FN_VI1_DATA5_VI1_B5, FN_AVB_PHY_INT,
- /* IP8_25_24 [2] */
- FN_VI1_DATA4_VI1_B4, FN_SCIFA1_RTS_N_D,
- FN_AVB_MAGIC, FN_MII_MAGIC,
- /* IP8_23_22 [2] */
- FN_VI1_DATA3_VI1_B3, FN_SCIFA1_CTS_N_D, FN_AVB_GTX_CLK, 0,
- /* IP8_21_20 [2] */
- FN_VI1_DATA2_VI1_B2, FN_SCIFA1_TXD_D, FN_AVB_MDIO,
- FN_MII_MDIO,
- /* IP8_19_18 [2] */
- FN_VI1_DATA1_VI1_B1, FN_SCIFA1_RXD_D, FN_AVB_MDC, FN_MII_MDC,
- /* IP8_17_16 [2] */
- FN_VI1_DATA0_VI1_B0, FN_SCIFA1_SCK_D, FN_AVB_CRS, FN_MII_CRS,
- /* IP8_15_14 [2] */
- FN_VI1_CLK, FN_AVB_RX_DV, FN_MII_RX_DV, 0,
- /* IP8_13_12 [2] */
- FN_VI0_DATA7_VI0_B7, FN_AVB_RX_CLK, FN_MII_RX_CLK, 0,
- /* IP8_11_10 [2] */
- FN_VI0_DATA6_VI0_B6, FN_AVB_RX_ER, FN_MII_RX_ER, 0,
- /* IP8_9_8 [2] */
- FN_VI0_DATA5_VI0_B5, FN_EX_WAIT1, FN_AVB_RXD7, 0,
- /* IP8_7_6 [2] */
- FN_VI0_DATA4_VI0_B4, FN_ATAG0_N, FN_AVB_RXD6, 0,
- /* IP8_5_4 [2] */
- FN_VI0_DATA3_VI0_B3, FN_ATADIR0_N, FN_AVB_RXD5, 0,
- /* IP8_3_2 [2] */
- FN_VI0_DATA2_VI0_B2, FN_ATAWR0_N, FN_AVB_RXD4, 0,
- /* IP8_1_0 [2] */
- FN_VI0_DATA1_VI0_B1, FN_ATARD0_N, FN_AVB_RXD3, FN_MII_RXD3, }
- },
- { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
- 4, 2, 2, 2, 2, 2, 2, 4, 4, 2, 2, 2, 2) {
- /* IP9_31_28 [4] */
- FN_SD1_CD, FN_MMC1_D6, FN_TS_SDEN1, FN_USB1_EXTP,
- FN_GLO_SS, FN_VI0_CLK_B, FN_SCL2_D, FN_SCL2_CIS_D,
- FN_SIM0_CLK_B, FN_VI3_CLK_B, 0, 0, 0, 0, 0, 0,
- /* IP9_27_26 [2] */
- FN_SD1_DAT3, FN_AVB_RXD0, FN_MII_RXD0, FN_SCIFB0_RTS_N_B,
- /* IP9_25_24 [2] */
- FN_SD1_DAT2, FN_AVB_COL, FN_MII_COL, FN_SCIFB0_CTS_N_B,
- /* IP9_23_22 [2] */
- FN_SD1_DAT1, FN_AVB_LINK, FN_MII_LINK, FN_SCIFB0_TXD_B,
- /* IP9_21_20 [2] */
- FN_SD1_DAT0, FN_AVB_TX_CLK, FN_MII_TX_CLK, FN_SCIFB0_RXD_B,
- /* IP9_19_18 [2] */
- FN_SD1_CMD, FN_AVB_TX_ER, FN_MII_TX_ER, FN_SCIFB0_SCK_B,
- /* IP9_17_16 [2] */
- FN_SD1_CLK, FN_AVB_TX_EN, FN_MII_TX_EN, 0,
- /* IP9_15_12 [4] */
- FN_SD0_WP, FN_MMC0_D7, FN_TS_SPSYNC0_B, FN_USB0_IDIN,
- FN_GLO_SDATA, FN_VI1_DATA7_VI1_B7_B, FN_SDA1_B,
- FN_SDA1_CIS_B, FN_VI2_DATA7_VI2_B7_B, 0, 0, 0, 0, 0, 0, 0,
- /* IP9_11_8 [4] */
- FN_SD0_CD, FN_MMC0_D6, FN_TS_SDEN0_B, FN_USB0_EXTP,
- FN_GLO_SCLK, FN_VI1_DATA6_VI1_B6_B, FN_SCL1_B,
- FN_SCL1_CIS_B, FN_VI2_DATA6_VI2_B6_B, 0, 0, 0, 0, 0, 0, 0,
- /* IP9_7_6 [2] */
- FN_SD0_DAT3, FN_SCIFB1_RTS_N_B, FN_VI1_DATA5_VI1_B5_B, 0,
- /* IP9_5_4 [2] */
- FN_SD0_DAT2, FN_SCIFB1_CTS_N_B, FN_VI1_DATA4_VI1_B4_B, 0,
- /* IP9_3_2 [2] */
- FN_SD0_DAT1, FN_SCIFB1_TXD_B, FN_VI1_DATA3_VI1_B3_B, 0,
- /* IP9_1_0 [2] */
- FN_SD0_DAT0, FN_SCIFB1_RXD_B, FN_VI1_DATA2_VI1_B2_B, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060048, 32,
- 2, 4, 3, 4, 4, 4, 4, 3, 4) {
- /* IP10_31_30 [2] */
- 0, 0, 0, 0,
- /* IP10_29_26 [4] */
- FN_SD2_CD, FN_MMC0_D4, FN_TS_SDAT0_B, FN_USB2_EXTP, FN_GLO_I0,
- FN_VI0_DATA6_VI0_B6_B, FN_HCTS0_N_D, FN_TS_SDAT1_B,
- FN_GLO_I0_B, FN_VI3_DATA6_B, 0, 0, 0, 0, 0, 0,
- /* IP10_25_23 [3] */
- FN_SD2_DAT3, FN_MMC0_D3, FN_SIM0_RST, FN_VI0_DATA5_VI0_B5_B,
- FN_HTX0_D, FN_TS_SPSYNC1_B, FN_GLO_Q1_B, FN_VI3_DATA5_B,
- /* IP10_22_19 [4] */
- FN_SD2_DAT2, FN_MMC0_D2, FN_BPFCLK_B, FN_RDS_CLK,
- FN_VI0_DATA4_VI0_B4_B, FN_HRX0_D, FN_TS_SDEN1_B,
- FN_GLO_Q0_B, FN_VI3_DATA4_B, 0, 0, 0, 0, 0, 0, 0,
- /* IP10_18_15 [4] */
- FN_SD2_DAT1, FN_MMC0_D1, FN_FMIN_B, FN_RDS_DATA,
- FN_VI0_DATA3_VI0_B3_B, FN_SCIFB1_TXD_E, FN_TX1_D,
- FN_TS_SCK0_C, FN_GLO_RFON_B, FN_VI3_DATA3_B,
- 0, 0, 0, 0, 0, 0,
- /* IP10_14_11 [4] */
- FN_SD2_DAT0, FN_MMC0_D0, FN_FMCLK_B,
- FN_VI0_DATA2_VI0_B2_B, FN_SCIFB1_RXD_E, FN_RX1_D,
- FN_TS_SDAT0_C, FN_GLO_SS_B, FN_VI3_DATA2_B,
- 0, 0, 0, 0, 0, 0, 0,
- /* IP10_10_7 [4] */
- FN_SD2_CMD, FN_MMC0_CMD, FN_SIM0_D,
- FN_VI0_DATA1_VI0_B1_B, FN_SCIFB1_SCK_E, FN_SCK1_D,
- FN_TS_SPSYNC0_C, FN_GLO_SDATA_B, FN_VI3_DATA1_B,
- 0, 0, 0, 0, 0, 0, 0,
- /* IP10_6_4 [3] */
- FN_SD2_CLK, FN_MMC0_CLK, FN_SIM0_CLK,
- FN_VI0_DATA0_VI0_B0_B, FN_TS_SDEN0_C, FN_GLO_SCLK_B,
- FN_VI3_DATA0_B, 0,
- /* IP10_3_0 [4] */
- FN_SD1_WP, FN_MMC1_D7, FN_TS_SPSYNC1, FN_USB1_IDIN,
- FN_GLO_RFON, FN_VI1_CLK_B, FN_SDA2_D, FN_SDA2_CIS_D,
- FN_SIM0_D_B, 0, 0, 0, 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
- 2, 3, 3, 2, 4, 3, 2, 2, 2, 2, 2, 1, 4) {
- /* IP11_31_30 [2] */
- FN_SSI_SCK0129, FN_CAN_CLK_B, FN_MOUT0, 0,
- /* IP11_29_27 [3] */
- FN_MLB_DAT, FN_SPV_EVEN, FN_SCIFB1_TXD_D, FN_TX1_C, FN_BPFCLK_C,
- FN_RDS_CLK_B, 0, 0,
- /* IP11_26_24 [3] */
- FN_MLB_SIG, FN_SCIFB1_RXD_D, FN_RX1_C, FN_SDA2_B, FN_SDA2_CIS_B,
- 0, 0, 0,
- /* IP11_23_22 [2] */
- FN_MLB_CLK, FN_SCL2_B, FN_SCL2_CIS_B, 0,
- /* IP11_21_18 [4] */
- FN_SD3_WP, FN_MMC1_D5, FN_TS_SCK1, FN_GLO_Q1, FN_FMIN_C,
- FN_RDS_DATA_B, FN_FMIN_E, FN_RDS_DATA_D, FN_FMIN_F,
- FN_RDS_DATA_E, 0, 0, 0, 0, 0, 0,
- /* IP11_17_15 [3] */
- FN_SD3_CD, FN_MMC1_D4, FN_TS_SDAT1,
- FN_VSP, FN_GLO_Q0, FN_SIM0_RST_B, 0, 0,
- /* IP11_14_13 [2] */
- FN_SD3_DAT3, FN_MMC1_D3, FN_SCKZ, 0,
- /* IP11_12_11 [2] */
- FN_SD3_DAT2, FN_MMC1_D2, FN_SDATA, 0,
- /* IP11_10_9 [2] */
- FN_SD3_DAT1, FN_MMC1_D1, FN_MDATA, 0,
- /* IP11_8_7 [2] */
- FN_SD3_DAT0, FN_MMC1_D0, FN_STM_N, 0,
- /* IP11_6_5 [2] */
- FN_SD3_CMD, FN_MMC1_CMD, FN_MTS_N, 0,
- /* IP11_4 [1] */
- FN_SD3_CLK, FN_MMC1_CLK,
- /* IP11_3_0 [4] */
- FN_SD2_WP, FN_MMC0_D5, FN_TS_SCK0_B, FN_USB2_IDIN,
- FN_GLO_I1, FN_VI0_DATA7_VI0_B7_B, FN_HRTS0_N_D,
- FN_TS_SCK1_B, FN_GLO_I1_B, FN_VI3_DATA7_B, 0, 0, 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
- 3, 2, 2, 3, 2, 1, 1, 1, 2, 1,
- 2, 1, 1, 1, 1, 2, 1, 1, 2, 1, 1) {
- /* SEL_SCIF1 [3] */
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
- FN_SEL_SCIF1_4, 0, 0, 0,
- /* SEL_SCIFB [2] */
- FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, 0,
- /* SEL_SCIFB2 [2] */
- FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, 0,
- /* SEL_SCIFB1 [3] */
- FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2,
- FN_SEL_SCIFB1_3, FN_SEL_SCIFB1_4, FN_SEL_SCIFB1_5,
- FN_SEL_SCIFB1_6, 0,
- /* SEL_SCIFA1 [2] */
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,
- FN_SEL_SCIFA1_3,
- /* SEL_SCIF0 [1] */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
- /* SEL_SCIFA [1] */
- FN_SEL_SCFA_0, FN_SEL_SCFA_1,
- /* SEL_SOF1 [1] */
- FN_SEL_SOF1_0, FN_SEL_SOF1_1,
- /* SEL_SSI7 [2] */
- FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0,
- /* SEL_SSI6 [1] */
- FN_SEL_SSI6_0, FN_SEL_SSI6_1,
- /* SEL_SSI5 [2] */
- FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2, 0,
- /* SEL_VI3 [1] */
- FN_SEL_VI3_0, FN_SEL_VI3_1,
- /* SEL_VI2 [1] */
- FN_SEL_VI2_0, FN_SEL_VI2_1,
- /* SEL_VI1 [1] */
- FN_SEL_VI1_0, FN_SEL_VI1_1,
- /* SEL_VI0 [1] */
- FN_SEL_VI0_0, FN_SEL_VI0_1,
- /* SEL_TSIF1 [2] */
- FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2, 0,
- /* RESERVED [1] */
- 0, 0,
- /* SEL_LBS [1] */
- FN_SEL_LBS_0, FN_SEL_LBS_1,
- /* SEL_TSIF0 [2] */
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- /* SEL_SOF3 [1] */
- FN_SEL_SOF3_0, FN_SEL_SOF3_1,
- /* SEL_SOF0 [1] */
- FN_SEL_SOF0_0, FN_SEL_SOF0_1, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
- 2, 1, 1, 1, 1, 2, 1, 2, 1,
- 2, 1, 1, 1, 3, 3, 2, 3, 2, 2) {
- /* RESEVED [2] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_TMU1 [1] */
- FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- /* SEL_HSCIF1 [1] */
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
- /* SEL_SCIFCLK [1] */
- FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
- /* SEL_CAN0 [2] */
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- /* SEL_CANCLK [1] */
- FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
- /* SEL_SCIFA2 [2] */
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2, 0,
- /* SEL_CAN1 [1] */
- FN_SEL_CAN1_0, FN_SEL_CAN1_1,
- /* RESEVED [2] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_ADI [1] */
- FN_SEL_ADI_0, FN_SEL_ADI_1,
- /* SEL_SSP [1] */
- FN_SEL_SSP_0, FN_SEL_SSP_1,
- /* SEL_FM [3] */
- FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
- FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6, 0,
- /* SEL_HSCIF0 [3] */
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,
- FN_SEL_HSCIF0_3, FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5, 0, 0,
- /* SEL_GPS [2] */
- FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, 0,
- /* SEL_RDS [3] */
- FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
- FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5, 0, 0,
- /* SEL_SIM [2] */
- FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2, 0,
- /* SEL_SSI8 [2] */
- FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
- 1, 1, 2, 4, 4, 2, 2,
- 4, 2, 3, 2, 3, 2) {
- /* SEL_IICDVFS [1] */
- FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
- /* SEL_IIC0 [1] */
- FN_SEL_IIC0_0, FN_SEL_IIC0_1,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* RESEVED [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_IEB [2] */
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
- /* RESEVED [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_IIC2 [3] */
- FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
- FN_SEL_IIC2_4, 0, 0, 0,
- /* SEL_IIC1 [2] */
- FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, 0,
- /* SEL_I2C2 [3] */
- FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
- FN_SEL_I2C2_4, 0, 0, 0,
- /* SEL_I2C1 [2] */
- FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, 0, }
- },
- { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
- { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
- 0, 0,
- 0, 0,
- GP_1_29_IN, GP_1_29_OUT,
- GP_1_28_IN, GP_1_28_OUT,
- GP_1_27_IN, GP_1_27_OUT,
- GP_1_26_IN, GP_1_26_OUT,
- GP_1_25_IN, GP_1_25_OUT,
- GP_1_24_IN, GP_1_24_OUT,
- GP_1_23_IN, GP_1_23_OUT,
- GP_1_22_IN, GP_1_22_OUT,
- GP_1_21_IN, GP_1_21_OUT,
- GP_1_20_IN, GP_1_20_OUT,
- GP_1_19_IN, GP_1_19_OUT,
- GP_1_18_IN, GP_1_18_OUT,
- GP_1_17_IN, GP_1_17_OUT,
- GP_1_16_IN, GP_1_16_OUT,
- GP_1_15_IN, GP_1_15_OUT,
- GP_1_14_IN, GP_1_14_OUT,
- GP_1_13_IN, GP_1_13_OUT,
- GP_1_12_IN, GP_1_12_OUT,
- GP_1_11_IN, GP_1_11_OUT,
- GP_1_10_IN, GP_1_10_OUT,
- GP_1_9_IN, GP_1_9_OUT,
- GP_1_8_IN, GP_1_8_OUT,
- GP_1_7_IN, GP_1_7_OUT,
- GP_1_6_IN, GP_1_6_OUT,
- GP_1_5_IN, GP_1_5_OUT,
- GP_1_4_IN, GP_1_4_OUT,
- GP_1_3_IN, GP_1_3_OUT,
- GP_1_2_IN, GP_1_2_OUT,
- GP_1_1_IN, GP_1_1_OUT,
- GP_1_0_IN, GP_1_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
- 0, 0,
- 0, 0,
- GP_2_29_IN, GP_2_29_OUT,
- GP_2_28_IN, GP_2_28_OUT,
- GP_2_27_IN, GP_2_27_OUT,
- GP_2_26_IN, GP_2_26_OUT,
- GP_2_25_IN, GP_2_25_OUT,
- GP_2_24_IN, GP_2_24_OUT,
- GP_2_23_IN, GP_2_23_OUT,
- GP_2_22_IN, GP_2_22_OUT,
- GP_2_21_IN, GP_2_21_OUT,
- GP_2_20_IN, GP_2_20_OUT,
- GP_2_19_IN, GP_2_19_OUT,
- GP_2_18_IN, GP_2_18_OUT,
- GP_2_17_IN, GP_2_17_OUT,
- GP_2_16_IN, GP_2_16_OUT,
- GP_2_15_IN, GP_2_15_OUT,
- GP_2_14_IN, GP_2_14_OUT,
- GP_2_13_IN, GP_2_13_OUT,
- GP_2_12_IN, GP_2_12_OUT,
- GP_2_11_IN, GP_2_11_OUT,
- GP_2_10_IN, GP_2_10_OUT,
- GP_2_9_IN, GP_2_9_OUT,
- GP_2_8_IN, GP_2_8_OUT,
- GP_2_7_IN, GP_2_7_OUT,
- GP_2_6_IN, GP_2_6_OUT,
- GP_2_5_IN, GP_2_5_OUT,
- GP_2_4_IN, GP_2_4_OUT,
- GP_2_3_IN, GP_2_3_OUT,
- GP_2_2_IN, GP_2_2_OUT,
- GP_2_1_IN, GP_2_1_OUT,
- GP_2_0_IN, GP_2_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
- { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
- { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
- { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
- 0, 0, GP_1_29_DATA, GP_1_28_DATA,
- GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
- GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
- GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
- GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
- GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
- GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
- GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
- },
- { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
- 0, 0, GP_2_29_DATA, GP_2_28_DATA,
- GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA,
- GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA,
- GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA,
- GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
- GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
- GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
- GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
- },
- { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
- { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
- { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } },
- { },
-};
-
-static struct pinmux_info r8a7790_pinmux_info = {
- .name = "r8a7790_pfc",
-
- .unlock_reg = 0xe6060000, /* PMMR */
-
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_MOUT0,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void r8a7790_pinmux_init(void)
-{
- register_pinmux(&r8a7790_pinmux_info);
-}
diff --git a/arch/arm/mach-rmobile/pfc-r8a7791.c b/arch/arm/mach-rmobile/pfc-r8a7791.c
deleted file mode 100644
index 68f5578..0000000
--- a/arch/arm/mach-rmobile/pfc-r8a7791.c
+++ /dev/null
@@ -1,1116 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/arm/cpu/armv7/rmobile/pfc-r8a7791.c
- *
- * Copyright (C) 2013 Renesas Electronics Corporation
- */
-
-#include <common.h>
-#include <sh_pfc.h>
-#include <asm/gpio.h>
-#include "pfc-r8a7790.h"
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- GP_ALL(DATA),
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- GP_ALL(IN),
- PINMUX_INPUT_END,
-
- PINMUX_OUTPUT_BEGIN,
- GP_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- GP_ALL(FN),
-
- /* GPSR0 */
- FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,
- FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
- FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,
- FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,
- FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,
- FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,
-
- /* GPSR1 */
- FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,
- FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,
- FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,
- FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,
- FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,
- FN_IP3_21_20,
-
- /* GPSR2 */
- FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,
- FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,
- FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,
- FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,
- FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,
- FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,
- FN_IP6_5_3, FN_IP6_7_6,
-
- /* GPSR3 */
- FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,
- FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,
- FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,
- FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,
- FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,
- FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,
- FN_IP9_18_17,
-
- /* GPSR4 */
- FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,
- FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,
- FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,
- FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,
- FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,
- FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,
- FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,
- FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,
-
- /* GPSR5 */
- FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,
- FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,
- FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,
- FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,
- FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,
- FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,
- FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,
-
- /* GPSR6 */
- FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,
- FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,
- FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,
- FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,
- FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,
- FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,
-
- /* GPSR7 */
- FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,
- FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,
- FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,
- FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,
- FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,
- FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,
-
- /* IPSR0 - IPSR10 */
-
- /* IPSR11 */
- FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,
- FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,
- FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,
- FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,
- FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,
- FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,
- FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,
- FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,
- FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,
- FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,
- FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,
- FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,
- FN_VI1_DATA7, FN_AVB_MDC,
- FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,
- FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,
-
- /* IPSR12 */
- FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,
- FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,
- FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,
- FN_SCL2_D, FN_MSIOF1_RXD_E,
- FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,
- FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,
- FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,
- FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,
- FN_CAN1_TX_C, FN_MSIOF1_TXD_E,
- FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,
- FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,
- FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,
- FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,
- FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,
- FN_ADIDATA_B, FN_MSIOF0_SYNC_C,
- FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,
- FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,
-
- /* IPSR13 */
- /* MOD_SEL */
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
- FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,
- FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,
- FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,
- FN_SEL_SSI9_0, FN_SEL_SSI9_1,
- FN_SEL_SCFA_0, FN_SEL_SCFA_1,
- FN_SEL_QSP_0, FN_SEL_QSP_1,
- FN_SEL_SSI7_0, FN_SEL_SSI7_1,
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,
- FN_SEL_HSCIF1_4,
- FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,
- FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,
-
- /* MOD_SEL2 */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
- FN_SEL_SCIF0_4,
- FN_SEL_SCIF_0, FN_SEL_SCIF_1,
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- FN_SEL_CAN0_4, FN_SEL_CAN0_5,
- FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
- FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,
- FN_SEL_ADG_0, FN_SEL_ADG_1,
- FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,
- FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,
- FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
- FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,
- FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,
- FN_SEL_SIM_0, FN_SEL_SIM_1,
- FN_SEL_SSI8_0, FN_SEL_SSI8_1,
-
- /* MOD_SEL3 */
- FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,
- FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,
- FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,
- FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,
- FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,
- FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,
- FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
- FN_SEL_MMC_0, FN_SEL_MMC_1,
- FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
- FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
- FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,
- FN_SEL_IIC1_4,
- FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,
-
- /* MOD_SEL4 */
- FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,
- FN_SEL_SOF1_4,
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,
- FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,
- FN_SEL_RAD_0, FN_SEL_RAD_1,
- FN_SEL_RCN_0, FN_SEL_RCN_1,
- FN_SEL_RSP_0, FN_SEL_RSP_1,
- FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,
- FN_SEL_SCIF2_4,
- FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,
- FN_SEL_SOF2_4,
- FN_SEL_SSI1_0, FN_SEL_SSI1_1,
- FN_SEL_SSI0_0, FN_SEL_SSI0_1,
- FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
-
- EX_CS0_N_MARK, RD_N_MARK,
-
- AUDIO_CLKA_MARK,
-
- VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,
- VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,
- VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK,
-
- USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,
-
- /* IPSR0 IPSR10 */
- /* IPSR11 */
- VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,
- VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,
- VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,
- SDA4_B_MARK, _MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,
- VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,
- TX4_B_MARK, SCIFA4_TXD_B_MARK,
- VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,
- RX4_B_MARK, SCIFA4_RXD_B_MARK,
- VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,
- VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,
- VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,
- VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,
- VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,
- VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,
- VI1_DATA7_MARK, AVB_MDC_MARK,
- ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,
- ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,
-
- /* IPSR12 */
- ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,
- ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,
- ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,
- SCL2_D_MARK, MSIOF1_RXD_E_MARK,
- ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,
- SDA2_D_MARK, MSIOF1_SCK_E_MARK,
- ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,
- CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,
- ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,
- CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,
- ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,
- ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,
- ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,
- ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,
- STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,
- ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,
- STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,
- ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,
-
- /* IPSR13 */
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-
- /* OTHER IPSR0 - IPSR10 */
- /* IPSR11 */
- PINMUX_IPSR_DATA(IP11_2_0, VI0_R5),
- PINMUX_IPSR_DATA(IP11_2_0, VI2_DATA6),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, GLO_SDATA_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, RX0_C, SEL_SCIF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SDA1_D, SEL_IIC1_3),
- PINMUX_IPSR_DATA(IP11_5_3, VI0_R6),
- PINMUX_IPSR_DATA(IP11_5_3, VI2_DATA7),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, GLO_SS_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, TX1_C, SEL_SCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCL4_B, SEL_IIC4_1),
- PINMUX_IPSR_DATA(IP11_8_6, VI0_R7),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, GLO_RFON_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, RX1_C, SEL_SCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, CAN0_RX_E, SEL_CAN0_4),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SDA4_B, SEL_IIC4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, HRX1_D, SEL_HSCIF1_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SCIFB0_RXD_D, SEL_SCIFB_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, VI1_HSYNC_N, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_11_9, AVB_RXD0),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TS_SDATA0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TX4_B, SEL_SCIF4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SCIFA4_TXD_B, SEL_SCIFA4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_14_12, AVB_RXD1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, TS_SCK0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, RX4_B, SEL_SCIF4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, SCIFA4_RXD_B, SEL_SCIFA4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_16_15, VI1_CLKENB, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_16_15, AVB_RXD2),
- PINMUX_IPSR_MODSEL_DATA(IP11_16_15, TS_SDEN0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_18_17, VI1_FIELD, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_18_17, AVB_RXD3),
- PINMUX_IPSR_MODSEL_DATA(IP11_18_17, TS_SPSYNC0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_19, VI1_CLK, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_19, AVB_RXD4),
- PINMUX_IPSR_MODSEL_DATA(IP11_20, VI1_DATA0, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_20, AVB_RXD5),
- PINMUX_IPSR_MODSEL_DATA(IP11_21, VI1_DATA1, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_21, AVB_RXD6),
- PINMUX_IPSR_MODSEL_DATA(IP11_22, VI1_DATA2, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_22, AVB_RXD7),
- PINMUX_IPSR_MODSEL_DATA(IP11_23, VI1_DATA3, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_23, AVB_RX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP11_24, VI1_DATA4, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_24, AVB_MDIO),
- PINMUX_IPSR_MODSEL_DATA(IP11_25, VI1_DATA5, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_25, AVB_RX_DV),
- PINMUX_IPSR_MODSEL_DATA(IP11_26, VI1_DATA6, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_26, AVB_MAGIC),
- PINMUX_IPSR_MODSEL_DATA(IP11_27, VI1_DATA7, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_27, AVB_MDC),
- PINMUX_IPSR_DATA(IP11_29_28, ETH_MDIO),
- PINMUX_IPSR_DATA(IP11_29_28, AVB_RX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_28, SCL2_C, SEL_IIC2_2),
- PINMUX_IPSR_DATA(IP11_31_30, ETH_CRS_DV),
- PINMUX_IPSR_DATA(IP11_31_30, AVB_LINK),
- PINMUX_IPSR_MODSEL_DATA(IP11_31_30, SDA2_C, SEL_IIC2_2),
-
- /* IPSR12 */
- PINMUX_IPSR_DATA(IP12_1_0, ETH_RX_ER),
- PINMUX_IPSR_DATA(IP12_1_0, AVB_CRS),
- PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL3, SEL_IIC3_0),
- PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL7, SEL_IIC7_0),
- PINMUX_IPSR_DATA(IP12_3_2, ETH_RXD0),
- PINMUX_IPSR_DATA(IP12_3_2, AVB_PHY_INT),
- PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA3, SEL_IIC3_0),
- PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA7, SEL_IIC7_0),
- PINMUX_IPSR_DATA(IP12_6_4, ETH_RXD1),
- PINMUX_IPSR_DATA(IP12_6_4, AVB_GTXREFCLK),
- PINMUX_IPSR_MODSEL_DATA(IP12_6_4, CAN0_TX_C, SEL_CAN0_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_6_4, SCL2_D, SEL_IIC2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_6_4, MSIOF1_RXD_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_9_7, ETH_LINK),
- PINMUX_IPSR_DATA(IP12_9_7, AVB_TXD0),
- PINMUX_IPSR_MODSEL_DATA(IP12_9_7, CAN0_RX_C, SEL_CAN0_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_9_7, SDA2_D, SEL_IIC2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_9_7, MSIOF1_SCK_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_12_10, ETH_REFCLK),
- PINMUX_IPSR_DATA(IP12_12_10, AVB_TXD1),
- PINMUX_IPSR_MODSEL_DATA(IP12_12_10, SCIFA3_RXD_B, SEL_SCIFA3_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_12_10, CAN1_RX_C, SEL_CAN1_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_12_10, MSIOF1_SYNC_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_15_13, ETH_TXD1),
- PINMUX_IPSR_DATA(IP12_15_13, AVB_TXD2),
- PINMUX_IPSR_MODSEL_DATA(IP12_15_13, SCIFA3_TXD_B, SEL_SCIFA3_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_15_13, CAN1_TX_C, SEL_CAN1_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_15_13, MSIOF1_TXD_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_17_16, ETH_TX_EN),
- PINMUX_IPSR_DATA(IP12_17_16, AVB_TXD3),
- PINMUX_IPSR_MODSEL_DATA(IP12_17_16, TCLK1_B, SEL_TMU1_0),
- PINMUX_IPSR_MODSEL_DATA(IP12_17_16, CAN_CLK_B, SEL_CANCLK_1),
- PINMUX_IPSR_DATA(IP12_19_18, ETH_MAGIC),
- PINMUX_IPSR_DATA(IP12_19_18, AVB_TXD4),
- PINMUX_IPSR_MODSEL_DATA(IP12_19_18, IETX_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP12_21_20, ETH_TXD0),
- PINMUX_IPSR_DATA(IP12_21_20, AVB_TXD5),
- PINMUX_IPSR_MODSEL_DATA(IP12_21_20, IECLK_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP12_23_22, ETH_MDC),
- PINMUX_IPSR_DATA(IP12_23_22, AVB_TXD6),
- PINMUX_IPSR_MODSEL_DATA(IP12_23_22, IERX_C, SEL_IEB_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, STP_IVCXO27_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP12_26_24, AVB_TXD7),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, SCIFB2_TXD_D, SEL_SCIFB2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, ADIDATA_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, MSIOF0_SYNC_C, SEL_SOF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, STP_ISCLK_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP12_29_27, AVB_TX_EN),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, SCIFB2_RXD_D, SEL_SCIFB2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, ADICS_SAMP_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, MSIOF0_SCK_C, SEL_SOF0_2),
-
- /* IPSR13 - IPSR16 */
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- PINMUX_GPIO_GP_ALL(),
-
- /* OTHER, IPSR0 - IPSR10 */
- /* IPSR11 */
- GPIO_FN(VI0_R5), GPIO_FN(VI2_DATA6), GPIO_FN(GLO_SDATA_B),
- GPIO_FN(RX0_C), GPIO_FN(SDA1_D),
- GPIO_FN(VI0_R6), GPIO_FN(VI2_DATA7),
- GPIO_FN(GLO_SS_B), GPIO_FN(TX1_C), GPIO_FN(SCL4_B),
- GPIO_FN(VI0_R7), GPIO_FN(GLO_RFON_B),
- GPIO_FN(RX1_C), GPIO_FN(CAN0_RX_E),
- GPIO_FN(SDA4_B), GPIO_FN(HRX1_D), GPIO_FN(SCIFB0_RXD_D),
- GPIO_FN(VI1_HSYNC_N), GPIO_FN(AVB_RXD0), GPIO_FN(TS_SDATA0_B),
- GPIO_FN(TX4_B), GPIO_FN(SCIFA4_TXD_B),
- GPIO_FN(VI1_VSYNC_N), GPIO_FN(AVB_RXD1), GPIO_FN(TS_SCK0_B),
- GPIO_FN(RX4_B), GPIO_FN(SCIFA4_RXD_B),
- GPIO_FN(VI1_CLKENB), GPIO_FN(AVB_RXD2), GPIO_FN(TS_SDEN0_B),
- GPIO_FN(VI1_FIELD), GPIO_FN(AVB_RXD3), GPIO_FN(TS_SPSYNC0_B),
- GPIO_FN(VI1_CLK), GPIO_FN(AVB_RXD4),
- GPIO_FN(VI1_DATA0), GPIO_FN(AVB_RXD5),
- GPIO_FN(VI1_DATA1), GPIO_FN(AVB_RXD6),
- GPIO_FN(VI1_DATA2), GPIO_FN(AVB_RXD7),
- GPIO_FN(VI1_DATA3), GPIO_FN(AVB_RX_ER),
- GPIO_FN(VI1_DATA4), GPIO_FN(AVB_MDIO),
- GPIO_FN(VI1_DATA5), GPIO_FN(AVB_RX_DV),
- GPIO_FN(VI1_DATA6), GPIO_FN(AVB_MAGIC),
- GPIO_FN(VI1_DATA7), GPIO_FN(AVB_MDC),
- GPIO_FN(ETH_MDIO), GPIO_FN(AVB_RX_CLK), GPIO_FN(SCL2_C),
- GPIO_FN(ETH_CRS_DV), GPIO_FN(AVB_LINK), GPIO_FN(SDA2_C),
-
- /* IPSR12 */
- GPIO_FN(ETH_RX_ER), GPIO_FN(AVB_CRS), GPIO_FN(SCL3), GPIO_FN(SCL7),
- GPIO_FN(ETH_RXD0), GPIO_FN(AVB_PHY_INT), GPIO_FN(SDA3), GPIO_FN(SDA7),
- GPIO_FN(ETH_RXD1), GPIO_FN(AVB_GTXREFCLK), GPIO_FN(CAN0_TX_C),
- GPIO_FN(SCL2_D), GPIO_FN(MSIOF1_RXD_E),
- GPIO_FN(ETH_LINK), GPIO_FN(AVB_TXD0), GPIO_FN(CAN0_RX_C),
- GPIO_FN(SDA2_D), GPIO_FN(MSIOF1_SCK_E),
- GPIO_FN(ETH_REFCLK), GPIO_FN(AVB_TXD1), GPIO_FN(SCIFA3_RXD_B),
- GPIO_FN(CAN1_RX_C), GPIO_FN(MSIOF1_SYNC_E),
- GPIO_FN(ETH_TXD1), GPIO_FN(AVB_TXD2), GPIO_FN(SCIFA3_TXD_B),
- GPIO_FN(CAN1_TX_C), GPIO_FN(MSIOF1_TXD_E),
- GPIO_FN(ETH_TX_EN), GPIO_FN(AVB_TXD3),
- GPIO_FN(TCLK1_B), GPIO_FN(CAN_CLK_B),
- GPIO_FN(ETH_MAGIC), GPIO_FN(AVB_TXD4), GPIO_FN(IETX_C),
- GPIO_FN(ETH_TXD0), GPIO_FN(AVB_TXD5), GPIO_FN(IECLK_C),
- GPIO_FN(ETH_MDC), GPIO_FN(AVB_TXD6), GPIO_FN(IERX_C),
- GPIO_FN(STP_IVCXO27_0), GPIO_FN(AVB_TXD7), GPIO_FN(SCIFB2_TXD_D),
- GPIO_FN(ADIDATA_B), GPIO_FN(MSIOF0_SYNC_C),
- GPIO_FN(STP_ISCLK_0), GPIO_FN(AVB_TX_EN), GPIO_FN(SCIFB2_RXD_D),
- GPIO_FN(ADICS_SAMP_B), GPIO_FN(MSIOF0_SCK_C),
-
- /* IPSR13 - IPSR16 */
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
- GP_0_31_FN, FN_IP1_22_20,
- GP_0_30_FN, FN_IP1_19_17,
- GP_0_29_FN, FN_IP1_16_14,
- GP_0_28_FN, FN_IP1_13_11,
- GP_0_27_FN, FN_IP1_10_8,
- GP_0_26_FN, FN_IP1_7_6,
- GP_0_25_FN, FN_IP1_5_4,
- GP_0_24_FN, FN_IP1_3_2,
- GP_0_23_FN, FN_IP1_1_0,
- GP_0_22_FN, FN_IP0_30_29,
- GP_0_21_FN, FN_IP0_28_27,
- GP_0_20_FN, FN_IP0_26_25,
- GP_0_19_FN, FN_IP0_24_23,
- GP_0_18_FN, FN_IP0_22_21,
- GP_0_17_FN, FN_IP0_20_19,
- GP_0_16_FN, FN_IP0_18_16,
- GP_0_15_FN, FN_IP0_15,
- GP_0_14_FN, FN_IP0_14,
- GP_0_13_FN, FN_IP0_13,
- GP_0_12_FN, FN_IP0_12,
- GP_0_11_FN, FN_IP0_11,
- GP_0_10_FN, FN_IP0_10,
- GP_0_9_FN, FN_IP0_9,
- GP_0_8_FN, FN_IP0_8,
- GP_0_7_FN, FN_IP0_7,
- GP_0_6_FN, FN_IP0_6,
- GP_0_5_FN, FN_IP0_5,
- GP_0_4_FN, FN_IP0_4,
- GP_0_3_FN, FN_IP0_3,
- GP_0_2_FN, FN_IP0_2,
- GP_0_1_FN, FN_IP0_1,
- GP_0_0_FN, FN_IP0_0, }
- },
- { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_25_FN, FN_IP3_21_20,
- GP_1_24_FN, FN_IP3_19_18,
- GP_1_23_FN, FN_IP3_17_16,
- GP_1_22_FN, FN_IP3_15_14,
- GP_1_21_FN, FN_IP3_13_12,
- GP_1_20_FN, FN_IP3_11_9,
- GP_1_19_FN, FN_RD_N,
- GP_1_18_FN, FN_IP3_8_6,
- GP_1_17_FN, FN_IP3_5_3,
- GP_1_16_FN, FN_IP3_2_0,
- GP_1_15_FN, FN_IP2_29_27,
- GP_1_14_FN, FN_IP2_26_25,
- GP_1_13_FN, FN_IP2_24_23,
- GP_1_12_FN, FN_EX_CS0_N,
- GP_1_11_FN, FN_IP2_22_21,
- GP_1_10_FN, FN_IP2_20_19,
- GP_1_9_FN, FN_IP2_18_16,
- GP_1_8_FN, FN_IP2_15_13,
- GP_1_7_FN, FN_IP2_12_10,
- GP_1_6_FN, FN_IP2_9_7,
- GP_1_5_FN, FN_IP2_6_5,
- GP_1_4_FN, FN_IP2_4_3,
- GP_1_3_FN, FN_IP2_2_0,
- GP_1_2_FN, FN_IP1_31_29,
- GP_1_1_FN, FN_IP1_28_26,
- GP_1_0_FN, FN_IP1_25_23, }
- },
- { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
- GP_2_31_FN, FN_IP6_7_6,
- GP_2_30_FN, FN_IP6_5_3,
- GP_2_29_FN, FN_IP6_2_0,
- GP_2_28_FN, FN_AUDIO_CLKA,
- GP_2_27_FN, FN_IP5_31_29,
- GP_2_26_FN, FN_IP5_28_26,
- GP_2_25_FN, FN_IP5_25_24,
- GP_2_24_FN, FN_IP5_23_22,
- GP_2_23_FN, FN_IP5_21_20,
- GP_2_22_FN, FN_IP5_19_17,
- GP_2_21_FN, FN_IP5_16_15,
- GP_2_20_FN, FN_IP5_14_12,
- GP_2_19_FN, FN_IP5_11_9,
- GP_2_18_FN, FN_IP5_8_6,
- GP_2_17_FN, FN_IP5_5_3,
- GP_2_16_FN, FN_IP5_2_0,
- GP_2_15_FN, FN_IP4_30_28,
- GP_2_14_FN, FN_IP4_27_26,
- GP_2_13_FN, FN_IP4_25_24,
- GP_2_12_FN, FN_IP4_23_22,
- GP_2_11_FN, FN_IP4_21,
- GP_2_10_FN, FN_IP4_20,
- GP_2_9_FN, FN_IP4_19,
- GP_2_8_FN, FN_IP4_18_16,
- GP_2_7_FN, FN_IP4_15_13,
- GP_2_6_FN, FN_IP4_12_10,
- GP_2_5_FN, FN_IP4_9_8,
- GP_2_4_FN, FN_IP4_7_5,
- GP_2_3_FN, FN_IP4_4_2,
- GP_2_2_FN, FN_IP4_1_0,
- GP_2_1_FN, FN_IP3_30_28,
- GP_2_0_FN, FN_IP3_27_25 }
- },
- { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
- GP_3_31_FN, FN_IP9_18_17,
- GP_3_30_FN, FN_IP9_16,
- GP_3_29_FN, FN_IP9_15_13,
- GP_3_28_FN, FN_IP9_12,
- GP_3_27_FN, FN_IP9_11,
- GP_3_26_FN, FN_IP9_10_8,
- GP_3_25_FN, FN_IP9_7,
- GP_3_24_FN, FN_IP9_6,
- GP_3_23_FN, FN_IP9_5_3,
- GP_3_22_FN, FN_IP9_2_0,
- GP_3_21_FN, FN_IP8_30_28,
- GP_3_20_FN, FN_IP8_27_26,
- GP_3_19_FN, FN_IP8_25_24,
- GP_3_18_FN, FN_IP8_23_21,
- GP_3_17_FN, FN_IP8_20_18,
- GP_3_16_FN, FN_IP8_17_15,
- GP_3_15_FN, FN_IP8_14_12,
- GP_3_14_FN, FN_IP8_11_9,
- GP_3_13_FN, FN_IP8_8_6,
- GP_3_12_FN, FN_IP8_5_3,
- GP_3_11_FN, FN_IP8_2_0,
- GP_3_10_FN, FN_IP7_29_27,
- GP_3_9_FN, FN_IP7_26_24,
- GP_3_8_FN, FN_IP7_23_21,
- GP_3_7_FN, FN_IP7_20_19,
- GP_3_6_FN, FN_IP7_18_17,
- GP_3_5_FN, FN_IP7_16_15,
- GP_3_4_FN, FN_IP7_14_13,
- GP_3_3_FN, FN_IP7_12_11,
- GP_3_2_FN, FN_IP7_10_9,
- GP_3_1_FN, FN_IP7_8_6,
- GP_3_0_FN, FN_IP7_5_3 }
- },
- { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
- GP_4_31_FN, FN_IP15_5_4,
- GP_4_30_FN, FN_IP15_3_2,
- GP_4_29_FN, FN_IP15_1_0,
- GP_4_28_FN, FN_IP11_8_6,
- GP_4_27_FN, FN_IP11_5_3,
- GP_4_26_FN, FN_IP11_2_0,
- GP_4_25_FN, FN_IP10_31_29,
- GP_4_24_FN, FN_IP10_28_27,
- GP_4_23_FN, FN_IP10_26_25,
- GP_4_22_FN, FN_IP10_24_22,
- GP_4_21_FN, FN_IP10_21_19,
- GP_4_20_FN, FN_IP10_18_17,
- GP_4_19_FN, FN_IP10_16_15,
- GP_4_18_FN, FN_IP10_14_12,
- GP_4_17_FN, FN_IP10_11_9,
- GP_4_16_FN, FN_IP10_8_6,
- GP_4_15_FN, FN_IP10_5_3,
- GP_4_14_FN, FN_IP10_2_0,
- GP_4_13_FN, FN_IP9_31_29,
- GP_4_12_FN, FN_VI0_DATA0_VI0_B7,
- GP_4_11_FN, FN_VI0_DATA0_VI0_B6,
- GP_4_10_FN, FN_VI0_DATA0_VI0_B5,
- GP_4_9_FN, FN_VI0_DATA0_VI0_B4,
- GP_4_8_FN, FN_IP9_28_27,
- GP_4_7_FN, FN_VI0_DATA0_VI0_B2,
- GP_4_6_FN, FN_VI0_DATA0_VI0_B1,
- GP_4_5_FN, FN_VI0_DATA0_VI0_B0,
- GP_4_4_FN, FN_IP9_26_25,
- GP_4_3_FN, FN_IP9_24_23,
- GP_4_2_FN, FN_IP9_22_21,
- GP_4_1_FN, FN_IP9_20_19,
- GP_4_0_FN, FN_VI0_CLK }
- },
- { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
- GP_5_31_FN, FN_IP3_24_22,
- GP_5_30_FN, FN_IP13_9_7,
- GP_5_29_FN, FN_IP13_6_5,
- GP_5_28_FN, FN_IP13_4_3,
- GP_5_27_FN, FN_IP13_2_0,
- GP_5_26_FN, FN_IP12_29_27,
- GP_5_25_FN, FN_IP12_26_24,
- GP_5_24_FN, FN_IP12_23_22,
- GP_5_23_FN, FN_IP12_21_20,
- GP_5_22_FN, FN_IP12_19_18,
- GP_5_21_FN, FN_IP12_17_16,
- GP_5_20_FN, FN_IP12_15_13,
- GP_5_19_FN, FN_IP12_12_10,
- GP_5_18_FN, FN_IP12_9_7,
- GP_5_17_FN, FN_IP12_6_4,
- GP_5_16_FN, FN_IP12_3_2,
- GP_5_15_FN, FN_IP12_1_0,
- GP_5_14_FN, FN_IP11_31_30,
- GP_5_13_FN, FN_IP11_29_28,
- GP_5_12_FN, FN_IP11_27,
- GP_5_11_FN, FN_IP11_26,
- GP_5_10_FN, FN_IP11_25,
- GP_5_9_FN, FN_IP11_24,
- GP_5_8_FN, FN_IP11_23,
- GP_5_7_FN, FN_IP11_22,
- GP_5_6_FN, FN_IP11_21,
- GP_5_5_FN, FN_IP11_20,
- GP_5_4_FN, FN_IP11_19,
- GP_5_3_FN, FN_IP11_18_17,
- GP_5_2_FN, FN_IP11_16_15,
- GP_5_1_FN, FN_IP11_14_12,
- GP_5_0_FN, FN_IP11_11_9 }
- },
- { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
- 0, 0,
- 0, 0,
- GP_6_29_FN, FN_IP14_31_29,
- GP_6_28_FN, FN_IP14_28_26,
- GP_6_27_FN, FN_IP14_25_23,
- GP_6_26_FN, FN_IP14_22_20,
- GP_6_25_FN, FN_IP14_19_17,
- GP_6_24_FN, FN_IP14_16_14,
- GP_6_23_FN, FN_IP14_13_11,
- GP_6_22_FN, FN_IP14_10_8,
- GP_6_21_FN, FN_IP14_7,
- GP_6_20_FN, FN_IP14_6,
- GP_6_19_FN, FN_IP14_5,
- GP_6_18_FN, FN_IP14_4,
- GP_6_17_FN, FN_IP14_3,
- GP_6_16_FN, FN_IP14_2,
- GP_6_15_FN, FN_IP14_1_0,
- GP_6_14_FN, FN_IP13_30_28,
- GP_6_13_FN, FN_IP13_27,
- GP_6_12_FN, FN_IP13_26,
- GP_6_11_FN, FN_IP13_25,
- GP_6_10_FN, FN_IP13_24_23,
- GP_6_9_FN, FN_IP13_22,
- 0, 0,
- GP_6_7_FN, FN_IP13_21_19,
- GP_6_6_FN, FN_IP13_18_16,
- GP_6_5_FN, FN_IP13_15,
- GP_6_4_FN, FN_IP13_14,
- GP_6_3_FN, FN_IP13_13,
- GP_6_2_FN, FN_IP13_12,
- GP_6_1_FN, FN_IP13_11,
- GP_6_0_FN, FN_IP13_10 }
- },
- { PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_7_25_FN, FN_USB1_PWEN,
- GP_7_24_FN, FN_USB0_OVC,
- GP_7_23_FN, FN_USB0_PWEN,
- GP_7_22_FN, FN_IP15_14_12,
- GP_7_21_FN, FN_IP15_11_9,
- GP_7_20_FN, FN_IP15_8_6,
- GP_7_19_FN, FN_IP7_2_0,
- GP_7_18_FN, FN_IP6_29_27,
- GP_7_17_FN, FN_IP6_26_24,
- GP_7_16_FN, FN_IP6_23_21,
- GP_7_15_FN, FN_IP6_20_19,
- GP_7_14_FN, FN_IP6_18_16,
- GP_7_13_FN, FN_IP6_15_14,
- GP_7_12_FN, FN_IP6_13_12,
- GP_7_11_FN, FN_IP6_11_10,
- GP_7_10_FN, FN_IP6_9_8,
- GP_7_9_FN, FN_IP16_11_10,
- GP_7_8_FN, FN_IP16_9_8,
- GP_7_7_FN, FN_IP16_7_6,
- GP_7_6_FN, FN_IP16_5_3,
- GP_7_5_FN, FN_IP16_2_0,
- GP_7_4_FN, FN_IP15_29_27,
- GP_7_3_FN, FN_IP15_26_24,
- GP_7_2_FN, FN_IP15_23_21,
- GP_7_1_FN, FN_IP15_20_18,
- GP_7_0_FN, FN_IP15_17_15 }
- },
- /* IPSR0 - IPSR10 */
- { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
- 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
- 3, 3, 3, 3, 3) {
- /* IP11_31_30 [2] */
- FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, 0,
- /* IP11_29_28 [2] */
- FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, 0,
- /* IP11_27 [1] */
- FN_VI1_DATA7, FN_AVB_MDC,
- /* IP11_26 [1] */
- FN_VI1_DATA6, FN_AVB_MAGIC,
- /* IP11_25 [1] */
- FN_VI1_DATA5, FN_AVB_RX_DV,
- /* IP11_24 [1] */
- FN_VI1_DATA4, FN_AVB_MDIO,
- /* IP11_23 [1] */
- FN_VI1_DATA3, FN_AVB_RX_ER,
- /* IP11_22 [1] */
- FN_VI1_DATA2, FN_AVB_RXD7,
- /* IP11_21 [1] */
- FN_VI1_DATA1, FN_AVB_RXD6,
- /* IP11_20 [1] */
- FN_VI1_DATA0, FN_AVB_RXD5,
- /* IP11_19 [1] */
- FN_VI1_CLK, FN_AVB_RXD4,
- /* IP11_18_17 [2] */
- FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 0,
- /* IP11_16_15 [2] */
- FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 0,
- /* IP11_14_12 [3] */
- FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B,
- FN_RX4_B, FN_SCIFA4_RXD_B,
- 0, 0, 0,
- /* IP11_11_9 [3] */
- FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B,
- FN_TX4_B, FN_SCIFA4_TXD_B,
- 0, 0, 0,
- /* IP11_8_6 [3] */
- FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,
- FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 0,
- /* IP11_5_3 [3] */
- FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,
- 0, 0, 0,
- /* IP11_2_0 [3] */
- FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,
- 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32,
- 2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2) {
- /* IP12_31_30 [2] */
- 0, 0, 0, 0,
- /* IP12_29_27 [3] */
- FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,
- FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,
- 0, 0, 0,
- /* IP12_26_24 [3] */
- FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,
- FN_ADIDATA_B, FN_MSIOF0_SYNC_C,
- 0, 0, 0,
- /* IP12_23_22 [2] */
- FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 0,
- /* IP12_21_20 [2] */
- FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 0,
- /* IP12_19_18 [2] */
- FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 0,
- /* IP12_17_16 [2] */
- FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,
- /* IP12_15_13 [3] */
- FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,
- FN_CAN1_TX_C, FN_MSIOF1_TXD_E,
- 0, 0, 0,
- /* IP12_12_10 [3] */
- FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,
- FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,
- 0, 0, 0,
- /* IP12_9_7 [3] */
- FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C,
- FN_SDA2_D, FN_MSIOF1_SCK_E,
- 0, 0, 0,
- /* IP12_6_4 [3] */
- FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,
- FN_SCL2_D, FN_MSIOF1_RXD_E,
- 0, 0, 0,
- /* IP12_3_2 [2] */
- FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,
- /* IP12_1_0 [2] */
- FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, }
- },
-
- /* IPSR13 - IPSR16 */
-
- { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
- 1, 2, 2, 2, 3, 2, 1, 1, 1, 1,
- 3, 2, 2, 2, 1, 2, 2, 2) {
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SCIF1 [2] */
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
- /* SEL_SCIFB [2] */
- FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,
- /* SEL_SCIFB2 [2] */
- FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1,
- FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,
- /* SEL_SCIFB1 [3] */
- FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1,
- FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
- 0, 0, 0, 0,
- /* SEL_SCIFA1 [2] */
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0,
- /* SEL_SSI9 [1] */
- FN_SEL_SSI9_0, FN_SEL_SSI9_1,
- /* SEL_SCFA [1] */
- FN_SEL_SCFA_0, FN_SEL_SCFA_1,
- /* SEL_QSP [1] */
- FN_SEL_QSP_0, FN_SEL_QSP_1,
- /* SEL_SSI7 [1] */
- FN_SEL_SSI7_0, FN_SEL_SSI7_1,
- /* SEL_HSCIF1 [3] */
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2,
- FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4,
- 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_VI1 [2] */
- FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_TMU [1] */
- FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- /* SEL_LBS [2] */
- FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,
- /* SEL_TSIF0 [2] */
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- /* SEL_SOF0 [2] */
- FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
- 3, 1, 1, 3, 2, 1, 1, 2, 2,
- 1, 3, 2, 1, 2, 2, 2, 1, 1, 1) {
- /* SEL_SCIF0 [3] */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2,
- FN_SEL_SCIF0_3, FN_SEL_SCIF0_4,
- 0, 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SCIF [1] */
- FN_SEL_SCIF_0, FN_SEL_SCIF_1,
- /* SEL_CAN0 [3] */
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- FN_SEL_CAN0_4, FN_SEL_CAN0_5,
- 0, 0,
- /* SEL_CAN1 [2] */
- FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SCIFA2 [1] */
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
- /* SEL_SCIF4 [2] */
- FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_ADG [1] */
- FN_SEL_ADG_0, FN_SEL_ADG_1,
- /* SEL_FM [3] */
- FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2,
- FN_SEL_FM_3, FN_SEL_FM_4,
- 0, 0, 0,
- /* SEL_SCIFA5 [2] */
- FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_GPS [2] */
- FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
- /* SEL_SCIFA4 [2] */
- FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 0,
- /* SEL_SCIFA3 [2] */
- FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0,
- /* SEL_SIM [1] */
- FN_SEL_SIM_0, FN_SEL_SIM_1,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SSI8 [1] */
- FN_SEL_SSI8_0, FN_SEL_SSI8_1, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
- 2, 2, 2, 2, 2, 2, 2, 2,
- 1, 1, 2, 2, 3, 2, 2, 2, 1) {
- /* SEL_HSCIF2 [2] */
- FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
- FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,
- /* SEL_CANCLK [2] */
- FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
- FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,
- /* SEL_IIC8 [2] */
- FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, 0,
- /* SEL_IIC7 [2] */
- FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, 0,
- /* SEL_IIC4 [2] */
- FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, 0,
- /* SEL_IIC3 [2] */
- FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,
- /* SEL_SCIF3 [2] */
- FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
- /* SEL_IEB [2] */
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
- /* SEL_MMC [1] */
- FN_SEL_MMC_0, FN_SEL_MMC_1,
- /* SEL_SCIF5 [1] */
- FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_IIC2 [2] */
- FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
- /* SEL_IIC1 [3] */
- FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,
- FN_SEL_IIC1_4,
- 0, 0, 0,
- /* SEL_IIC0 [2] */
- FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [1] */
- 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32,
- 3, 2, 2, 1, 1, 1, 1, 3, 2,
- 2, 3, 1, 1, 1, 2, 2, 2, 2) {
- /* SEL_SOF1 [3] */
- FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,
- FN_SEL_SOF1_4,
- 0, 0, 0,
- /* SEL_HSCIF0 [2] */
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0,
- /* SEL_DIS [2] */
- FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_RAD [1] */
- FN_SEL_RAD_0, FN_SEL_RAD_1,
- /* SEL_RCN [1] */
- FN_SEL_RCN_0, FN_SEL_RCN_1,
- /* SEL_RSP [1] */
- FN_SEL_RSP_0, FN_SEL_RSP_1,
- /* SEL_SCIF2 [3] */
- FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,
- FN_SEL_SCIF2_3, FN_SEL_SCIF2_4,
- 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_SOF2 [3] */
- FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2,
- FN_SEL_SOF2_3, FN_SEL_SOF2_4,
- 0, 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SSI1 [1] */
- FN_SEL_SSI1_0, FN_SEL_SSI1_1,
- /* SEL_SSI0 [1] */
- FN_SEL_SSI0_0, FN_SEL_SSI0_1,
- /* SEL_SSP [2] */
- FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
- { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_25_IN, GP_1_25_OUT,
- GP_1_24_IN, GP_1_24_OUT,
- GP_1_23_IN, GP_1_23_OUT,
- GP_1_22_IN, GP_1_22_OUT,
- GP_1_21_IN, GP_1_21_OUT,
- GP_1_20_IN, GP_1_20_OUT,
- GP_1_19_IN, GP_1_19_OUT,
- GP_1_18_IN, GP_1_18_OUT,
- GP_1_17_IN, GP_1_17_OUT,
- GP_1_16_IN, GP_1_16_OUT,
- GP_1_15_IN, GP_1_15_OUT,
- GP_1_14_IN, GP_1_14_OUT,
- GP_1_13_IN, GP_1_13_OUT,
- GP_1_12_IN, GP_1_12_OUT,
- GP_1_11_IN, GP_1_11_OUT,
- GP_1_10_IN, GP_1_10_OUT,
- GP_1_9_IN, GP_1_9_OUT,
- GP_1_8_IN, GP_1_8_OUT,
- GP_1_7_IN, GP_1_7_OUT,
- GP_1_6_IN, GP_1_6_OUT,
- GP_1_5_IN, GP_1_5_OUT,
- GP_1_4_IN, GP_1_4_OUT,
- GP_1_3_IN, GP_1_3_OUT,
- GP_1_2_IN, GP_1_2_OUT,
- GP_1_1_IN, GP_1_1_OUT,
- GP_1_0_IN, GP_1_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
- { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
- { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
- { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
- { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { GP_INOUTSEL(6) } },
- { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_7_25_IN, GP_7_25_OUT,
- GP_7_24_IN, GP_7_24_OUT,
- GP_7_23_IN, GP_7_23_OUT,
- GP_7_22_IN, GP_7_22_OUT,
- GP_7_21_IN, GP_7_21_OUT,
- GP_7_20_IN, GP_7_20_OUT,
- GP_7_19_IN, GP_7_19_OUT,
- GP_7_18_IN, GP_7_18_OUT,
- GP_7_17_IN, GP_7_17_OUT,
- GP_7_16_IN, GP_7_16_OUT,
- GP_7_15_IN, GP_7_15_OUT,
- GP_7_14_IN, GP_7_14_OUT,
- GP_7_13_IN, GP_7_13_OUT,
- GP_7_12_IN, GP_7_12_OUT,
- GP_7_11_IN, GP_7_11_OUT,
- GP_7_10_IN, GP_7_10_OUT,
- GP_7_9_IN, GP_7_9_OUT,
- GP_7_8_IN, GP_7_8_OUT,
- GP_7_7_IN, GP_7_7_OUT,
- GP_7_6_IN, GP_7_6_OUT,
- GP_7_5_IN, GP_7_5_OUT,
- GP_7_4_IN, GP_7_4_OUT,
- GP_7_3_IN, GP_7_3_OUT,
- GP_7_2_IN, GP_7_2_OUT,
- GP_7_1_IN, GP_7_1_OUT,
- GP_7_0_IN, GP_7_0_OUT, }
- },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
- { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
- 0, 0, 0, 0,
- 0, 0, GP_1_25_DATA, GP_1_24_DATA,
- GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
- GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
- GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
- GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
- GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
- GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
- },
- { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
- { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
- { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
- { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } },
- { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { GP_INDT(6) } },
- { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
- 0, 0, 0, 0,
- 0, 0, GP_7_25_DATA, GP_7_24_DATA,
- GP_7_23_DATA, GP_7_22_DATA, GP_7_21_DATA, GP_7_20_DATA,
- GP_7_19_DATA, GP_7_18_DATA, GP_7_17_DATA, GP_7_16_DATA,
- GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA,
- GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA,
- GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA,
- GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
- },
- { },
-};
-
-static struct pinmux_info r8a7791_pinmux_info = {
- .name = "r8a7791_pfc",
-
- .unlock_reg = 0xe6060000, /* PMMR */
-
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_MSIOF0_SCK_C /* GPIO_FN_CAN1_RX_B */,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void r8a7791_pinmux_init(void)
-{
- register_pinmux(&r8a7791_pinmux_info);
-}
diff --git a/arch/arm/mach-rmobile/pfc-r8a7792.c b/arch/arm/mach-rmobile/pfc-r8a7792.c
deleted file mode 100644
index 6930722..0000000
--- a/arch/arm/mach-rmobile/pfc-r8a7792.c
+++ /dev/null
@@ -1,2301 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/arm/cpu/armv7/rmobile/pfc-r8a7792.c
- * This file is r8a7792 processor support - PFC hardware block.
- *
- * Copyright (C) 2016 Renesas Electronics Corporation
- */
-
-#include <common.h>
-#include <sh_pfc.h>
-#include <asm/gpio.h>
-#include "pfc-r8a7790.h"
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- GP_ALL(DATA),
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- GP_ALL(IN),
- PINMUX_INPUT_END,
-
- PINMUX_OUTPUT_BEGIN,
- GP_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- GP_ALL(FN),
-
- /* GPSR0 */
- FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3,
- FN_IP0_4, FN_IP0_5, FN_IP0_6, FN_IP0_7,
- FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
- FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15,
- FN_IP0_16, FN_IP0_17, FN_IP0_18, FN_IP0_19,
- FN_IP0_20, FN_IP0_21, FN_IP0_22, FN_IP0_23,
- FN_IP1_0, FN_IP1_1, FN_IP1_2, FN_IP1_3,
- FN_IP1_4,
-
- /* GPSR1 */
- FN_IP1_5, FN_IP1_6, FN_IP1_7, FN_IP1_8,
- FN_IP1_9, FN_IP1_10, FN_IP1_11, FN_IP1_12,
- FN_IP1_13, FN_IP1_14, FN_IP1_15, FN_IP1_16,
- FN_DU1_DB2_C0_DATA12, FN_DU1_DB3_C1_DATA13, FN_DU1_DB4_C2_DATA14, FN_DU1_DB5_C3_DATA15,
- FN_DU1_DB6_C4, FN_DU1_DB7_C5, FN_DU1_EXHSYNC_DU1_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC,
- FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_DU1_DISP, FN_DU1_CDE,
-
- /* GPSR2 */
- FN_D0, FN_D1, FN_D2, FN_D3,
- FN_D4, FN_D5, FN_D6, FN_D7,
- FN_D8, FN_D9, FN_D10, FN_D11,
- FN_D12, FN_D13, FN_D14, FN_D15,
- FN_A0, FN_A1, FN_A2, FN_A3,
- FN_A4, FN_A5, FN_A6, FN_A7,
- FN_A8, FN_A9, FN_A10, FN_A11,
- FN_A12, FN_A13, FN_A14, FN_A15,
-
- /* GPSR3 */
- FN_A16, FN_A17, FN_A18, FN_A19,
- FN_IP1_17, FN_IP1_18, FN_CS1_A26, FN_EX_CS0,
- FN_EX_CS1, FN_EX_CS2, FN_EX_CS3, FN_EX_CS4,
- FN_EX_CS5, FN_BS, FN_RD, FN_RD_WR,
- FN_WE0, FN_WE1, FN_EX_WAIT0, FN_IRQ0,
- FN_IRQ1, FN_IRQ2, FN_IRQ3, FN_IP1_19,
- FN_IP1_20, FN_IP1_21, FN_IP1_22, FN_CS0,
-
- /* GPSR4 */
- FN_VI0_CLK, FN_VI0_CLKENB, FN_VI0_HSYNC, FN_VI0_VSYNC,
- FN_VI0_D0_B0_C0, FN_VI0_D1_B1_C1, FN_VI0_D2_B2_C2, FN_VI0_D3_B3_C3,
- FN_VI0_D4_B4_C4, FN_VI0_D5_B5_C5, FN_VI0_D6_B6_C6, FN_VI0_D7_B7_C7,
- FN_VI0_D8_G0_Y0, FN_VI0_D9_G1_Y1, FN_VI0_D10_G2_Y2, FN_VI0_D11_G3_Y3,
- FN_VI0_FIELD,
-
- /* GPSR5 */
- FN_VI1_CLK, FN_VI1_CLKENB, FN_VI1_HSYNC, FN_VI1_VSYNC,
- FN_VI1_D0_B0_C0, FN_VI1_D1_B1_C1, FN_VI1_D2_B2_C2, FN_VI1_D3_B3_C3,
- FN_VI1_D4_B4_C4, FN_VI1_D5_B5_C5, FN_VI1_D6_B6_C6, FN_VI1_D7_B7_C7,
- FN_VI1_D8_G0_Y0, FN_VI1_D9_G1_Y1, FN_VI1_D10_G2_Y2, FN_VI1_D11_G3_Y3,
- FN_VI1_FIELD,
-
- /* GPSR6 */
- FN_IP2_0, FN_IP2_1, FN_IP2_2, FN_IP2_3,
- FN_IP2_4, FN_IP2_5, FN_IP2_6, FN_IP2_7,
- FN_IP2_8, FN_IP2_9, FN_IP2_10, FN_IP2_11,
- FN_IP2_12, FN_IP2_13, FN_IP2_14, FN_IP2_15,
- FN_IP2_16,
-
- /* GPSR7 */
- FN_IP3_0, FN_IP3_1, FN_IP3_2, FN_IP3_3,
- FN_IP3_4, FN_IP3_5, FN_IP3_6, FN_IP3_7,
- FN_IP3_8, FN_IP3_9, FN_IP3_10, FN_IP3_11,
- FN_IP3_12, FN_IP3_13, FN_VI3_D10_Y2, FN_IP3_14,
- FN_VI3_FIELD,
-
- /* GPSR8 */
- FN_VI4_CLK, FN_IP4_0, FN_IP4_1, FN_IP4_3_2,
- FN_IP4_4, FN_IP4_6_5, FN_IP4_8_7, FN_IP4_10_9,
- FN_IP4_12_11, FN_IP4_14_13, FN_IP4_16_15, FN_IP4_18_17,
- FN_IP4_20_19, FN_IP4_21, FN_IP4_22, FN_IP4_23, FN_IP4_24,
-
- /* GPSR9 */
- FN_VI5_CLK, FN_IP5_0, FN_IP5_1, FN_IP5_2,
- FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,
- FN_IP5_7, FN_IP5_8, FN_IP5_9, FN_IP5_10,
- FN_IP5_11, FN_VI5_D9_Y1, FN_VI5_D10_Y2, FN_VI5_D11_Y3,
- FN_VI5_FIELD,
-
- /* GPSR10 */
- FN_IP6_0, FN_IP6_1, FN_HRTS0, FN_IP6_2,
- FN_IP6_3, FN_IP6_4, FN_IP6_5, FN_HCTS1,
- FN_IP6_6, FN_IP6_7, FN_SCK0, FN_CTS0,
- FN_RTS0, FN_TX0, FN_RX0, FN_SCK1,
- FN_CTS1, FN_RTS1, FN_TX1, FN_RX1,
- FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,
- FN_IP6_16, FN_IP6_18_17, FN_SCIF_CLK, FN_CAN0_TX,
- FN_CAN0_RX, FN_CAN_CLK, FN_CAN1_TX, FN_CAN1_RX,
-
- /* GPSR11 */
- FN_IP7_1_0, FN_IP7_3_2, FN_IP7_5_4, FN_IP7_6,
- FN_IP7_7, FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DAT0,
- FN_SD0_DAT1, FN_SD0_DAT2, FN_SD0_DAT3, FN_SD0_CD,
- FN_SD0_WP, FN_IP7_9_8, FN_IP7_11_10, FN_IP7_13_12,
- FN_IP7_15_14, FN_IP7_16, FN_IP7_17, FN_IP7_18,
- FN_IP7_19, FN_IP7_20, FN_ADICLK, FN_ADICS_SAMP,
- FN_ADIDATA, FN_ADICHS0, FN_ADICHS1, FN_ADICHS2,
- FN_AVS1, FN_AVS2,
-
- /* IPSR0 */
- FN_DU0_DR0_DATA0, FN_DU0_DR1_DATA1, FN_DU0_DR2_Y4_DATA2, FN_DU0_DR3_Y5_DATA3,
- FN_DU0_DR4_Y6_DATA4, FN_DU0_DR5_Y7_DATA5, FN_DU0_DR6_Y8_DATA6, FN_DU0_DR7_Y9_DATA7,
- FN_DU0_DG0_DATA8, FN_DU0_DG1_DATA9, FN_DU0_DG2_C6_DATA10, FN_DU0_DG3_C7_DATA11,
- FN_DU0_DG4_Y0_DATA12, FN_DU0_DG5_Y1_DATA13, FN_DU0_DG6_Y2_DATA14, FN_DU0_DG7_Y3_DATA15,
- FN_DU0_DB0, FN_DU0_DB1, FN_DU0_DB2_C0, FN_DU0_DB3_C1,
- FN_DU0_DB4_C2, FN_DU0_DB5_C3, FN_DU0_DB6_C4, FN_DU0_DB7_C5,
-
- /* IPSR1 */
- FN_DU0_EXHSYNC_DU0_HSYNC, FN_DU0_EXVSYNC_DU0_VSYNC, FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_DU0_DISP,
- FN_DU0_CDE, FN_DU1_DR2_Y4_DATA0, FN_DU1_DR3_Y5_DATA1, FN_DU1_DR4_Y6_DATA2,
- FN_DU1_DR5_Y7_DATA3, FN_DU1_DR6_DATA4, FN_DU1_DR7_DATA5, FN_DU1_DG2_C6_DATA6,
- FN_DU1_DG3_C7_DATA7, FN_DU1_DG4_Y0_DATA8, FN_DU1_DG5_Y1_DATA9, FN_DU1_DG6_Y2_DATA10,
- FN_DU1_DG7_Y3_DATA11, FN_A20, FN_MOSI_IO0, FN_A21, FN_MISO_IO1,
- FN_A22, FN_IO2, FN_A23, FN_IO3, FN_A24, FN_SPCLK, FN_A25, FN_SSL,
-
- /* IPSR2 */
- FN_VI2_CLK, FN_AVB_RX_CLK, FN_VI2_CLKENB, FN_AVB_RX_DV,
- FN_VI2_HSYNC, FN_AVB_RXD0, FN_VI2_VSYNC, FN_AVB_RXD1,
- FN_VI2_D0_C0, FN_AVB_RXD2, FN_VI2_D1_C1, FN_AVB_RXD3,
- FN_VI2_D2_C2, FN_AVB_RXD4, FN_VI2_D3_C3, FN_AVB_RXD5,
- FN_VI2_D4_C4, FN_AVB_RXD6, FN_VI2_D5_C5, FN_AVB_RXD7,
- FN_VI2_D6_C6, FN_AVB_RX_ER, FN_VI2_D7_C7, FN_AVB_COL,
- FN_VI2_D8_Y0, FN_AVB_TXD3, FN_VI2_D9_Y1, FN_AVB_TX_EN,
- FN_VI2_D10_Y2, FN_AVB_TXD0, FN_VI2_D11_Y3, FN_AVB_TXD1,
- FN_VI2_FIELD, FN_AVB_TXD2,
-
- /* IPSR3 */
- FN_VI3_CLK, FN_AVB_TX_CLK, FN_VI3_CLKENB, FN_AVB_TXD4,
- FN_VI3_HSYNC, FN_AVB_TXD5, FN_VI3_VSYNC, FN_AVB_TXD6,
- FN_VI3_D0_C0, FN_AVB_TXD7, FN_VI3_D1_C1, FN_AVB_TX_ER,
- FN_VI3_D2_C2, FN_AVB_GTX_CLK, FN_VI3_D3_C3, FN_AVB_MDC,
- FN_VI3_D4_C4, FN_AVB_MDIO, FN_VI3_D5_C5, FN_AVB_LINK,
- FN_VI3_D6_C6, FN_AVB_MAGIC, FN_VI3_D7_C7, FN_AVB_PHY_INT,
- FN_VI3_D8_Y0, FN_AVB_CRS, FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
- FN_VI3_D11_Y3,
-
- /* IPSR4 */
- FN_VI4_CLKENB, FN_VI0_D12_G4_Y4, FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,
- FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
- FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0,
- FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0,
- FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5,
- FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7,
- FN_VI4_D9_Y1, FN_VI3_D12_Y4, FN_VI4_D10_Y2, FN_VI3_D13_Y5,
- FN_VI4_D11_Y3, FN_VI3_D14_Y6, FN_VI4_FIELD, FN_VI3_D15_Y7,
-
- /* IPSR5 */
- FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1, FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,
- FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1, FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,
- FN_VI5_D1_C1, FN_VI1_D16_R0, FN_VI5_D2_C2, FN_VI1_D17_R1,
- FN_VI5_D3_C3, FN_VI1_D18_R2, FN_VI5_D4_C4, FN_VI1_D19_R3,
- FN_VI5_D5_C5, FN_VI1_D20_R4, FN_VI5_D6_C6, FN_VI1_D21_R5,
- FN_VI5_D7_C7, FN_VI1_D22_R6, FN_VI5_D8_Y0, FN_VI1_D23_R7,
-
- /* IPSR6 */
- FN_MSIOF0_SCK, FN_HSCK0, FN_MSIOF0_SYNC, FN_HCTS0,
- FN_MSIOF0_TXD, FN_HTX0, FN_MSIOF0_RXD, FN_HRX0,
- FN_MSIOF1_SCK, FN_HSCK1, FN_MSIOF1_SYNC, FN_HRTS1,
- FN_MSIOF1_TXD, FN_HTX1, FN_MSIOF1_RXD, FN_HRX1,
- FN_DRACK0, FN_SCK2, FN_DACK0, FN_TX2,
- FN_DREQ0, FN_RX2, FN_DACK1, FN_SCK3,
- FN_TX3, FN_DREQ1, FN_RX3,
-
- /* IPSR7 */
- FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, FN_PWM1, FN_TCLK2, FN_FSO_CFE_1,
- FN_PWM2, FN_TCLK3, FN_FSO_TOE, FN_PWM3, FN_PWM4,
- FN_SSI_SCK3, FN_TPU0TO0, FN_SSI_WS3, FN_TPU0TO1,
- FN_SSI_SDATA3, FN_TPU0TO2, FN_SSI_SCK4, FN_TPU0TO3,
- FN_SSI_WS4, FN_SSI_SDATA4, FN_AUDIO_CLKOUT, FN_AUDIO_CLKA, FN_AUDIO_CLKB,
-
- FN_SEL_VI1_0, FN_SEL_VI1_1,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- DU1_DB2_C0_DATA12_MARK, DU1_DB3_C1_DATA13_MARK,
- DU1_DB4_C2_DATA14_MARK, DU1_DB5_C3_DATA15_MARK,
- DU1_DB6_C4_MARK, DU1_DB7_C5_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK,
- DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, DU1_DISP_MARK, DU1_CDE_MARK,
-
- D0_MARK, D1_MARK, D2_MARK, D3_MARK, D4_MARK, D5_MARK,
- D6_MARK, D7_MARK, D8_MARK, D9_MARK, D10_MARK, D11_MARK,
- D12_MARK, D13_MARK, D14_MARK, D15_MARK, A0_MARK, A1_MARK,
- A2_MARK, A3_MARK, A4_MARK, A5_MARK, A6_MARK, A7_MARK,
- A8_MARK, A9_MARK, A10_MARK, A11_MARK, A12_MARK, A13_MARK,
- A14_MARK, A15_MARK,
-
- A16_MARK, A17_MARK, A18_MARK, A19_MARK,
- CS1_A26_MARK, EX_CS0_MARK, EX_CS1_MARK, EX_CS2_MARK,
- EX_CS3_MARK, EX_CS4_MARK, EX_CS5_MARK, BS_MARK,
- RD_MARK, RD_WR_MARK, WE0_MARK, WE1_MARK, EX_WAIT0_MARK,
- IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK, CS0_MARK,
-
- VI0_CLK_MARK, VI0_CLKENB_MARK, VI0_HSYNC_MARK, VI0_VSYNC_MARK,
- VI0_D0_B0_C0_MARK, VI0_D1_B1_C1_MARK, VI0_D2_B2_C2_MARK, VI0_D3_B3_C3_MARK,
- VI0_D4_B4_C4_MARK, VI0_D5_B5_C5_MARK, VI0_D6_B6_C6_MARK, VI0_D7_B7_C7_MARK,
- VI0_D8_G0_Y0_MARK, VI0_D9_G1_Y1_MARK, VI0_D10_G2_Y2_MARK, VI0_D11_G3_Y3_MARK,
- VI0_FIELD_MARK,
-
- VI1_CLK_MARK, VI1_CLKENB_MARK, VI1_HSYNC_MARK,
- VI1_VSYNC_MARK, VI1_D0_B0_C0_MARK, VI1_D1_B1_C1_MARK,
- VI1_D2_B2_C2_MARK, VI1_D3_B3_C3_MARK, VI1_D4_B4_C4_MARK,
- VI1_D5_B5_C5_MARK, VI1_D6_B6_C6_MARK, VI1_D7_B7_C7_MARK,
- VI1_D8_G0_Y0_MARK, VI1_D9_G1_Y1_MARK, VI1_D10_G2_Y2_MARK,
- VI1_D11_G3_Y3_MARK, VI1_FIELD_MARK,
-
- VI3_D10_Y2_MARK, VI3_FIELD_MARK,
-
- VI4_CLK_MARK,
-
- VI5_CLK_MARK, VI5_D9_Y1_MARK, VI5_D10_Y2_MARK, VI5_D11_Y3_MARK, VI5_FIELD_MARK,
-
- HRTS0_MARK, HCTS1_MARK, SCK0_MARK, CTS0_MARK, RTS0_MARK, TX0_MARK,
- RX0_MARK, SCK1_MARK, CTS1_MARK, RTS1_MARK, TX1_MARK, RX1_MARK,
- SCIF_CLK_MARK, CAN0_TX_MARK, CAN0_RX_MARK,
- CAN_CLK_MARK, CAN1_TX_MARK, CAN1_RX_MARK,
-
- SD0_CLK_MARK, SD0_CMD_MARK, SD0_DAT0_MARK,
- SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK,
- SD0_CD_MARK, SD0_WP_MARK, ADICLK_MARK,
- ADICS_SAMP_MARK, ADIDATA_MARK, ADICHS0_MARK,
- ADICHS1_MARK, ADICHS2_MARK, AVS1_MARK, AVS2_MARK,
-
- DU0_DR0_DATA0_MARK, DU0_DR1_DATA1_MARK, DU0_DR2_Y4_DATA2_MARK,
- DU0_DR3_Y5_DATA3_MARK, DU0_DR4_Y6_DATA4_MARK, DU0_DR5_Y7_DATA5_MARK,
- DU0_DR6_Y8_DATA6_MARK, DU0_DR7_Y9_DATA7_MARK, DU0_DG0_DATA8_MARK,
- DU0_DG1_DATA9_MARK, DU0_DG2_C6_DATA10_MARK, DU0_DG3_C7_DATA11_MARK,
- DU0_DG4_Y0_DATA12_MARK, DU0_DG5_Y1_DATA13_MARK, DU0_DG6_Y2_DATA14_MARK,
- DU0_DG7_Y3_DATA15_MARK, DU0_DB0_MARK, DU0_DB1_MARK,
- DU0_DB2_C0_MARK, DU0_DB3_C1_MARK, DU0_DB4_C2_MARK,
- DU0_DB5_C3_MARK, DU0_DB6_C4_MARK, DU0_DB7_C5_MARK,
-
- DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
- DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, DU0_DISP_MARK, DU0_CDE_MARK,
- DU1_DR2_Y4_DATA0_MARK, DU1_DR3_Y5_DATA1_MARK, DU1_DR4_Y6_DATA2_MARK,
- DU1_DR5_Y7_DATA3_MARK, DU1_DR6_DATA4_MARK, DU1_DR7_DATA5_MARK,
- DU1_DG2_C6_DATA6_MARK, DU1_DG3_C7_DATA7_MARK, DU1_DG4_Y0_DATA8_MARK,
- DU1_DG5_Y1_DATA9_MARK, DU1_DG6_Y2_DATA10_MARK, DU1_DG7_Y3_DATA11_MARK,
- A20_MARK, MOSI_IO0_MARK, A21_MARK, MISO_IO1_MARK, A22_MARK, IO2_MARK,
- A23_MARK, IO3_MARK, A24_MARK, SPCLK_MARK, A25_MARK, SSL_MARK,
-
- VI2_CLK_MARK, AVB_RX_CLK_MARK, VI2_CLKENB_MARK, AVB_RX_DV_MARK,
- VI2_HSYNC_MARK, AVB_RXD0_MARK, VI2_VSYNC_MARK, AVB_RXD1_MARK,
- VI2_D0_C0_MARK, AVB_RXD2_MARK, VI2_D1_C1_MARK, AVB_RXD3_MARK,
- VI2_D2_C2_MARK, AVB_RXD4_MARK, VI2_D3_C3_MARK, AVB_RXD5_MARK,
- VI2_D4_C4_MARK, AVB_RXD6_MARK, VI2_D5_C5_MARK, AVB_RXD7_MARK,
- VI2_D6_C6_MARK, AVB_RX_ER_MARK, VI2_D7_C7_MARK, AVB_COL_MARK,
- VI2_D8_Y0_MARK, AVB_TXD3_MARK, VI2_D9_Y1_MARK, AVB_TX_EN_MARK,
- VI2_D10_Y2_MARK, AVB_TXD0_MARK, VI2_D11_Y3_MARK, AVB_TXD1_MARK,
- VI2_FIELD_MARK, AVB_TXD2_MARK,
-
- VI3_CLK_MARK, AVB_TX_CLK_MARK, VI3_CLKENB_MARK, AVB_TXD4_MARK,
- VI3_HSYNC_MARK, AVB_TXD5_MARK, VI3_VSYNC_MARK, AVB_TXD6_MARK,
- VI3_D0_C0_MARK, AVB_TXD7_MARK, VI3_D1_C1_MARK, AVB_TX_ER_MARK,
- VI3_D2_C2_MARK, AVB_GTX_CLK_MARK, VI3_D3_C3_MARK, AVB_MDC_MARK,
- VI3_D4_C4_MARK, AVB_MDIO_MARK, VI3_D5_C5_MARK, AVB_LINK_MARK,
- VI3_D6_C6_MARK, AVB_MAGIC_MARK, VI3_D7_C7_MARK, AVB_PHY_INT_MARK,
- VI3_D8_Y0_MARK, AVB_CRS_MARK, VI3_D9_Y1_MARK, AVB_GTXREFCLK_MARK,
- VI3_D11_Y3_MARK,
-
- VI4_CLKENB_MARK, VI0_D12_G4_Y4_MARK, VI4_HSYNC_MARK, VI0_D13_G5_Y5_MARK,
- VI4_VSYNC_MARK, VI0_D14_G6_Y6_MARK, VI4_D0_C0_MARK, VI0_D15_G7_Y7_MARK,
- VI4_D1_C1_MARK, VI0_D16_R0_MARK, VI1_D12_G4_Y4_0_MARK,
- VI4_D2_C2_MARK, VI0_D17_R1_MARK, VI1_D13_G5_Y5_0_MARK,
- VI4_D3_C3_MARK, VI0_D18_R2_MARK, VI1_D14_G6_Y6_0_MARK,
- VI4_D4_C4_MARK, VI0_D19_R3_MARK, VI1_D15_G7_Y7_0_MARK,
- VI4_D5_C5_MARK, VI0_D20_R4_MARK, VI2_D12_Y4_MARK,
- VI4_D6_C6_MARK, VI0_D21_R5_MARK, VI2_D13_Y5_MARK,
- VI4_D7_C7_MARK, VI0_D22_R6_MARK, VI2_D14_Y6_MARK,
- VI4_D8_Y0_MARK, VI0_D23_R7_MARK, VI2_D15_Y7_MARK,
- VI4_D9_Y1_MARK, VI3_D12_Y4_MARK, VI4_D10_Y2_MARK, VI3_D13_Y5_MARK,
- VI4_D11_Y3_MARK, VI3_D14_Y6_MARK, VI4_FIELD_MARK, VI3_D15_Y7_MARK,
-
- VI5_CLKENB_MARK, VI1_D12_G4_Y4_1_MARK, VI5_HSYNC_MARK, VI1_D13_G5_Y5_1_MARK,
- VI5_VSYNC_MARK, VI1_D14_G6_Y6_1_MARK, VI5_D0_C0_MARK, VI1_D15_G7_Y7_1_MARK,
- VI5_D1_C1_MARK, VI1_D16_R0_MARK, VI5_D2_C2_MARK, VI1_D17_R1_MARK,
- VI5_D3_C3_MARK, VI1_D18_R2_MARK, VI5_D4_C4_MARK, VI1_D19_R3_MARK,
- VI5_D5_C5_MARK, VI1_D20_R4_MARK, VI5_D6_C6_MARK, VI1_D21_R5_MARK,
- VI5_D7_C7_MARK, VI1_D22_R6_MARK, VI5_D8_Y0_MARK, VI1_D23_R7_MARK,
-
- MSIOF0_SCK_MARK, HSCK0_MARK, MSIOF0_SYNC_MARK, HCTS0_MARK,
- MSIOF0_TXD_MARK, HTX0_MARK, MSIOF0_RXD_MARK, HRX0_MARK,
- MSIOF1_SCK_MARK, HSCK1_MARK, MSIOF1_SYNC_MARK, HRTS1_MARK,
- MSIOF1_TXD_MARK, HTX1_MARK, MSIOF1_RXD_MARK, HRX1_MARK,
- DRACK0_MARK, SCK2_MARK, DACK0_MARK, TX2_MARK,
- DREQ0_MARK, RX2_MARK, DACK1_MARK, SCK3_MARK,
- TX3_MARK, DREQ1_MARK, RX3_MARK,
-
- PWM0_MARK, TCLK1_MARK, FSO_CFE_0_MARK,
- PWM1_MARK, TCLK2_MARK, FSO_CFE_1_MARK,
- PWM2_MARK, TCLK3_MARK, FSO_TOE_MARK,
- PWM3_MARK, PWM4_MARK, SSI_SCK3_MARK, TPU0TO0_MARK,
- SSI_WS3_MARK, TPU0TO1_MARK, SSI_SDATA3_MARK, TPU0TO2_MARK,
- SSI_SCK4_MARK, TPU0TO3_MARK, SSI_WS4_MARK,
- SSI_SDATA4_MARK, AUDIO_CLKOUT_MARK,
- AUDIO_CLKA_MARK, AUDIO_CLKB_MARK,
-
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-
- PINMUX_DATA(DU1_DB2_C0_DATA12_MARK, FN_DU1_DB2_C0_DATA12),
- PINMUX_DATA(DU1_DB3_C1_DATA13_MARK, FN_DU1_DB3_C1_DATA13),
- PINMUX_DATA(DU1_DB4_C2_DATA14_MARK, FN_DU1_DB4_C2_DATA14),
- PINMUX_DATA(DU1_DB5_C3_DATA15_MARK, FN_DU1_DB5_C3_DATA15),
- PINMUX_DATA(DU1_DB6_C4_MARK, FN_DU1_DB6_C4),
- PINMUX_DATA(DU1_DB7_C5_MARK, FN_DU1_DB7_C5),
- PINMUX_DATA(DU1_EXHSYNC_DU1_HSYNC_MARK, FN_DU1_EXHSYNC_DU1_HSYNC),
- PINMUX_DATA(DU1_EXVSYNC_DU1_VSYNC_MARK, FN_DU1_EXVSYNC_DU1_VSYNC),
- PINMUX_DATA(DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE),
- PINMUX_DATA(DU1_DISP_MARK, FN_DU1_DISP),
- PINMUX_DATA(DU1_CDE_MARK, FN_DU1_CDE),
-
- PINMUX_DATA(D0_MARK, FN_D0),
- PINMUX_DATA(D1_MARK, FN_D1),
- PINMUX_DATA(D2_MARK, FN_D2),
- PINMUX_DATA(D3_MARK, FN_D3),
- PINMUX_DATA(D4_MARK, FN_D4),
- PINMUX_DATA(D5_MARK, FN_D5),
- PINMUX_DATA(D6_MARK, FN_D6),
- PINMUX_DATA(D7_MARK, FN_D7),
- PINMUX_DATA(D8_MARK, FN_D8),
- PINMUX_DATA(D9_MARK, FN_D9),
- PINMUX_DATA(D10_MARK, FN_D10),
- PINMUX_DATA(D11_MARK, FN_D11),
- PINMUX_DATA(D12_MARK, FN_D12),
- PINMUX_DATA(D13_MARK, FN_D13),
- PINMUX_DATA(D14_MARK, FN_D14),
- PINMUX_DATA(D15_MARK, FN_D15),
- PINMUX_DATA(A0_MARK, FN_A0),
- PINMUX_DATA(A1_MARK, FN_A1),
- PINMUX_DATA(A2_MARK, FN_A2),
- PINMUX_DATA(A3_MARK, FN_A3),
- PINMUX_DATA(A4_MARK, FN_A4),
- PINMUX_DATA(A5_MARK, FN_A5),
- PINMUX_DATA(A6_MARK, FN_A6),
- PINMUX_DATA(A7_MARK, FN_A7),
- PINMUX_DATA(A8_MARK, FN_A8),
- PINMUX_DATA(A9_MARK, FN_A9),
- PINMUX_DATA(A10_MARK, FN_A10),
- PINMUX_DATA(A11_MARK, FN_A11),
- PINMUX_DATA(A12_MARK, FN_A12),
- PINMUX_DATA(A13_MARK, FN_A13),
- PINMUX_DATA(A14_MARK, FN_A14),
- PINMUX_DATA(A15_MARK, FN_A15),
-
- PINMUX_DATA(A16_MARK, FN_A16),
- PINMUX_DATA(A17_MARK, FN_A17),
- PINMUX_DATA(A18_MARK, FN_A18),
- PINMUX_DATA(A19_MARK, FN_A19),
- PINMUX_DATA(CS1_A26_MARK, FN_CS1_A26),
- PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0),
- PINMUX_DATA(EX_CS1_MARK, FN_EX_CS1),
- PINMUX_DATA(EX_CS2_MARK, FN_EX_CS2),
- PINMUX_DATA(EX_CS3_MARK, FN_EX_CS3),
- PINMUX_DATA(EX_CS4_MARK, FN_EX_CS4),
- PINMUX_DATA(EX_CS5_MARK, FN_EX_CS5),
- PINMUX_DATA(BS_MARK, FN_BS),
- PINMUX_DATA(RD_MARK, FN_RD),
- PINMUX_DATA(RD_WR_MARK, FN_RD_WR),
- PINMUX_DATA(WE0_MARK, FN_WE0),
- PINMUX_DATA(WE1_MARK, FN_WE1),
- PINMUX_DATA(EX_WAIT0_MARK, FN_EX_WAIT0),
- PINMUX_DATA(IRQ0_MARK, FN_IRQ0),
- PINMUX_DATA(IRQ1_MARK, FN_IRQ1),
- PINMUX_DATA(IRQ2_MARK, FN_IRQ2),
- PINMUX_DATA(IRQ3_MARK, FN_IRQ3),
- PINMUX_DATA(CS0_MARK, FN_CS0),
-
- PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK),
- PINMUX_DATA(VI0_CLKENB_MARK, FN_VI0_CLKENB),
- PINMUX_DATA(VI0_HSYNC_MARK, FN_VI0_HSYNC),
- PINMUX_DATA(VI0_VSYNC_MARK, FN_VI0_VSYNC),
- PINMUX_DATA(VI0_D0_B0_C0_MARK, FN_VI0_D0_B0_C0),
- PINMUX_DATA(VI0_D1_B1_C1_MARK, FN_VI0_D1_B1_C1),
- PINMUX_DATA(VI0_D2_B2_C2_MARK, FN_VI0_D2_B2_C2),
- PINMUX_DATA(VI0_D3_B3_C3_MARK, FN_VI0_D3_B3_C3),
- PINMUX_DATA(VI0_D4_B4_C4_MARK, FN_VI0_D4_B4_C4),
- PINMUX_DATA(VI0_D5_B5_C5_MARK, FN_VI0_D5_B5_C5),
- PINMUX_DATA(VI0_D6_B6_C6_MARK, FN_VI0_D6_B6_C6),
- PINMUX_DATA(VI0_D7_B7_C7_MARK, FN_VI0_D7_B7_C7),
- PINMUX_DATA(VI0_D8_G0_Y0_MARK, FN_VI0_D8_G0_Y0),
- PINMUX_DATA(VI0_D9_G1_Y1_MARK, FN_VI0_D9_G1_Y1),
- PINMUX_DATA(VI0_D10_G2_Y2_MARK, FN_VI0_D10_G2_Y2),
- PINMUX_DATA(VI0_D11_G3_Y3_MARK, FN_VI0_D11_G3_Y3),
- PINMUX_DATA(VI0_FIELD_MARK, FN_VI0_FIELD),
-
- PINMUX_DATA(VI1_CLK_MARK, FN_VI1_CLK),
- PINMUX_DATA(VI1_CLKENB_MARK, FN_VI1_CLKENB),
- PINMUX_DATA(VI1_HSYNC_MARK, FN_VI1_HSYNC),
- PINMUX_DATA(VI1_VSYNC_MARK, FN_VI1_VSYNC),
- PINMUX_DATA(VI1_D0_B0_C0_MARK, FN_VI1_D0_B0_C0),
- PINMUX_DATA(VI1_D1_B1_C1_MARK, FN_VI1_D1_B1_C1),
- PINMUX_DATA(VI1_D2_B2_C2_MARK, FN_VI1_D2_B2_C2),
- PINMUX_DATA(VI1_D3_B3_C3_MARK, FN_VI1_D3_B3_C3),
- PINMUX_DATA(VI1_D4_B4_C4_MARK, FN_VI1_D4_B4_C4),
- PINMUX_DATA(VI1_D5_B5_C5_MARK, FN_VI1_D5_B5_C5),
- PINMUX_DATA(VI1_D6_B6_C6_MARK, FN_VI1_D6_B6_C6),
- PINMUX_DATA(VI1_D7_B7_C7_MARK, FN_VI1_D7_B7_C7),
- PINMUX_DATA(VI1_D8_G0_Y0_MARK, FN_VI1_D8_G0_Y0),
- PINMUX_DATA(VI1_D9_G1_Y1_MARK, FN_VI1_D9_G1_Y1),
- PINMUX_DATA(VI1_D10_G2_Y2_MARK, FN_VI1_D10_G2_Y2),
- PINMUX_DATA(VI1_D11_G3_Y3_MARK, FN_VI1_D11_G3_Y3),
- PINMUX_DATA(VI1_FIELD_MARK, FN_VI1_FIELD),
-
- PINMUX_DATA(VI3_D10_Y2_MARK, FN_VI3_D10_Y2),
- PINMUX_DATA(VI3_FIELD_MARK, FN_VI3_FIELD),
-
- PINMUX_DATA(VI4_CLK_MARK, FN_VI4_CLK),
-
- PINMUX_DATA(VI5_CLK_MARK, FN_VI5_CLK),
- PINMUX_DATA(VI5_D9_Y1_MARK, FN_VI5_D9_Y1),
- PINMUX_DATA(VI5_D10_Y2_MARK, FN_VI5_D10_Y2),
- PINMUX_DATA(VI5_D11_Y3_MARK, FN_VI5_D11_Y3),
- PINMUX_DATA(VI5_FIELD_MARK, FN_VI5_FIELD),
-
- PINMUX_DATA(HRTS0_MARK, FN_HRTS0),
- PINMUX_DATA(HCTS1_MARK, FN_HCTS1),
- PINMUX_DATA(SCK0_MARK, FN_SCK0),
- PINMUX_DATA(CTS0_MARK, FN_CTS0),
- PINMUX_DATA(RTS0_MARK, FN_RTS0),
- PINMUX_DATA(TX0_MARK, FN_TX0),
- PINMUX_DATA(RX0_MARK, FN_RX0),
- PINMUX_DATA(SCK1_MARK, FN_SCK1),
- PINMUX_DATA(CTS1_MARK, FN_CTS1),
- PINMUX_DATA(RTS1_MARK, FN_RTS1),
- PINMUX_DATA(TX1_MARK, FN_TX1),
- PINMUX_DATA(RX1_MARK, FN_RX1),
- PINMUX_DATA(SCIF_CLK_MARK, FN_SCIF_CLK),
- PINMUX_DATA(CAN0_TX_MARK, FN_CAN0_TX),
- PINMUX_DATA(CAN0_RX_MARK, FN_CAN0_RX),
- PINMUX_DATA(CAN_CLK_MARK, FN_CAN_CLK),
- PINMUX_DATA(CAN1_TX_MARK, FN_CAN1_TX),
- PINMUX_DATA(CAN1_RX_MARK, FN_CAN1_RX),
-
- PINMUX_DATA(SD0_CLK_MARK, FN_SD0_CLK),
- PINMUX_DATA(SD0_CMD_MARK, FN_SD0_CMD),
- PINMUX_DATA(SD0_DAT0_MARK, FN_SD0_DAT0),
- PINMUX_DATA(SD0_DAT1_MARK, FN_SD0_DAT1),
- PINMUX_DATA(SD0_DAT2_MARK, FN_SD0_DAT2),
- PINMUX_DATA(SD0_DAT3_MARK, FN_SD0_DAT3),
- PINMUX_DATA(SD0_CD_MARK, FN_SD0_CD),
- PINMUX_DATA(SD0_WP_MARK, FN_SD0_WP),
- PINMUX_DATA(ADICLK_MARK, FN_ADICLK),
- PINMUX_DATA(ADICS_SAMP_MARK, FN_ADICS_SAMP),
- PINMUX_DATA(ADIDATA_MARK, FN_ADIDATA),
- PINMUX_DATA(ADICHS0_MARK, FN_ADICHS0),
- PINMUX_DATA(ADICHS1_MARK, FN_ADICHS1),
- PINMUX_DATA(ADICHS2_MARK, FN_ADICHS2),
- PINMUX_DATA(AVS1_MARK, FN_AVS1),
- PINMUX_DATA(AVS2_MARK, FN_AVS2),
-
- PINMUX_IPSR_DATA(IP0_0, DU0_DR0_DATA0),
- PINMUX_IPSR_DATA(IP0_1, DU0_DR1_DATA1),
- PINMUX_IPSR_DATA(IP0_2, DU0_DR2_Y4_DATA2),
- PINMUX_IPSR_DATA(IP0_3, DU0_DR3_Y5_DATA3),
- PINMUX_IPSR_DATA(IP0_4, DU0_DR4_Y6_DATA4),
- PINMUX_IPSR_DATA(IP0_5, DU0_DR5_Y7_DATA5),
- PINMUX_IPSR_DATA(IP0_6, DU0_DR6_Y8_DATA6),
- PINMUX_IPSR_DATA(IP0_7, DU0_DR7_Y9_DATA7),
- PINMUX_IPSR_DATA(IP0_8, DU0_DG0_DATA8),
- PINMUX_IPSR_DATA(IP0_9, DU0_DG1_DATA9),
- PINMUX_IPSR_DATA(IP0_10, DU0_DG2_C6_DATA10),
- PINMUX_IPSR_DATA(IP0_11, DU0_DG3_C7_DATA11),
- PINMUX_IPSR_DATA(IP0_12, DU0_DG4_Y0_DATA12),
- PINMUX_IPSR_DATA(IP0_13, DU0_DG5_Y1_DATA13),
- PINMUX_IPSR_DATA(IP0_14, DU0_DG6_Y2_DATA14),
- PINMUX_IPSR_DATA(IP0_15, DU0_DG7_Y3_DATA15),
- PINMUX_IPSR_DATA(IP0_16, DU0_DB0),
- PINMUX_IPSR_DATA(IP0_17, DU0_DB1),
- PINMUX_IPSR_DATA(IP0_18, DU0_DB2_C0),
- PINMUX_IPSR_DATA(IP0_19, DU0_DB3_C1),
- PINMUX_IPSR_DATA(IP0_20, DU0_DB4_C2),
- PINMUX_IPSR_DATA(IP0_21, DU0_DB5_C3),
- PINMUX_IPSR_DATA(IP0_22, DU0_DB6_C4),
- PINMUX_IPSR_DATA(IP0_23, DU0_DB7_C5),
-
- PINMUX_IPSR_DATA(IP1_0, DU0_EXHSYNC_DU0_HSYNC),
- PINMUX_IPSR_DATA(IP1_1, DU0_EXVSYNC_DU0_VSYNC),
- PINMUX_IPSR_DATA(IP1_2, DU0_EXODDF_DU0_ODDF_DISP_CDE),
- PINMUX_IPSR_DATA(IP1_3, DU0_DISP),
- PINMUX_IPSR_DATA(IP1_4, DU0_CDE),
- PINMUX_IPSR_DATA(IP1_5, DU1_DR2_Y4_DATA0),
- PINMUX_IPSR_DATA(IP1_6, DU1_DR3_Y5_DATA1),
- PINMUX_IPSR_DATA(IP1_7, DU1_DR4_Y6_DATA2),
- PINMUX_IPSR_DATA(IP1_8, DU1_DR5_Y7_DATA3),
- PINMUX_IPSR_DATA(IP1_9, DU1_DR6_DATA4),
- PINMUX_IPSR_DATA(IP1_10, DU1_DR7_DATA5),
- PINMUX_IPSR_DATA(IP1_11, DU1_DG2_C6_DATA6),
- PINMUX_IPSR_DATA(IP1_12, DU1_DG3_C7_DATA7),
- PINMUX_IPSR_DATA(IP1_13, DU1_DG4_Y0_DATA8),
- PINMUX_IPSR_DATA(IP1_14, DU1_DG5_Y1_DATA9),
- PINMUX_IPSR_DATA(IP1_15, DU1_DG6_Y2_DATA10),
- PINMUX_IPSR_DATA(IP1_16, DU1_DG7_Y3_DATA11),
- PINMUX_IPSR_DATA(IP1_17, A20),
- PINMUX_IPSR_DATA(IP1_17, MOSI_IO0),
- PINMUX_IPSR_DATA(IP1_18, A21),
- PINMUX_IPSR_DATA(IP1_18, MISO_IO1),
- PINMUX_IPSR_DATA(IP1_19, A22),
- PINMUX_IPSR_DATA(IP1_19, IO2),
- PINMUX_IPSR_DATA(IP1_20, A23),
- PINMUX_IPSR_DATA(IP1_20, IO3),
- PINMUX_IPSR_DATA(IP1_21, A24),
- PINMUX_IPSR_DATA(IP1_21, SPCLK),
- PINMUX_IPSR_DATA(IP1_22, A25),
- PINMUX_IPSR_DATA(IP1_22, SSL),
-
- PINMUX_IPSR_DATA(IP2_0, VI2_CLK),
- PINMUX_IPSR_DATA(IP2_0, AVB_RX_CLK),
- PINMUX_IPSR_DATA(IP2_1, VI2_CLKENB),
- PINMUX_IPSR_DATA(IP2_1, AVB_RX_DV),
- PINMUX_IPSR_DATA(IP2_2, VI2_HSYNC),
- PINMUX_IPSR_DATA(IP2_2, AVB_RXD0),
- PINMUX_IPSR_DATA(IP2_3, VI2_VSYNC),
- PINMUX_IPSR_DATA(IP2_3, AVB_RXD1),
- PINMUX_IPSR_DATA(IP2_4, VI2_D0_C0),
- PINMUX_IPSR_DATA(IP2_4, AVB_RXD2),
- PINMUX_IPSR_DATA(IP2_5, VI2_D1_C1),
- PINMUX_IPSR_DATA(IP2_5, AVB_RXD3),
- PINMUX_IPSR_DATA(IP2_6, VI2_D2_C2),
- PINMUX_IPSR_DATA(IP2_6, AVB_RXD4),
- PINMUX_IPSR_DATA(IP2_7, VI2_D3_C3),
- PINMUX_IPSR_DATA(IP2_7, AVB_RXD5),
- PINMUX_IPSR_DATA(IP2_8, VI2_D4_C4),
- PINMUX_IPSR_DATA(IP2_8, AVB_RXD6),
- PINMUX_IPSR_DATA(IP2_9, VI2_D5_C5),
- PINMUX_IPSR_DATA(IP2_9, AVB_RXD7),
- PINMUX_IPSR_DATA(IP2_10, VI2_D6_C6),
- PINMUX_IPSR_DATA(IP2_10, AVB_RX_ER),
- PINMUX_IPSR_DATA(IP2_11, VI2_D7_C7),
- PINMUX_IPSR_DATA(IP2_11, AVB_COL),
- PINMUX_IPSR_DATA(IP2_12, VI2_D8_Y0),
- PINMUX_IPSR_DATA(IP2_12, AVB_TXD3),
- PINMUX_IPSR_DATA(IP2_13, VI2_D9_Y1),
- PINMUX_IPSR_DATA(IP2_13, AVB_TX_EN),
- PINMUX_IPSR_DATA(IP2_14, VI2_D10_Y2),
- PINMUX_IPSR_DATA(IP2_14, AVB_TXD0),
- PINMUX_IPSR_DATA(IP2_15, VI2_D11_Y3),
- PINMUX_IPSR_DATA(IP2_15, AVB_TXD1),
- PINMUX_IPSR_DATA(IP2_16, VI2_FIELD),
- PINMUX_IPSR_DATA(IP2_16, AVB_TXD2),
-
- PINMUX_IPSR_DATA(IP3_0, VI3_CLK),
- PINMUX_IPSR_DATA(IP3_0, AVB_TX_CLK),
- PINMUX_IPSR_DATA(IP3_1, VI3_CLKENB),
- PINMUX_IPSR_DATA(IP3_1, AVB_TXD4),
- PINMUX_IPSR_DATA(IP3_2, VI3_HSYNC),
- PINMUX_IPSR_DATA(IP3_2, AVB_TXD5),
- PINMUX_IPSR_DATA(IP3_3, VI3_VSYNC),
- PINMUX_IPSR_DATA(IP3_3, AVB_TXD6),
- PINMUX_IPSR_DATA(IP3_4, VI3_D0_C0),
- PINMUX_IPSR_DATA(IP3_4, AVB_TXD7),
- PINMUX_IPSR_DATA(IP3_5, VI3_D1_C1),
- PINMUX_IPSR_DATA(IP3_5, AVB_TX_ER),
- PINMUX_IPSR_DATA(IP3_6, VI3_D2_C2),
- PINMUX_IPSR_DATA(IP3_6, AVB_GTX_CLK),
- PINMUX_IPSR_DATA(IP3_7, VI3_D3_C3),
- PINMUX_IPSR_DATA(IP3_7, AVB_MDC),
- PINMUX_IPSR_DATA(IP3_8, VI3_D4_C4),
- PINMUX_IPSR_DATA(IP3_8, AVB_MDIO),
- PINMUX_IPSR_DATA(IP3_9, VI3_D5_C5),
- PINMUX_IPSR_DATA(IP3_9, AVB_LINK),
- PINMUX_IPSR_DATA(IP3_10, VI3_D6_C6),
- PINMUX_IPSR_DATA(IP3_10, AVB_MAGIC),
- PINMUX_IPSR_DATA(IP3_11, VI3_D7_C7),
- PINMUX_IPSR_DATA(IP3_11, AVB_PHY_INT),
- PINMUX_IPSR_DATA(IP3_12, VI3_D8_Y0),
- PINMUX_IPSR_DATA(IP3_12, AVB_CRS),
- PINMUX_IPSR_DATA(IP3_13, VI3_D9_Y1),
- PINMUX_IPSR_DATA(IP3_13, AVB_GTXREFCLK),
- PINMUX_IPSR_DATA(IP3_14, VI3_D11_Y3),
-
- PINMUX_IPSR_DATA(IP4_0, VI4_CLKENB),
- PINMUX_IPSR_DATA(IP4_0, VI0_D12_G4_Y4),
- PINMUX_IPSR_DATA(IP4_1, VI4_HSYNC),
- PINMUX_IPSR_DATA(IP4_1, VI0_D13_G5_Y5),
- PINMUX_IPSR_DATA(IP4_3_2, VI4_VSYNC),
- PINMUX_IPSR_DATA(IP4_3_2, VI0_D14_G6_Y6),
- PINMUX_IPSR_DATA(IP4_4, VI4_D0_C0),
- PINMUX_IPSR_DATA(IP4_4, VI0_D15_G7_Y7),
- PINMUX_IPSR_DATA(IP4_6_5, VI4_D1_C1),
- PINMUX_IPSR_DATA(IP4_6_5, VI0_D16_R0),
- PINMUX_IPSR_MODSEL_DATA(IP4_6_5, VI1_D12_G4_Y4_0, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP4_8_7, VI4_D2_C2),
- PINMUX_IPSR_DATA(IP4_8_7, VI0_D17_R1),
- PINMUX_IPSR_MODSEL_DATA(IP4_8_7, VI1_D13_G5_Y5_0, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP4_10_9, VI4_D3_C3),
- PINMUX_IPSR_DATA(IP4_10_9, VI0_D18_R2),
- PINMUX_IPSR_MODSEL_DATA(IP4_10_9, VI1_D14_G6_Y6_0, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP4_12_11, VI4_D4_C4),
- PINMUX_IPSR_DATA(IP4_12_11, VI0_D19_R3),
- PINMUX_IPSR_MODSEL_DATA(IP4_12_11, VI1_D15_G7_Y7_0, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP4_14_13, VI4_D5_C5),
- PINMUX_IPSR_DATA(IP4_14_13, VI0_D20_R4),
- PINMUX_IPSR_DATA(IP4_14_13, VI2_D12_Y4),
- PINMUX_IPSR_DATA(IP4_16_15, VI4_D6_C6),
- PINMUX_IPSR_DATA(IP4_16_15, VI0_D21_R5),
- PINMUX_IPSR_DATA(IP4_16_15, VI2_D13_Y5),
- PINMUX_IPSR_DATA(IP4_18_17, VI4_D7_C7),
- PINMUX_IPSR_DATA(IP4_18_17, VI0_D22_R6),
- PINMUX_IPSR_DATA(IP4_18_17, VI2_D14_Y6),
- PINMUX_IPSR_DATA(IP4_20_19, VI4_D8_Y0),
- PINMUX_IPSR_DATA(IP4_20_19, VI0_D23_R7),
- PINMUX_IPSR_DATA(IP4_20_19, VI2_D15_Y7),
- PINMUX_IPSR_DATA(IP4_21, VI4_D9_Y1),
- PINMUX_IPSR_DATA(IP4_21, VI3_D12_Y4),
- PINMUX_IPSR_DATA(IP4_22, VI4_D10_Y2),
- PINMUX_IPSR_DATA(IP4_22, VI3_D13_Y5),
- PINMUX_IPSR_DATA(IP4_23, VI4_D11_Y3),
- PINMUX_IPSR_DATA(IP4_23, VI3_D14_Y6),
- PINMUX_IPSR_DATA(IP4_24, VI4_FIELD),
- PINMUX_IPSR_DATA(IP4_24, VI3_D15_Y7),
-
- PINMUX_IPSR_DATA(IP5_0, VI5_CLKENB),
- PINMUX_IPSR_MODSEL_DATA(IP5_0, VI1_D12_G4_Y4_1, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP5_1, VI5_HSYNC),
- PINMUX_IPSR_MODSEL_DATA(IP5_1, VI1_D13_G5_Y5_1, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP5_2, VI5_VSYNC),
- PINMUX_IPSR_MODSEL_DATA(IP5_2, VI1_D14_G6_Y6_1, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP5_3, VI5_D0_C0),
- PINMUX_IPSR_MODSEL_DATA(IP5_3, VI1_D15_G7_Y7_1, SEL_VI1_1),
- PINMUX_IPSR_DATA(IP5_4, VI5_D1_C1),
- PINMUX_IPSR_DATA(IP5_4, VI1_D16_R0),
- PINMUX_IPSR_DATA(IP5_5, VI5_D2_C2),
- PINMUX_IPSR_DATA(IP5_5, VI1_D17_R1),
- PINMUX_IPSR_DATA(IP5_6, VI5_D3_C3),
- PINMUX_IPSR_DATA(IP5_6, VI1_D18_R2),
- PINMUX_IPSR_DATA(IP5_7, VI5_D4_C4),
- PINMUX_IPSR_DATA(IP5_7, VI1_D19_R3),
- PINMUX_IPSR_DATA(IP5_8, VI5_D5_C5),
- PINMUX_IPSR_DATA(IP5_8, VI1_D20_R4),
- PINMUX_IPSR_DATA(IP5_9, VI5_D6_C6),
- PINMUX_IPSR_DATA(IP5_9, VI1_D21_R5),
- PINMUX_IPSR_DATA(IP5_10, VI5_D7_C7),
- PINMUX_IPSR_DATA(IP5_10, VI1_D22_R6),
- PINMUX_IPSR_DATA(IP5_11, VI5_D8_Y0),
- PINMUX_IPSR_DATA(IP5_11, VI1_D23_R7),
-
- PINMUX_IPSR_DATA(IP6_0, MSIOF0_SCK),
- PINMUX_IPSR_DATA(IP6_0, HSCK0),
- PINMUX_IPSR_DATA(IP6_1, MSIOF0_SYNC),
- PINMUX_IPSR_DATA(IP6_1, HCTS0),
- PINMUX_IPSR_DATA(IP6_2, MSIOF0_TXD),
- PINMUX_IPSR_DATA(IP6_2, HTX0),
- PINMUX_IPSR_DATA(IP6_3, MSIOF0_RXD),
- PINMUX_IPSR_DATA(IP6_3, HRX0),
- PINMUX_IPSR_DATA(IP6_4, MSIOF1_SCK),
- PINMUX_IPSR_DATA(IP6_4, HSCK1),
- PINMUX_IPSR_DATA(IP6_5, MSIOF1_SYNC),
- PINMUX_IPSR_DATA(IP6_5, HRTS1),
- PINMUX_IPSR_DATA(IP6_6, MSIOF1_TXD),
- PINMUX_IPSR_DATA(IP6_6, HTX1),
- PINMUX_IPSR_DATA(IP6_7, MSIOF1_RXD),
- PINMUX_IPSR_DATA(IP6_7, HRX1),
- PINMUX_IPSR_DATA(IP6_9_8, DRACK0),
- PINMUX_IPSR_DATA(IP6_9_8, SCK2),
- PINMUX_IPSR_DATA(IP6_11_10, DACK0),
- PINMUX_IPSR_DATA(IP6_11_10, TX2),
- PINMUX_IPSR_DATA(IP6_13_12, DREQ0),
- PINMUX_IPSR_DATA(IP6_13_12, RX2),
- PINMUX_IPSR_DATA(IP6_15_14, DACK1),
- PINMUX_IPSR_DATA(IP6_15_14, SCK3),
- PINMUX_IPSR_DATA(IP6_16, TX3),
- PINMUX_IPSR_DATA(IP6_18_17, DREQ1),
- PINMUX_IPSR_DATA(IP6_18_17, RX3),
-
- PINMUX_IPSR_DATA(IP7_1_0, PWM0),
- PINMUX_IPSR_DATA(IP7_1_0, TCLK1),
- PINMUX_IPSR_DATA(IP7_1_0, FSO_CFE_0),
- PINMUX_IPSR_DATA(IP7_3_2, PWM1),
- PINMUX_IPSR_DATA(IP7_3_2, TCLK2),
- PINMUX_IPSR_DATA(IP7_3_2, FSO_CFE_1),
- PINMUX_IPSR_DATA(IP7_5_4, PWM2),
- PINMUX_IPSR_DATA(IP7_5_4, TCLK3),
- PINMUX_IPSR_DATA(IP7_5_4, FSO_TOE),
- PINMUX_IPSR_DATA(IP7_6, PWM3),
- PINMUX_IPSR_DATA(IP7_7, PWM4),
- PINMUX_IPSR_DATA(IP7_9_8, SSI_SCK3),
- PINMUX_IPSR_DATA(IP7_9_8, TPU0TO0),
- PINMUX_IPSR_DATA(IP7_11_10, SSI_WS3),
- PINMUX_IPSR_DATA(IP7_11_10, TPU0TO1),
- PINMUX_IPSR_DATA(IP7_13_12, SSI_SDATA3),
- PINMUX_IPSR_DATA(IP7_13_12, TPU0TO2),
- PINMUX_IPSR_DATA(IP7_15_14, SSI_SCK4),
- PINMUX_IPSR_DATA(IP7_15_14, TPU0TO3),
- PINMUX_IPSR_DATA(IP7_16, SSI_WS4),
- PINMUX_IPSR_DATA(IP7_17, SSI_SDATA4),
- PINMUX_IPSR_DATA(IP7_18, AUDIO_CLKOUT),
- PINMUX_IPSR_DATA(IP7_19, AUDIO_CLKA),
- PINMUX_IPSR_DATA(IP7_20, AUDIO_CLKB),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- PINMUX_GPIO_GP_ALL(),
-
- GPIO_FN(DU1_DB2_C0_DATA12), GPIO_FN(DU1_DB3_C1_DATA13),
- GPIO_FN(DU1_DB4_C2_DATA14), GPIO_FN(DU1_DB5_C3_DATA15),
- GPIO_FN(DU1_DB6_C4), GPIO_FN(DU1_DB7_C5),
- GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC),
- GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), GPIO_FN(DU1_DISP), GPIO_FN(DU1_CDE),
-
- GPIO_FN(D0), GPIO_FN(D1), GPIO_FN(D2), GPIO_FN(D3),
- GPIO_FN(D4), GPIO_FN(D5), GPIO_FN(D6), GPIO_FN(D7),
- GPIO_FN(D8), GPIO_FN(D9), GPIO_FN(D10), GPIO_FN(D11),
- GPIO_FN(D12), GPIO_FN(D13), GPIO_FN(D14), GPIO_FN(D15),
- GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2), GPIO_FN(A3),
- GPIO_FN(A4), GPIO_FN(A5), GPIO_FN(A6), GPIO_FN(A7),
- GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10), GPIO_FN(A11),
- GPIO_FN(A12), GPIO_FN(A13), GPIO_FN(A14), GPIO_FN(A15),
-
- GPIO_FN(A16), GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19),
- GPIO_FN(CS1_A26), GPIO_FN(EX_CS0), GPIO_FN(EX_CS1), GPIO_FN(EX_CS2),
- GPIO_FN(EX_CS3), GPIO_FN(EX_CS4), GPIO_FN(EX_CS5), GPIO_FN(BS),
- GPIO_FN(RD), GPIO_FN(RD_WR), GPIO_FN(WE0), GPIO_FN(WE1),
- GPIO_FN(EX_WAIT0), GPIO_FN(IRQ0), GPIO_FN(IRQ1), GPIO_FN(IRQ2),
- GPIO_FN(IRQ3), GPIO_FN(CS0),
-
- GPIO_FN(VI0_CLK), GPIO_FN(VI0_CLKENB), GPIO_FN(VI0_HSYNC),
- GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_D0_B0_C0), GPIO_FN(VI0_D1_B1_C1),
- GPIO_FN(VI0_D2_B2_C2), GPIO_FN(VI0_D3_B3_C3), GPIO_FN(VI0_D4_B4_C4),
- GPIO_FN(VI0_D5_B5_C5), GPIO_FN(VI0_D6_B6_C6), GPIO_FN(VI0_D7_B7_C7),
- GPIO_FN(VI0_D8_G0_Y0), GPIO_FN(VI0_D9_G1_Y1), GPIO_FN(VI0_D10_G2_Y2),
- GPIO_FN(VI0_D11_G3_Y3), GPIO_FN(VI0_FIELD),
-
- GPIO_FN(VI1_CLK), GPIO_FN(VI1_CLKENB), GPIO_FN(VI1_HSYNC),
- GPIO_FN(VI1_VSYNC), GPIO_FN(VI1_D0_B0_C0), GPIO_FN(VI1_D1_B1_C1),
- GPIO_FN(VI1_D2_B2_C2), GPIO_FN(VI1_D3_B3_C3), GPIO_FN(VI1_D4_B4_C4),
- GPIO_FN(VI1_D5_B5_C5), GPIO_FN(VI1_D6_B6_C6), GPIO_FN(VI1_D7_B7_C7),
- GPIO_FN(VI1_D8_G0_Y0), GPIO_FN(VI1_D9_G1_Y1), GPIO_FN(VI1_D10_G2_Y2),
- GPIO_FN(VI1_D11_G3_Y3), GPIO_FN(VI1_FIELD),
-
- GPIO_FN(VI3_D10_Y2), GPIO_FN(VI3_FIELD),
-
- GPIO_FN(VI4_CLK),
-
- GPIO_FN(VI5_CLK), GPIO_FN(VI5_D9_Y1), GPIO_FN(VI5_D10_Y2),
- GPIO_FN(VI5_D11_Y3), GPIO_FN(VI5_FIELD),
-
- GPIO_FN(HRTS0), GPIO_FN(HCTS1), GPIO_FN(SCK0), GPIO_FN(CTS0),
- GPIO_FN(RTS0), GPIO_FN(TX0), GPIO_FN(RX0), GPIO_FN(SCK1),
- GPIO_FN(CTS1), GPIO_FN(RTS1), GPIO_FN(TX1), GPIO_FN(RX1),
- GPIO_FN(SCIF_CLK), GPIO_FN(CAN0_TX), GPIO_FN(CAN0_RX), GPIO_FN(CAN_CLK),
- GPIO_FN(CAN1_TX), GPIO_FN(CAN1_RX),
-
- GPIO_FN(SD0_CLK), GPIO_FN(SD0_CMD), GPIO_FN(SD0_DAT0),
- GPIO_FN(SD0_DAT1), GPIO_FN(SD0_DAT2), GPIO_FN(SD0_DAT3),
- GPIO_FN(SD0_CD), GPIO_FN(SD0_WP), GPIO_FN(ADICLK),
- GPIO_FN(ADICS_SAMP), GPIO_FN(ADIDATA), GPIO_FN(ADICHS0),
- GPIO_FN(ADICHS1), GPIO_FN(ADICHS2), GPIO_FN(AVS1),
- GPIO_FN(AVS2),
-
- GPIO_FN(DU0_DR0_DATA0), GPIO_FN(DU0_DR1_DATA1),
- GPIO_FN(DU0_DR2_Y4_DATA2), GPIO_FN(DU0_DR3_Y5_DATA3),
- GPIO_FN(DU0_DR4_Y6_DATA4), GPIO_FN(DU0_DR5_Y7_DATA5),
- GPIO_FN(DU0_DR6_Y8_DATA6), GPIO_FN(DU0_DR7_Y9_DATA7),
- GPIO_FN(DU0_DG0_DATA8), GPIO_FN(DU0_DG1_DATA9),
- GPIO_FN(DU0_DG2_C6_DATA10), GPIO_FN(DU0_DG3_C7_DATA11),
- GPIO_FN(DU0_DG4_Y0_DATA12), GPIO_FN(DU0_DG5_Y1_DATA13),
- GPIO_FN(DU0_DG6_Y2_DATA14), GPIO_FN(DU0_DG7_Y3_DATA15),
- GPIO_FN(DU0_DB0), GPIO_FN(DU0_DB1),
- GPIO_FN(DU0_DB2_C0), GPIO_FN(DU0_DB3_C1), GPIO_FN(DU0_DB4_C2),
- GPIO_FN(DU0_DB5_C3), GPIO_FN(DU0_DB6_C4), GPIO_FN(DU0_DB7_C5),
-
- GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(DU0_EXVSYNC_DU0_VSYNC),
- GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(DU0_DISP),
- GPIO_FN(DU0_CDE), GPIO_FN(DU1_DR2_Y4_DATA0), GPIO_FN(DU1_DR3_Y5_DATA1),
- GPIO_FN(DU1_DR4_Y6_DATA2), GPIO_FN(DU1_DR5_Y7_DATA3),
- GPIO_FN(DU1_DR6_DATA4), GPIO_FN(DU1_DR7_DATA5),
- GPIO_FN(DU1_DG2_C6_DATA6), GPIO_FN(DU1_DG3_C7_DATA7),
- GPIO_FN(DU1_DG4_Y0_DATA8), GPIO_FN(DU1_DG5_Y1_DATA9),
- GPIO_FN(DU1_DG6_Y2_DATA10), GPIO_FN(DU1_DG7_Y3_DATA11),
- GPIO_FN(A20), GPIO_FN(MOSI_IO0), GPIO_FN(A21), GPIO_FN(MISO_IO1),
- GPIO_FN(A22), GPIO_FN(IO2), GPIO_FN(A23), GPIO_FN(IO3),
- GPIO_FN(A24), GPIO_FN(SPCLK), GPIO_FN(A25), GPIO_FN(SSL),
-
- GPIO_FN(VI2_CLK), GPIO_FN(AVB_RX_CLK), GPIO_FN(VI2_CLKENB),
- GPIO_FN(AVB_RX_DV), GPIO_FN(VI2_HSYNC), GPIO_FN(AVB_RXD0),
- GPIO_FN(VI2_VSYNC), GPIO_FN(AVB_RXD1), GPIO_FN(VI2_D0_C0),
- GPIO_FN(AVB_RXD2), GPIO_FN(VI2_D1_C1), GPIO_FN(AVB_RXD3),
- GPIO_FN(VI2_D2_C2), GPIO_FN(AVB_RXD4), GPIO_FN(VI2_D3_C3),
- GPIO_FN(AVB_RXD5), GPIO_FN(VI2_D4_C4), GPIO_FN(AVB_RXD6),
- GPIO_FN(VI2_D5_C5), GPIO_FN(AVB_RXD7), GPIO_FN(VI2_D6_C6),
- GPIO_FN(AVB_RX_ER), GPIO_FN(VI2_D7_C7), GPIO_FN(AVB_COL),
- GPIO_FN(VI2_D8_Y0), GPIO_FN(AVB_TXD3), GPIO_FN(VI2_D9_Y1),
- GPIO_FN(AVB_TX_EN), GPIO_FN(VI2_D10_Y2), GPIO_FN(AVB_TXD0),
- GPIO_FN(VI2_D11_Y3), GPIO_FN(AVB_TXD1), GPIO_FN(VI2_FIELD),
- GPIO_FN(AVB_TXD2),
-
- GPIO_FN(VI3_CLK), GPIO_FN(AVB_TX_CLK), GPIO_FN(VI3_CLKENB),
- GPIO_FN(AVB_TXD4), GPIO_FN(VI3_HSYNC), GPIO_FN(AVB_TXD5),
- GPIO_FN(VI3_VSYNC), GPIO_FN(AVB_TXD6), GPIO_FN(VI3_D0_C0),
- GPIO_FN(AVB_TXD7), GPIO_FN(VI3_D1_C1), GPIO_FN(AVB_TX_ER),
- GPIO_FN(VI3_D2_C2), GPIO_FN(AVB_GTX_CLK), GPIO_FN(VI3_D3_C3),
- GPIO_FN(AVB_MDC), GPIO_FN(VI3_D4_C4), GPIO_FN(AVB_MDIO),
- GPIO_FN(VI3_D5_C5), GPIO_FN(AVB_LINK), GPIO_FN(VI3_D6_C6),
- GPIO_FN(AVB_MAGIC), GPIO_FN(VI3_D7_C7), GPIO_FN(AVB_PHY_INT),
- GPIO_FN(VI3_D8_Y0), GPIO_FN(AVB_CRS), GPIO_FN(VI3_D9_Y1),
- GPIO_FN(AVB_GTXREFCLK), GPIO_FN(VI3_D11_Y3),
-
- GPIO_FN(VI4_CLKENB), GPIO_FN(VI0_D12_G4_Y4), GPIO_FN(VI4_HSYNC),
- GPIO_FN(VI0_D13_G5_Y5), GPIO_FN(VI4_VSYNC), GPIO_FN(VI0_D14_G6_Y6),
- GPIO_FN(VI4_D0_C0), GPIO_FN(VI0_D15_G7_Y7), GPIO_FN(VI4_D1_C1),
- GPIO_FN(VI0_D16_R0), GPIO_FN(VI1_D12_G4_Y4_0), GPIO_FN(VI4_D2_C2),
- GPIO_FN(VI0_D17_R1), GPIO_FN(VI1_D13_G5_Y5_0), GPIO_FN(VI4_D3_C3),
- GPIO_FN(VI0_D18_R2), GPIO_FN(VI1_D14_G6_Y6_0), GPIO_FN(VI4_D4_C4),
- GPIO_FN(VI0_D19_R3), GPIO_FN(VI1_D15_G7_Y7_0), GPIO_FN(VI4_D5_C5),
- GPIO_FN(VI0_D20_R4), GPIO_FN(VI2_D12_Y4), GPIO_FN(VI4_D6_C6),
- GPIO_FN(VI0_D21_R5), GPIO_FN(VI2_D13_Y5), GPIO_FN(VI4_D7_C7),
- GPIO_FN(VI0_D22_R6), GPIO_FN(VI2_D14_Y6), GPIO_FN(VI4_D8_Y0),
- GPIO_FN(VI0_D23_R7), GPIO_FN(VI2_D15_Y7), GPIO_FN(VI4_D9_Y1),
- GPIO_FN(VI3_D12_Y4), GPIO_FN(VI4_D10_Y2), GPIO_FN(VI3_D13_Y5),
- GPIO_FN(VI4_D11_Y3), GPIO_FN(VI3_D14_Y6), GPIO_FN(VI4_FIELD),
- GPIO_FN(VI3_D15_Y7),
-
- GPIO_FN(VI5_CLKENB), GPIO_FN(VI1_D12_G4_Y4_1), GPIO_FN(VI5_HSYNC),
- GPIO_FN(VI1_D13_G5_Y5_1), GPIO_FN(VI5_VSYNC), GPIO_FN(VI1_D14_G6_Y6_1),
- GPIO_FN(VI5_D0_C0), GPIO_FN(VI1_D15_G7_Y7_1), GPIO_FN(VI5_D1_C1),
- GPIO_FN(VI1_D16_R0), GPIO_FN(VI5_D2_C2), GPIO_FN(VI1_D17_R1),
- GPIO_FN(VI5_D3_C3), GPIO_FN(VI1_D18_R2), GPIO_FN(VI5_D4_C4),
- GPIO_FN(VI1_D19_R3), GPIO_FN(VI5_D5_C5), GPIO_FN(VI1_D20_R4),
- GPIO_FN(VI5_D6_C6), GPIO_FN(VI1_D21_R5), GPIO_FN(VI5_D7_C7),
- GPIO_FN(VI1_D22_R6), GPIO_FN(VI5_D8_Y0), GPIO_FN(VI1_D23_R7),
-
- GPIO_FN(MSIOF0_SCK), GPIO_FN(HSCK0), GPIO_FN(MSIOF0_SYNC),
- GPIO_FN(HCTS0), GPIO_FN(MSIOF0_TXD), GPIO_FN(HTX0),
- GPIO_FN(MSIOF0_RXD), GPIO_FN(HRX0), GPIO_FN(MSIOF1_SCK),
- GPIO_FN(HSCK1), GPIO_FN(MSIOF1_SYNC), GPIO_FN(HRTS1),
- GPIO_FN(MSIOF1_TXD), GPIO_FN(HTX1), GPIO_FN(MSIOF1_RXD),
- GPIO_FN(HRX1), GPIO_FN(DRACK0), GPIO_FN(SCK2),
- GPIO_FN(DACK0), GPIO_FN(TX2), GPIO_FN(DREQ0),
- GPIO_FN(RX2), GPIO_FN(DACK1), GPIO_FN(SCK3),
- GPIO_FN(TX3), GPIO_FN(DREQ1), GPIO_FN(RX3),
-
- GPIO_FN(PWM0), GPIO_FN(TCLK1), GPIO_FN(FSO_CFE_0),
- GPIO_FN(PWM1), GPIO_FN(TCLK2), GPIO_FN(FSO_CFE_1),
- GPIO_FN(PWM2), GPIO_FN(TCLK3), GPIO_FN(FSO_TOE),
- GPIO_FN(PWM3), GPIO_FN(PWM4),
- GPIO_FN(SSI_SCK3), GPIO_FN(TPU0TO0),
- GPIO_FN(SSI_WS3), GPIO_FN(TPU0TO1),
- GPIO_FN(SSI_SDATA3), GPIO_FN(TPU0TO2),
- GPIO_FN(SSI_SCK4), GPIO_FN(TPU0TO3),
- GPIO_FN(SSI_WS4), GPIO_FN(SSI_SDATA4),
- GPIO_FN(AUDIO_CLKOUT), GPIO_FN(AUDIO_CLKA), GPIO_FN(AUDIO_CLKB),
-
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- GP_0_28_FN, FN_IP1_4,
- GP_0_27_FN, FN_IP1_3,
- GP_0_26_FN, FN_IP1_2,
- GP_0_25_FN, FN_IP1_1,
- GP_0_24_FN, FN_IP1_0,
- GP_0_23_FN, FN_IP0_23,
- GP_0_22_FN, FN_IP0_22,
- GP_0_21_FN, FN_IP0_21,
- GP_0_20_FN, FN_IP0_20,
- GP_0_19_FN, FN_IP0_19,
- GP_0_18_FN, FN_IP0_18,
- GP_0_17_FN, FN_IP0_17,
- GP_0_16_FN, FN_IP0_16,
- GP_0_15_FN, FN_IP0_15,
- GP_0_14_FN, FN_IP0_14,
- GP_0_13_FN, FN_IP0_13,
- GP_0_12_FN, FN_IP0_12,
- GP_0_11_FN, FN_IP0_11,
- GP_0_10_FN, FN_IP0_10,
- GP_0_9_FN, FN_IP0_9,
- GP_0_8_FN, FN_IP0_8,
- GP_0_7_FN, FN_IP0_7,
- GP_0_6_FN, FN_IP0_6,
- GP_0_5_FN, FN_IP0_5,
- GP_0_4_FN, FN_IP0_4,
- GP_0_3_FN, FN_IP0_3,
- GP_0_2_FN, FN_IP0_2,
- GP_0_1_FN, FN_IP0_1,
- GP_0_0_FN, FN_IP0_0 }
- },
- { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_22_FN, FN_DU1_CDE,
- GP_1_21_FN, FN_DU1_DISP,
- GP_1_20_FN, FN_DU1_EXODDF_DU1_ODDF_DISP_CDE,
- GP_1_19_FN, FN_DU1_EXVSYNC_DU1_VSYNC,
- GP_1_18_FN, FN_DU1_EXHSYNC_DU1_HSYNC,
- GP_1_17_FN, FN_DU1_DB7_C5,
- GP_1_16_FN, FN_DU1_DB6_C4,
- GP_1_15_FN, FN_DU1_DB5_C3_DATA15,
- GP_1_14_FN, FN_DU1_DB4_C2_DATA14,
- GP_1_13_FN, FN_DU1_DB3_C1_DATA13,
- GP_1_12_FN, FN_DU1_DB2_C0_DATA12,
- GP_1_11_FN, FN_IP1_16,
- GP_1_10_FN, FN_IP1_15,
- GP_1_9_FN, FN_IP1_14,
- GP_1_8_FN, FN_IP1_13,
- GP_1_7_FN, FN_IP1_12,
- GP_1_6_FN, FN_IP1_11,
- GP_1_5_FN, FN_IP1_10,
- GP_1_4_FN, FN_IP1_9,
- GP_1_3_FN, FN_IP1_8,
- GP_1_2_FN, FN_IP1_7,
- GP_1_1_FN, FN_IP1_6,
- GP_1_0_FN, FN_IP1_5, }
- },
- { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
- GP_2_31_FN, FN_A15,
- GP_2_30_FN, FN_A14,
- GP_2_29_FN, FN_A13,
- GP_2_28_FN, FN_A12,
- GP_2_27_FN, FN_A11,
- GP_2_26_FN, FN_A10,
- GP_2_25_FN, FN_A9,
- GP_2_24_FN, FN_A8,
- GP_2_23_FN, FN_A7,
- GP_2_22_FN, FN_A6,
- GP_2_21_FN, FN_A5,
- GP_2_20_FN, FN_A4,
- GP_2_19_FN, FN_A3,
- GP_2_18_FN, FN_A2,
- GP_2_17_FN, FN_A1,
- GP_2_16_FN, FN_A0,
- GP_2_15_FN, FN_D15,
- GP_2_14_FN, FN_D14,
- GP_2_13_FN, FN_D13,
- GP_2_12_FN, FN_D12,
- GP_2_11_FN, FN_D11,
- GP_2_10_FN, FN_D10,
- GP_2_9_FN, FN_D9,
- GP_2_8_FN, FN_D8,
- GP_2_7_FN, FN_D7,
- GP_2_6_FN, FN_D6,
- GP_2_5_FN, FN_D5,
- GP_2_4_FN, FN_D4,
- GP_2_3_FN, FN_D3,
- GP_2_2_FN, FN_D2,
- GP_2_1_FN, FN_D1,
- GP_2_0_FN, FN_D0 }
- },
- { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_3_27_FN, FN_CS0,
- GP_3_26_FN, FN_IP1_22,
- GP_3_25_FN, FN_IP1_21,
- GP_3_24_FN, FN_IP1_20,
- GP_3_23_FN, FN_IP1_19,
- GP_3_22_FN, FN_IRQ3,
- GP_3_21_FN, FN_IRQ2,
- GP_3_20_FN, FN_IRQ1,
- GP_3_19_FN, FN_IRQ0,
- GP_3_18_FN, FN_EX_WAIT0,
- GP_3_17_FN, FN_WE1,
- GP_3_16_FN, FN_WE0,
- GP_3_15_FN, FN_RD_WR,
- GP_3_14_FN, FN_RD,
- GP_3_13_FN, FN_BS,
- GP_3_12_FN, FN_EX_CS5,
- GP_3_11_FN, FN_EX_CS4,
- GP_3_10_FN, FN_EX_CS3,
- GP_3_9_FN, FN_EX_CS2,
- GP_3_8_FN, FN_EX_CS1,
- GP_3_7_FN, FN_EX_CS0,
- GP_3_6_FN, FN_CS1_A26,
- GP_3_5_FN, FN_IP1_18,
- GP_3_4_FN, FN_IP1_17,
- GP_3_3_FN, FN_A19,
- GP_3_2_FN, FN_A18,
- GP_3_1_FN, FN_A17,
- GP_3_0_FN, FN_A16 }
- },
- { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_4_16_FN, FN_VI0_FIELD,
- GP_4_15_FN, FN_VI0_D11_G3_Y3,
- GP_4_14_FN, FN_VI0_D10_G2_Y2,
- GP_4_13_FN, FN_VI0_D9_G1_Y1,
- GP_4_12_FN, FN_VI0_D8_G0_Y0,
- GP_4_11_FN, FN_VI0_D7_B7_C7,
- GP_4_10_FN, FN_VI0_D6_B6_C6,
- GP_4_9_FN, FN_VI0_D5_B5_C5,
- GP_4_8_FN, FN_VI0_D4_B4_C4,
- GP_4_7_FN, FN_VI0_D3_B3_C3,
- GP_4_6_FN, FN_VI0_D2_B2_C2,
- GP_4_5_FN, FN_VI0_D1_B1_C1,
- GP_4_4_FN, FN_VI0_D0_B0_C0,
- GP_4_3_FN, FN_VI0_VSYNC,
- GP_4_2_FN, FN_VI0_HSYNC,
- GP_4_1_FN, FN_VI0_CLKENB,
- GP_4_0_FN, FN_VI0_CLK }
- },
- { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_5_16_FN, FN_VI1_FIELD,
- GP_5_15_FN, FN_VI1_D11_G3_Y3,
- GP_5_14_FN, FN_VI1_D10_G2_Y2,
- GP_5_13_FN, FN_VI1_D9_G1_Y1,
- GP_5_12_FN, FN_VI1_D8_G0_Y0,
- GP_5_11_FN, FN_VI1_D7_B7_C7,
- GP_5_10_FN, FN_VI1_D6_B6_C6,
- GP_5_9_FN, FN_VI1_D5_B5_C5,
- GP_5_8_FN, FN_VI1_D4_B4_C4,
- GP_5_7_FN, FN_VI1_D3_B3_C3,
- GP_5_6_FN, FN_VI1_D2_B2_C2,
- GP_5_5_FN, FN_VI1_D1_B1_C1,
- GP_5_4_FN, FN_VI1_D0_B0_C0,
- GP_5_3_FN, FN_VI1_VSYNC,
- GP_5_2_FN, FN_VI1_HSYNC,
- GP_5_1_FN, FN_VI1_CLKENB,
- GP_5_0_FN, FN_VI1_CLK }
- },
- { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_6_16_FN, FN_IP2_16,
- GP_6_15_FN, FN_IP2_15,
- GP_6_14_FN, FN_IP2_14,
- GP_6_13_FN, FN_IP2_13,
- GP_6_12_FN, FN_IP2_12,
- GP_6_11_FN, FN_IP2_11,
- GP_6_10_FN, FN_IP2_10,
- GP_6_9_FN, FN_IP2_9,
- GP_6_8_FN, FN_IP2_8,
- GP_6_7_FN, FN_IP2_7,
- GP_6_6_FN, FN_IP2_6,
- GP_6_5_FN, FN_IP2_5,
- GP_6_4_FN, FN_IP2_4,
- GP_6_3_FN, FN_IP2_3,
- GP_6_2_FN, FN_IP2_2,
- GP_6_1_FN, FN_IP2_1,
- GP_6_0_FN, FN_IP2_0 }
- },
- { PINMUX_CFG_REG("GPSR7", 0xE6060020, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_7_16_FN, FN_VI3_FIELD,
- GP_7_15_FN, FN_IP3_14,
- GP_7_14_FN, FN_VI3_D10_Y2,
- GP_7_13_FN, FN_IP3_13,
- GP_7_12_FN, FN_IP3_12,
- GP_7_11_FN, FN_IP3_11,
- GP_7_10_FN, FN_IP3_10,
- GP_7_9_FN, FN_IP3_9,
- GP_7_8_FN, FN_IP3_8,
- GP_7_7_FN, FN_IP3_7,
- GP_7_6_FN, FN_IP3_6,
- GP_7_5_FN, FN_IP3_5,
- GP_7_4_FN, FN_IP3_4,
- GP_7_3_FN, FN_IP3_3,
- GP_7_2_FN, FN_IP3_2,
- GP_7_1_FN, FN_IP3_1,
- GP_7_0_FN, FN_IP3_0 }
- },
- { PINMUX_CFG_REG("GPSR8", 0xE6060024, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_8_16_FN, FN_IP4_24,
- GP_8_15_FN, FN_IP4_23,
- GP_8_14_FN, FN_IP4_22,
- GP_8_13_FN, FN_IP4_21,
- GP_8_12_FN, FN_IP4_20_19,
- GP_8_11_FN, FN_IP4_18_17,
- GP_8_10_FN, FN_IP4_16_15,
- GP_8_9_FN, FN_IP4_14_13,
- GP_8_8_FN, FN_IP4_12_11,
- GP_8_7_FN, FN_IP4_10_9,
- GP_8_6_FN, FN_IP4_8_7,
- GP_8_5_FN, FN_IP4_6_5,
- GP_8_4_FN, FN_IP4_4,
- GP_8_3_FN, FN_IP4_3_2,
- GP_8_2_FN, FN_IP4_1,
- GP_8_1_FN, FN_IP4_0,
- GP_8_0_FN, FN_VI4_CLK }
- },
- { PINMUX_CFG_REG("GPSR9", 0xE6060028, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_9_16_FN, FN_VI5_FIELD,
- GP_9_15_FN, FN_VI5_D11_Y3,
- GP_9_14_FN, FN_VI5_D10_Y2,
- GP_9_13_FN, FN_VI5_D9_Y1,
- GP_9_12_FN, FN_IP5_11,
- GP_9_11_FN, FN_IP5_10,
- GP_9_10_FN, FN_IP5_9,
- GP_9_9_FN, FN_IP5_8,
- GP_9_8_FN, FN_IP5_7,
- GP_9_7_FN, FN_IP5_6,
- GP_9_6_FN, FN_IP5_5,
- GP_9_5_FN, FN_IP5_4,
- GP_9_4_FN, FN_IP5_3,
- GP_9_3_FN, FN_IP5_2,
- GP_9_2_FN, FN_IP5_1,
- GP_9_1_FN, FN_IP5_0,
- GP_9_0_FN, FN_VI5_CLK }
- },
- { PINMUX_CFG_REG("GPSR10", 0xE606002C, 32, 1) {
- GP_10_31_FN, FN_CAN1_RX,
- GP_10_30_FN, FN_CAN1_TX,
- GP_10_29_FN, FN_CAN_CLK,
- GP_10_28_FN, FN_CAN0_RX,
- GP_10_27_FN, FN_CAN0_TX,
- GP_10_26_FN, FN_SCIF_CLK,
- GP_10_25_FN, FN_IP6_18_17,
- GP_10_24_FN, FN_IP6_16,
- GP_10_23_FN, FN_IP6_15_14,
- GP_10_22_FN, FN_IP6_13_12,
- GP_10_21_FN, FN_IP6_11_10,
- GP_10_20_FN, FN_IP6_9_8,
- GP_10_19_FN, FN_RX1,
- GP_10_18_FN, FN_TX1,
- GP_10_17_FN, FN_RTS1,
- GP_10_16_FN, FN_CTS1,
- GP_10_15_FN, FN_SCK1,
- GP_10_14_FN, FN_RX0,
- GP_10_13_FN, FN_TX0,
- GP_10_12_FN, FN_RTS0,
- GP_10_11_FN, FN_CTS0,
- GP_10_10_FN, FN_SCK0,
- GP_10_9_FN, FN_IP6_7,
- GP_10_8_FN, FN_IP6_6,
- GP_10_7_FN, FN_HCTS1,
- GP_10_6_FN, FN_IP6_5,
- GP_10_5_FN, FN_IP6_4,
- GP_10_4_FN, FN_IP6_3,
- GP_10_3_FN, FN_IP6_2,
- GP_10_2_FN, FN_HRTS0,
- GP_10_1_FN, FN_IP6_1,
- GP_10_0_FN, FN_IP6_0 }
- },
- { PINMUX_CFG_REG("GPSR11", 0xE6060030, 32, 1) {
- 0, 0,
- 0, 0,
- GP_11_29_FN, FN_AVS2,
- GP_11_28_FN, FN_AVS1,
- GP_11_27_FN, FN_ADICHS2,
- GP_11_26_FN, FN_ADICHS1,
- GP_11_25_FN, FN_ADICHS0,
- GP_11_24_FN, FN_ADIDATA,
- GP_11_23_FN, FN_ADICS_SAMP,
- GP_11_22_FN, FN_ADICLK,
- GP_11_21_FN, FN_IP7_20,
- GP_11_20_FN, FN_IP7_19,
- GP_11_19_FN, FN_IP7_18,
- GP_11_18_FN, FN_IP7_17,
- GP_11_17_FN, FN_IP7_16,
- GP_11_16_FN, FN_IP7_15_14,
- GP_11_15_FN, FN_IP7_13_12,
- GP_11_14_FN, FN_IP7_11_10,
- GP_11_13_FN, FN_IP7_9_8,
- GP_11_12_FN, FN_SD0_WP,
- GP_11_11_FN, FN_SD0_CD,
- GP_11_10_FN, FN_SD0_DAT3,
- GP_11_9_FN, FN_SD0_DAT2,
- GP_11_8_FN, FN_SD0_DAT1,
- GP_11_7_FN, FN_SD0_DAT0,
- GP_11_6_FN, FN_SD0_CMD,
- GP_11_5_FN, FN_SD0_CLK,
- GP_11_4_FN, FN_IP7_7,
- GP_11_3_FN, FN_IP7_6,
- GP_11_2_FN, FN_IP7_5_4,
- GP_11_1_FN, FN_IP7_3_2,
- GP_11_0_FN, FN_IP7_1_0 }
- },
- /* IPSR0 */
- { PINMUX_CFG_REG("IPSR0", 0xE6060040, 32 ,1) {
- /* IP0_31 [1] */
- 0, 0,
- /* IP0_30 [1] */
- 0, 0,
- /* IP0_29 [1] */
- 0, 0,
- /* IP0_28 [1] */
- 0, 0,
- /* IP0_27 [1] */
- 0, 0,
- /* IP0_26 [1] */
- 0, 0,
- /* IP0_25 [1] */
- 0, 0,
- /* IP0_24 [1] */
- 0, 0,
- /* IP0_23 [1] */
- FN_DU0_DB7_C5, 0,
- /* IP0_22 [1] */
- FN_DU0_DB6_C4, 0,
- /* IP0_21 [1] */
- FN_DU0_DB5_C3, 0,
- /* IP0_20 [1] */
- FN_DU0_DB4_C2, 0,
- /* IP0_19 [1] */
- FN_DU0_DB3_C1, 0,
- /* IP0_18 [1] */
- FN_DU0_DB2_C0, 0,
- /* IP0_17 [1] */
- FN_DU0_DB1, 0,
- /* IP0_16 [1] */
- FN_DU0_DB0, 0,
- /* IP0_15 [1] */
- FN_DU0_DG7_Y3_DATA15, 0,
- /* IP0_14 [1] */
- FN_DU0_DG6_Y2_DATA14, 0,
- /* IP0_13 [1] */
- FN_DU0_DG5_Y1_DATA13, 0,
- /* IP0_12 [1] */
- FN_DU0_DG4_Y0_DATA12, 0,
- /* IP0_11 [1] */
- FN_DU0_DG3_C7_DATA11, 0,
- /* IP0_10 [1] */
- FN_DU0_DG2_C6_DATA10, 0,
- /* IP0_9 [1] */
- FN_DU0_DG1_DATA9, 0,
- /* IP0_8 [1] */
- FN_DU0_DG0_DATA8, 0,
- /* IP0_7 [1] */
- FN_DU0_DR7_Y9_DATA7, 0,
- /* IP0_6 [1] */
- FN_DU0_DR6_Y8_DATA6, 0,
- /* IP0_5 [1] */
- FN_DU0_DR5_Y7_DATA5, 0,
- /* IP0_4 [1] */
- FN_DU0_DR4_Y6_DATA4, 0,
- /* IP0_3 [1] */
- FN_DU0_DR3_Y5_DATA3, 0,
- /* IP0_2 [1] */
- FN_DU0_DR2_Y4_DATA2, 0,
- /* IP0_1 [1] */
- FN_DU0_DR1_DATA1, 0,
- /* IP0_0 [1] */
- FN_DU0_DR0_DATA0, 0, }
- },
- /* IPSR1 */
- { PINMUX_CFG_REG("IPSR1", 0xE6060044, 32, 1) {
- /* IP1_31 [1] */
- 0, 0,
- /* IP1_30 [1] */
- 0, 0,
- /* IP1_29 [1] */
- 0, 0,
- /* IP1_28 [1] */
- 0, 0,
- /* IP1_27 [1] */
- 0, 0,
- /* IP1_26 [1] */
- 0, 0,
- /* IP1_25 [1] */
- 0, 0,
- /* IP1_24 [1] */
- 0, 0,
- /* IP1_23 [1] */
- 0, 0,
- /* IP1_22 [1] */
- FN_A25, FN_SSL,
- /* IP1_21 [1] */
- FN_A24, FN_SPCLK,
- /* IP1_20 [1] */
- FN_A23, FN_IO3,
- /* IP1_19 [1] */
- FN_A22, FN_IO2,
- /* IP1_18 [1] */
- FN_A21, FN_MISO_IO1,
- /* IP1_17 [1] */
- FN_A20, FN_MOSI_IO0,
- /* IP1_16 [1] */
- FN_DU1_DG7_Y3_DATA11, 0,
- /* IP1_15 [1] */
- FN_DU1_DG6_Y2_DATA10, 0,
- /* IP1_14 [1] */
- FN_DU1_DG5_Y1_DATA9, 0,
- /* IP1_13 [1] */
- FN_DU1_DG4_Y0_DATA8, 0,
- /* IP1_12 [1] */
- FN_DU1_DG3_C7_DATA7, 0,
- /* IP1_11 [1] */
- FN_DU1_DG2_C6_DATA6, 0,
- /* IP1_10 [1] */
- FN_DU1_DR7_DATA5, 0,
- /* IP1_9 [1] */
- FN_DU1_DR6_DATA4, 0,
- /* IP1_8 [1] */
- FN_DU1_DR5_Y7_DATA3, 0,
- /* IP1_7 [1] */
- FN_DU1_DR4_Y6_DATA2, 0,
- /* IP1_6 [1] */
- FN_DU1_DR3_Y5_DATA1, 0,
- /* IP1_5 [1] */
- FN_DU1_DR2_Y4_DATA0, 0,
- /* IP1_4 [1] */
- FN_DU0_CDE, 0,
- /* IP1_3 [1] */
- FN_DU0_DISP, 0,
- /* IP1_2 [1] */
- FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, 0,
- /* IP1_1 [1] */
- FN_DU0_EXVSYNC_DU0_VSYNC, 0,
- /* IP1_0 [1] */
- FN_DU0_EXHSYNC_DU0_HSYNC, 0, }
- },
- /* IPSR2 */
- { PINMUX_CFG_REG("IPSR2", 0xE6060048, 32, 1) {
- /* IP2_31 [1] */
- 0, 0,
- /* IP2_30 [1] */
- 0, 0,
- /* IP2_29 [1] */
- 0, 0,
- /* IP2_28 [1] */
- 0, 0,
- /* IP2_27 [1] */
- 0, 0,
- /* IP2_26 [1] */
- 0, 0,
- /* IP2_25 [1] */
- 0, 0,
- /* IP2_24 [1] */
- 0, 0,
- /* IP2_23 [1] */
- 0, 0,
- /* IP2_22 [1] */
- 0, 0,
- /* IP2_21 [1] */
- 0, 0,
- /* IP2_20 [1] */
- 0, 0,
- /* IP2_19 [1] */
- 0, 0,
- /* IP2_18 [1] */
- 0, 0,
- /* IP2_17 [1] */
- 0, 0,
- /* IP2_16 [1] */
- FN_VI2_FIELD, FN_AVB_TXD2,
- /* IP2_15 [1] */
- FN_VI2_D11_Y3, FN_AVB_TXD1,
- /* IP2_14 [1] */
- FN_VI2_D10_Y2, FN_AVB_TXD0,
- /* IP2_13 [1] */
- FN_VI2_D9_Y1, FN_AVB_TX_EN,
- /* IP2_12 [1] */
- FN_VI2_D8_Y0, FN_AVB_TXD3,
- /* IP2_11 [1] */
- FN_VI2_D7_C7, FN_AVB_COL,
- /* IP2_10 [1] */
- FN_VI2_D6_C6, FN_AVB_RX_ER,
- /* IP2_9 [1] */
- FN_VI2_D5_C5, FN_AVB_RXD7,
- /* IP2_8 [1] */
- FN_VI2_D4_C4, FN_AVB_RXD6,
- /* IP2_7 [1] */
- FN_VI2_D3_C3, FN_AVB_RXD5,
- /* IP2_6 [1] */
- FN_VI2_D2_C2, FN_AVB_RXD4,
- /* IP2_5 [1] */
- FN_VI2_D1_C1, FN_AVB_RXD3,
- /* IP2_4 [1] */
- FN_VI2_D0_C0, FN_AVB_RXD2,
- /* IP2_3 [1] */
- FN_VI2_VSYNC, FN_AVB_RXD1,
- /* IP2_2 [1] */
- FN_VI2_HSYNC, FN_AVB_RXD0,
- /* IP2_1 [1] */
- FN_VI2_CLKENB, FN_AVB_RX_DV,
- /* IP2_0 [1] */
- FN_VI2_CLK, FN_AVB_RX_CLK, }
- },
- /* IPSR3 */
- { PINMUX_CFG_REG("IPSR3", 0xE606004C, 32, 1) {
- /* IP3_31 [1] */
- 0, 0,
- /* IP3_30 [1] */
- 0, 0,
- /* IP3_29 [1] */
- 0, 0,
- /* IP3_28 [1] */
- 0, 0,
- /* IP3_27 [1] */
- 0, 0,
- /* IP3_26 [1] */
- 0, 0,
- /* IP3_25 [1] */
- 0, 0,
- /* IP3_24 [1] */
- 0, 0,
- /* IP3_23 [1] */
- 0, 0,
- /* IP3_22 [1] */
- 0, 0,
- /* IP3_21 [1] */
- 0, 0,
- /* IP3_20 [1] */
- 0, 0,
- /* IP3_19 [1] */
- 0, 0,
- /* IP3_18 [1] */
- 0, 0,
- /* IP3_17 [1] */
- 0, 0,
- /* IP3_16 [1] */
- 0, 0,
- /* IP3_15 [1] */
- 0, 0,
- /* IP3_14 [1] */
- FN_VI3_D11_Y3, 0,
- /* IP3_13 [1] */
- FN_VI3_D9_Y1, FN_AVB_GTXREFCLK,
- /* IP3_12 [1] */
- FN_VI3_D8_Y0, FN_AVB_CRS,
- /* IP3_11 [1] */
- FN_VI3_D7_C7, FN_AVB_PHY_INT,
- /* IP3_10 [1] */
- FN_VI3_D6_C6, FN_AVB_MAGIC,
- /* IP3_9 [1] */
- FN_VI3_D5_C5, FN_AVB_LINK,
- /* IP3_8 [1] */
- FN_VI3_D4_C4, FN_AVB_MDIO,
- /* IP3_7 [1] */
- FN_VI3_D3_C3, FN_AVB_MDC,
- /* IP3_6 [1] */
- FN_VI3_D2_C2, FN_AVB_GTX_CLK,
- /* IP3_5 [1] */
- FN_VI3_D1_C1, FN_AVB_TX_ER,
- /* IP3_4 [1] */
- FN_VI3_D0_C0, FN_AVB_TXD7,
- /* IP3_3 [1] */
- FN_VI3_VSYNC, FN_AVB_TXD6,
- /* IP3_2 [1] */
- FN_VI3_HSYNC, FN_AVB_TXD5,
- /* IP3_1 [1] */
- FN_VI3_CLKENB, FN_AVB_TXD4,
- /* IP3_0 [1] */
- FN_VI3_CLK, FN_AVB_TX_CLK,}
- },
- /* IPSR4 */
- { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060050, 32,
- 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 1) {
- /* IP4_31 [1] */
- 0, 0,
- /* IP4_30 [1] */
- 0, 0,
- /* IP4_29 [1] */
- 0, 0,
- /* IP4_28 [1] */
- 0, 0,
- /* IP4_27 [1] */
- 0, 0,
- /* IP4_26 [1] */
- 0, 0,
- /* IP4_25 [1] */
- 0, 0,
- /* IP4_24 [1] */
- FN_VI4_FIELD, FN_VI3_D15_Y7,
- /* IP4_23 [1] */
- FN_VI4_D11_Y3, FN_VI3_D14_Y6,
- /* IP4_22 [1] */
- FN_VI4_D10_Y2, FN_VI3_D13_Y5,
- /* IP4_21 [1] */
- FN_VI4_D9_Y1, FN_VI3_D12_Y4,
- /* IP4_20_19 [2] */
- FN_VI4_D8_Y0, FN_VI0_D23_R7, FN_VI2_D15_Y7, 0,
- /* IP4_18_17 [2] */
- FN_VI4_D7_C7, FN_VI0_D22_R6, FN_VI2_D14_Y6, 0,
- /* IP4_16_15 [2] */
- FN_VI4_D6_C6, FN_VI0_D21_R5, FN_VI2_D13_Y5, 0,
- /* IP4_14_13 [2] */
- FN_VI4_D5_C5, FN_VI0_D20_R4, FN_VI2_D12_Y4, 0,
- /* IP4_12_11 [2] */
- FN_VI4_D4_C4, FN_VI0_D19_R3, FN_VI1_D15_G7_Y7_0, 0,
- /* IP4_10_9 [2] */
- FN_VI4_D3_C3, FN_VI0_D18_R2, FN_VI1_D14_G6_Y6_0, 0,
- /* IP4_8_7 [2] */
- FN_VI4_D2_C2, FN_VI0_D17_R1, FN_VI1_D13_G5_Y5_0, 0,
- /* IP4_6_5 [2] */
- FN_VI4_D1_C1, FN_VI0_D16_R0, FN_VI1_D12_G4_Y4_0, 0,
- /* IP4_4 [1] */
- FN_VI4_D0_C0, FN_VI0_D15_G7_Y7,
- /* IP4_3_2 [2] */
- FN_VI4_VSYNC, FN_VI0_D14_G6_Y6, 0, 0,
- /* IP4_1 [1] */
- FN_VI4_HSYNC, FN_VI0_D13_G5_Y5,
- /* IP4_0 [1] */
- FN_VI4_CLKENB, FN_VI0_D12_G4_Y4,}
- },
- /* IPSR5 */
- { PINMUX_CFG_REG("IPSR5", 0xE6060054, 32, 1) {
- /* IP5_31 [1] */
- 0, 0,
- /* IP5_30 [1] */
- 0, 0,
- /* IP5_29 [1] */
- 0, 0,
- /* IP5_28 [1] */
- 0, 0,
- /* IP5_27 [1] */
- 0, 0,
- /* IP5_26 [1] */
- 0, 0,
- /* IP5_25 [1] */
- 0, 0,
- /* IP5_24 [1] */
- 0, 0,
- /* IP5_23 [1] */
- 0, 0,
- /* IP5_22 [1] */
- 0, 0,
- /* IP5_21 [1] */
- 0, 0,
- /* IP5_20 [1] */
- 0, 0,
- /* IP5_19 [1] */
- 0, 0,
- /* IP5_18 [1] */
- 0, 0,
- /* IP5_17 [1] */
- 0, 0,
- /* IP5_16 [1] */
- 0, 0,
- /* IP5_15 [1] */
- 0, 0,
- /* IP5_14 [1] */
- 0, 0,
- /* IP5_13 [1] */
- 0, 0,
- /* IP5_12 [1] */
- 0, 0,
- /* IP5_11 [1] */
- FN_VI5_D8_Y0, FN_VI1_D23_R7,
- /* IP5_10 [1] */
- FN_VI5_D7_C7, FN_VI1_D22_R6,
- /* IP5_9 [1] */
- FN_VI5_D6_C6, FN_VI1_D21_R5,
- /* IP5_8 [1] */
- FN_VI5_D5_C5, FN_VI1_D20_R4,
- /* IP5_7 [1] */
- FN_VI5_D4_C4, FN_VI1_D19_R3,
- /* IP5_6 [1] */
- FN_VI5_D3_C3, FN_VI1_D18_R2,
- /* IP5_5 [1] */
- FN_VI5_D2_C2, FN_VI1_D17_R1,
- /* IP5_4 [1] */
- FN_VI5_D1_C1, FN_VI1_D16_R0,
- /* IP5_3 [1] */
- FN_VI5_D0_C0, FN_VI1_D15_G7_Y7_1,
- /* IP5_2 [1] */
- FN_VI5_VSYNC, FN_VI1_D14_G6_Y6_1,
- /* IP5_1 [1] */
- FN_VI5_HSYNC, FN_VI1_D13_G5_Y5_1,
- /* IP5_0 [1] */
- FN_VI5_CLKENB, FN_VI1_D12_G4_Y4_1,}
- },
- /* IPSR6 */
- { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060058, 32,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 2, 1, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1) {
- /* IP6_31 [1] */
- 0, 0,
- /* IP6_30 [1] */
- 0, 0,
- /* IP6_29 [1] */
- 0, 0,
- /* IP6_28 [1] */
- 0, 0,
- /* IP6_27 [1] */
- 0, 0,
- /* IP6_26 [1] */
- 0, 0,
- /* IP6_25 [1] */
- 0, 0,
- /* IP6_24 [1] */
- 0, 0,
- /* IP6_23 [1] */
- 0, 0,
- /* IP6_22 [1] */
- 0, 0,
- /* IP6_21 [1] */
- 0, 0,
- /* IP6_20 [1] */
- 0, 0,
- /* IP6_19 [1] */
- 0, 0,
- /* IP6_18_17 [2] */
- FN_DREQ1, FN_RX3, 0, 0,
- /* IP6_16 [1] */
- FN_TX3, 0,
- /* IP6_15_14 [2] */
- FN_DACK1, FN_SCK3, 0, 0,
- /* IP6_13_12 [2] */
- FN_DREQ0, FN_RX2, 0, 0,
- /* IP6_11_10 [2] */
- FN_DACK0, FN_TX2, 0, 0,
- /* IP6_9_8 [2] */
- FN_DRACK0, FN_SCK2, 0, 0,
- /* IP6_7 [1] */
- FN_MSIOF1_RXD, FN_HRX1,
- /* IP6_6 [1] */
- FN_MSIOF1_TXD, FN_HTX1,
- /* IP6_5 [1] */
- FN_MSIOF1_SYNC, FN_HRTS1,
- /* IP6_4 [1] */
- FN_MSIOF1_SCK, FN_HSCK1,
- /* IP6_3 [1] */
- FN_MSIOF0_RXD, FN_HRX0,
- /* IP6_2 [1] */
- FN_MSIOF0_TXD, FN_HTX0,
- /* IP6_1 [1] */
- FN_MSIOF0_SYNC, FN_HCTS0,
- /* IP6_0 [1] */
- FN_MSIOF0_SCK, FN_HSCK0, }
- },
- /* IPSR7 */
- { PINMUX_CFG_REG_VAR("IPSR7", 0xE606005C, 32,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 2, 2, 2, 2, 1, 1, 2, 2, 2) {
- /* IP7_31 [1] */
- 0, 0,
- /* IP7_30 [1] */
- 0, 0,
- /* IP7_29 [1] */
- 0, 0,
- /* IP7_28 [1] */
- 0, 0,
- /* IP7_27 [1] */
- 0, 0,
- /* IP7_26 [1] */
- 0, 0,
- /* IP7_25 [1] */
- 0, 0,
- /* IP7_24 [1] */
- 0, 0,
- /* IP7_23 [1] */
- 0, 0,
- /* IP7_22 [1] */
- 0, 0,
- /* IP7_21 [1] */
- 0, 0,
- /* IP7_20 [1] */
- FN_AUDIO_CLKB, 0,
- /* IP7_19 [1] */
- FN_AUDIO_CLKA, 0,
- /* IP7_18 [1] */
- FN_AUDIO_CLKOUT, 0,
- /* IP7_17 [1] */
- FN_SSI_SDATA4, 0,
- /* IP7_16 [1] */
- FN_SSI_WS4, 0,
- /* IP7_15_14 [2] */
- FN_SSI_SCK4, FN_TPU0TO3, 0, 0,
- /* IP7_13_12 [2] */
- FN_SSI_SDATA3, FN_TPU0TO2, 0, 0,
- /* IP7_11_10 [2] */
- FN_SSI_WS3, FN_TPU0TO1, 0, 0,
- /* IP7_9_8 [2] */
- FN_SSI_SCK3, FN_TPU0TO0, 0, 0,
- /* IP7_7 [1] */
- FN_PWM4, 0,
- /* IP7_6 [1] */
- FN_PWM3, 0,
- /* IP7_5_4 [2] */
- FN_PWM2, FN_TCLK3, FN_FSO_TOE, 0,
- /* IP7_3_2 [2] */
- FN_PWM1, FN_TCLK2, FN_FSO_CFE_1, 0,
- /* IP7_1_0 [2] */
- FN_PWM0, FN_TCLK1, FN_FSO_CFE_0, 0, }
- },
- /* MOD SEL */
- { PINMUX_CFG_REG("MOD_SEL", 0xE6060140, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- /* MOD_SEL [1] */
- FN_SEL_VI1_0, FN_SEL_VI1_1, }
- },
- { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- GP_0_28_IN, GP_0_28_OUT,
- GP_0_27_IN, GP_0_27_OUT,
- GP_0_26_IN, GP_0_26_OUT,
- GP_0_25_IN, GP_0_25_OUT,
- GP_0_24_IN, GP_0_24_OUT,
- GP_0_23_IN, GP_0_23_OUT,
- GP_0_22_IN, GP_0_22_OUT,
- GP_0_21_IN, GP_0_21_OUT,
- GP_0_20_IN, GP_0_20_OUT,
- GP_0_19_IN, GP_0_19_OUT,
- GP_0_18_IN, GP_0_18_OUT,
- GP_0_17_IN, GP_0_17_OUT,
- GP_0_16_IN, GP_0_16_OUT,
- GP_0_15_IN, GP_0_15_OUT,
- GP_0_14_IN, GP_0_14_OUT,
- GP_0_13_IN, GP_0_13_OUT,
- GP_0_12_IN, GP_0_12_OUT,
- GP_0_11_IN, GP_0_11_OUT,
- GP_0_10_IN, GP_0_10_OUT,
- GP_0_9_IN, GP_0_9_OUT,
- GP_0_8_IN, GP_0_8_OUT,
- GP_0_7_IN, GP_0_7_OUT,
- GP_0_6_IN, GP_0_6_OUT,
- GP_0_5_IN, GP_0_5_OUT,
- GP_0_4_IN, GP_0_4_OUT,
- GP_0_3_IN, GP_0_3_OUT,
- GP_0_2_IN, GP_0_2_OUT,
- GP_0_1_IN, GP_0_1_OUT,
- GP_0_0_IN, GP_0_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_22_IN, GP_1_22_OUT,
- GP_1_21_IN, GP_1_21_OUT,
- GP_1_20_IN, GP_1_20_OUT,
- GP_1_19_IN, GP_1_19_OUT,
- GP_1_18_IN, GP_1_18_OUT,
- GP_1_17_IN, GP_1_17_OUT,
- GP_1_16_IN, GP_1_16_OUT,
- GP_1_15_IN, GP_1_15_OUT,
- GP_1_14_IN, GP_1_14_OUT,
- GP_1_13_IN, GP_1_13_OUT,
- GP_1_12_IN, GP_1_12_OUT,
- GP_1_11_IN, GP_1_11_OUT,
- GP_1_10_IN, GP_1_10_OUT,
- GP_1_9_IN, GP_1_9_OUT,
- GP_1_8_IN, GP_1_8_OUT,
- GP_1_7_IN, GP_1_7_OUT,
- GP_1_6_IN, GP_1_6_OUT,
- GP_1_5_IN, GP_1_5_OUT,
- GP_1_4_IN, GP_1_4_OUT,
- GP_1_3_IN, GP_1_3_OUT,
- GP_1_2_IN, GP_1_2_OUT,
- GP_1_1_IN, GP_1_1_OUT,
- GP_1_0_IN, GP_1_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
- { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_3_27_IN, GP_3_27_OUT,
- GP_3_26_IN, GP_3_26_OUT,
- GP_3_25_IN, GP_3_25_OUT,
- GP_3_24_IN, GP_3_24_OUT,
- GP_3_23_IN, GP_3_23_OUT,
- GP_3_22_IN, GP_3_22_OUT,
- GP_3_21_IN, GP_3_21_OUT,
- GP_3_20_IN, GP_3_20_OUT,
- GP_3_19_IN, GP_3_19_OUT,
- GP_3_18_IN, GP_3_18_OUT,
- GP_3_17_IN, GP_3_17_OUT,
- GP_3_16_IN, GP_3_16_OUT,
- GP_3_15_IN, GP_3_15_OUT,
- GP_3_14_IN, GP_3_14_OUT,
- GP_3_13_IN, GP_3_13_OUT,
- GP_3_12_IN, GP_3_12_OUT,
- GP_3_11_IN, GP_3_11_OUT,
- GP_3_10_IN, GP_3_10_OUT,
- GP_3_9_IN, GP_3_9_OUT,
- GP_3_8_IN, GP_3_8_OUT,
- GP_3_7_IN, GP_3_7_OUT,
- GP_3_6_IN, GP_3_6_OUT,
- GP_3_5_IN, GP_3_5_OUT,
- GP_3_4_IN, GP_3_4_OUT,
- GP_3_3_IN, GP_3_3_OUT,
- GP_3_2_IN, GP_3_2_OUT,
- GP_3_1_IN, GP_3_1_OUT,
- GP_3_0_IN, GP_3_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_4_16_IN, GP_4_16_OUT,
- GP_4_15_IN, GP_4_15_OUT,
- GP_4_14_IN, GP_4_14_OUT,
- GP_4_13_IN, GP_4_13_OUT,
- GP_4_12_IN, GP_4_12_OUT,
- GP_4_11_IN, GP_4_11_OUT,
- GP_4_10_IN, GP_4_10_OUT,
- GP_4_9_IN, GP_4_9_OUT,
- GP_4_8_IN, GP_4_8_OUT,
- GP_4_7_IN, GP_4_7_OUT,
- GP_4_6_IN, GP_4_6_OUT,
- GP_4_5_IN, GP_4_5_OUT,
- GP_4_4_IN, GP_4_4_OUT,
- GP_4_3_IN, GP_4_3_OUT,
- GP_4_2_IN, GP_4_2_OUT,
- GP_4_1_IN, GP_4_1_OUT,
- GP_4_0_IN, GP_4_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_5_16_IN, GP_5_16_OUT,
- GP_5_15_IN, GP_5_15_OUT,
- GP_5_14_IN, GP_5_14_OUT,
- GP_5_13_IN, GP_5_13_OUT,
- GP_5_12_IN, GP_5_12_OUT,
- GP_5_11_IN, GP_5_11_OUT,
- GP_5_10_IN, GP_5_10_OUT,
- GP_5_9_IN, GP_5_9_OUT,
- GP_5_8_IN, GP_5_8_OUT,
- GP_5_7_IN, GP_5_7_OUT,
- GP_5_6_IN, GP_5_6_OUT,
- GP_5_5_IN, GP_5_5_OUT,
- GP_5_4_IN, GP_5_4_OUT,
- GP_5_3_IN, GP_5_3_OUT,
- GP_5_2_IN, GP_5_2_OUT,
- GP_5_1_IN, GP_5_1_OUT,
- GP_5_0_IN, GP_5_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL6", 0xE6055104, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_6_16_IN, GP_6_16_OUT,
- GP_6_15_IN, GP_6_15_OUT,
- GP_6_14_IN, GP_6_14_OUT,
- GP_6_13_IN, GP_6_13_OUT,
- GP_6_12_IN, GP_6_12_OUT,
- GP_6_11_IN, GP_6_11_OUT,
- GP_6_10_IN, GP_6_10_OUT,
- GP_6_9_IN, GP_6_9_OUT,
- GP_6_8_IN, GP_6_8_OUT,
- GP_6_7_IN, GP_6_7_OUT,
- GP_6_6_IN, GP_6_6_OUT,
- GP_6_5_IN, GP_6_5_OUT,
- GP_6_4_IN, GP_6_4_OUT,
- GP_6_3_IN, GP_6_3_OUT,
- GP_6_2_IN, GP_6_2_OUT,
- GP_6_1_IN, GP_6_1_OUT,
- GP_6_0_IN, GP_6_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL7", 0xE6055204, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_7_16_IN, GP_7_16_OUT,
- GP_7_15_IN, GP_7_15_OUT,
- GP_7_14_IN, GP_7_14_OUT,
- GP_7_13_IN, GP_7_13_OUT,
- GP_7_12_IN, GP_7_12_OUT,
- GP_7_11_IN, GP_7_11_OUT,
- GP_7_10_IN, GP_7_10_OUT,
- GP_7_9_IN, GP_7_9_OUT,
- GP_7_8_IN, GP_7_8_OUT,
- GP_7_7_IN, GP_7_7_OUT,
- GP_7_6_IN, GP_7_6_OUT,
- GP_7_5_IN, GP_7_5_OUT,
- GP_7_4_IN, GP_7_4_OUT,
- GP_7_3_IN, GP_7_3_OUT,
- GP_7_2_IN, GP_7_2_OUT,
- GP_7_1_IN, GP_7_1_OUT,
- GP_7_0_IN, GP_7_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL8", 0xE6055304, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_8_16_IN, GP_8_16_OUT,
- GP_8_15_IN, GP_8_15_OUT,
- GP_8_14_IN, GP_8_14_OUT,
- GP_8_13_IN, GP_8_13_OUT,
- GP_8_12_IN, GP_8_12_OUT,
- GP_8_11_IN, GP_8_11_OUT,
- GP_8_10_IN, GP_8_10_OUT,
- GP_8_9_IN, GP_8_9_OUT,
- GP_8_8_IN, GP_8_8_OUT,
- GP_8_7_IN, GP_8_7_OUT,
- GP_8_6_IN, GP_8_6_OUT,
- GP_8_5_IN, GP_8_5_OUT,
- GP_8_4_IN, GP_8_4_OUT,
- GP_8_3_IN, GP_8_3_OUT,
- GP_8_2_IN, GP_8_2_OUT,
- GP_8_1_IN, GP_8_1_OUT,
- GP_8_0_IN, GP_8_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL9", 0xE6055404, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_9_16_IN, GP_9_16_OUT,
- GP_9_15_IN, GP_9_15_OUT,
- GP_9_14_IN, GP_9_14_OUT,
- GP_9_13_IN, GP_9_13_OUT,
- GP_9_12_IN, GP_9_12_OUT,
- GP_9_11_IN, GP_9_11_OUT,
- GP_9_10_IN, GP_9_10_OUT,
- GP_9_9_IN, GP_9_9_OUT,
- GP_9_8_IN, GP_9_8_OUT,
- GP_9_7_IN, GP_9_7_OUT,
- GP_9_6_IN, GP_9_6_OUT,
- GP_9_5_IN, GP_9_5_OUT,
- GP_9_4_IN, GP_9_4_OUT,
- GP_9_3_IN, GP_9_3_OUT,
- GP_9_2_IN, GP_9_2_OUT,
- GP_9_1_IN, GP_9_1_OUT,
- GP_9_0_IN, GP_9_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL10", 0xE6055504, 32, 1) { GP_INOUTSEL(10) } },
- { PINMUX_CFG_REG("INOUTSEL11", 0xE6055604, 32, 1) {
- 0, 0,
- 0, 0,
- GP_11_29_IN, GP_11_29_OUT,
- GP_11_28_IN, GP_11_28_OUT,
- GP_11_27_IN, GP_11_27_OUT,
- GP_11_26_IN, GP_11_26_OUT,
- GP_11_25_IN, GP_11_25_OUT,
- GP_11_24_IN, GP_11_24_OUT,
- GP_11_23_IN, GP_11_23_OUT,
- GP_11_22_IN, GP_11_22_OUT,
- GP_11_21_IN, GP_11_21_OUT,
- GP_11_20_IN, GP_11_20_OUT,
- GP_11_19_IN, GP_11_19_OUT,
- GP_11_18_IN, GP_11_18_OUT,
- GP_11_17_IN, GP_11_17_OUT,
- GP_11_16_IN, GP_11_16_OUT,
- GP_11_15_IN, GP_11_15_OUT,
- GP_11_14_IN, GP_11_14_OUT,
- GP_11_13_IN, GP_11_13_OUT,
- GP_11_12_IN, GP_11_12_OUT,
- GP_11_11_IN, GP_11_11_OUT,
- GP_11_10_IN, GP_11_10_OUT,
- GP_11_9_IN, GP_11_9_OUT,
- GP_11_8_IN, GP_11_8_OUT,
- GP_11_7_IN, GP_11_7_OUT,
- GP_11_6_IN, GP_11_6_OUT,
- GP_11_5_IN, GP_11_5_OUT,
- GP_11_4_IN, GP_11_4_OUT,
- GP_11_3_IN, GP_11_3_OUT,
- GP_11_2_IN, GP_11_2_OUT,
- GP_11_1_IN, GP_11_1_OUT,
- GP_11_0_IN, GP_11_0_OUT, }
- },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
- 0, 0, 0, GP_0_28_DATA,
- GP_0_27_DATA, GP_0_26_DATA, GP_0_25_DATA, GP_0_24_DATA,
- GP_0_23_DATA, GP_0_22_DATA, GP_0_21_DATA, GP_0_20_DATA,
- GP_0_19_DATA, GP_0_18_DATA, GP_0_17_DATA, GP_0_16_DATA,
- GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
- GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
- GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
- GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
- },
- { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
- GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
- GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
- GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
- GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
- GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
- },
- { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
- { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
- 0, 0, 0, 0,
- GP_3_27_DATA, GP_3_26_DATA, GP_3_25_DATA, GP_3_24_DATA,
- GP_3_23_DATA, GP_3_22_DATA, GP_3_21_DATA, GP_3_20_DATA,
- GP_3_19_DATA, GP_3_18_DATA, GP_3_17_DATA, GP_3_16_DATA,
- GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
- GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
- GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
- GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
- },
- { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, GP_4_16_DATA,
- GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
- GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
- GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
- GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
- },
- { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, GP_5_16_DATA,
- GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
- GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
- GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
- GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
- },
- { PINMUX_DATA_REG("INDT6", 0xE6055108, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, GP_6_16_DATA,
- GP_6_15_DATA, GP_6_14_DATA, GP_6_13_DATA, GP_6_12_DATA,
- GP_6_11_DATA, GP_6_10_DATA, GP_6_9_DATA, GP_6_8_DATA,
- GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
- GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
- },
- { PINMUX_DATA_REG("INDT7", 0xE6055208, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, GP_7_16_DATA,
- GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA,
- GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA,
- GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA,
- GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
- },
- { PINMUX_DATA_REG("INDT8", 0xE6055308, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, GP_8_16_DATA,
- GP_8_15_DATA, GP_8_14_DATA, GP_8_13_DATA, GP_8_12_DATA,
- GP_8_11_DATA, GP_8_10_DATA, GP_8_9_DATA, GP_8_8_DATA,
- GP_8_7_DATA, GP_8_6_DATA, GP_8_5_DATA, GP_8_4_DATA,
- GP_8_3_DATA, GP_8_2_DATA, GP_8_1_DATA, GP_8_0_DATA }
- },
- { PINMUX_DATA_REG("INDT9", 0xE6055408, 32) {
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, GP_9_16_DATA,
- GP_9_15_DATA, GP_9_14_DATA, GP_9_13_DATA, GP_9_12_DATA,
- GP_9_11_DATA, GP_9_10_DATA, GP_9_9_DATA, GP_9_8_DATA,
- GP_9_7_DATA, GP_9_6_DATA, GP_9_5_DATA, GP_9_4_DATA,
- GP_9_3_DATA, GP_9_2_DATA, GP_9_1_DATA, GP_9_0_DATA }
- },
- { PINMUX_DATA_REG("INDT10", 0xE6055508, 32) { GP_INDT(10) } },
- { PINMUX_DATA_REG("INDT11", 0xE6055608, 32) {
- 0, 0, GP_11_29_DATA, GP_11_28_DATA,
- GP_11_27_DATA, GP_11_26_DATA, GP_11_25_DATA, GP_11_24_DATA,
- GP_11_23_DATA, GP_11_22_DATA, GP_11_21_DATA, GP_11_20_DATA,
- GP_11_19_DATA, GP_11_18_DATA, GP_11_17_DATA, GP_11_16_DATA,
- GP_11_15_DATA, GP_11_14_DATA, GP_11_13_DATA, GP_11_12_DATA,
- GP_11_11_DATA, GP_11_10_DATA, GP_11_9_DATA, GP_11_8_DATA,
- GP_11_7_DATA, GP_11_6_DATA, GP_11_5_DATA, GP_11_4_DATA,
- GP_11_3_DATA, GP_11_2_DATA, GP_11_1_DATA, GP_11_0_DATA }
- },
- { },
-};
-
-static struct pinmux_info r8a7792_pinmux_info = {
- .name = "r8a7792_pfc",
-
- .unlock_reg = 0xe6060000, /* PMMR */
-
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_AUDIO_CLKB,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void r8a7792_pinmux_init(void)
-{
- register_pinmux(&r8a7792_pinmux_info);
-}
-
diff --git a/arch/arm/mach-rmobile/pfc-r8a7793.c b/arch/arm/mach-rmobile/pfc-r8a7793.c
deleted file mode 100644
index 08cb651..0000000
--- a/arch/arm/mach-rmobile/pfc-r8a7793.c
+++ /dev/null
@@ -1,1925 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/arm/cpu/armv7/rmobile/pfc-r8a7793.c
- *
- * Copyright (C) 2013 Renesas Electronics Corporation
- */
-
-#include <common.h>
-#include <sh_pfc.h>
-#include <asm/gpio.h>
-
-#define CPU_32_PORT(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
- PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
- PORT_1(fn, pfx##31, sfx)
-
-#define CPU_32_PORT1(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
- PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
- PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
- PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx)
-
-/*
- * GP_0_0_DATA -> GP_7_25_DATA
- * (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30]),GP1[31]
- * GP7[26],GP7[27],GP7[28],GP7[29]),GP7[30]),GP7[31])
- */
-#define CPU_ALL_PORT(fn, pfx, sfx) \
- CPU_32_PORT(fn, pfx##_0_, sfx), \
- CPU_32_PORT1(fn, pfx##_1_, sfx), \
- CPU_32_PORT(fn, pfx##_2_, sfx), \
- CPU_32_PORT(fn, pfx##_3_, sfx), \
- CPU_32_PORT(fn, pfx##_4_, sfx), \
- CPU_32_PORT(fn, pfx##_5_, sfx), \
- CPU_32_PORT(fn, pfx##_6_, sfx), \
- CPU_32_PORT1(fn, pfx##_7_, sfx)
-
-#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
-#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
- GP##pfx##_IN, GP##pfx##_OUT)
-
-#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
-#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
-
-#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
-#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
-#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
-
-
-#define PORT_10_REV(fn, pfx, sfx) \
- PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
- PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
- PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
- PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
- PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
-
-#define CPU_32_PORT_REV(fn, pfx, sfx) \
- PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
- PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
- PORT_10_REV(fn, pfx, sfx)
-
-#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
-#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
-
-#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
-#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
- FN_##ipsr, FN_##fn)
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- GP_ALL(DATA),
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- GP_ALL(IN),
- PINMUX_INPUT_END,
-
- PINMUX_OUTPUT_BEGIN,
- GP_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- GP_ALL(FN),
-
- /* GPSR0 */
- FN_IP0_0, FN_IP0_1, FN_IP0_2, FN_IP0_3, FN_IP0_4, FN_IP0_5,
- FN_IP0_6, FN_IP0_7, FN_IP0_8, FN_IP0_9, FN_IP0_10, FN_IP0_11,
- FN_IP0_12, FN_IP0_13, FN_IP0_14, FN_IP0_15, FN_IP0_18_16, FN_IP0_20_19,
- FN_IP0_22_21, FN_IP0_24_23, FN_IP0_26_25, FN_IP0_28_27, FN_IP0_30_29,
- FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6, FN_IP1_10_8,
- FN_IP1_13_11, FN_IP1_16_14, FN_IP1_19_17, FN_IP1_22_20,
-
- /* GPSR1 */
- FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0, FN_IP2_4_3,
- FN_IP2_6_5, FN_IP2_9_7, FN_IP2_12_10, FN_IP2_15_13, FN_IP2_18_16,
- FN_IP2_20_19, FN_IP2_22_21, FN_EX_CS0_N, FN_IP2_24_23, FN_IP2_26_25,
- FN_IP2_29_27, FN_IP3_2_0, FN_IP3_5_3, FN_IP3_8_6, FN_RD_N,
- FN_IP3_11_9, FN_IP3_13_12, FN_IP3_15_14 , FN_IP3_17_16 , FN_IP3_19_18,
- FN_IP3_21_20,
-
- /* GPSR2 */
- FN_IP3_27_25, FN_IP3_30_28, FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5,
- FN_IP4_9_8, FN_IP4_12_10, FN_IP4_15_13, FN_IP4_18_16, FN_IP4_19,
- FN_IP4_20, FN_IP4_21, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,
- FN_IP4_30_28, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_8_6, FN_IP5_11_9,
- FN_IP5_14_12, FN_IP5_16_15, FN_IP5_19_17, FN_IP5_21_20, FN_IP5_23_22,
- FN_IP5_25_24, FN_IP5_28_26, FN_IP5_31_29, FN_AUDIO_CLKA, FN_IP6_2_0,
- FN_IP6_5_3, FN_IP6_7_6,
-
- /* GPSR3 */
- FN_IP7_5_3, FN_IP7_8_6, FN_IP7_10_9, FN_IP7_12_11, FN_IP7_14_13,
- FN_IP7_16_15, FN_IP7_18_17, FN_IP7_20_19, FN_IP7_23_21, FN_IP7_26_24,
- FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3, FN_IP8_8_6, FN_IP8_11_9,
- FN_IP8_14_12, FN_IP8_17_15, FN_IP8_20_18, FN_IP8_23_21, FN_IP8_25_24,
- FN_IP8_27_26, FN_IP8_30_28, FN_IP9_2_0, FN_IP9_5_3, FN_IP9_6, FN_IP9_7,
- FN_IP9_10_8, FN_IP9_11, FN_IP9_12, FN_IP9_15_13, FN_IP9_16,
- FN_IP9_18_17,
-
- /* GPSR4 */
- FN_VI0_CLK, FN_IP9_20_19, FN_IP9_22_21, FN_IP9_24_23, FN_IP9_26_25,
- FN_VI0_DATA0_VI0_B0, FN_VI0_DATA0_VI0_B1, FN_VI0_DATA0_VI0_B2,
- FN_IP9_28_27, FN_VI0_DATA0_VI0_B4, FN_VI0_DATA0_VI0_B5,
- FN_VI0_DATA0_VI0_B6, FN_VI0_DATA0_VI0_B7, FN_IP9_31_29, FN_IP10_2_0,
- FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_16_15,
- FN_IP10_18_17, FN_IP10_21_19, FN_IP10_24_22, FN_IP10_26_25,
- FN_IP10_28_27, FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,
- FN_IP15_1_0, FN_IP15_3_2, FN_IP15_5_4,
-
- /* GPSR5 */
- FN_IP11_11_9, FN_IP11_14_12, FN_IP11_16_15, FN_IP11_18_17, FN_IP11_19,
- FN_IP11_20, FN_IP11_21, FN_IP11_22, FN_IP11_23, FN_IP11_24,
- FN_IP11_25, FN_IP11_26, FN_IP11_27, FN_IP11_29_28, FN_IP11_31_30,
- FN_IP12_1_0, FN_IP12_3_2, FN_IP12_6_4, FN_IP12_9_7, FN_IP12_12_10,
- FN_IP12_15_13, FN_IP12_17_16, FN_IP12_19_18, FN_IP12_21_20,
- FN_IP12_23_22, FN_IP12_26_24, FN_IP12_29_27, FN_IP13_2_0, FN_IP13_4_3,
- FN_IP13_6_5, FN_IP13_9_7, FN_IP3_24_22,
-
- /* GPSR6 */
- FN_IP13_10, FN_IP13_11, FN_IP13_12, FN_IP13_13, FN_IP13_14,
- FN_IP13_15, FN_IP13_18_16, FN_IP13_21_19, FN_IP13_22, FN_IP13_24_23,
- FN_IP13_25, FN_IP13_26, FN_IP13_27, FN_IP13_30_28, FN_IP14_1_0,
- FN_IP14_2, FN_IP14_3, FN_IP14_4, FN_IP14_5, FN_IP14_6, FN_IP14_7,
- FN_IP14_10_8, FN_IP14_13_11, FN_IP14_16_14, FN_IP14_19_17,
- FN_IP14_22_20, FN_IP14_25_23, FN_IP14_28_26, FN_IP14_31_29,
-
- /* GPSR7 */
- FN_IP15_17_15, FN_IP15_20_18, FN_IP15_23_21, FN_IP15_26_24,
- FN_IP15_29_27, FN_IP16_2_0, FN_IP16_5_3, FN_IP16_7_6, FN_IP16_9_8,
- FN_IP16_11_10, FN_IP6_9_8, FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14,
- FN_IP6_18_16, FN_IP6_20_19, FN_IP6_23_21, FN_IP6_26_24, FN_IP6_29_27,
- FN_IP7_2_0, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_14_12,
- FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN,
-
- /* IPSR 0 -5 */
-
- /* IPSR6 */
- FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,
- FN_SCIF_CLK, FN_BPFCLK_E,
- FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,
- FN_SCIFA2_RXD, FN_FMIN_E,
- FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,
- FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N,
- FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N,
- FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N,
- FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,
- FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,
- FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,
- FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B, FN_SDA1_E, FN_MSIOF2_SYNC_E,
- FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B, FN_GPS_CLK_C, FN_GPS_CLK_D,
- FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B, FN_GPS_SIGN_C, FN_GPS_SIGN_D,
-
- /* IPSR7 - IPSR10 */
-
- /* IPSR11 */
- FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,
- FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,
- FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,
- FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D,
- FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B, FN_TX4_B, FN_SCIFA4_TXD_B,
- FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B, FN_RX4_B, FN_SCIFA4_RXD_B,
- FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B,
- FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B,
- FN_VI1_CLK, FN_AVB_RXD4, FN_VI1_DATA0, FN_AVB_RXD5,
- FN_VI1_DATA1, FN_AVB_RXD6, FN_VI1_DATA2, FN_AVB_RXD7,
- FN_VI1_DATA3, FN_AVB_RX_ER, FN_VI1_DATA4, FN_AVB_MDIO,
- FN_VI1_DATA5, FN_AVB_RX_DV, FN_VI1_DATA6, FN_AVB_MAGIC,
- FN_VI1_DATA7, FN_AVB_MDC,
- FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C,
- FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C,
-
- /* IPSR12 */
- FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7,
- FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,
- FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,
- FN_SCL2_D, FN_MSIOF1_RXD_E,
- FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C, FN_SDA2_D, FN_MSIOF1_SCK_E,
- FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,
- FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,
- FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,
- FN_CAN1_TX_C, FN_MSIOF1_TXD_E,
- FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,
- FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C,
- FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C,
- FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C,
- FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,
- FN_ADIDATA_B, FN_MSIOF0_SYNC_C,
- FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,
- FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,
-
- /* IPSR13 */
- FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,
- FN_ADICLK_B, FN_MSIOF0_SS1_C,
- FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,
- FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,
- FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,
- FN_ADICHS2_B, FN_MSIOF0_TXD_C,
- FN_SD0_CLK, FN_SPCLK_B, FN_SD0_CMD, FN_MOSI_IO0_B,
- FN_SD0_DATA0, FN_MISO_IO1_B, FN_SD0_DATA1, FN_IO2_B,
- FN_SD0_DATA2, FN_IO3_B, FN_SD0_DATA3, FN_SSL_B,
- FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,
- FN_SCIFA5_TXD_B, FN_TX3_C,
- FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,
- FN_SCIFA5_RXD_B, FN_RX3_C,
- FN_SD1_CMD, FN_REMOCON_B, FN_SD1_DATA0, FN_SPEEDIN_B,
- FN_SD1_DATA1, FN_IETX_B, FN_SD1_DATA2, FN_IECLK_B,
- FN_SD1_DATA3, FN_IERX_B,
- FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,
-
- /* IPSR14 */
- FN_SD1_WP, FN_PWM1_B, FN_SDA1_C,
- FN_SD2_CLK, FN_MMC_CLK, FN_SD2_CMD, FN_MMC_CMD,
- FN_SD2_DATA0, FN_MMC_D0, FN_SD2_DATA1, FN_MMC_D1,
- FN_SD2_DATA2, FN_MMC_D2, FN_SD2_DATA3, FN_MMC_D3,
- FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,
- FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,
- FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, FN_VI1_CLK_C, FN_VI1_G0_B,
- FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, FN_VI1_CLKENB_C, FN_VI1_G1_B,
- FN_MSIOF0_TXD, FN_ADICLK, FN_VI1_FIELD_C, FN_VI1_G2_B,
- FN_MSIOF0_RXD, FN_ADICHS0, FN_VI1_DATA0_C, FN_VI1_G3_B,
- FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,
- FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B,
- FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,
- FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B,
-
- /* IPSR15 */
- FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D,
- FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C,
- FN_SIM0_D, FN_IERX, FN_CAN1_RX_D,
- FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,
- FN_PWM5_B, FN_SCIFA3_TXD_C,
- FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,
- FN_VI1_G6_B, FN_SCIFA3_RXD_C,
- FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,
- FN_VI1_G7_B, FN_SCIFA3_SCK_C,
- FN_HCTS0_N, FN_SCIFB0_CTS_N, FN_GLO_I0_C, FN_TCLK1, FN_VI1_DATA1_C,
- FN_HRTS0_N, FN_SCIFB0_RTS_N, FN_GLO_I1_C, FN_VI1_DATA2_C,
- FN_HSCK0, FN_SCIFB0_SCK, FN_GLO_Q0_C, FN_CAN_CLK,
- FN_TCLK2, FN_VI1_DATA3_C,
- FN_HRX0, FN_SCIFB0_RXD, FN_GLO_Q1_C, FN_CAN0_RX_B, FN_VI1_DATA4_C,
- FN_HTX0, FN_SCIFB0_TXD, FN_GLO_SCLK_C, FN_CAN0_TX_B, FN_VI1_DATA5_C,
-
- /* IPSR16 */
- FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B, FN_GLO_SDATA_C, FN_VI1_DATA6_C,
- FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B, FN_GLO_SS_C, FN_VI1_DATA7_C,
- FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,
- FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,
- FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,
-
- /* MOD_SEL */
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
- FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,
- FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,
- FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2,
- FN_SEL_SSI9_0, FN_SEL_SSI9_1,
- FN_SEL_SCFA_0, FN_SEL_SCFA_1,
- FN_SEL_QSP_0, FN_SEL_QSP_1,
- FN_SEL_SSI7_0, FN_SEL_SSI7_1,
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2, FN_SEL_HSCIF1_3,
- FN_SEL_HSCIF1_4,
- FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2,
- FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2,
-
- /* MOD_SEL2 */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
- FN_SEL_SCIF0_4,
- FN_SEL_SCIF_0, FN_SEL_SCIF_1,
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- FN_SEL_CAN0_4, FN_SEL_CAN0_5,
- FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
- FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2,
- FN_SEL_ADG_0, FN_SEL_ADG_1,
- FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3, FN_SEL_FM_4,
- FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,
- FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
- FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,
- FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2,
- FN_SEL_SIM_0, FN_SEL_SIM_1,
- FN_SEL_SSI8_0, FN_SEL_SSI8_1,
-
- /* MOD_SEL3 */
- FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,
- FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,
- FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2,
- FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2,
- FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2,
- FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,
- FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
- FN_SEL_MMC_0, FN_SEL_MMC_1,
- FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
- FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
- FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,
- FN_SEL_IIC1_4,
- FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2,
-
- /* MOD_SEL4 */
- FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,
- FN_SEL_SOF1_4,
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2,
- FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2,
- FN_SEL_RAD_0, FN_SEL_RAD_1,
- FN_SEL_RCN_0, FN_SEL_RCN_1,
- FN_SEL_RSP_0, FN_SEL_RSP_1,
- FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,
- FN_SEL_SCIF2_4,
- FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2, FN_SEL_SOF2_3,
- FN_SEL_SOF2_4,
- FN_SEL_SSI1_0, FN_SEL_SSI1_1,
- FN_SEL_SSI0_0, FN_SEL_SSI0_1,
- FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
-
- EX_CS0_N_MARK, RD_N_MARK,
-
- AUDIO_CLKA_MARK,
-
- VI0_CLK_MARK, VI0_DATA0_VI0_B0_MARK, VI0_DATA0_VI0_B1_MARK,
- VI0_DATA0_VI0_B2_MARK, VI0_DATA0_VI0_B4_MARK, VI0_DATA0_VI0_B5_MARK,
- VI0_DATA0_VI0_B6_MARK, VI0_DATA0_VI0_B7_MARK,
-
- USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK,
-
- /* IPSR0 - 5 */
-
- /* IPSR6 */
- AUDIO_CLKB_MARK, STP_OPWM_0_B_MARK, MSIOF1_SCK_B_MARK,
- SCIF_CLK_MARK, BPFCLK_E_MARK,
- AUDIO_CLKC_MARK, SCIFB0_SCK_C_MARK, MSIOF1_SYNC_B_MARK, RX2_MARK,
- SCIFA2_RXD_MARK, FMIN_E_MARK,
- AUDIO_CLKOUT_MARK, MSIOF1_SS1_B_MARK, TX2_MARK, SCIFA2_TXD_MARK,
- IRQ0_MARK, SCIFB1_RXD_D_MARK, INTC_IRQ0_N_MARK,
- IRQ1_MARK, SCIFB1_SCK_C_MARK, INTC_IRQ1_N_MARK,
- IRQ2_MARK, SCIFB1_TXD_D_MARK, INTC_IRQ2_N_MARK,
- IRQ3_MARK, SCL4_C_MARK, MSIOF2_TXD_E_MARK, INTC_IRQ3_N_MARK,
- IRQ4_MARK, HRX1_C_MARK, SDA4_C_MARK,
- MSIOF2_RXD_E_MARK, INTC_IRQ4_N_MARK,
- IRQ5_MARK, HTX1_C_MARK, SCL1_E_MARK, MSIOF2_SCK_E_MARK,
- IRQ6_MARK, HSCK1_C_MARK, MSIOF1_SS2_B_MARK,
- SDA1_E_MARK, MSIOF2_SYNC_E_MARK,
- IRQ7_MARK, HCTS1_N_C_MARK, MSIOF1_TXD_B_MARK,
- GPS_CLK_C_MARK, GPS_CLK_D_MARK,
- IRQ8_MARK, HRTS1_N_C_MARK, MSIOF1_RXD_B_MARK,
- GPS_SIGN_C_MARK, GPS_SIGN_D_MARK,
-
- /* IPSR7 - 10 */
-
- /* IPSR11 */
- VI0_R5_MARK, VI2_DATA6_MARK, GLO_SDATA_B_MARK, RX0_C_MARK, SDA1_D_MARK,
- VI0_R6_MARK, VI2_DATA7_MARK, GLO_SS_B_MARK, TX1_C_MARK, SCL4_B_MARK,
- VI0_R7_MARK, GLO_RFON_B_MARK, RX1_C_MARK, CAN0_RX_E_MARK,
- SDA4_B_MARK, HRX1_D_MARK, SCIFB0_RXD_D_MARK,
- VI1_HSYNC_N_MARK, AVB_RXD0_MARK, TS_SDATA0_B_MARK,
- TX4_B_MARK, SCIFA4_TXD_B_MARK,
- VI1_VSYNC_N_MARK, AVB_RXD1_MARK, TS_SCK0_B_MARK,
- RX4_B_MARK, SCIFA4_RXD_B_MARK,
- VI1_CLKENB_MARK, AVB_RXD2_MARK, TS_SDEN0_B_MARK,
- VI1_FIELD_MARK, AVB_RXD3_MARK, TS_SPSYNC0_B_MARK,
- VI1_CLK_MARK, AVB_RXD4_MARK, VI1_DATA0_MARK, AVB_RXD5_MARK,
- VI1_DATA1_MARK, AVB_RXD6_MARK, VI1_DATA2_MARK, AVB_RXD7_MARK,
- VI1_DATA3_MARK, AVB_RX_ER_MARK, VI1_DATA4_MARK, AVB_MDIO_MARK,
- VI1_DATA5_MARK, AVB_RX_DV_MARK, VI1_DATA6_MARK, AVB_MAGIC_MARK,
- VI1_DATA7_MARK, AVB_MDC_MARK,
- ETH_MDIO_MARK, AVB_RX_CLK_MARK, SCL2_C_MARK,
- ETH_CRS_DV_MARK, AVB_LINK_MARK, SDA2_C_MARK,
-
- /* IPSR12 */
- ETH_RX_ER_MARK, AVB_CRS_MARK, SCL3_MARK, SCL7_MARK,
- ETH_RXD0_MARK, AVB_PHY_INT_MARK, SDA3_MARK, SDA7_MARK,
- ETH_RXD1_MARK, AVB_GTXREFCLK_MARK, CAN0_TX_C_MARK,
- SCL2_D_MARK, MSIOF1_RXD_E_MARK,
- ETH_LINK_MARK, AVB_TXD0_MARK, CAN0_RX_C_MARK,
- SDA2_D_MARK, MSIOF1_SCK_E_MARK,
- ETH_REFCLK_MARK, AVB_TXD1_MARK, SCIFA3_RXD_B_MARK,
- CAN1_RX_C_MARK, MSIOF1_SYNC_E_MARK,
- ETH_TXD1_MARK, AVB_TXD2_MARK, SCIFA3_TXD_B_MARK,
- CAN1_TX_C_MARK, MSIOF1_TXD_E_MARK,
- ETH_TX_EN_MARK, AVB_TXD3_MARK, TCLK1_B_MARK, CAN_CLK_B_MARK,
- ETH_MAGIC_MARK, AVB_TXD4_MARK, IETX_C_MARK,
- ETH_TXD0_MARK, AVB_TXD5_MARK, IECLK_C_MARK,
- ETH_MDC_MARK, AVB_TXD6_MARK, IERX_C_MARK,
- STP_IVCXO27_0_MARK, AVB_TXD7_MARK, SCIFB2_TXD_D_MARK,
- ADIDATA_B_MARK, MSIOF0_SYNC_C_MARK,
- STP_ISCLK_0_MARK, AVB_TX_EN_MARK, SCIFB2_RXD_D_MARK,
- ADICS_SAMP_B_MARK, MSIOF0_SCK_C_MARK,
-
- /* IPSR13 */
- STP_ISD_0_MARK, AVB_TX_ER_MARK, SCIFB2_SCK_C_MARK,
- ADICLK_B_MARK, MSIOF0_SS1_C_MARK,
- STP_ISEN_0_MARK, AVB_TX_CLK_MARK, ADICHS0_B_MARK, MSIOF0_SS2_C_MARK,
- STP_ISSYNC_0_MARK, AVB_COL_MARK, ADICHS1_B_MARK, MSIOF0_RXD_C_MARK,
- STP_OPWM_0_MARK, AVB_GTX_CLK_MARK, PWM0_B_MARK,
- ADICHS2_B_MARK, MSIOF0_TXD_C_MARK,
- SD0_CLK_MARK, SPCLK_B_MARK, SD0_CMD_MARK, MOSI_IO0_B_MARK,
- SD0_DATA0_MARK, MISO_IO1_B_MARK, SD0_DATA1_MARK, IO2_B_MARK,
- SD0_DATA2_MARK, IO3_B_MARK, SD0_DATA3_MARK, SSL_B_MARK,
- SD0_CD_MARK, MMC_D6_B_MARK, SIM0_RST_B_MARK, CAN0_RX_F_MARK,
- SCIFA5_TXD_B_MARK, TX3_C_MARK,
- SD0_WP_MARK, MMC_D7_B_MARK, SIM0_D_B_MARK, CAN0_TX_F_MARK,
- SCIFA5_RXD_B_MARK, RX3_C_MARK,
- SD1_CMD_MARK, REMOCON_B_MARK, SD1_DATA0_MARK, SPEEDIN_B_MARK,
- SD1_DATA1_MARK, IETX_B_MARK, SD1_DATA2_MARK, IECLK_B_MARK,
- SD1_DATA3_MARK, IERX_B_MARK,
- SD1_CD_MARK, PWM0_MARK, TPU_TO0_MARK, SCL1_C_MARK,
-
- /* IPSR14 */
- SD1_WP_MARK, PWM1_B_MARK, SDA1_C_MARK,
- SD2_CLK_MARK, MMC_CLK_MARK, SD2_CMD_MARK, MMC_CMD_MARK,
- SD2_DATA0_MARK, MMC_D0_MARK, SD2_DATA1_MARK, MMC_D1_MARK,
- SD2_DATA2_MARK, MMC_D2_MARK, SD2_DATA3_MARK, MMC_D3_MARK,
- SD2_CD_MARK, MMC_D4_MARK, SCL8_C_MARK, TX5_B_MARK, SCIFA5_TXD_C_MARK,
- SD2_WP_MARK, MMC_D5_MARK, SDA8_C_MARK, RX5_B_MARK, SCIFA5_RXD_C_MARK,
- MSIOF0_SCK_MARK, RX2_C_MARK, ADIDATA_MARK,
- VI1_CLK_C_MARK, VI1_G0_B_MARK,
- MSIOF0_SYNC_MARK, TX2_C_MARK, ADICS_SAMP_MARK,
- VI1_CLKENB_C_MARK, VI1_G1_B_MARK,
- MSIOF0_TXD_MARK, ADICLK_MARK, VI1_FIELD_C_MARK, VI1_G2_B_MARK,
- MSIOF0_RXD_MARK, ADICHS0_MARK, VI1_DATA0_C_MARK, VI1_G3_B_MARK,
- MSIOF0_SS1_MARK, MMC_D6_MARK, ADICHS1_MARK, TX0_E_MARK,
- VI1_HSYNC_N_C_MARK, SCL7_C_MARK, VI1_G4_B_MARK,
- MSIOF0_SS2_MARK, MMC_D7_MARK, ADICHS2_MARK, RX0_E_MARK,
- VI1_VSYNC_N_C_MARK, SDA7_C_MARK, VI1_G5_B_MARK,
-
- /* IPSR15 */
- SIM0_RST_MARK, IETX_MARK, CAN1_TX_D_MARK,
- SIM0_CLK_MARK, IECLK_MARK, CAN_CLK_C_MARK,
- SIM0_D_MARK, IERX_MARK, CAN1_RX_D_MARK,
- GPS_CLK_MARK, DU1_DOTCLKIN_C_MARK, AUDIO_CLKB_B_MARK,
- PWM5_B_MARK, SCIFA3_TXD_C_MARK,
- GPS_SIGN_MARK, TX4_C_MARK, SCIFA4_TXD_C_MARK, PWM5_MARK,
- VI1_G6_B_MARK, SCIFA3_RXD_C_MARK,
- GPS_MAG_MARK, RX4_C_MARK, SCIFA4_RXD_C_MARK, PWM6_MARK,
- VI1_G7_B_MARK, SCIFA3_SCK_C_MARK,
- HCTS0_N_MARK, SCIFB0_CTS_N_MARK, GLO_I0_C_MARK,
- TCLK1_MARK, VI1_DATA1_C_MARK,
- HRTS0_N_MARK, SCIFB0_RTS_N_MARK, GLO_I1_C_MARK, VI1_DATA2_C_MARK,
- HSCK0_MARK, SCIFB0_SCK_MARK, GLO_Q0_C_MARK, CAN_CLK_MARK,
- TCLK2_MARK, VI1_DATA3_C_MARK,
- HRX0_MARK, SCIFB0_RXD_MARK, GLO_Q1_C_MARK,
- CAN0_RX_B_MARK, VI1_DATA4_C_MARK,
- HTX0_MARK, SCIFB0_TXD_MARK, GLO_SCLK_C_MARK,
- CAN0_TX_B_MARK, VI1_DATA5_C_MARK,
-
- /* IPSR16 */
- HRX1_MARK, SCIFB1_RXD_MARK, VI1_R0_B_MARK,
- GLO_SDATA_C_MARK, VI1_DATA6_C_MARK,
- HTX1_MARK, SCIFB1_TXD_MARK, VI1_R1_B_MARK,
- GLO_SS_C_MARK, VI1_DATA7_C_MARK,
- HSCK1_MARK, SCIFB1_SCK_MARK, MLB_CK_MARK, GLO_RFON_C_MARK,
- HCTS1_N_MARK, SCIFB1_CTS_N_MARK, MLB_SIG_MARK, CAN1_TX_B_MARK,
- HRTS1_N_MARK, SCIFB1_RTS_N_MARK, MLB_DAT_MARK, CAN1_RX_B_MARK,
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-
- PINMUX_DATA(EX_CS0_N_MARK, FN_EX_CS0_N),
- PINMUX_DATA(RD_N_MARK, FN_RD_N),
- PINMUX_DATA(AUDIO_CLKA_MARK, FN_AUDIO_CLKA),
- PINMUX_DATA(VI0_CLK_MARK, FN_VI0_CLK),
- PINMUX_DATA(VI0_DATA0_VI0_B0_MARK, FN_VI0_DATA0_VI0_B0),
- PINMUX_DATA(VI0_DATA0_VI0_B1_MARK, FN_VI0_DATA0_VI0_B1),
- PINMUX_DATA(VI0_DATA0_VI0_B2_MARK, FN_VI0_DATA0_VI0_B2),
- PINMUX_DATA(VI0_DATA0_VI0_B4_MARK, FN_VI0_DATA0_VI0_B4),
- PINMUX_DATA(VI0_DATA0_VI0_B5_MARK, FN_VI0_DATA0_VI0_B5),
- PINMUX_DATA(VI0_DATA0_VI0_B6_MARK, FN_VI0_DATA0_VI0_B6),
- PINMUX_DATA(VI0_DATA0_VI0_B7_MARK, FN_VI0_DATA0_VI0_B7),
- PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
- PINMUX_DATA(USB0_OVC_MARK, FN_USB0_OVC),
- PINMUX_DATA(USB1_PWEN_MARK, FN_USB1_PWEN),
-
- /* IPSR0 - 5 */
-
- /* IPSR6 */
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, AUDIO_CLKB, SEL_ADG_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, STP_OPWM_0_B, SEL_SSP_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, MSIOF1_SCK_B, SEL_SOF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK, SEL_SCIF_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_2_0, BPFCLK_E, SEL_FM_4),
- PINMUX_IPSR_DATA(IP6_5_3, AUDIO_CLKC),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCIFB0_SCK_C, SEL_SCIFB_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, MSIOF1_SYNC_B, SEL_SOF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, RX2, SEL_SCIF2_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCIFA2_RXD, SEL_SCIFA2_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, FMIN_E, SEL_FM_4),
- PINMUX_IPSR_DATA(IP6_7_6, AUDIO_CLKOUT),
- PINMUX_IPSR_MODSEL_DATA(IP6_7_6, MSIOF1_SS1_B, SEL_SOF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TX2, SEL_SCIF2_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_7_6, SCIFA2_TXD, SEL_SCIFA2_0),
- PINMUX_IPSR_DATA(IP6_9_8, IRQ0),
- PINMUX_IPSR_MODSEL_DATA(IP6_9_8, SCIFB1_RXD_D, SEL_SCIFB1_3),
- PINMUX_IPSR_DATA(IP6_9_8, INTC_IRQ0_N),
- PINMUX_IPSR_DATA(IP6_11_10, IRQ1),
- PINMUX_IPSR_MODSEL_DATA(IP6_11_10, SCIFB1_SCK_C, SEL_SCIFB1_2),
- PINMUX_IPSR_DATA(IP6_11_10, INTC_IRQ1_N),
- PINMUX_IPSR_DATA(IP6_13_12, IRQ2),
- PINMUX_IPSR_MODSEL_DATA(IP6_13_12, SCIFB1_TXD_D, SEL_SCIFB1_3),
- PINMUX_IPSR_DATA(IP6_13_12, INTC_IRQ2_N),
- PINMUX_IPSR_DATA(IP6_15_14, IRQ3),
- PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCL4_C, SEL_IIC4_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_15_14, MSIOF2_TXD_E, SEL_SOF2_4),
- PINMUX_IPSR_DATA(IP6_15_14, INTC_IRQ4_N),
- PINMUX_IPSR_DATA(IP6_18_16, IRQ4),
- PINMUX_IPSR_MODSEL_DATA(IP6_18_16, HRX1_C, SEL_HSCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_18_16, SDA4_C, SEL_IIC4_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_18_16, MSIOF2_RXD_E, SEL_SOF2_4),
- PINMUX_IPSR_DATA(IP6_18_16, INTC_IRQ4_N),
- PINMUX_IPSR_DATA(IP6_20_19, IRQ5),
- PINMUX_IPSR_MODSEL_DATA(IP6_20_19, HTX1_C, SEL_HSCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_20_19, SCL1_E, SEL_IIC1_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_20_19, MSIOF2_SCK_E, SEL_SOF2_4),
- PINMUX_IPSR_DATA(IP6_23_21, IRQ6),
- PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HSCK1_C, SEL_HSCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_23_21, MSIOF1_SS2_B, SEL_SOF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_23_21, SDA1_E, SEL_IIC1_4),
- PINMUX_IPSR_MODSEL_DATA(IP6_23_21, MSIOF2_SYNC_E, SEL_SOF2_4),
- PINMUX_IPSR_DATA(IP6_26_24, IRQ7),
- PINMUX_IPSR_MODSEL_DATA(IP6_26_24, HCTS1_N_C, SEL_HSCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_26_24, MSIOF1_TXD_B, SEL_SOF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_26_24, GPS_CLK_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_26_24, GPS_CLK_D, SEL_GPS_3),
- PINMUX_IPSR_DATA(IP6_29_27, IRQ8),
- PINMUX_IPSR_MODSEL_DATA(IP6_29_27, HRTS1_N_C, SEL_HSCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_29_27, MSIOF1_RXD_B, SEL_SOF1_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_29_27, GPS_SIGN_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_29_27, GPS_SIGN_D, SEL_GPS_3),
-
- /* IPSR7 - 10 */
-
- /* IPSR11 */
- PINMUX_IPSR_DATA(IP11_2_0, VI0_R5),
- PINMUX_IPSR_DATA(IP11_2_0, VI2_DATA6),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, GLO_SDATA_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, RX0_C, SEL_SCIF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SDA1_D, SEL_IIC1_3),
- PINMUX_IPSR_DATA(IP11_5_3, VI0_R6),
- PINMUX_IPSR_DATA(IP11_5_3, VI2_DATA7),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, GLO_SS_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, TX1_C, SEL_SCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCL4_B, SEL_IIC4_1),
- PINMUX_IPSR_DATA(IP11_8_6, VI0_R7),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, GLO_RFON_B, SEL_GPS_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, RX1_C, SEL_SCIF1_2),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, CAN0_RX_E, SEL_CAN0_4),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SDA4_B, SEL_IIC4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, HRX1_D, SEL_HSCIF1_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SCIFB0_RXD_D, SEL_SCIFB_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, VI1_HSYNC_N, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_11_9, AVB_RXD0),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TS_SDATA0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, TX4_B, SEL_SCIF4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SCIFA4_TXD_B, SEL_SCIFA4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, VI1_VSYNC_N, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_14_12, AVB_RXD1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, TS_SCK0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, RX4_B, SEL_SCIF4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_14_12, SCIFA4_RXD_B, SEL_SCIFA4_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_16_15, VI1_CLKENB, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_16_15, AVB_RXD2),
- PINMUX_IPSR_MODSEL_DATA(IP11_16_15, TS_SDEN0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_18_17, VI1_FIELD, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_18_17, AVB_RXD3),
- PINMUX_IPSR_MODSEL_DATA(IP11_18_17, TS_SPSYNC0_B, SEL_TSIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_19, VI1_CLK, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_19, AVB_RXD4),
- PINMUX_IPSR_MODSEL_DATA(IP11_20, VI1_DATA0, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_20, AVB_RXD5),
- PINMUX_IPSR_MODSEL_DATA(IP11_21, VI1_DATA1, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_21, AVB_RXD6),
- PINMUX_IPSR_MODSEL_DATA(IP11_22, VI1_DATA2, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_22, AVB_RXD7),
- PINMUX_IPSR_MODSEL_DATA(IP11_23, VI1_DATA3, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_23, AVB_RX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP11_24, VI1_DATA4, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_24, AVB_MDIO),
- PINMUX_IPSR_MODSEL_DATA(IP11_25, VI1_DATA5, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_25, AVB_RX_DV),
- PINMUX_IPSR_MODSEL_DATA(IP11_26, VI1_DATA6, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_26, AVB_MAGIC),
- PINMUX_IPSR_MODSEL_DATA(IP11_27, VI1_DATA7, SEL_VI1_0),
- PINMUX_IPSR_DATA(IP11_27, AVB_MDC),
- PINMUX_IPSR_DATA(IP11_29_28, ETH_MDIO),
- PINMUX_IPSR_DATA(IP11_29_28, AVB_RX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_28, SCL2_C, SEL_IIC2_2),
- PINMUX_IPSR_DATA(IP11_31_30, ETH_CRS_DV),
- PINMUX_IPSR_DATA(IP11_31_30, AVB_LINK),
- PINMUX_IPSR_MODSEL_DATA(IP11_31_30, SDA2_C, SEL_IIC2_2),
-
- /* IPSR12 */
- PINMUX_IPSR_DATA(IP12_1_0, ETH_RX_ER),
- PINMUX_IPSR_DATA(IP12_1_0, AVB_CRS),
- PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL3, SEL_IIC3_0),
- PINMUX_IPSR_MODSEL_DATA(IP12_1_0, SCL7, SEL_IIC7_0),
- PINMUX_IPSR_DATA(IP12_3_2, ETH_RXD0),
- PINMUX_IPSR_DATA(IP12_3_2, AVB_PHY_INT),
- PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA3, SEL_IIC3_0),
- PINMUX_IPSR_MODSEL_DATA(IP12_3_2, SDA7, SEL_IIC7_0),
- PINMUX_IPSR_DATA(IP12_6_4, ETH_RXD1),
- PINMUX_IPSR_DATA(IP12_6_4, AVB_GTXREFCLK),
- PINMUX_IPSR_MODSEL_DATA(IP12_6_4, CAN0_TX_C, SEL_CAN0_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_6_4, SCL2_D, SEL_IIC2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_6_4, MSIOF1_RXD_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_9_7, ETH_LINK),
- PINMUX_IPSR_DATA(IP12_9_7, AVB_TXD0),
- PINMUX_IPSR_MODSEL_DATA(IP12_9_7, CAN0_RX_C, SEL_CAN0_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_9_7, SDA2_D, SEL_IIC2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_9_7, MSIOF1_SCK_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_12_10, ETH_REFCLK),
- PINMUX_IPSR_DATA(IP12_12_10, AVB_TXD1),
- PINMUX_IPSR_MODSEL_DATA(IP12_12_10, SCIFA3_RXD_B, SEL_SCIFA3_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_12_10, CAN1_RX_C, SEL_CAN1_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_12_10, MSIOF1_SYNC_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_15_13, ETH_TXD1),
- PINMUX_IPSR_DATA(IP12_15_13, AVB_TXD2),
- PINMUX_IPSR_MODSEL_DATA(IP12_15_13, SCIFA3_TXD_B, SEL_SCIFA3_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_15_13, CAN1_TX_C, SEL_CAN1_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_15_13, MSIOF1_TXD_E, SEL_SOF1_4),
- PINMUX_IPSR_DATA(IP12_17_16, ETH_TX_EN),
- PINMUX_IPSR_DATA(IP12_17_16, AVB_TXD3),
- PINMUX_IPSR_MODSEL_DATA(IP12_17_16, TCLK1_B, SEL_TMU1_0),
- PINMUX_IPSR_MODSEL_DATA(IP12_17_16, CAN_CLK_B, SEL_CANCLK_1),
- PINMUX_IPSR_DATA(IP12_19_18, ETH_MAGIC),
- PINMUX_IPSR_DATA(IP12_19_18, AVB_TXD4),
- PINMUX_IPSR_MODSEL_DATA(IP12_19_18, IETX_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP12_21_20, ETH_TXD0),
- PINMUX_IPSR_DATA(IP12_21_20, AVB_TXD5),
- PINMUX_IPSR_MODSEL_DATA(IP12_21_20, IECLK_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP12_23_22, ETH_MDC),
- PINMUX_IPSR_DATA(IP12_23_22, AVB_TXD6),
- PINMUX_IPSR_MODSEL_DATA(IP12_23_22, IERX_C, SEL_IEB_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, STP_IVCXO27_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP12_26_24, AVB_TXD7),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, SCIFB2_TXD_D, SEL_SCIFB2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, ADIDATA_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_26_24, MSIOF0_SYNC_C, SEL_SOF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, STP_ISCLK_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP12_29_27, AVB_TX_EN),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, SCIFB2_RXD_D, SEL_SCIFB2_3),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, ADICS_SAMP_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP12_29_27, MSIOF0_SCK_C, SEL_SOF0_2),
-
- /* IPSR13 */
- PINMUX_IPSR_MODSEL_DATA(IP13_2_0, STP_ISD_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP13_2_0, AVB_TX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP13_2_0, SCIFB2_SCK_C, SEL_SCIFB2_2),
- PINMUX_IPSR_MODSEL_DATA(IP13_2_0, ADICLK_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_2_0, MSIOF0_SS1_C, SEL_SOF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP13_4_3, STP_ISEN_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP13_4_3, AVB_TX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP13_4_3, ADICHS0_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_4_3, MSIOF0_SS2_C, SEL_SOF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP13_6_5, STP_ISSYNC_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP13_6_5, AVB_COL),
- PINMUX_IPSR_MODSEL_DATA(IP13_6_5, ADICHS1_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_6_5, MSIOF0_RXD_C, SEL_SOF0_2),
- PINMUX_IPSR_MODSEL_DATA(IP13_9_7, STP_OPWM_0, SEL_SSP_0),
- PINMUX_IPSR_DATA(IP13_9_7, AVB_GTX_CLK),
- PINMUX_IPSR_DATA(IP13_9_7, PWM0_B),
- PINMUX_IPSR_MODSEL_DATA(IP13_9_7, ADICHS2_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_9_7, MSIOF0_TXD_C, SEL_SOF0_2),
- PINMUX_IPSR_DATA(IP13_10, SD0_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP13_10, SPCLK_B, SEL_QSP_1),
- PINMUX_IPSR_DATA(IP13_11, SD0_CMD),
- PINMUX_IPSR_MODSEL_DATA(IP13_11, MOSI_IO0_B, SEL_QSP_1),
- PINMUX_IPSR_DATA(IP13_12, SD0_DATA0),
- PINMUX_IPSR_MODSEL_DATA(IP13_12, MISO_IO1_B, SEL_QSP_1),
- PINMUX_IPSR_DATA(IP13_13, SD0_DATA1),
- PINMUX_IPSR_MODSEL_DATA(IP13_13, IO2_B, SEL_QSP_1),
- PINMUX_IPSR_DATA(IP13_14, SD0_DATA2),
- PINMUX_IPSR_MODSEL_DATA(IP13_14, IO3_B, SEL_QSP_1),
- PINMUX_IPSR_DATA(IP13_15, SD0_DATA3),
- PINMUX_IPSR_MODSEL_DATA(IP13_15, SSL_B, SEL_QSP_1),
- PINMUX_IPSR_DATA(IP13_18_16, SD0_CD),
- PINMUX_IPSR_MODSEL_DATA(IP13_18_16, MMC_D6_B, SEL_MMC_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SIM0_RST_B, SEL_SIM_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_18_16, CAN0_RX_F, SEL_CAN0_5),
- PINMUX_IPSR_MODSEL_DATA(IP13_18_16, SCIFA5_TXD_B, SEL_SCIFA5_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_18_16, TX3_C, SEL_SCIF3_2),
- PINMUX_IPSR_DATA(IP13_21_19, SD0_WP),
- PINMUX_IPSR_MODSEL_DATA(IP13_21_19, MMC_D7_B, SEL_MMC_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_21_19, SIM0_D_B, SEL_SIM_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_21_19, CAN0_TX_F, SEL_CAN0_5),
- PINMUX_IPSR_MODSEL_DATA(IP13_21_19, SCIFA5_RXD_B, SEL_SCIFA5_1),
- PINMUX_IPSR_MODSEL_DATA(IP13_21_19, RX3_C, SEL_SCIF3_2),
- PINMUX_IPSR_DATA(IP13_22, SD1_CMD),
- PINMUX_IPSR_MODSEL_DATA(IP13_22, REMOCON_B, SEL_RCN_1),
- PINMUX_IPSR_DATA(IP13_24_23, SD1_DATA0),
- PINMUX_IPSR_MODSEL_DATA(IP13_24_23, SPEEDIN_B, SEL_RSP_1),
- PINMUX_IPSR_DATA(IP13_25, SD1_DATA1),
- PINMUX_IPSR_MODSEL_DATA(IP13_25, IETX_B, SEL_IEB_1),
- PINMUX_IPSR_DATA(IP13_26, SD1_DATA2),
- PINMUX_IPSR_MODSEL_DATA(IP13_26, IECLK_B, SEL_IEB_1),
- PINMUX_IPSR_DATA(IP13_27, SD1_DATA3),
- PINMUX_IPSR_MODSEL_DATA(IP13_27, IERX_B, SEL_IEB_1),
- PINMUX_IPSR_DATA(IP13_30_28, SD1_CD),
- PINMUX_IPSR_DATA(IP13_30_28, PWM0),
- PINMUX_IPSR_DATA(IP13_30_28, TPU_TO0),
- PINMUX_IPSR_MODSEL_DATA(IP13_30_28, SCL1_C, SEL_IIC1_2),
-
- /* IPSR14 */
- PINMUX_IPSR_DATA(IP14_1_0, SD1_WP),
- PINMUX_IPSR_DATA(IP14_1_0, PWM1_B),
- PINMUX_IPSR_MODSEL_DATA(IP14_1_0, SDA1_C, SEL_IIC1_2),
- PINMUX_IPSR_DATA(IP14_2, SD2_CLK),
- PINMUX_IPSR_DATA(IP14_2, MMC_CLK),
- PINMUX_IPSR_DATA(IP14_3, SD2_CMD),
- PINMUX_IPSR_DATA(IP14_3, MMC_CMD),
- PINMUX_IPSR_DATA(IP14_4, SD2_DATA0),
- PINMUX_IPSR_DATA(IP14_4, MMC_D0),
- PINMUX_IPSR_DATA(IP14_5, SD2_DATA1),
- PINMUX_IPSR_DATA(IP14_5, MMC_D1),
- PINMUX_IPSR_DATA(IP14_6, SD2_DATA2),
- PINMUX_IPSR_DATA(IP14_6, MMC_D2),
- PINMUX_IPSR_DATA(IP14_7, SD2_DATA3),
- PINMUX_IPSR_DATA(IP14_7, MMC_D3),
- PINMUX_IPSR_DATA(IP14_10_8, SD2_CD),
- PINMUX_IPSR_DATA(IP14_10_8, MMC_D4),
- PINMUX_IPSR_MODSEL_DATA(IP14_10_8, SCL8_C, SEL_IIC8_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_10_8, TX5_B, SEL_SCIF5_1),
- PINMUX_IPSR_MODSEL_DATA(IP14_10_8, SCIFA5_TXD_C, SEL_SCIFA5_2),
- PINMUX_IPSR_DATA(IP14_13_11, SD2_WP),
- PINMUX_IPSR_DATA(IP14_13_11, MMC_D5),
- PINMUX_IPSR_MODSEL_DATA(IP14_13_11, SDA8_C, SEL_IIC8_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_13_11, RX5_B, SEL_SCIF5_1),
- PINMUX_IPSR_MODSEL_DATA(IP14_13_11, SCIFA5_RXD_C, SEL_SCIFA5_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_16_14, MSIOF0_SCK, SEL_SOF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_16_14, RX2_C, SEL_SCIF2_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_16_14, ADIDATA, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_16_14, VI1_CLK_C, SEL_VI1_2),
- PINMUX_IPSR_DATA(IP14_16_14, VI1_G0_B),
- PINMUX_IPSR_MODSEL_DATA(IP14_19_17, MSIOF0_SYNC, SEL_SOF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_19_17, TX2_C, SEL_SCIF2_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_19_17, ADICS_SAMP, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_19_17, VI1_CLKENB_C, SEL_VI1_2),
- PINMUX_IPSR_DATA(IP14_19_17, VI1_G1_B),
- PINMUX_IPSR_MODSEL_DATA(IP14_22_20, MSIOF0_TXD, SEL_SOF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_22_20, ADICLK, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_22_20, VI1_FIELD_C, SEL_VI1_2),
- PINMUX_IPSR_DATA(IP14_22_20, VI1_G2_B),
- PINMUX_IPSR_MODSEL_DATA(IP14_25_23, MSIOF0_RXD, SEL_SOF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_25_23, ADICHS0, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_25_23, VI1_DATA0_C, SEL_VI1_2),
- PINMUX_IPSR_DATA(IP14_25_23, VI1_G3_B),
- PINMUX_IPSR_MODSEL_DATA(IP14_28_26, MSIOF0_SS1, SEL_SOF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_28_26, MMC_D6, SEL_MMC_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_28_26, ADICHS1, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_28_26, TX0_E, SEL_SCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP14_28_26, VI1_HSYNC_N_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_28_26, SCL7_C, SEL_IIC7_2),
- PINMUX_IPSR_DATA(IP14_28_26, VI1_G4_B),
- PINMUX_IPSR_MODSEL_DATA(IP14_31_29, MSIOF0_SS2, SEL_SOF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_31_29, MMC_D7, SEL_MMC_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_31_29, ADICHS2, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP14_31_29, RX0_E, SEL_SCIF0_4),
- PINMUX_IPSR_MODSEL_DATA(IP14_31_29, VI1_VSYNC_N_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP14_31_29, SDA7_C, SEL_IIC7_2),
- PINMUX_IPSR_DATA(IP14_31_29, VI1_G5_B),
-
- /* IPSR15 */
- PINMUX_IPSR_MODSEL_DATA(IP15_1_0, SIM0_RST, SEL_SIM_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_1_0, IETX, SEL_IEB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_1_0, CAN1_TX_D, SEL_CAN1_3),
- PINMUX_IPSR_DATA(IP15_3_2, SIM0_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP15_3_2, IECLK, SEL_IEB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_3_2, CAN_CLK_C, SEL_CANCLK_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_5_4, SIM0_D, SEL_SIM_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_5_4, IERX, SEL_IEB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_5_4, CAN1_RX_D, SEL_CAN1_3),
- PINMUX_IPSR_MODSEL_DATA(IP15_8_6, GPS_CLK, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_8_6, DU1_DOTCLKIN_C, SEL_DIS_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_8_6, AUDIO_CLKB_B, SEL_ADG_1),
- PINMUX_IPSR_DATA(IP15_8_6, PWM5_B),
- PINMUX_IPSR_MODSEL_DATA(IP15_8_6, SCIFA3_TXD_C, SEL_SCIFA3_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_11_9, GPS_SIGN, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TX4_C, SEL_SCIF4_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SCIFA4_TXD_C, SEL_SCIFA4_2),
- PINMUX_IPSR_DATA(IP15_11_9, PWM5),
- PINMUX_IPSR_DATA(IP15_11_9, VI1_G6_B),
- PINMUX_IPSR_MODSEL_DATA(IP15_11_9, SCIFA3_RXD_C, SEL_SCIFA3_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_14_12, GPS_MAG, SEL_GPS_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_14_12, RX4_C, SEL_SCIF4_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_14_12, SCIFA4_RXD_C, SEL_SCIFA4_2),
- PINMUX_IPSR_DATA(IP15_14_12, PWM6),
- PINMUX_IPSR_DATA(IP15_14_12, VI1_G7_B),
- PINMUX_IPSR_MODSEL_DATA(IP15_14_12, SCIFA3_SCK_C, SEL_SCIFA3_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_17_15, HCTS0_N, SEL_HSCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_17_15, SCIFB0_CTS_N, SEL_SCIFB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_17_15, GLO_I0_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_17_15, TCLK1, SEL_TMU1_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_17_15, VI1_DATA1_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_20_18, HRTS0_N, SEL_HSCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_20_18, SCIFB0_RTS_N, SEL_SCIFB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_20_18, GLO_I1_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_20_18, VI1_DATA2_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_23_21, HSCK0, SEL_HSCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_23_21, SCIFB0_SCK, SEL_SCIFB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_23_21, GLO_Q0_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_23_21, CAN_CLK, SEL_CANCLK_0),
- PINMUX_IPSR_DATA(IP15_23_21, TCLK2),
- PINMUX_IPSR_MODSEL_DATA(IP15_23_21, VI1_DATA3_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_26_24, HRX0, SEL_HSCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_26_24, SCIFB0_RXD, SEL_SCIFB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_26_24, GLO_Q1_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_26_24, CAN0_RX_B, SEL_CAN0_1),
- PINMUX_IPSR_MODSEL_DATA(IP15_26_24, VI1_DATA4_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_29_27, HTX0, SEL_HSCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_29_27, SCIFB0_TXD, SEL_SCIFB_0),
- PINMUX_IPSR_MODSEL_DATA(IP15_29_27, GLO_SCLK_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP15_29_27, CAN0_TX_B, SEL_CAN0_1),
- PINMUX_IPSR_MODSEL_DATA(IP15_29_27, VI1_DATA5_C, SEL_VI1_2),
-
- /* IPSR16 */
- PINMUX_IPSR_MODSEL_DATA(IP16_2_0, HRX1, SEL_HSCIF1_0),
- PINMUX_IPSR_MODSEL_DATA(IP16_2_0, SCIFB1_RXD, SEL_SCIFB1_0),
- PINMUX_IPSR_DATA(IP16_2_0, VI1_R0_B),
- PINMUX_IPSR_MODSEL_DATA(IP16_2_0, GLO_SDATA_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP16_2_0, VI1_DATA6_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP16_5_3, HTX1, SEL_HSCIF1_0),
- PINMUX_IPSR_MODSEL_DATA(IP16_5_3, SCIFB1_TXD, SEL_SCIFB1_0),
- PINMUX_IPSR_DATA(IP16_5_3, VI1_R1_B),
- PINMUX_IPSR_MODSEL_DATA(IP16_5_3, GLO_SS_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP16_5_3, VI1_DATA7_C, SEL_VI1_2),
- PINMUX_IPSR_MODSEL_DATA(IP16_7_6, HSCK1, SEL_HSCIF1_0),
- PINMUX_IPSR_MODSEL_DATA(IP16_7_6, SCIFB1_SCK, SEL_SCIFB1_0),
- PINMUX_IPSR_DATA(IP16_7_6, MLB_CK),
- PINMUX_IPSR_MODSEL_DATA(IP16_7_6, GLO_RFON_C, SEL_GPS_2),
- PINMUX_IPSR_MODSEL_DATA(IP16_9_8, HCTS1_N, SEL_HSCIF1_0),
- PINMUX_IPSR_DATA(IP16_9_8, SCIFB1_CTS_N),
- PINMUX_IPSR_DATA(IP16_9_8, MLB_SIG),
- PINMUX_IPSR_MODSEL_DATA(IP16_9_8, CAN1_TX_B, SEL_CAN1_1),
- PINMUX_IPSR_MODSEL_DATA(IP16_11_10, HRTS1_N, SEL_HSCIF1_0),
- PINMUX_IPSR_DATA(IP16_11_10, SCIFB1_RTS_N),
- PINMUX_IPSR_DATA(IP16_11_10, MLB_DAT),
- PINMUX_IPSR_MODSEL_DATA(IP16_11_10, CAN1_RX_B, SEL_CAN1_1),
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- PINMUX_GPIO_GP_ALL(),
-
- GPIO_FN(EX_CS0_N), GPIO_FN(RD_N), GPIO_FN(AUDIO_CLKA),
- GPIO_FN(VI0_CLK), GPIO_FN(VI0_DATA0_VI0_B0),
- GPIO_FN(VI0_DATA0_VI0_B1), GPIO_FN(VI0_DATA0_VI0_B2),
- GPIO_FN(VI0_DATA0_VI0_B4), GPIO_FN(VI0_DATA0_VI0_B5),
- GPIO_FN(VI0_DATA0_VI0_B6), GPIO_FN(VI0_DATA0_VI0_B7),
- GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC), GPIO_FN(USB1_PWEN),
-
- /* IPSR0 - 5 */
-
- /* IPSR6 */
- GPIO_FN(AUDIO_CLKB), GPIO_FN(STP_OPWM_0_B), GPIO_FN(MSIOF1_SCK_B),
- GPIO_FN(SCIF_CLK), GPIO_FN(BPFCLK_E),
- GPIO_FN(AUDIO_CLKC), GPIO_FN(SCIFB0_SCK_C),
- GPIO_FN(MSIOF1_SYNC_B), GPIO_FN(RX2),
- GPIO_FN(SCIFA2_RXD), GPIO_FN(FMIN_E),
- GPIO_FN(AUDIO_CLKOUT), GPIO_FN(MSIOF1_SS1_B),
- GPIO_FN(TX2), GPIO_FN(SCIFA2_TXD),
- GPIO_FN(IRQ0), GPIO_FN(SCIFB1_RXD_D), GPIO_FN(INTC_IRQ0_N),
- GPIO_FN(IRQ1), GPIO_FN(SCIFB1_SCK_C), GPIO_FN(INTC_IRQ1_N),
- GPIO_FN(IRQ2), GPIO_FN(SCIFB1_TXD_D), GPIO_FN(INTC_IRQ2_N),
- GPIO_FN(IRQ3), GPIO_FN(SCL4_C),
- GPIO_FN(MSIOF2_TXD_E), GPIO_FN(INTC_IRQ3_N),
- GPIO_FN(IRQ4), GPIO_FN(HRX1_C), GPIO_FN(SDA4_C),
- GPIO_FN(MSIOF2_RXD_E), GPIO_FN(INTC_IRQ4_N),
- GPIO_FN(IRQ5), GPIO_FN(HTX1_C), GPIO_FN(SCL1_E), GPIO_FN(MSIOF2_SCK_E),
- GPIO_FN(IRQ6), GPIO_FN(HSCK1_C), GPIO_FN(MSIOF1_SS2_B),
- GPIO_FN(SDA1_E), GPIO_FN(MSIOF2_SYNC_E),
- GPIO_FN(IRQ7), GPIO_FN(HCTS1_N_C), GPIO_FN(MSIOF1_TXD_B),
- GPIO_FN(GPS_CLK_C), GPIO_FN(GPS_CLK_D),
- GPIO_FN(IRQ8), GPIO_FN(HRTS1_N_C), GPIO_FN(MSIOF1_RXD_B),
- GPIO_FN(GPS_SIGN_C), GPIO_FN(GPS_SIGN_D),
-
- /* IPSR7 - 10 */
-
- /* IPSR11 */
- GPIO_FN(VI0_R5), GPIO_FN(VI2_DATA6), GPIO_FN(GLO_SDATA_B),
- GPIO_FN(RX0_C), GPIO_FN(SDA1_D),
- GPIO_FN(VI0_R6), GPIO_FN(VI2_DATA7),
- GPIO_FN(GLO_SS_B), GPIO_FN(TX1_C), GPIO_FN(SCL4_B),
- GPIO_FN(VI0_R7), GPIO_FN(GLO_RFON_B),
- GPIO_FN(RX1_C), GPIO_FN(CAN0_RX_E),
- GPIO_FN(SDA4_B), GPIO_FN(HRX1_D), GPIO_FN(SCIFB0_RXD_D),
- GPIO_FN(VI1_HSYNC_N), GPIO_FN(AVB_RXD0), GPIO_FN(TS_SDATA0_B),
- GPIO_FN(TX4_B), GPIO_FN(SCIFA4_TXD_B),
- GPIO_FN(VI1_VSYNC_N), GPIO_FN(AVB_RXD1), GPIO_FN(TS_SCK0_B),
- GPIO_FN(RX4_B), GPIO_FN(SCIFA4_RXD_B),
- GPIO_FN(VI1_CLKENB), GPIO_FN(AVB_RXD2), GPIO_FN(TS_SDEN0_B),
- GPIO_FN(VI1_FIELD), GPIO_FN(AVB_RXD3), GPIO_FN(TS_SPSYNC0_B),
- GPIO_FN(VI1_CLK), GPIO_FN(AVB_RXD4),
- GPIO_FN(VI1_DATA0), GPIO_FN(AVB_RXD5),
- GPIO_FN(VI1_DATA1), GPIO_FN(AVB_RXD6),
- GPIO_FN(VI1_DATA2), GPIO_FN(AVB_RXD7),
- GPIO_FN(VI1_DATA3), GPIO_FN(AVB_RX_ER),
- GPIO_FN(VI1_DATA4), GPIO_FN(AVB_MDIO),
- GPIO_FN(VI1_DATA5), GPIO_FN(AVB_RX_DV),
- GPIO_FN(VI1_DATA6), GPIO_FN(AVB_MAGIC),
- GPIO_FN(VI1_DATA7), GPIO_FN(AVB_MDC),
- GPIO_FN(ETH_MDIO), GPIO_FN(AVB_RX_CLK), GPIO_FN(SCL2_C),
- GPIO_FN(ETH_CRS_DV), GPIO_FN(AVB_LINK), GPIO_FN(SDA2_C),
-
- /* IPSR12 */
- GPIO_FN(ETH_RX_ER), GPIO_FN(AVB_CRS), GPIO_FN(SCL3), GPIO_FN(SCL7),
- GPIO_FN(ETH_RXD0), GPIO_FN(AVB_PHY_INT), GPIO_FN(SDA3), GPIO_FN(SDA7),
- GPIO_FN(ETH_RXD1), GPIO_FN(AVB_GTXREFCLK), GPIO_FN(CAN0_TX_C),
- GPIO_FN(SCL2_D), GPIO_FN(MSIOF1_RXD_E),
- GPIO_FN(ETH_LINK), GPIO_FN(AVB_TXD0), GPIO_FN(CAN0_RX_C),
- GPIO_FN(SDA2_D), GPIO_FN(MSIOF1_SCK_E),
- GPIO_FN(ETH_REFCLK), GPIO_FN(AVB_TXD1), GPIO_FN(SCIFA3_RXD_B),
- GPIO_FN(CAN1_RX_C), GPIO_FN(MSIOF1_SYNC_E),
- GPIO_FN(ETH_TXD1), GPIO_FN(AVB_TXD2), GPIO_FN(SCIFA3_TXD_B),
- GPIO_FN(CAN1_TX_C), GPIO_FN(MSIOF1_TXD_E),
- GPIO_FN(ETH_TX_EN), GPIO_FN(AVB_TXD3),
- GPIO_FN(TCLK1_B), GPIO_FN(CAN_CLK_B),
- GPIO_FN(ETH_MAGIC), GPIO_FN(AVB_TXD4), GPIO_FN(IETX_C),
- GPIO_FN(ETH_TXD0), GPIO_FN(AVB_TXD5), GPIO_FN(IECLK_C),
- GPIO_FN(ETH_MDC), GPIO_FN(AVB_TXD6), GPIO_FN(IERX_C),
- GPIO_FN(STP_IVCXO27_0), GPIO_FN(AVB_TXD7), GPIO_FN(SCIFB2_TXD_D),
- GPIO_FN(ADIDATA_B), GPIO_FN(MSIOF0_SYNC_C),
- GPIO_FN(STP_ISCLK_0), GPIO_FN(AVB_TX_EN), GPIO_FN(SCIFB2_RXD_D),
- GPIO_FN(ADICS_SAMP_B), GPIO_FN(MSIOF0_SCK_C),
-
- /* IPSR13 */
- GPIO_FN(STP_ISD_0), GPIO_FN(AVB_TX_ER), GPIO_FN(SCIFB2_SCK_C),
- GPIO_FN(ADICLK_B), GPIO_FN(MSIOF0_SS1_C),
- GPIO_FN(STP_ISEN_0), GPIO_FN(AVB_TX_CLK),
- GPIO_FN(ADICHS0_B), GPIO_FN(MSIOF0_SS2_C),
- GPIO_FN(STP_ISSYNC_0), GPIO_FN(AVB_COL),
- GPIO_FN(ADICHS1_B), GPIO_FN(MSIOF0_RXD_C),
- GPIO_FN(STP_OPWM_0), GPIO_FN(AVB_GTX_CLK), GPIO_FN(PWM0_B),
- GPIO_FN(ADICHS2_B), GPIO_FN(MSIOF0_TXD_C),
- GPIO_FN(SD0_CLK), GPIO_FN(SPCLK_B),
- GPIO_FN(SD0_CMD), GPIO_FN(MOSI_IO0_B),
- GPIO_FN(SD0_DATA0), GPIO_FN(MISO_IO1_B),
- GPIO_FN(SD0_DATA1), GPIO_FN(IO2_B),
- GPIO_FN(SD0_DATA2), GPIO_FN(IO3_B), GPIO_FN(SD0_DATA3), GPIO_FN(SSL_B),
- GPIO_FN(SD0_CD), GPIO_FN(MMC_D6_B),
- GPIO_FN(SIM0_RST_B), GPIO_FN(CAN0_RX_F),
- GPIO_FN(SCIFA5_TXD_B), GPIO_FN(TX3_C),
- GPIO_FN(SD0_WP), GPIO_FN(MMC_D7_B),
- GPIO_FN(SIM0_D_B), GPIO_FN(CAN0_TX_F),
- GPIO_FN(SCIFA5_RXD_B), GPIO_FN(RX3_C),
- GPIO_FN(SD1_CMD), GPIO_FN(REMOCON_B),
- GPIO_FN(SD1_DATA0), GPIO_FN(SPEEDIN_B),
- GPIO_FN(SD1_DATA1), GPIO_FN(IETX_B),
- GPIO_FN(SD1_DATA2), GPIO_FN(IECLK_B),
- GPIO_FN(SD1_DATA3), GPIO_FN(IERX_B),
- GPIO_FN(SD1_CD), GPIO_FN(PWM0), GPIO_FN(TPU_TO0), GPIO_FN(SCL1_C),
-
- /* IPSR14 */
- GPIO_FN(SD1_WP), GPIO_FN(PWM1_B), GPIO_FN(SDA1_C),
- GPIO_FN(SD2_CLK), GPIO_FN(MMC_CLK), GPIO_FN(SD2_CMD), GPIO_FN(MMC_CMD),
- GPIO_FN(SD2_DATA0), GPIO_FN(MMC_D0),
- GPIO_FN(SD2_DATA1), GPIO_FN(MMC_D1),
- GPIO_FN(SD2_DATA2), GPIO_FN(MMC_D2),
- GPIO_FN(SD2_DATA3), GPIO_FN(MMC_D3),
- GPIO_FN(SD2_CD), GPIO_FN(MMC_D4), GPIO_FN(SCL8_C),
- GPIO_FN(TX5_B), GPIO_FN(SCIFA5_TXD_C),
- GPIO_FN(SD2_WP), GPIO_FN(MMC_D5), GPIO_FN(SDA8_C),
- GPIO_FN(RX5_B), GPIO_FN(SCIFA5_RXD_C),
- GPIO_FN(MSIOF0_SCK), GPIO_FN(RX2_C), GPIO_FN(ADIDATA),
- GPIO_FN(VI1_CLK_C), GPIO_FN(VI1_G0_B),
- GPIO_FN(MSIOF0_SYNC), GPIO_FN(TX2_C), GPIO_FN(ADICS_SAMP),
- GPIO_FN(VI1_CLKENB_C), GPIO_FN(VI1_G1_B),
- GPIO_FN(MSIOF0_TXD), GPIO_FN(ADICLK),
- GPIO_FN(VI1_FIELD_C), GPIO_FN(VI1_G2_B),
- GPIO_FN(MSIOF0_RXD), GPIO_FN(ADICHS0),
- GPIO_FN(VI1_DATA0_C), GPIO_FN(VI1_G3_B),
- GPIO_FN(MSIOF0_SS1), GPIO_FN(MMC_D6), GPIO_FN(ADICHS1), GPIO_FN(TX0_E),
- GPIO_FN(VI1_HSYNC_N_C), GPIO_FN(SCL7_C), GPIO_FN(VI1_G4_B),
- GPIO_FN(MSIOF0_SS2), GPIO_FN(MMC_D7), GPIO_FN(ADICHS2), GPIO_FN(RX0_E),
- GPIO_FN(VI1_VSYNC_N_C), GPIO_FN(SDA7_C), GPIO_FN(VI1_G5_B),
-
- /* IPSR15 */
- GPIO_FN(SIM0_RST), GPIO_FN(IETX), GPIO_FN(CAN1_TX_D),
- GPIO_FN(SIM0_CLK), GPIO_FN(IECLK), GPIO_FN(CAN_CLK_C),
- GPIO_FN(SIM0_D), GPIO_FN(IERX), GPIO_FN(CAN1_RX_D),
- GPIO_FN(GPS_CLK), GPIO_FN(DU1_DOTCLKIN_C), GPIO_FN(AUDIO_CLKB_B),
- GPIO_FN(PWM5_B), GPIO_FN(SCIFA3_TXD_C),
- GPIO_FN(GPS_SIGN), GPIO_FN(TX4_C),
- GPIO_FN(SCIFA4_TXD_C), GPIO_FN(PWM5),
- GPIO_FN(VI1_G6_B), GPIO_FN(SCIFA3_RXD_C),
- GPIO_FN(GPS_MAG), GPIO_FN(RX4_C), GPIO_FN(SCIFA4_RXD_C), GPIO_FN(PWM6),
- GPIO_FN(VI1_G7_B), GPIO_FN(SCIFA3_SCK_C),
- GPIO_FN(HCTS0_N), GPIO_FN(SCIFB0_CTS_N), GPIO_FN(GLO_I0_C),
- GPIO_FN(TCLK1), GPIO_FN(VI1_DATA1_C),
- GPIO_FN(HRTS0_N), GPIO_FN(SCIFB0_RTS_N),
- GPIO_FN(GLO_I1_C), GPIO_FN(VI1_DATA2_C),
- GPIO_FN(HSCK0), GPIO_FN(SCIFB0_SCK),
- GPIO_FN(GLO_Q0_C), GPIO_FN(CAN_CLK),
- GPIO_FN(TCLK2), GPIO_FN(VI1_DATA3_C),
- GPIO_FN(HRX0), GPIO_FN(SCIFB0_RXD), GPIO_FN(GLO_Q1_C),
- GPIO_FN(CAN0_RX_B), GPIO_FN(VI1_DATA4_C),
- GPIO_FN(HTX0), GPIO_FN(SCIFB0_TXD), GPIO_FN(GLO_SCLK_C),
- GPIO_FN(CAN0_TX_B), GPIO_FN(VI1_DATA5_C),
-
- /* IPSR16 */
- GPIO_FN(HRX1), GPIO_FN(SCIFB1_RXD), GPIO_FN(VI1_R0_B),
- GPIO_FN(GLO_SDATA_C), GPIO_FN(VI1_DATA6_C),
- GPIO_FN(HTX1), GPIO_FN(SCIFB1_TXD), GPIO_FN(VI1_R1_B),
- GPIO_FN(GLO_SS_C), GPIO_FN(VI1_DATA7_C),
- GPIO_FN(HSCK1), GPIO_FN(SCIFB1_SCK),
- GPIO_FN(MLB_CK), GPIO_FN(GLO_RFON_C),
- GPIO_FN(HCTS1_N), GPIO_FN(SCIFB1_CTS_N),
- GPIO_FN(MLB_SIG), GPIO_FN(CAN1_TX_B),
- GPIO_FN(HRTS1_N), GPIO_FN(SCIFB1_RTS_N),
- GPIO_FN(MLB_DAT), GPIO_FN(CAN1_RX_B),
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
- GP_0_31_FN, FN_IP1_22_20,
- GP_0_30_FN, FN_IP1_19_17,
- GP_0_29_FN, FN_IP1_16_14,
- GP_0_28_FN, FN_IP1_13_11,
- GP_0_27_FN, FN_IP1_10_8,
- GP_0_26_FN, FN_IP1_7_6,
- GP_0_25_FN, FN_IP1_5_4,
- GP_0_24_FN, FN_IP1_3_2,
- GP_0_23_FN, FN_IP1_1_0,
- GP_0_22_FN, FN_IP0_30_29,
- GP_0_21_FN, FN_IP0_28_27,
- GP_0_20_FN, FN_IP0_26_25,
- GP_0_19_FN, FN_IP0_24_23,
- GP_0_18_FN, FN_IP0_22_21,
- GP_0_17_FN, FN_IP0_20_19,
- GP_0_16_FN, FN_IP0_18_16,
- GP_0_15_FN, FN_IP0_15,
- GP_0_14_FN, FN_IP0_14,
- GP_0_13_FN, FN_IP0_13,
- GP_0_12_FN, FN_IP0_12,
- GP_0_11_FN, FN_IP0_11,
- GP_0_10_FN, FN_IP0_10,
- GP_0_9_FN, FN_IP0_9,
- GP_0_8_FN, FN_IP0_8,
- GP_0_7_FN, FN_IP0_7,
- GP_0_6_FN, FN_IP0_6,
- GP_0_5_FN, FN_IP0_5,
- GP_0_4_FN, FN_IP0_4,
- GP_0_3_FN, FN_IP0_3,
- GP_0_2_FN, FN_IP0_2,
- GP_0_1_FN, FN_IP0_1,
- GP_0_0_FN, FN_IP0_0, }
- },
- { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_25_FN, FN_IP3_21_20,
- GP_1_24_FN, FN_IP3_19_18,
- GP_1_23_FN, FN_IP3_17_16,
- GP_1_22_FN, FN_IP3_15_14,
- GP_1_21_FN, FN_IP3_13_12,
- GP_1_20_FN, FN_IP3_11_9,
- GP_1_19_FN, FN_RD_N,
- GP_1_18_FN, FN_IP3_8_6,
- GP_1_17_FN, FN_IP3_5_3,
- GP_1_16_FN, FN_IP3_2_0,
- GP_1_15_FN, FN_IP2_29_27,
- GP_1_14_FN, FN_IP2_26_25,
- GP_1_13_FN, FN_IP2_24_23,
- GP_1_12_FN, FN_EX_CS0_N,
- GP_1_11_FN, FN_IP2_22_21,
- GP_1_10_FN, FN_IP2_20_19,
- GP_1_9_FN, FN_IP2_18_16,
- GP_1_8_FN, FN_IP2_15_13,
- GP_1_7_FN, FN_IP2_12_10,
- GP_1_6_FN, FN_IP2_9_7,
- GP_1_5_FN, FN_IP2_6_5,
- GP_1_4_FN, FN_IP2_4_3,
- GP_1_3_FN, FN_IP2_2_0,
- GP_1_2_FN, FN_IP1_31_29,
- GP_1_1_FN, FN_IP1_28_26,
- GP_1_0_FN, FN_IP1_25_23, }
- },
- { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
- GP_2_31_FN, FN_IP6_7_6,
- GP_2_30_FN, FN_IP6_5_3,
- GP_2_29_FN, FN_IP6_2_0,
- GP_2_28_FN, FN_AUDIO_CLKA,
- GP_2_27_FN, FN_IP5_31_29,
- GP_2_26_FN, FN_IP5_28_26,
- GP_2_25_FN, FN_IP5_25_24,
- GP_2_24_FN, FN_IP5_23_22,
- GP_2_23_FN, FN_IP5_21_20,
- GP_2_22_FN, FN_IP5_19_17,
- GP_2_21_FN, FN_IP5_16_15,
- GP_2_20_FN, FN_IP5_14_12,
- GP_2_19_FN, FN_IP5_11_9,
- GP_2_18_FN, FN_IP5_8_6,
- GP_2_17_FN, FN_IP5_5_3,
- GP_2_16_FN, FN_IP5_2_0,
- GP_2_15_FN, FN_IP4_30_28,
- GP_2_14_FN, FN_IP4_27_26,
- GP_2_13_FN, FN_IP4_25_24,
- GP_2_12_FN, FN_IP4_23_22,
- GP_2_11_FN, FN_IP4_21,
- GP_2_10_FN, FN_IP4_20,
- GP_2_9_FN, FN_IP4_19,
- GP_2_8_FN, FN_IP4_18_16,
- GP_2_7_FN, FN_IP4_15_13,
- GP_2_6_FN, FN_IP4_12_10,
- GP_2_5_FN, FN_IP4_9_8,
- GP_2_4_FN, FN_IP4_7_5,
- GP_2_3_FN, FN_IP4_4_2,
- GP_2_2_FN, FN_IP4_1_0,
- GP_2_1_FN, FN_IP3_30_28,
- GP_2_0_FN, FN_IP3_27_25 }
- },
- { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
- GP_3_31_FN, FN_IP9_18_17,
- GP_3_30_FN, FN_IP9_16,
- GP_3_29_FN, FN_IP9_15_13,
- GP_3_28_FN, FN_IP9_12,
- GP_3_27_FN, FN_IP9_11,
- GP_3_26_FN, FN_IP9_10_8,
- GP_3_25_FN, FN_IP9_7,
- GP_3_24_FN, FN_IP9_6,
- GP_3_23_FN, FN_IP9_5_3,
- GP_3_22_FN, FN_IP9_2_0,
- GP_3_21_FN, FN_IP8_30_28,
- GP_3_20_FN, FN_IP8_27_26,
- GP_3_19_FN, FN_IP8_25_24,
- GP_3_18_FN, FN_IP8_23_21,
- GP_3_17_FN, FN_IP8_20_18,
- GP_3_16_FN, FN_IP8_17_15,
- GP_3_15_FN, FN_IP8_14_12,
- GP_3_14_FN, FN_IP8_11_9,
- GP_3_13_FN, FN_IP8_8_6,
- GP_3_12_FN, FN_IP8_5_3,
- GP_3_11_FN, FN_IP8_2_0,
- GP_3_10_FN, FN_IP7_29_27,
- GP_3_9_FN, FN_IP7_26_24,
- GP_3_8_FN, FN_IP7_23_21,
- GP_3_7_FN, FN_IP7_20_19,
- GP_3_6_FN, FN_IP7_18_17,
- GP_3_5_FN, FN_IP7_16_15,
- GP_3_4_FN, FN_IP7_14_13,
- GP_3_3_FN, FN_IP7_12_11,
- GP_3_2_FN, FN_IP7_10_9,
- GP_3_1_FN, FN_IP7_8_6,
- GP_3_0_FN, FN_IP7_5_3 }
- },
- { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
- GP_4_31_FN, FN_IP15_5_4,
- GP_4_30_FN, FN_IP15_3_2,
- GP_4_29_FN, FN_IP15_1_0,
- GP_4_28_FN, FN_IP11_8_6,
- GP_4_27_FN, FN_IP11_5_3,
- GP_4_26_FN, FN_IP11_2_0,
- GP_4_25_FN, FN_IP10_31_29,
- GP_4_24_FN, FN_IP10_28_27,
- GP_4_23_FN, FN_IP10_26_25,
- GP_4_22_FN, FN_IP10_24_22,
- GP_4_21_FN, FN_IP10_21_19,
- GP_4_20_FN, FN_IP10_18_17,
- GP_4_19_FN, FN_IP10_16_15,
- GP_4_18_FN, FN_IP10_14_12,
- GP_4_17_FN, FN_IP10_11_9,
- GP_4_16_FN, FN_IP10_8_6,
- GP_4_15_FN, FN_IP10_5_3,
- GP_4_14_FN, FN_IP10_2_0,
- GP_4_13_FN, FN_IP9_31_29,
- GP_4_12_FN, FN_VI0_DATA0_VI0_B7,
- GP_4_11_FN, FN_VI0_DATA0_VI0_B6,
- GP_4_10_FN, FN_VI0_DATA0_VI0_B5,
- GP_4_9_FN, FN_VI0_DATA0_VI0_B4,
- GP_4_8_FN, FN_IP9_28_27,
- GP_4_7_FN, FN_VI0_DATA0_VI0_B2,
- GP_4_6_FN, FN_VI0_DATA0_VI0_B1,
- GP_4_5_FN, FN_VI0_DATA0_VI0_B0,
- GP_4_4_FN, FN_IP9_26_25,
- GP_4_3_FN, FN_IP9_24_23,
- GP_4_2_FN, FN_IP9_22_21,
- GP_4_1_FN, FN_IP9_20_19,
- GP_4_0_FN, FN_VI0_CLK }
- },
- { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
- GP_5_31_FN, FN_IP3_24_22,
- GP_5_30_FN, FN_IP13_9_7,
- GP_5_29_FN, FN_IP13_6_5,
- GP_5_28_FN, FN_IP13_4_3,
- GP_5_27_FN, FN_IP13_2_0,
- GP_5_26_FN, FN_IP12_29_27,
- GP_5_25_FN, FN_IP12_26_24,
- GP_5_24_FN, FN_IP12_23_22,
- GP_5_23_FN, FN_IP12_21_20,
- GP_5_22_FN, FN_IP12_19_18,
- GP_5_21_FN, FN_IP12_17_16,
- GP_5_20_FN, FN_IP12_15_13,
- GP_5_19_FN, FN_IP12_12_10,
- GP_5_18_FN, FN_IP12_9_7,
- GP_5_17_FN, FN_IP12_6_4,
- GP_5_16_FN, FN_IP12_3_2,
- GP_5_15_FN, FN_IP12_1_0,
- GP_5_14_FN, FN_IP11_31_30,
- GP_5_13_FN, FN_IP11_29_28,
- GP_5_12_FN, FN_IP11_27,
- GP_5_11_FN, FN_IP11_26,
- GP_5_10_FN, FN_IP11_25,
- GP_5_9_FN, FN_IP11_24,
- GP_5_8_FN, FN_IP11_23,
- GP_5_7_FN, FN_IP11_22,
- GP_5_6_FN, FN_IP11_21,
- GP_5_5_FN, FN_IP11_20,
- GP_5_4_FN, FN_IP11_19,
- GP_5_3_FN, FN_IP11_18_17,
- GP_5_2_FN, FN_IP11_16_15,
- GP_5_1_FN, FN_IP11_14_12,
- GP_5_0_FN, FN_IP11_11_9 }
- },
- { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
- 0, 0,
- 0, 0,
- GP_6_29_FN, FN_IP14_31_29,
- GP_6_28_FN, FN_IP14_28_26,
- GP_6_27_FN, FN_IP14_25_23,
- GP_6_26_FN, FN_IP14_22_20,
- GP_6_25_FN, FN_IP14_19_17,
- GP_6_24_FN, FN_IP14_16_14,
- GP_6_23_FN, FN_IP14_13_11,
- GP_6_22_FN, FN_IP14_10_8,
- GP_6_21_FN, FN_IP14_7,
- GP_6_20_FN, FN_IP14_6,
- GP_6_19_FN, FN_IP14_5,
- GP_6_18_FN, FN_IP14_4,
- GP_6_17_FN, FN_IP14_3,
- GP_6_16_FN, FN_IP14_2,
- GP_6_15_FN, FN_IP14_1_0,
- GP_6_14_FN, FN_IP13_30_28,
- GP_6_13_FN, FN_IP13_27,
- GP_6_12_FN, FN_IP13_26,
- GP_6_11_FN, FN_IP13_25,
- GP_6_10_FN, FN_IP13_24_23,
- GP_6_9_FN, FN_IP13_22,
- 0, 0,
- GP_6_7_FN, FN_IP13_21_19,
- GP_6_6_FN, FN_IP13_18_16,
- GP_6_5_FN, FN_IP13_15,
- GP_6_4_FN, FN_IP13_14,
- GP_6_3_FN, FN_IP13_13,
- GP_6_2_FN, FN_IP13_12,
- GP_6_1_FN, FN_IP13_11,
- GP_6_0_FN, FN_IP13_10 }
- },
- { PINMUX_CFG_REG("GPSR7", 0xE6060074, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_7_25_FN, FN_USB1_PWEN,
- GP_7_24_FN, FN_USB0_OVC,
- GP_7_23_FN, FN_USB0_PWEN,
- GP_7_22_FN, FN_IP15_14_12,
- GP_7_21_FN, FN_IP15_11_9,
- GP_7_20_FN, FN_IP15_8_6,
- GP_7_19_FN, FN_IP7_2_0,
- GP_7_18_FN, FN_IP6_29_27,
- GP_7_17_FN, FN_IP6_26_24,
- GP_7_16_FN, FN_IP6_23_21,
- GP_7_15_FN, FN_IP6_20_19,
- GP_7_14_FN, FN_IP6_18_16,
- GP_7_13_FN, FN_IP6_15_14,
- GP_7_12_FN, FN_IP6_13_12,
- GP_7_11_FN, FN_IP6_11_10,
- GP_7_10_FN, FN_IP6_9_8,
- GP_7_9_FN, FN_IP16_11_10,
- GP_7_8_FN, FN_IP16_9_8,
- GP_7_7_FN, FN_IP16_7_6,
- GP_7_6_FN, FN_IP16_5_3,
- GP_7_5_FN, FN_IP16_2_0,
- GP_7_4_FN, FN_IP15_29_27,
- GP_7_3_FN, FN_IP15_26_24,
- GP_7_2_FN, FN_IP15_23_21,
- GP_7_1_FN, FN_IP15_20_18,
- GP_7_0_FN, FN_IP15_17_15 }
- },
-
- /* IPSR0 - 5 */
-
- { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
- 2, 3, 3, 3, 2, 3, 2, 2, 2, 2, 2, 3, 3) {
- /* IP6_31_30 [2] */
- 0, 0, 0, 0,
- /* IP6_29_27 [3] */
- FN_IRQ8, FN_HRTS1_N_C, FN_MSIOF1_RXD_B,
- FN_GPS_SIGN_C, FN_GPS_SIGN_D,
- 0, 0, 0,
- /* IP6_26_24 [3] */
- FN_IRQ7, FN_HCTS1_N_C, FN_MSIOF1_TXD_B,
- FN_GPS_CLK_C, FN_GPS_CLK_D,
- 0, 0, 0,
- /* IP6_23_21 [3] */
- FN_IRQ6, FN_HSCK1_C, FN_MSIOF1_SS2_B,
- FN_SDA1_E, FN_MSIOF2_SYNC_E,
- 0, 0, 0,
- /* IP6_20_19 [2] */
- FN_IRQ5, FN_HTX1_C, FN_SCL1_E, FN_MSIOF2_SCK_E,
- /* IP6_18_16 [3] */
- FN_IRQ4, FN_HRX1_C, FN_SDA4_C, FN_MSIOF2_RXD_E, FN_INTC_IRQ4_N,
- 0, 0, 0,
- /* IP6_15_14 [2] */
- FN_IRQ3, FN_SCL4_C, FN_MSIOF2_TXD_E, FN_INTC_IRQ3_N,
- /* IP6_13_12 [2] */
- FN_IRQ2, FN_SCIFB1_TXD_D, FN_INTC_IRQ2_N, 0,
- /* IP6_11_10 [2] */
- FN_IRQ1, FN_SCIFB1_SCK_C, FN_INTC_IRQ1_N, 0,
- /* IP6_9_8 [2] */
- FN_IRQ0, FN_SCIFB1_RXD_D, FN_INTC_IRQ0_N, 0,
- /* IP6_7_6 [2] */
- FN_AUDIO_CLKOUT, FN_MSIOF1_SS1_B, FN_TX2, FN_SCIFA2_TXD,
- /* IP6_5_3 [3] */
- FN_AUDIO_CLKC, FN_SCIFB0_SCK_C, FN_MSIOF1_SYNC_B, FN_RX2,
- FN_SCIFA2_RXD, FN_FMIN_E,
- 0, 0,
- /* IP6_2_0 [3] */
- FN_AUDIO_CLKB, FN_STP_OPWM_0_B, FN_MSIOF1_SCK_B,
- FN_SCIF_CLK, 0, FN_BPFCLK_E,
- 0, 0, }
- },
-
- /* IPSR7 - 10 */
-
- { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
- 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
- 3, 3, 3, 3, 3) {
- /* IP11_31_30 [2] */
- FN_ETH_CRS_DV, FN_AVB_LINK, FN_SDA2_C, 0,
- /* IP11_29_28 [2] */
- FN_ETH_MDIO, FN_AVB_RX_CLK, FN_SCL2_C, 0,
- /* IP11_27 [1] */
- FN_VI1_DATA7, FN_AVB_MDC,
- /* IP11_26 [1] */
- FN_VI1_DATA6, FN_AVB_MAGIC,
- /* IP11_25 [1] */
- FN_VI1_DATA5, FN_AVB_RX_DV,
- /* IP11_24 [1] */
- FN_VI1_DATA4, FN_AVB_MDIO,
- /* IP11_23 [1] */
- FN_VI1_DATA3, FN_AVB_RX_ER,
- /* IP11_22 [1] */
- FN_VI1_DATA2, FN_AVB_RXD7,
- /* IP11_21 [1] */
- FN_VI1_DATA1, FN_AVB_RXD6,
- /* IP11_20 [1] */
- FN_VI1_DATA0, FN_AVB_RXD5,
- /* IP11_19 [1] */
- FN_VI1_CLK, FN_AVB_RXD4,
- /* IP11_18_17 [2] */
- FN_VI1_FIELD, FN_AVB_RXD3, FN_TS_SPSYNC0_B, 0,
- /* IP11_16_15 [2] */
- FN_VI1_CLKENB, FN_AVB_RXD2, FN_TS_SDEN0_B, 0,
- /* IP11_14_12 [3] */
- FN_VI1_VSYNC_N, FN_AVB_RXD1, FN_TS_SCK0_B,
- FN_RX4_B, FN_SCIFA4_RXD_B,
- 0, 0, 0,
- /* IP11_11_9 [3] */
- FN_VI1_HSYNC_N, FN_AVB_RXD0, FN_TS_SDATA0_B,
- FN_TX4_B, FN_SCIFA4_TXD_B,
- 0, 0, 0,
- /* IP11_8_6 [3] */
- FN_VI0_R7, FN_GLO_RFON_B, FN_RX1_C, FN_CAN0_RX_E,
- FN_SDA4_B, FN_HRX1_D, FN_SCIFB0_RXD_D, 0,
- /* IP11_5_3 [3] */
- FN_VI0_R6, FN_VI2_DATA7, FN_GLO_SS_B, FN_TX1_C, FN_SCL4_B,
- 0, 0, 0,
- /* IP11_2_0 [3] */
- FN_VI0_R5, FN_VI2_DATA6, FN_GLO_SDATA_B, FN_RX0_C, FN_SDA1_D,
- 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060050, 32,
- 2, 3, 3, 2, 2, 2, 2, 3, 3, 3, 3, 2, 2) {
- /* IP12_31_30 [2] */
- 0, 0, 0, 0,
- /* IP12_29_27 [3] */
- FN_STP_ISCLK_0, FN_AVB_TX_EN, FN_SCIFB2_RXD_D,
- FN_ADICS_SAMP_B, FN_MSIOF0_SCK_C,
- 0, 0, 0,
- /* IP12_26_24 [3] */
- FN_STP_IVCXO27_0, FN_AVB_TXD7, FN_SCIFB2_TXD_D,
- FN_ADIDATA_B, FN_MSIOF0_SYNC_C,
- 0, 0, 0,
- /* IP12_23_22 [2] */
- FN_ETH_MDC, FN_AVB_TXD6, FN_IERX_C, 0,
- /* IP12_21_20 [2] */
- FN_ETH_TXD0, FN_AVB_TXD5, FN_IECLK_C, 0,
- /* IP12_19_18 [2] */
- FN_ETH_MAGIC, FN_AVB_TXD4, FN_IETX_C, 0,
- /* IP12_17_16 [2] */
- FN_ETH_TX_EN, FN_AVB_TXD3, FN_TCLK1_B, FN_CAN_CLK_B,
- /* IP12_15_13 [3] */
- FN_ETH_TXD1, FN_AVB_TXD2, FN_SCIFA3_TXD_B,
- FN_CAN1_TX_C, FN_MSIOF1_TXD_E,
- 0, 0, 0,
- /* IP12_12_10 [3] */
- FN_ETH_REFCLK, FN_AVB_TXD1, FN_SCIFA3_RXD_B,
- FN_CAN1_RX_C, FN_MSIOF1_SYNC_E,
- 0, 0, 0,
- /* IP12_9_7 [3] */
- FN_ETH_LINK, FN_AVB_TXD0, FN_CAN0_RX_C,
- FN_SDA2_D, FN_MSIOF1_SCK_E,
- 0, 0, 0,
- /* IP12_6_4 [3] */
- FN_ETH_RXD1, FN_AVB_GTXREFCLK, FN_CAN0_TX_C,
- FN_SCL2_D, FN_MSIOF1_RXD_E,
- 0, 0, 0,
- /* IP12_3_2 [2] */
- FN_ETH_RXD0, FN_AVB_PHY_INT, FN_SDA3, FN_SDA7,
- /* IP12_1_0 [2] */
- FN_ETH_RX_ER, FN_AVB_CRS, FN_SCL3, FN_SCL7, }
- },
- { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060054, 32,
- 1, 3, 1, 1, 1, 2, 1, 3, 3, 1, 1, 1, 1, 1, 1,
- 3, 2, 2, 3) {
- /* IP13_31 [1] */
- 0, 0,
- /* IP13_30_28 [3] */
- FN_SD1_CD, FN_PWM0, FN_TPU_TO0, FN_SCL1_C,
- 0, 0, 0, 0,
- /* IP13_27 [1] */
- FN_SD1_DATA3, FN_IERX_B,
- /* IP13_26 [1] */
- FN_SD1_DATA2, FN_IECLK_B,
- /* IP13_25 [1] */
- FN_SD1_DATA1, FN_IETX_B,
- /* IP13_24_23 [2] */
- FN_SD1_DATA0, FN_SPEEDIN_B, 0, 0,
- /* IP13_22 [1] */
- FN_SD1_CMD, FN_REMOCON_B,
- /* IP13_21_19 [3] */
- FN_SD0_WP, FN_MMC_D7_B, FN_SIM0_D_B, FN_CAN0_TX_F,
- FN_SCIFA5_RXD_B, FN_RX3_C,
- 0, 0,
- /* IP13_18_16 [3] */
- FN_SD0_CD, FN_MMC_D6_B, FN_SIM0_RST_B, FN_CAN0_RX_F,
- FN_SCIFA5_TXD_B, FN_TX3_C,
- 0, 0,
- /* IP13_15 [1] */
- FN_SD0_DATA3, FN_SSL_B,
- /* IP13_14 [1] */
- FN_SD0_DATA2, FN_IO3_B,
- /* IP13_13 [1] */
- FN_SD0_DATA1, FN_IO2_B,
- /* IP13_12 [1] */
- FN_SD0_DATA0, FN_MISO_IO1_B,
- /* IP13_11 [1] */
- FN_SD0_CMD, FN_MOSI_IO0_B,
- /* IP13_10 [1] */
- FN_SD0_CLK, FN_SPCLK_B,
- /* IP13_9_7 [3] */
- FN_STP_OPWM_0, FN_AVB_GTX_CLK, FN_PWM0_B,
- FN_ADICHS2_B, FN_MSIOF0_TXD_C,
- 0, 0, 0,
- /* IP13_6_5 [2] */
- FN_STP_ISSYNC_0, FN_AVB_COL, FN_ADICHS1_B, FN_MSIOF0_RXD_C,
- /* IP13_4_3 [2] */
- FN_STP_ISEN_0, FN_AVB_TX_CLK, FN_ADICHS0_B, FN_MSIOF0_SS2_C,
- /* IP13_2_0 [3] */
- FN_STP_ISD_0, FN_AVB_TX_ER, FN_SCIFB2_SCK_C,
- FN_ADICLK_B, FN_MSIOF0_SS1_C,
- 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060058, 32,
- 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 2) {
- /* IP14_31_29 [3] */
- FN_MSIOF0_SS2, FN_MMC_D7, FN_ADICHS2, FN_RX0_E,
- FN_VI1_VSYNC_N_C, FN_SDA7_C, FN_VI1_G5_B, 0,
- /* IP14_28_26 [3] */
- FN_MSIOF0_SS1, FN_MMC_D6, FN_ADICHS1, FN_TX0_E,
- FN_VI1_HSYNC_N_C, FN_SCL7_C, FN_VI1_G4_B, 0,
- /* IP14_25_23 [3] */
- FN_MSIOF0_RXD, FN_ADICHS0, 0, FN_VI1_DATA0_C, FN_VI1_G3_B,
- 0, 0, 0,
- /* IP14_22_20 [3] */
- FN_MSIOF0_TXD, FN_ADICLK, 0, FN_VI1_FIELD_C, FN_VI1_G2_B,
- 0, 0, 0,
- /* IP14_19_17 [3] */
- FN_MSIOF0_SYNC, FN_TX2_C, FN_ADICS_SAMP, 0,
- FN_VI1_CLKENB_C, FN_VI1_G1_B,
- 0, 0,
- /* IP14_16_14 [3] */
- FN_MSIOF0_SCK, FN_RX2_C, FN_ADIDATA, 0,
- FN_VI1_CLK_C, FN_VI1_G0_B,
- 0, 0,
- /* IP14_13_11 [3] */
- FN_SD2_WP, FN_MMC_D5, FN_SDA8_C, FN_RX5_B, FN_SCIFA5_RXD_C,
- 0, 0, 0,
- /* IP14_10_8 [3] */
- FN_SD2_CD, FN_MMC_D4, FN_SCL8_C, FN_TX5_B, FN_SCIFA5_TXD_C,
- 0, 0, 0,
- /* IP14_7 [1] */
- FN_SD2_DATA3, FN_MMC_D3,
- /* IP14_6 [1] */
- FN_SD2_DATA2, FN_MMC_D2,
- /* IP14_5 [1] */
- FN_SD2_DATA1, FN_MMC_D1,
- /* IP14_4 [1] */
- FN_SD2_DATA0, FN_MMC_D0,
- /* IP14_3 [1] */
- FN_SD2_CMD, FN_MMC_CMD,
- /* IP14_2 [1] */
- FN_SD2_CLK, FN_MMC_CLK,
- /* IP14_1_0 [2] */
- FN_SD1_WP, FN_PWM1_B, FN_SDA1_C, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR15", 0xE606005C, 32,
- 2, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2) {
- /* IP15_31_30 [2] */
- 0, 0, 0, 0,
- /* IP15_29_27 [3] */
- FN_HTX0, FN_SCIFB0_TXD, 0, FN_GLO_SCLK_C,
- FN_CAN0_TX_B, FN_VI1_DATA5_C,
- 0, 0,
- /* IP15_26_24 [3] */
- FN_HRX0, FN_SCIFB0_RXD, 0, FN_GLO_Q1_C,
- FN_CAN0_RX_B, FN_VI1_DATA4_C,
- 0, 0,
- /* IP15_23_21 [3] */
- FN_HSCK0, FN_SCIFB0_SCK, 0, FN_GLO_Q0_C, FN_CAN_CLK,
- FN_TCLK2, FN_VI1_DATA3_C, 0,
- /* IP15_20_18 [3] */
- FN_HRTS0_N, FN_SCIFB0_RTS_N, 0, FN_GLO_I1_C, FN_VI1_DATA2_C,
- 0, 0, 0,
- /* IP15_17_15 [3] */
- FN_HCTS0_N, FN_SCIFB0_CTS_N, 0, FN_GLO_I0_C,
- FN_TCLK1, FN_VI1_DATA1_C,
- 0, 0,
- /* IP15_14_12 [3] */
- FN_GPS_MAG, FN_RX4_C, FN_SCIFA4_RXD_C, FN_PWM6,
- FN_VI1_G7_B, FN_SCIFA3_SCK_C,
- 0, 0,
- /* IP15_11_9 [3] */
- FN_GPS_SIGN, FN_TX4_C, FN_SCIFA4_TXD_C, FN_PWM5,
- FN_VI1_G6_B, FN_SCIFA3_RXD_C,
- 0, 0,
- /* IP15_8_6 [3] */
- FN_GPS_CLK, FN_DU1_DOTCLKIN_C, FN_AUDIO_CLKB_B,
- FN_PWM5_B, FN_SCIFA3_TXD_C,
- 0, 0, 0,
- /* IP15_5_4 [2] */
- FN_SIM0_D, FN_IERX, FN_CAN1_RX_D, 0,
- /* IP15_3_2 [2] */
- FN_SIM0_CLK, FN_IECLK, FN_CAN_CLK_C, 0,
- /* IP15_1_0 [2] */
- FN_SIM0_RST, FN_IETX, FN_CAN1_TX_D, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060160, 32,
- 4, 4, 4, 4, 4, 2, 2, 2, 3, 3) {
- /* IP16_31_28 [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* IP16_27_24 [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* IP16_23_20 [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* IP16_19_16 [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* IP16_15_12 [4] */
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- /* IP16_11_10 [2] */
- FN_HRTS1_N, FN_SCIFB1_RTS_N, FN_MLB_DAT, FN_CAN1_RX_B,
- /* IP16_9_8 [2] */
- FN_HCTS1_N, FN_SCIFB1_CTS_N, FN_MLB_SIG, FN_CAN1_TX_B,
- /* IP16_7_6 [2] */
- FN_HSCK1, FN_SCIFB1_SCK, FN_MLB_CK, FN_GLO_RFON_C,
- /* IP16_5_3 [3] */
- FN_HTX1, FN_SCIFB1_TXD, FN_VI1_R1_B,
- FN_GLO_SS_C, FN_VI1_DATA7_C,
- 0, 0, 0,
- /* IP16_2_0 [3] */
- FN_HRX1, FN_SCIFB1_RXD, FN_VI1_R0_B,
- FN_GLO_SDATA_C, FN_VI1_DATA6_C,
- 0, 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
- 1, 2, 2, 2, 3, 2, 1, 1, 1, 1,
- 3, 2, 2, 2, 1, 2, 2, 2) {
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SCIF1 [2] */
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
- /* SEL_SCIFB [2] */
- FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2, FN_SEL_SCIFB_3,
- /* SEL_SCIFB2 [2] */
- FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1,
- FN_SEL_SCIFB2_2, FN_SEL_SCIFB2_3,
- /* SEL_SCIFB1 [3] */
- FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1,
- FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
- 0, 0, 0, 0,
- /* SEL_SCIFA1 [2] */
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0,
- /* SEL_SSI9 [1] */
- FN_SEL_SSI9_0, FN_SEL_SSI9_1,
- /* SEL_SCFA [1] */
- FN_SEL_SCFA_0, FN_SEL_SCFA_1,
- /* SEL_QSP [1] */
- FN_SEL_QSP_0, FN_SEL_QSP_1,
- /* SEL_SSI7 [1] */
- FN_SEL_SSI7_0, FN_SEL_SSI7_1,
- /* SEL_HSCIF1 [3] */
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_HSCIF1_2,
- FN_SEL_HSCIF1_3, FN_SEL_HSCIF1_4,
- 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_VI1 [2] */
- FN_SEL_VI1_0, FN_SEL_VI1_1, FN_SEL_VI1_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_TMU [1] */
- FN_SEL_TMU1_0, FN_SEL_TMU1_1,
- /* SEL_LBS [2] */
- FN_SEL_LBS_0, FN_SEL_LBS_1, FN_SEL_LBS_2, FN_SEL_LBS_3,
- /* SEL_TSIF0 [2] */
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- /* SEL_SOF0 [2] */
- FN_SEL_SOF0_0, FN_SEL_SOF0_1, FN_SEL_SOF0_2, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
- 3, 1, 1, 3, 2, 1, 1, 2, 2,
- 1, 3, 2, 1, 2, 2, 2, 1, 1, 1) {
- /* SEL_SCIF0 [3] */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2,
- FN_SEL_SCIF0_3, FN_SEL_SCIF0_4,
- 0, 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SCIF [1] */
- FN_SEL_SCIF_0, FN_SEL_SCIF_1,
- /* SEL_CAN0 [3] */
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- FN_SEL_CAN0_4, FN_SEL_CAN0_5,
- 0, 0,
- /* SEL_CAN1 [2] */
- FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SCIFA2 [1] */
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
- /* SEL_SCIF4 [2] */
- FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_ADG [1] */
- FN_SEL_ADG_0, FN_SEL_ADG_1,
- /* SEL_FM [3] */
- FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2,
- FN_SEL_FM_3, FN_SEL_FM_4,
- 0, 0, 0,
- /* SEL_SCIFA5 [2] */
- FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_GPS [2] */
- FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
- /* SEL_SCIFA4 [2] */
- FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2, 0,
- /* SEL_SCIFA3 [2] */
- FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA3_2, 0,
- /* SEL_SIM [1] */
- FN_SEL_SIM_0, FN_SEL_SIM_1,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SSI8 [1] */
- FN_SEL_SSI8_0, FN_SEL_SSI8_1, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
- 2, 2, 2, 2, 2, 2, 2, 2,
- 1, 1, 2, 2, 3, 2, 2, 2, 1) {
- /* SEL_HSCIF2 [2] */
- FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
- FN_SEL_HSCIF2_2, FN_SEL_HSCIF2_3,
- /* SEL_CANCLK [2] */
- FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
- FN_SEL_CANCLK_2, FN_SEL_CANCLK_3,
- /* SEL_IIC8 [2] */
- FN_SEL_IIC8_0, FN_SEL_IIC8_1, FN_SEL_IIC8_2, 0,
- /* SEL_IIC7 [2] */
- FN_SEL_IIC7_0, FN_SEL_IIC7_1, FN_SEL_IIC7_2, 0,
- /* SEL_IIC4 [2] */
- FN_SEL_IIC4_0, FN_SEL_IIC4_1, FN_SEL_IIC4_2, 0,
- /* SEL_IIC3 [2] */
- FN_SEL_IIC3_0, FN_SEL_IIC3_1, FN_SEL_IIC3_2, FN_SEL_IIC3_3,
- /* SEL_SCIF3 [2] */
- FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
- /* SEL_IEB [2] */
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
- /* SEL_MMC [1] */
- FN_SEL_MMC_0, FN_SEL_MMC_1,
- /* SEL_SCIF5 [1] */
- FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_IIC2 [2] */
- FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
- /* SEL_IIC1 [3] */
- FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2, FN_SEL_IIC1_3,
- FN_SEL_IIC1_4,
- 0, 0, 0,
- /* SEL_IIC0 [2] */
- FN_SEL_IIC0_0, FN_SEL_IIC0_1, FN_SEL_IIC0_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [1] */
- 0, 0, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL4", 0xE606009C, 32,
- 3, 2, 2, 1, 1, 1, 1, 3, 2,
- 2, 3, 1, 1, 1, 2, 2, 2, 2) {
- /* SEL_SOF1 [3] */
- FN_SEL_SOF1_0, FN_SEL_SOF1_1, FN_SEL_SOF1_2, FN_SEL_SOF1_3,
- FN_SEL_SOF1_4,
- 0, 0, 0,
- /* SEL_HSCIF0 [2] */
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, 0,
- /* SEL_DIS [2] */
- FN_SEL_DIS_0, FN_SEL_DIS_1, FN_SEL_DIS_2, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_RAD [1] */
- FN_SEL_RAD_0, FN_SEL_RAD_1,
- /* SEL_RCN [1] */
- FN_SEL_RCN_0, FN_SEL_RCN_1,
- /* SEL_RSP [1] */
- FN_SEL_RSP_0, FN_SEL_RSP_1,
- /* SEL_SCIF2 [3] */
- FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,
- FN_SEL_SCIF2_3, FN_SEL_SCIF2_4,
- 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* SEL_SOF2 [3] */
- FN_SEL_SOF2_0, FN_SEL_SOF2_1, FN_SEL_SOF2_2,
- FN_SEL_SOF2_3, FN_SEL_SOF2_4,
- 0, 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* SEL_SSI1 [1] */
- FN_SEL_SSI1_0, FN_SEL_SSI1_1,
- /* SEL_SSI0 [1] */
- FN_SEL_SSI0_0, FN_SEL_SSI0_1,
- /* SEL_SSP [2] */
- FN_SEL_SSP_0, FN_SEL_SSP_1, FN_SEL_SSP_2, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0,
- /* RESEVED [2] */
- 0, 0, 0, 0, }
- },
- { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
- { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_25_IN, GP_1_25_OUT,
- GP_1_24_IN, GP_1_24_OUT,
- GP_1_23_IN, GP_1_23_OUT,
- GP_1_22_IN, GP_1_22_OUT,
- GP_1_21_IN, GP_1_21_OUT,
- GP_1_20_IN, GP_1_20_OUT,
- GP_1_19_IN, GP_1_19_OUT,
- GP_1_18_IN, GP_1_18_OUT,
- GP_1_17_IN, GP_1_17_OUT,
- GP_1_16_IN, GP_1_16_OUT,
- GP_1_15_IN, GP_1_15_OUT,
- GP_1_14_IN, GP_1_14_OUT,
- GP_1_13_IN, GP_1_13_OUT,
- GP_1_12_IN, GP_1_12_OUT,
- GP_1_11_IN, GP_1_11_OUT,
- GP_1_10_IN, GP_1_10_OUT,
- GP_1_9_IN, GP_1_9_OUT,
- GP_1_8_IN, GP_1_8_OUT,
- GP_1_7_IN, GP_1_7_OUT,
- GP_1_6_IN, GP_1_6_OUT,
- GP_1_5_IN, GP_1_5_OUT,
- GP_1_4_IN, GP_1_4_OUT,
- GP_1_3_IN, GP_1_3_OUT,
- GP_1_2_IN, GP_1_2_OUT,
- GP_1_1_IN, GP_1_1_OUT,
- GP_1_0_IN, GP_1_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
- { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
- { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
- { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
- { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { GP_INOUTSEL(6) } },
- { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_7_25_IN, GP_7_25_OUT,
- GP_7_24_IN, GP_7_24_OUT,
- GP_7_23_IN, GP_7_23_OUT,
- GP_7_22_IN, GP_7_22_OUT,
- GP_7_21_IN, GP_7_21_OUT,
- GP_7_20_IN, GP_7_20_OUT,
- GP_7_19_IN, GP_7_19_OUT,
- GP_7_18_IN, GP_7_18_OUT,
- GP_7_17_IN, GP_7_17_OUT,
- GP_7_16_IN, GP_7_16_OUT,
- GP_7_15_IN, GP_7_15_OUT,
- GP_7_14_IN, GP_7_14_OUT,
- GP_7_13_IN, GP_7_13_OUT,
- GP_7_12_IN, GP_7_12_OUT,
- GP_7_11_IN, GP_7_11_OUT,
- GP_7_10_IN, GP_7_10_OUT,
- GP_7_9_IN, GP_7_9_OUT,
- GP_7_8_IN, GP_7_8_OUT,
- GP_7_7_IN, GP_7_7_OUT,
- GP_7_6_IN, GP_7_6_OUT,
- GP_7_5_IN, GP_7_5_OUT,
- GP_7_4_IN, GP_7_4_OUT,
- GP_7_3_IN, GP_7_3_OUT,
- GP_7_2_IN, GP_7_2_OUT,
- GP_7_1_IN, GP_7_1_OUT,
- GP_7_0_IN, GP_7_0_OUT, }
- },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
- { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
- 0, 0, 0, 0,
- 0, 0, GP_1_25_DATA, GP_1_24_DATA,
- GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
- GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
- GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
- GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
- GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
- GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
- },
- { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
- { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
- { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
- { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } },
- { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { GP_INDT(6) } },
- { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
- 0, 0, 0, 0,
- 0, 0, GP_7_25_DATA, GP_7_24_DATA,
- GP_7_23_DATA, GP_7_22_DATA, GP_7_21_DATA, GP_7_20_DATA,
- GP_7_19_DATA, GP_7_18_DATA, GP_7_17_DATA, GP_7_16_DATA,
- GP_7_15_DATA, GP_7_14_DATA, GP_7_13_DATA, GP_7_12_DATA,
- GP_7_11_DATA, GP_7_10_DATA, GP_7_9_DATA, GP_7_8_DATA,
- GP_7_7_DATA, GP_7_6_DATA, GP_7_5_DATA, GP_7_4_DATA,
- GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
- },
- { },
-};
-
-static struct pinmux_info r8a7793_pinmux_info = {
- .name = "r8a7793_pfc",
-
- .unlock_reg = 0xe6060000, /* PMMR */
-
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_CAN1_RX_B,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void r8a7793_pinmux_init(void)
-{
- register_pinmux(&r8a7793_pinmux_info);
-}
diff --git a/arch/arm/mach-rmobile/pfc-r8a7794.c b/arch/arm/mach-rmobile/pfc-r8a7794.c
deleted file mode 100644
index 13bf97b..0000000
--- a/arch/arm/mach-rmobile/pfc-r8a7794.c
+++ /dev/null
@@ -1,1650 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * arch/arm/cpu/armv7/rmobile/pfc-r8a7794.c
- * This file is r8a7794 processor support - PFC hardware block.
- *
- * Copyright (C) 2014 Renesas Electronics Corporation
- */
-
-#include <common.h>
-#include <sh_pfc.h>
-#include <asm/gpio.h>
-
-#define CPU_32_PORT(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
- PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
- PORT_1(fn, pfx##31, sfx)
-
-#define CPU_26_PORT(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
- PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
- PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
- PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx)
-
-#define CPU_28_PORT(fn, pfx, sfx) \
- PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
- PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \
- PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \
- PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx), \
- PORT_1(fn, pfx##26, sfx), PORT_1(fn, pfx##27, sfx)
-
-/*
- * GP_0_0_DATA -> GP_6_25_DATA
- * (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30],GP1[31]
- * GP5[28],GP5[29]),GP5[30],GP5[31],GP6[26],GP6[27],GP6[28],
- * GP6[29]),GP6[30],GP6[31])
- */
-#define CPU_ALL_PORT(fn, pfx, sfx) \
- CPU_32_PORT(fn, pfx##_0_, sfx), \
- CPU_26_PORT(fn, pfx##_1_, sfx), \
- CPU_32_PORT(fn, pfx##_2_, sfx), \
- CPU_32_PORT(fn, pfx##_3_, sfx), \
- CPU_32_PORT(fn, pfx##_4_, sfx), \
- CPU_28_PORT(fn, pfx##_5_, sfx), \
- CPU_26_PORT(fn, pfx##_6_, sfx)
-
-#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
-#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
- GP##pfx##_IN, GP##pfx##_OUT)
-
-#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
-#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
-
-#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
-#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
-#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
-
-
-#define PORT_10_REV(fn, pfx, sfx) \
- PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
- PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
- PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
- PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
- PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
-
-#define CPU_32_PORT_REV(fn, pfx, sfx) \
- PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
- PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
- PORT_10_REV(fn, pfx, sfx)
-
-#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
-#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
-
-#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
-#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
- FN_##ipsr, FN_##fn)
-
-enum {
- PINMUX_RESERVED = 0,
-
- PINMUX_DATA_BEGIN,
- GP_ALL(DATA),
- PINMUX_DATA_END,
-
- PINMUX_INPUT_BEGIN,
- GP_ALL(IN),
- PINMUX_INPUT_END,
-
- PINMUX_OUTPUT_BEGIN,
- GP_ALL(OUT),
- PINMUX_OUTPUT_END,
-
- PINMUX_FUNCTION_BEGIN,
- GP_ALL(FN),
-
- /* GPSR0 */
- FN_IP0_23_22, FN_IP0_24, FN_IP0_25, FN_IP0_27_26, FN_IP0_29_28,
- FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4, FN_IP1_7_6,
- FN_IP1_10_8, FN_IP1_12_11, FN_IP1_14_13, FN_IP1_17_15, FN_IP1_19_18,
- FN_IP1_21_20, FN_IP1_23_22, FN_IP1_24, FN_A2, FN_IP1_26, FN_IP1_27,
- FN_IP1_29_28, FN_IP1_31_30, FN_IP2_1_0, FN_IP2_3_2, FN_IP2_5_4,
- FN_IP2_7_6, FN_IP2_9_8, FN_IP2_11_10, FN_IP2_13_12, FN_IP2_15_14,
- FN_IP2_17_16,
-
- /* GPSR1 */
- FN_IP2_20_18, FN_IP2_23_21, FN_IP2_26_24, FN_IP2_29_27, FN_IP2_31_30,
- FN_IP3_1_0, FN_IP3_3_2, FN_IP3_5_4, FN_IP3_7_6, FN_IP3_9_8, FN_IP3_10,
- FN_IP3_11, FN_IP3_12, FN_IP3_14_13, FN_IP3_17_15, FN_IP3_20_18,
- FN_IP3_23_21, FN_IP3_26_24, FN_IP3_29_27, FN_IP3_30, FN_IP3_31,
- FN_WE0_N, FN_WE1_N, FN_IP4_1_0 , FN_IP7_31, FN_DACK0,
-
- /* GPSR2 */
- FN_IP4_4_2, FN_IP4_7_5, FN_IP4_9_8, FN_IP4_11_10, FN_IP4_13_12,
- FN_IP4_15_14, FN_IP4_17_16, FN_IP4_19_18, FN_IP4_22_20, FN_IP4_25_23,
- FN_IP4_27_26, FN_IP4_29_28, FN_IP4_31_30, FN_IP5_1_0, FN_IP5_3_2,
- FN_IP5_5_4, FN_IP5_8_6, FN_IP5_11_9, FN_IP5_13_12, FN_IP5_15_14,
- FN_IP5_17_16, FN_IP5_19_18, FN_IP5_21_20, FN_IP5_23_22, FN_IP5_25_24,
- FN_IP5_27_26, FN_IP5_29_28, FN_IP5_31_30, FN_IP6_1_0, FN_IP6_3_2,
- FN_IP6_5_4, FN_IP6_7_6,
-
- /* GPSR3 */
- FN_IP6_8, FN_IP6_9, FN_IP6_10, FN_IP6_11, FN_IP6_12, FN_IP6_13,
- FN_IP6_14, FN_IP6_15, FN_IP6_16, FN_IP6_19_17, FN_IP6_22_20,
- FN_IP6_25_23, FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3,
- FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15, FN_IP7_20_18,
- FN_IP7_23_21, FN_IP7_26_24, FN_IP7_29_27, FN_IP8_2_0, FN_IP8_5_3,
- FN_IP8_8_6, FN_IP8_11_9, FN_IP8_14_12, FN_IP8_16_15, FN_IP8_19_17,
- FN_IP8_22_20,
-
- /* GPSR4 */
- FN_IP8_25_23, FN_IP8_28_26, FN_IP8_31_29, FN_IP9_2_0, FN_IP9_5_3,
- FN_IP9_8_6, FN_IP9_11_9, FN_IP9_14_12, FN_IP9_16_15, FN_IP9_18_17,
- FN_IP9_21_19, FN_IP9_24_22, FN_IP9_27_25, FN_IP9_30_28, FN_IP10_2_0,
- FN_IP10_5_3, FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,
- FN_IP10_20_18, FN_IP10_23_21, FN_IP10_26_24, FN_IP10_29_27,
- FN_IP10_31_30, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_7_6, FN_IP11_10_8,
- FN_IP11_13_11, FN_IP11_15_14, FN_IP11_17_16,
-
- /* GPSR5 */
- FN_IP11_20_18, FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,
- FN_IP12_5_3, FN_IP12_8_6, FN_IP12_10_9, FN_IP12_12_11, FN_IP12_14_13,
- FN_IP12_17_15, FN_IP12_20_18, FN_IP12_23_21, FN_IP12_26_24,
- FN_IP12_29_27, FN_IP13_2_0, FN_IP13_5_3, FN_IP13_8_6, FN_IP13_11_9,
- FN_IP13_14_12, FN_IP13_17_15, FN_IP13_20_18, FN_IP13_23_21,
- FN_IP13_26_24, FN_USB0_PWEN, FN_USB0_OVC, FN_USB1_PWEN, FN_USB1_OVC,
-
- /* GPSR6 */
- FN_SD0_CLK, FN_SD0_CMD, FN_SD0_DATA0, FN_SD0_DATA1, FN_SD0_DATA2,
- FN_SD0_DATA3, FN_SD0_CD, FN_SD0_WP, FN_SD1_CLK, FN_SD1_CMD,
- FN_SD1_DATA0, FN_SD1_DATA1, FN_SD1_DATA2, FN_SD1_DATA3, FN_IP0_0,
- FN_IP0_9_8, FN_IP0_10, FN_IP0_11, FN_IP0_12, FN_IP0_13, FN_IP0_14,
- FN_IP0_15, FN_IP0_16, FN_IP0_17, FN_IP0_19_18, FN_IP0_21_20,
-
- /* IPSR0 */
- FN_SD1_CD, FN_CAN0_RX, FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, FN_MMC_CLK,
- FN_SD2_CLK, FN_MMC_CMD, FN_SD2_CMD, FN_MMC_D0, FN_SD2_DATA0, FN_MMC_D1,
- FN_SD2_DATA1, FN_MMC_D2, FN_SD2_DATA2, FN_MMC_D3, FN_SD2_DATA3,
- FN_MMC_D4, FN_SD2_CD, FN_MMC_D5, FN_SD2_WP, FN_MMC_D6, FN_SCIF0_RXD,
- FN_I2C2_SCL_B, FN_CAN1_RX, FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B,
- FN_CAN1_TX, FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, FN_D1, FN_SCIFA3_RXD_B,
- FN_D2, FN_SCIFA3_TXD_B, FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, FN_D4,
- FN_I2C3_SDA_B, FN_SCIF5_TXD_B, FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D,
-
- /*
- * From IPSR1 to IPSR5 have been removed because they does not use.
- */
-
- /* IPSR6 */
- FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28,
- FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29,
- FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, FN_DU0_CDE, FN_QPOLB,
- FN_CC50_STATE31, FN_VI0_CLK, FN_AVB_RX_CLK, FN_VI0_DATA0_VI0_B0,
- FN_AVB_RX_DV, FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0, FN_VI0_DATA2_VI0_B2,
- FN_AVB_RXD1, FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2, FN_VI0_DATA4_VI0_B4,
- FN_AVB_RXD3, FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4, FN_VI0_DATA6_VI0_B6,
- FN_AVB_RXD5, FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6, FN_VI0_CLKENB,
- FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C, FN_AVB_RXD7, FN_VI0_FIELD,
- FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C, FN_AVB_RX_ER, FN_VI0_HSYNC_N,
- FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C, FN_AVB_COL, FN_VI0_VSYNC_N,
- FN_SCIF0_TXD_B, FN_I2C0_SDA_C, FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN,
- FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D, FN_AVB_TX_CLK,
- FN_ADIDATA, FN_AD_DI,
-
- /* IPSR7 */
- FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D, FN_AVB_TXD0,
- FN_ADICS_SAMP, FN_AD_DO, FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B,
- FN_CAN0_RX_B, FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, FN_ETH_RXD0, FN_VI0_G3,
- FN_MSIOF2_SYNC_B, FN_CAN0_TX_B, FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N,
- FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D, FN_AVB_TXD3,
- FN_ADICHS1, FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,
- FN_AVB_TXD4, FN_ADICHS2, FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C,
- FN_AVB_TXD5, FN_SSI_SCK5_B, FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C,
- FN_IIC1_SCL_D, FN_AVB_TXD6, FN_SSI_WS5_B, FN_ETH_TX_EN, FN_VI0_R0,
- FN_SCIF2_TXD_C, FN_IIC1_SDA_D, FN_AVB_TXD7, FN_SSI_SDATA5_B,
- FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER, FN_SSI_SCK6_B,
- FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E, FN_AVB_GTX_CLK,
- FN_SSI_WS6_B, FN_DREQ0_N, FN_SCIFB1_RXD,
-
- /* IPSR8 */
- FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E, FN_AVB_MDC,
- FN_SSI_SDATA6_B, FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C,
- FN_AUDIO_CLKA_B, FN_AVB_MDIO, FN_SSI_SCK78_B, FN_HSCIF0_HTX,
- FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B, FN_AVB_LINK, FN_SSI_WS78_B,
- FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E,
- FN_AVB_MAGIC, FN_SSI_SDATA7_B, FN_HSCIF0_HRTS_N, FN_VI0_R7,
- FN_SCIF0_TXD_D, FN_I2C0_SDA_E, FN_AVB_PHY_INT, FN_SSI_SDATA8_B,
- FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B,
- FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B, FN_AVB_GTXREFCLK,
- FN_CAN1_RX_D, FN_TPUTO0_B, FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0,
- FN_CAN_CLK, FN_DVC_MUTE, FN_CAN1_TX_D, FN_I2C1_SCL, FN_SCIF4_RXD,
- FN_PWM5_B, FN_DU1_DR0, FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B,
- FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1, FN_RIF1_CLK_B,
- FN_TS_SCK_D, FN_BPFCLK_C, FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C,
- FN_DU1_DR2, FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,
-
- /*
- * From IPSR9 to IPSR10 have been removed because they does not use.
- */
-
- /* IPSR11 */
- FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0,
- FN_CAN_DEBUGOUT11, FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C,
- FN_DU1_DOTCLKOUT1, FN_CAN_DEBUGOUT12, FN_SSI_SCK6, FN_SCIFA1_SCK_B,
- FN_DU1_EXHSYNC_DU1_HSYNC, FN_CAN_DEBUGOUT13, FN_SSI_WS6,
- FN_SCIFA1_RXD_B, FN_I2C4_SCL_C, FN_DU1_EXVSYNC_DU1_VSYNC,
- FN_CAN_DEBUGOUT14, FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C,
- FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, FN_SSI_SCK78,
- FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP, FN_SSI_WS78,
- FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE, FN_SSI_SDATA7,
- FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D, FN_CAN_CLK_D, FN_PCMOE_N,
- FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B,
- FN_AD_DI_B, FN_PCMWE_N, FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D,
- FN_ADICS_SAMP_B, FN_AD_DO_B, FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B,
- FN_ADICLK_B, FN_AD_CLK_B,
-
- /*
- * From IPSR12 to IPSR13 have been removed because they does not use.
- */
-
- /* MOD_SEL */
- FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3,
- FN_SEL_ADI_0, FN_SEL_ADI_1, FN_SEL_CAN_0, FN_SEL_CAN_1,
- FN_SEL_CAN_2, FN_SEL_CAN_3, FN_SEL_DARC_0, FN_SEL_DARC_1,
- FN_SEL_DARC_2, FN_SEL_DARC_3, FN_SEL_DARC_4, FN_SEL_DR0_0,
- FN_SEL_DR0_1, FN_SEL_DR1_0, FN_SEL_DR1_1, FN_SEL_DR2_0, FN_SEL_DR2_1,
- FN_SEL_DR3_0, FN_SEL_DR3_1, FN_SEL_ETH_0, FN_SEL_ETH_1, FN_SEL_FSN_0,
- FN_SEL_FSN_1, FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2,
- FN_SEL_I2C00_3, FN_SEL_I2C00_4, FN_SEL_I2C01_0, FN_SEL_I2C01_1,
- FN_SEL_I2C01_2, FN_SEL_I2C01_3, FN_SEL_I2C01_4, FN_SEL_I2C02_0,
- FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3, FN_SEL_I2C02_4,
- FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3,
- FN_SEL_I2C03_4, FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2,
- FN_SEL_I2C04_3, FN_SEL_I2C04_4, FN_SEL_IIC00_0, FN_SEL_IIC00_1,
- FN_SEL_IIC00_2, FN_SEL_IIC00_3, FN_SEL_AVB_0, FN_SEL_AVB_1,
-
- /* MOD_SEL2 */
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, FN_SEL_IIC01_0,
- FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3, FN_SEL_LBS_0,
- FN_SEL_LBS_1, FN_SEL_MSI1_0, FN_SEL_MSI1_1, FN_SEL_MSI2_0,
- FN_SEL_MSI2_1, FN_SEL_RAD_0, FN_SEL_RAD_1, FN_SEL_RCN_0,
- FN_SEL_RCN_1, FN_SEL_RSP_0, FN_SEL_RSP_1, FN_SEL_SCIFA0_0,
- FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2, FN_SEL_SCIFA0_3, FN_SEL_SCIFA1_0,
- FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
- FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1, FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1,
- FN_SEL_SCIFA4_2, FN_SEL_SCIFA4_3, FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1,
- FN_SEL_SCIFA5_2, FN_SEL_SCIFA5_3, FN_SEL_SPDM_0, FN_SEL_SPDM_1,
- FN_SEL_TMU_0, FN_SEL_TMU_1, FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
- FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, FN_SEL_CAN0_0, FN_SEL_CAN0_1,
- FN_SEL_CAN0_2, FN_SEL_CAN0_3, FN_SEL_CAN1_0, FN_SEL_CAN1_1,
- FN_SEL_CAN1_2, FN_SEL_CAN1_3, FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, FN_SEL_RDS_0, FN_SEL_RDS_1,
- FN_SEL_RDS_2, FN_SEL_RDS_3,
-
- /* MOD_SEL3 */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF2_0,
- FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
- FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
- FN_SEL_SCIF4_4, FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2,
- FN_SEL_SCIF5_3, FN_SEL_SSI1_0, FN_SEL_SSI1_1, FN_SEL_SSI2_0,
- FN_SEL_SSI2_1, FN_SEL_SSI4_0, FN_SEL_SSI4_1, FN_SEL_SSI5_0,
- FN_SEL_SSI5_1, FN_SEL_SSI6_0, FN_SEL_SSI6_1, FN_SEL_SSI7_0,
- FN_SEL_SSI7_1, FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI9_0,
- FN_SEL_SSI9_1,
- PINMUX_FUNCTION_END,
-
- PINMUX_MARK_BEGIN,
- A2_MARK, WE0_N_MARK, WE1_N_MARK, DACK0_MARK,
-
- USB0_PWEN_MARK, USB0_OVC_MARK, USB1_PWEN_MARK, USB1_OVC_MARK,
-
- SD0_CLK_MARK, SD0_CMD_MARK, SD0_DATA0_MARK, SD0_DATA1_MARK,
- SD0_DATA2_MARK, SD0_DATA3_MARK, SD0_CD_MARK, SD0_WP_MARK,
-
- SD1_CLK_MARK, SD1_CMD_MARK, SD1_DATA0_MARK, SD1_DATA1_MARK,
- SD1_DATA2_MARK, SD1_DATA3_MARK,
-
- /* IPSR0 */
- SD1_CD_MARK, CAN0_RX_MARK, SD1_WP_MARK, IRQ7_MARK, CAN0_TX_MARK,
- MMC_CLK_MARK, SD2_CLK_MARK, MMC_CMD_MARK, SD2_CMD_MARK, MMC_D0_MARK,
- SD2_DATA0_MARK, MMC_D1_MARK, SD2_DATA1_MARK, MMC_D2_MARK,
- SD2_DATA2_MARK, MMC_D3_MARK, SD2_DATA3_MARK, MMC_D4_MARK, SD2_CD_MARK,
- MMC_D5_MARK, SD2_WP_MARK, MMC_D6_MARK, SCIF0_RXD_MARK, I2C2_SCL_B_MARK,
- CAN1_RX_MARK, MMC_D7_MARK, SCIF0_TXD_MARK, I2C2_SDA_B_MARK,
- CAN1_TX_MARK, D0_MARK, SCIFA3_SCK_B_MARK, IRQ4_MARK, D1_MARK,
- SCIFA3_RXD_B_MARK, D2_MARK, SCIFA3_TXD_B_MARK, D3_MARK, I2C3_SCL_B_MARK,
- SCIF5_RXD_B_MARK, D4_MARK, I2C3_SDA_B_MARK, SCIF5_TXD_B_MARK, D5_MARK,
- SCIF4_RXD_B_MARK, I2C0_SCL_D_MARK,
-
- /*
- * From IPSR1 to IPSR5 have been removed because they does not use.
- */
-
- /* IPSR6 */
- DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK, CC50_STATE28_MARK,
- DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CC50_STATE29_MARK,
- DU0_DISP_MARK, QPOLA_MARK, CC50_STATE30_MARK, DU0_CDE_MARK, QPOLB_MARK,
- CC50_STATE31_MARK, VI0_CLK_MARK, AVB_RX_CLK_MARK, VI0_DATA0_VI0_B0_MARK,
- AVB_RX_DV_MARK, VI0_DATA1_VI0_B1_MARK, AVB_RXD0_MARK,
- VI0_DATA2_VI0_B2_MARK, AVB_RXD1_MARK, VI0_DATA3_VI0_B3_MARK,
- AVB_RXD2_MARK, VI0_DATA4_VI0_B4_MARK, AVB_RXD3_MARK,
- VI0_DATA5_VI0_B5_MARK, AVB_RXD4_MARK, VI0_DATA6_VI0_B6_MARK,
- AVB_RXD5_MARK, VI0_DATA7_VI0_B7_MARK, AVB_RXD6_MARK, VI0_CLKENB_MARK,
- I2C3_SCL_MARK, SCIFA5_RXD_C_MARK, IETX_C_MARK, AVB_RXD7_MARK,
- VI0_FIELD_MARK, I2C3_SDA_MARK, SCIFA5_TXD_C_MARK, IECLK_C_MARK,
- AVB_RX_ER_MARK, VI0_HSYNC_N_MARK, SCIF0_RXD_B_MARK, I2C0_SCL_C_MARK,
- IERX_C_MARK, AVB_COL_MARK, VI0_VSYNC_N_MARK, SCIF0_TXD_B_MARK,
- I2C0_SDA_C_MARK, AUDIO_CLKOUT_B_MARK, AVB_TX_EN_MARK, ETH_MDIO_MARK,
- VI0_G0_MARK, MSIOF2_RXD_B_MARK, IIC0_SCL_D_MARK, AVB_TX_CLK_MARK,
- ADIDATA_MARK, AD_DI_MARK,
-
- /* IPSR7 */
- ETH_CRS_DV_MARK, VI0_G1_MARK, MSIOF2_TXD_B_MARK, IIC0_SDA_D_MARK,
- AVB_TXD0_MARK, ADICS_SAMP_MARK, AD_DO_MARK, ETH_RX_ER_MARK, VI0_G2_MARK,
- MSIOF2_SCK_B_MARK, CAN0_RX_B_MARK, AVB_TXD1_MARK, ADICLK_MARK,
- AD_CLK_MARK, ETH_RXD0_MARK, VI0_G3_MARK, MSIOF2_SYNC_B_MARK,
- CAN0_TX_B_MARK, AVB_TXD2_MARK, ADICHS0_MARK, AD_NCS_N_MARK,
- ETH_RXD1_MARK, VI0_G4_MARK, MSIOF2_SS1_B_MARK, SCIF4_RXD_D_MARK,
- AVB_TXD3_MARK, ADICHS1_MARK, ETH_LINK_MARK, VI0_G5_MARK,
- MSIOF2_SS2_B_MARK, SCIF4_TXD_D_MARK, AVB_TXD4_MARK, ADICHS2_MARK,
- ETH_REFCLK_MARK, VI0_G6_MARK, SCIF2_SCK_C_MARK, AVB_TXD5_MARK,
- SSI_SCK5_B_MARK, ETH_TXD1_MARK, VI0_G7_MARK, SCIF2_RXD_C_MARK,
- IIC1_SCL_D_MARK, AVB_TXD6_MARK, SSI_WS5_B_MARK, ETH_TX_EN_MARK,
- VI0_R0_MARK, SCIF2_TXD_C_MARK, IIC1_SDA_D_MARK, AVB_TXD7_MARK,
- SSI_SDATA5_B_MARK, ETH_MAGIC_MARK, VI0_R1_MARK, SCIF3_SCK_B_MARK,
- AVB_TX_ER_MARK, SSI_SCK6_B_MARK, ETH_TXD0_MARK, VI0_R2_MARK,
- SCIF3_RXD_B_MARK, I2C4_SCL_E_MARK, AVB_GTX_CLK_MARK, SSI_WS6_B_MARK,
- DREQ0_N_MARK, SCIFB1_RXD_MARK,
-
- /* IPSR8 */
- ETH_MDC_MARK, VI0_R3_MARK, SCIF3_TXD_B_MARK, I2C4_SDA_E_MARK,
- AVB_MDC_MARK, SSI_SDATA6_B_MARK, HSCIF0_HRX_MARK, VI0_R4_MARK,
- I2C1_SCL_C_MARK, AUDIO_CLKA_B_MARK, AVB_MDIO_MARK, SSI_SCK78_B_MARK,
- HSCIF0_HTX_MARK, VI0_R5_MARK, I2C1_SDA_C_MARK, AUDIO_CLKB_B_MARK,
- AVB_LINK_MARK, SSI_WS78_B_MARK, HSCIF0_HCTS_N_MARK, VI0_R6_MARK,
- SCIF0_RXD_D_MARK, I2C0_SCL_E_MARK, AVB_MAGIC_MARK, SSI_SDATA7_B_MARK,
- HSCIF0_HRTS_N_MARK, VI0_R7_MARK, SCIF0_TXD_D_MARK, I2C0_SDA_E_MARK,
- AVB_PHY_INT_MARK, SSI_SDATA8_B_MARK,
- HSCIF0_HSCK_MARK, SCIF_CLK_B_MARK, AVB_CRS_MARK, AUDIO_CLKC_B_MARK,
- I2C0_SCL_MARK, SCIF0_RXD_C_MARK, PWM5_MARK, TCLK1_B_MARK,
- AVB_GTXREFCLK_MARK, CAN1_RX_D_MARK, TPUTO0_B_MARK, I2C0_SDA_MARK,
- SCIF0_TXD_C_MARK, TPUTO0_MARK, CAN_CLK_MARK, DVC_MUTE_MARK,
- CAN1_TX_D_MARK, I2C1_SCL_MARK, SCIF4_RXD_MARK, PWM5_B_MARK,
- DU1_DR0_MARK, RIF1_SYNC_B_MARK, TS_SDATA_D_MARK, TPUTO1_B_MARK,
- I2C1_SDA_MARK, SCIF4_TXD_MARK, IRQ5_MARK, DU1_DR1_MARK, RIF1_CLK_B_MARK,
- TS_SCK_D_MARK, BPFCLK_C_MARK, MSIOF0_RXD_MARK, SCIF5_RXD_MARK,
- I2C2_SCL_C_MARK, DU1_DR2_MARK, RIF1_D0_B_MARK, TS_SDEN_D_MARK,
- FMCLK_C_MARK, RDS_CLK_MARK,
-
- /*
- * From IPSR9 to IPSR10 have been removed because they does not use.
- */
-
- /* IPSR11 */
- SSI_WS5_MARK, SCIFA3_RXD_MARK, I2C3_SCL_C_MARK, DU1_DOTCLKOUT0_MARK,
- CAN_DEBUGOUT11_MARK, SSI_SDATA5_MARK, SCIFA3_TXD_MARK, I2C3_SDA_C_MARK,
- DU1_DOTCLKOUT1_MARK, CAN_DEBUGOUT12_MARK, SSI_SCK6_MARK,
- SCIFA1_SCK_B_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, CAN_DEBUGOUT13_MARK,
- SSI_WS6_MARK, SCIFA1_RXD_B_MARK, I2C4_SCL_C_MARK,
- DU1_EXVSYNC_DU1_VSYNC_MARK, CAN_DEBUGOUT14_MARK, SSI_SDATA6_MARK,
- SCIFA1_TXD_B_MARK, I2C4_SDA_C_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK,
- CAN_DEBUGOUT15_MARK, SSI_SCK78_MARK, SCIFA2_SCK_B_MARK, IIC0_SDA_C_MARK,
- DU1_DISP_MARK, SSI_WS78_MARK, SCIFA2_RXD_B_MARK, IIC0_SCL_C_MARK,
- DU1_CDE_MARK, SSI_SDATA7_MARK, SCIFA2_TXD_B_MARK, IRQ8_MARK,
- AUDIO_CLKA_D_MARK, CAN_CLK_D_MARK, PCMOE_N_MARK, SSI_SCK0129_MARK,
- MSIOF1_RXD_B_MARK, SCIF5_RXD_D_MARK, ADIDATA_B_MARK, AD_DI_B_MARK,
- PCMWE_N_MARK, SSI_WS0129_MARK, MSIOF1_TXD_B_MARK, SCIF5_TXD_D_MARK,
- ADICS_SAMP_B_MARK, AD_DO_B_MARK, SSI_SDATA0_MARK, MSIOF1_SCK_B_MARK,
- PWM0_B_MARK, ADICLK_B_MARK, AD_CLK_B_MARK,
-
- /*
- * From IPSR12 to IPSR13 have been removed because they does not use.
- */
-
- PINMUX_MARK_END,
-};
-
-static pinmux_enum_t pinmux_data[] = {
- PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
-
- PINMUX_DATA(A2_MARK, FN_A2),
- PINMUX_DATA(WE0_N_MARK, FN_WE0_N),
- PINMUX_DATA(WE1_N_MARK, FN_WE1_N),
- PINMUX_DATA(DACK0_MARK, FN_DACK0),
- PINMUX_DATA(USB0_PWEN_MARK, FN_USB0_PWEN),
- PINMUX_DATA(USB0_OVC_MARK, FN_USB0_OVC),
- PINMUX_DATA(USB1_PWEN_MARK, FN_USB1_PWEN),
- PINMUX_DATA(USB1_OVC_MARK, FN_USB1_OVC),
- PINMUX_DATA(SD0_CLK_MARK, FN_SD0_CLK),
- PINMUX_DATA(SD0_CMD_MARK, FN_SD0_CMD),
- PINMUX_DATA(SD0_DATA0_MARK, FN_SD0_DATA0),
- PINMUX_DATA(SD0_DATA1_MARK, FN_SD0_DATA1),
- PINMUX_DATA(SD0_DATA2_MARK, FN_SD0_DATA2),
- PINMUX_DATA(SD0_DATA3_MARK, FN_SD0_DATA3),
- PINMUX_DATA(SD0_CD_MARK, FN_SD0_CD),
- PINMUX_DATA(SD0_WP_MARK, FN_SD0_WP),
- PINMUX_DATA(SD1_CLK_MARK, FN_SD1_CLK),
- PINMUX_DATA(SD1_CMD_MARK, FN_SD1_CMD),
- PINMUX_DATA(SD1_DATA0_MARK, FN_SD1_DATA0),
- PINMUX_DATA(SD1_DATA1_MARK, FN_SD1_DATA1),
- PINMUX_DATA(SD1_DATA2_MARK, FN_SD1_DATA2),
- PINMUX_DATA(SD1_DATA3_MARK, FN_SD1_DATA3),
-
- /* IPSR0 */
- PINMUX_IPSR_DATA(IP0_0, SD1_CD),
- PINMUX_IPSR_MODSEL_DATA(IP0_0, CAN0_RX, SEL_CAN0_0),
- PINMUX_IPSR_DATA(IP0_9_8, SD1_WP),
- PINMUX_IPSR_DATA(IP0_9_8, IRQ7),
- PINMUX_IPSR_MODSEL_DATA(IP0_9_8, CAN0_TX, SEL_CAN0_0),
- PINMUX_IPSR_DATA(IP0_10, MMC_CLK),
- PINMUX_IPSR_DATA(IP0_10, SD2_CLK),
- PINMUX_IPSR_DATA(IP0_11, MMC_CMD),
- PINMUX_IPSR_DATA(IP0_11, SD2_CMD),
- PINMUX_IPSR_DATA(IP0_12, MMC_D0),
- PINMUX_IPSR_DATA(IP0_12, SD2_DATA0),
- PINMUX_IPSR_DATA(IP0_13, MMC_D1),
- PINMUX_IPSR_DATA(IP0_13, SD2_DATA1),
- PINMUX_IPSR_DATA(IP0_14, MMC_D2),
- PINMUX_IPSR_DATA(IP0_14, SD2_DATA2),
- PINMUX_IPSR_DATA(IP0_15, MMC_D3),
- PINMUX_IPSR_DATA(IP0_15, SD2_DATA3),
- PINMUX_IPSR_DATA(IP0_16, MMC_D4),
- PINMUX_IPSR_DATA(IP0_16, SD2_CD),
- PINMUX_IPSR_DATA(IP0_17, MMC_D5),
- PINMUX_IPSR_DATA(IP0_17, SD2_WP),
- PINMUX_IPSR_DATA(IP0_19_18, MMC_D6),
- PINMUX_IPSR_MODSEL_DATA(IP0_19_18, SCIF0_RXD, SEL_SCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP0_19_18, I2C2_SCL_B, SEL_I2C02_1),
- PINMUX_IPSR_MODSEL_DATA(IP0_19_18, CAN1_RX, SEL_CAN1_0),
- PINMUX_IPSR_DATA(IP0_21_20, MMC_D7),
- PINMUX_IPSR_MODSEL_DATA(IP0_21_20, SCIF0_TXD, SEL_SCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP0_21_20, I2C2_SDA_B, SEL_I2C02_1),
- PINMUX_IPSR_MODSEL_DATA(IP0_21_20, CAN1_TX, SEL_CAN1_0),
- PINMUX_IPSR_DATA(IP0_23_22, D0),
- PINMUX_IPSR_MODSEL_DATA(IP0_23_22, SCIFA3_SCK_B, SEL_SCIFA3_1),
- PINMUX_IPSR_DATA(IP0_23_22, IRQ4),
- PINMUX_IPSR_DATA(IP0_24, D1),
- PINMUX_IPSR_MODSEL_DATA(IP0_24, SCIFA3_RXD_B, SEL_SCIFA3_1),
- PINMUX_IPSR_DATA(IP0_25, D2),
- PINMUX_IPSR_MODSEL_DATA(IP0_25, SCIFA3_TXD_B, SEL_SCIFA3_1),
- PINMUX_IPSR_DATA(IP0_27_26, D3),
- PINMUX_IPSR_MODSEL_DATA(IP0_27_26, I2C3_SCL_B, SEL_I2C03_1),
- PINMUX_IPSR_MODSEL_DATA(IP0_27_26, SCIF5_RXD_B, SEL_SCIF5_1),
- PINMUX_IPSR_DATA(IP0_29_28, D4),
- PINMUX_IPSR_MODSEL_DATA(IP0_29_28, I2C3_SDA_B, SEL_I2C03_1),
- PINMUX_IPSR_MODSEL_DATA(IP0_29_28, SCIF5_TXD_B, SEL_SCIF5_1),
- PINMUX_IPSR_DATA(IP0_31_30, D5),
- PINMUX_IPSR_MODSEL_DATA(IP0_31_30, SCIF4_RXD_B, SEL_SCIF4_1),
- PINMUX_IPSR_MODSEL_DATA(IP0_31_30, I2C0_SCL_D, SEL_I2C00_3),
-
- /*
- * From IPSR1 to IPSR5 have been removed because they does not use.
- */
-
- /* IPSR6 */
- PINMUX_IPSR_DATA(IP6_1_0, DU0_EXVSYNC_DU0_VSYNC),
- PINMUX_IPSR_DATA(IP6_1_0, QSTB_QHE),
- PINMUX_IPSR_DATA(IP6_1_0, CC50_STATE28),
- PINMUX_IPSR_DATA(IP6_3_2, DU0_EXODDF_DU0_ODDF_DISP_CDE),
- PINMUX_IPSR_DATA(IP6_3_2, QCPV_QDE),
- PINMUX_IPSR_DATA(IP6_3_2, CC50_STATE29),
- PINMUX_IPSR_DATA(IP6_5_4, DU0_DISP),
- PINMUX_IPSR_DATA(IP6_5_4, QPOLA),
- PINMUX_IPSR_DATA(IP6_5_4, CC50_STATE30),
- PINMUX_IPSR_DATA(IP6_7_6, DU0_CDE),
- PINMUX_IPSR_DATA(IP6_7_6, QPOLB),
- PINMUX_IPSR_DATA(IP6_7_6, CC50_STATE31),
- PINMUX_IPSR_DATA(IP6_8, VI0_CLK),
- PINMUX_IPSR_DATA(IP6_8, AVB_RX_CLK),
- PINMUX_IPSR_DATA(IP6_9, VI0_DATA0_VI0_B0),
- PINMUX_IPSR_DATA(IP6_9, AVB_RX_DV),
- PINMUX_IPSR_DATA(IP6_10, VI0_DATA1_VI0_B1),
- PINMUX_IPSR_DATA(IP6_10, AVB_RXD0),
- PINMUX_IPSR_DATA(IP6_11, VI0_DATA2_VI0_B2),
- PINMUX_IPSR_DATA(IP6_11, AVB_RXD1),
- PINMUX_IPSR_DATA(IP6_12, VI0_DATA3_VI0_B3),
- PINMUX_IPSR_DATA(IP6_12, AVB_RXD2),
- PINMUX_IPSR_DATA(IP6_13, VI0_DATA4_VI0_B4),
- PINMUX_IPSR_DATA(IP6_13, AVB_RXD3),
- PINMUX_IPSR_DATA(IP6_14, VI0_DATA5_VI0_B5),
- PINMUX_IPSR_DATA(IP6_14, AVB_RXD4),
- PINMUX_IPSR_DATA(IP6_15, VI0_DATA6_VI0_B6),
- PINMUX_IPSR_DATA(IP6_15, AVB_RXD5),
- PINMUX_IPSR_DATA(IP6_16, VI0_DATA7_VI0_B7),
- PINMUX_IPSR_DATA(IP6_16, AVB_RXD6),
- PINMUX_IPSR_DATA(IP6_19_17, VI0_CLKENB),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, I2C3_SCL, SEL_I2C03_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SCIFA5_RXD_C, SEL_SCIFA5_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_19_17, IETX_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP6_19_17, AVB_RXD7),
- PINMUX_IPSR_DATA(IP6_22_20, VI0_FIELD),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, I2C3_SDA, SEL_I2C03_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFA5_TXD_C, SEL_SCIFA5_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_22_20, IECLK_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP6_22_20, AVB_RX_ER),
- PINMUX_IPSR_DATA(IP6_25_23, VI0_HSYNC_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIF0_RXD_B, SEL_SCIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, I2C0_SCL_C, SEL_I2C00_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_25_23, IERX_C, SEL_IEB_2),
- PINMUX_IPSR_DATA(IP6_25_23, AVB_COL),
- PINMUX_IPSR_DATA(IP6_28_26, VI0_VSYNC_N),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIF0_TXD_B, SEL_SCIF0_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, I2C0_SDA_C, SEL_I2C00_2),
- PINMUX_IPSR_MODSEL_DATA(IP6_28_26, AUDIO_CLKOUT_B, SEL_ADG_1),
- PINMUX_IPSR_DATA(IP6_28_26, AVB_TX_EN),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, ETH_MDIO, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP6_31_29, VI0_G0),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, MSIOF2_RXD_B, SEL_MSI2_1),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, IIC0_SCL_D, SEL_IIC00_3),
- PINMUX_IPSR_DATA(IP6_31_29, AVB_TX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, ADIDATA, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP6_31_29, AD_DI, SEL_ADI_0),
-
- /* IPSR7 */
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, ETH_CRS_DV, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_2_0, VI0_G1),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, MSIOF2_TXD_B, SEL_MSI2_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, IIC0_SDA_D, SEL_IIC00_3),
- PINMUX_IPSR_DATA(IP7_2_0, AVB_TXD0),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, ADICS_SAMP, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_2_0, AD_DO, SEL_ADI_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, ETH_RX_ER, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_5_3, VI0_G2),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, MSIOF2_SCK_B, SEL_MSI2_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, CAN0_RX_B, SEL_CAN0_1),
- PINMUX_IPSR_DATA(IP7_5_3, AVB_TXD1),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, ADICLK, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_5_3, AD_CLK, SEL_ADI_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_8_6, ETH_RXD0, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_8_6, VI0_G3),
- PINMUX_IPSR_MODSEL_DATA(IP7_8_6, MSIOF2_SYNC_B, SEL_MSI2_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_8_6, CAN0_TX_B, SEL_CAN0_1),
- PINMUX_IPSR_DATA(IP7_8_6, AVB_TXD2),
- PINMUX_IPSR_MODSEL_DATA(IP7_8_6, ADICHS0, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_8_6, AD_NCS_N, SEL_ADI_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_11_9, ETH_RXD1, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_11_9, VI0_G4),
- PINMUX_IPSR_MODSEL_DATA(IP7_11_9, MSIOF2_SS1_B, SEL_MSI2_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_11_9, SCIF4_RXD_D, SEL_SCIF4_3),
- PINMUX_IPSR_DATA(IP7_11_9, AVB_TXD3),
- PINMUX_IPSR_MODSEL_DATA(IP7_11_9, ADICHS1, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_14_12, ETH_LINK, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_14_12, VI0_G5),
- PINMUX_IPSR_MODSEL_DATA(IP7_14_12, MSIOF2_SS2_B, SEL_MSI2_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_14_12, SCIF4_TXD_D, SEL_SCIF4_3),
- PINMUX_IPSR_DATA(IP7_14_12, AVB_TXD4),
- PINMUX_IPSR_MODSEL_DATA(IP7_14_12, ADICHS2, SEL_RAD_0),
- PINMUX_IPSR_MODSEL_DATA(IP7_17_15, ETH_REFCLK, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_17_15, VI0_G6),
- PINMUX_IPSR_MODSEL_DATA(IP7_17_15, SCIF2_SCK_C, SEL_SCIF2_2),
- PINMUX_IPSR_DATA(IP7_17_15, AVB_TXD5),
- PINMUX_IPSR_MODSEL_DATA(IP7_17_15, SSI_SCK5_B, SEL_SSI5_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_20_18, ETH_TXD1, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_20_18, VI0_G7),
- PINMUX_IPSR_MODSEL_DATA(IP7_20_18, SCIF2_RXD_C, SEL_SCIF2_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_20_18, IIC1_SCL_D, SEL_IIC01_3),
- PINMUX_IPSR_DATA(IP7_20_18, AVB_TXD6),
- PINMUX_IPSR_MODSEL_DATA(IP7_20_18, SSI_WS5_B, SEL_SSI5_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_23_21, ETH_TX_EN, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_23_21, VI0_R0),
- PINMUX_IPSR_MODSEL_DATA(IP7_23_21, SCIF2_TXD_C, SEL_SCIF2_2),
- PINMUX_IPSR_MODSEL_DATA(IP7_23_21, IIC1_SDA_D, SEL_IIC01_3),
- PINMUX_IPSR_DATA(IP7_23_21, AVB_TXD7),
- PINMUX_IPSR_MODSEL_DATA(IP7_23_21, SSI_SDATA5_B, SEL_SSI5_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_26_24, ETH_MAGIC, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_26_24, VI0_R1),
- PINMUX_IPSR_MODSEL_DATA(IP7_26_24, SCIF3_SCK_B, SEL_SCIF3_1),
- PINMUX_IPSR_DATA(IP7_26_24, AVB_TX_ER),
- PINMUX_IPSR_MODSEL_DATA(IP7_26_24, SSI_SCK6_B, SEL_SSI6_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_29_27, ETH_TXD0, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP7_29_27, VI0_R2),
- PINMUX_IPSR_MODSEL_DATA(IP7_29_27, SCIF3_RXD_B, SEL_SCIF3_1),
- PINMUX_IPSR_MODSEL_DATA(IP7_29_27, I2C4_SCL_E, SEL_I2C04_4),
- PINMUX_IPSR_DATA(IP7_29_27, AVB_GTX_CLK),
- PINMUX_IPSR_MODSEL_DATA(IP7_29_27, SSI_WS6_B, SEL_SSI6_1),
- PINMUX_IPSR_DATA(IP7_31, DREQ0_N),
- PINMUX_IPSR_DATA(IP7_31, SCIFB1_RXD),
-
- /* IPSR8 */
- PINMUX_IPSR_MODSEL_DATA(IP8_2_0, ETH_MDC, SEL_ETH_0),
- PINMUX_IPSR_DATA(IP8_2_0, VI0_R3),
- PINMUX_IPSR_MODSEL_DATA(IP8_2_0, SCIF3_TXD_B, SEL_SCIF3_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_2_0, I2C4_SDA_E, SEL_I2C04_4),
- PINMUX_IPSR_DATA(IP8_2_0, AVB_MDC),
- PINMUX_IPSR_MODSEL_DATA(IP8_2_0, SSI_SDATA6_B, SEL_SSI6_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_5_3, HSCIF0_HRX, SEL_HSCIF0_0),
- PINMUX_IPSR_DATA(IP8_5_3, VI0_R4),
- PINMUX_IPSR_MODSEL_DATA(IP8_5_3, I2C1_SCL_C, SEL_I2C01_2),
- PINMUX_IPSR_MODSEL_DATA(IP8_5_3, AUDIO_CLKA_B, SEL_ADG_1),
- PINMUX_IPSR_DATA(IP8_5_3, AVB_MDIO),
- PINMUX_IPSR_MODSEL_DATA(IP8_5_3, SSI_SCK78_B, SEL_SSI7_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_8_6, HSCIF0_HTX, SEL_HSCIF0_0),
- PINMUX_IPSR_DATA(IP8_8_6, VI0_R5),
- PINMUX_IPSR_MODSEL_DATA(IP8_8_6, I2C1_SDA_C, SEL_I2C01_2),
- PINMUX_IPSR_MODSEL_DATA(IP8_8_6, AUDIO_CLKB_B, SEL_ADG_1),
- PINMUX_IPSR_DATA(IP8_5_3, AVB_LINK),
- PINMUX_IPSR_MODSEL_DATA(IP8_8_6, SSI_WS78_B, SEL_SSI7_1),
- PINMUX_IPSR_DATA(IP8_11_9, HSCIF0_HCTS_N),
- PINMUX_IPSR_DATA(IP8_11_9, VI0_R6),
- PINMUX_IPSR_MODSEL_DATA(IP8_11_9, SCIF0_RXD_D, SEL_SCIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP8_11_9, I2C0_SCL_E, SEL_I2C00_4),
- PINMUX_IPSR_DATA(IP8_11_9, AVB_MAGIC),
- PINMUX_IPSR_MODSEL_DATA(IP8_11_9, SSI_SDATA7_B, SEL_SSI7_1),
- PINMUX_IPSR_DATA(IP8_14_12, HSCIF0_HRTS_N),
- PINMUX_IPSR_DATA(IP8_14_12, VI0_R7),
- PINMUX_IPSR_MODSEL_DATA(IP8_14_12, SCIF0_TXD_D, SEL_SCIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP8_14_12, I2C0_SDA_E, SEL_I2C00_4),
- PINMUX_IPSR_DATA(IP8_14_12, AVB_PHY_INT),
- PINMUX_IPSR_MODSEL_DATA(IP8_14_12, SSI_SDATA8_B, SEL_SSI8_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_16_15, HSCIF0_HSCK, SEL_HSCIF0_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_16_15, SCIF_CLK_B, SEL_SCIF0_1),
- PINMUX_IPSR_DATA(IP8_16_15, AVB_CRS),
- PINMUX_IPSR_MODSEL_DATA(IP8_16_15, AUDIO_CLKC_B, SEL_ADG_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_19_17, I2C0_SCL, SEL_I2C00_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_19_17, SCIF0_RXD_C, SEL_SCIF0_2),
- PINMUX_IPSR_DATA(IP8_19_17, PWM5),
- PINMUX_IPSR_MODSEL_DATA(IP8_19_17, TCLK1_B, SEL_TMU_1),
- PINMUX_IPSR_DATA(IP8_19_17, AVB_GTXREFCLK),
- PINMUX_IPSR_MODSEL_DATA(IP8_19_17, CAN1_RX_D, SEL_CAN1_3),
- PINMUX_IPSR_DATA(IP8_19_17, TPUTO0_B),
- PINMUX_IPSR_MODSEL_DATA(IP8_22_20, I2C0_SDA, SEL_I2C00_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_22_20, SCIF0_TXD_C, SEL_SCIF0_2),
- PINMUX_IPSR_DATA(IP8_22_20, TPUTO0),
- PINMUX_IPSR_MODSEL_DATA(IP8_22_20, CAN_CLK, SEL_CAN_0),
- PINMUX_IPSR_DATA(IP8_22_20, DVC_MUTE),
- PINMUX_IPSR_MODSEL_DATA(IP8_22_20, CAN1_TX_D, SEL_CAN1_3),
- PINMUX_IPSR_MODSEL_DATA(IP8_25_23, I2C1_SCL, SEL_I2C01_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_25_23, SCIF4_RXD, SEL_SCIF4_0),
- PINMUX_IPSR_DATA(IP8_25_23, PWM5_B),
- PINMUX_IPSR_DATA(IP8_25_23, DU1_DR0),
- PINMUX_IPSR_MODSEL_DATA(IP8_25_23, RIF1_SYNC_B, SEL_DR2_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_25_23, TS_SDATA_D, SEL_TSIF0_3),
- PINMUX_IPSR_DATA(IP8_25_23, TPUTO1_B),
- PINMUX_IPSR_MODSEL_DATA(IP8_28_26, I2C1_SDA, SEL_I2C01_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_28_26, SCIF4_TXD, SEL_SCIF4_0),
- PINMUX_IPSR_DATA(IP8_28_26, IRQ5),
- PINMUX_IPSR_DATA(IP8_28_26, DU1_DR1),
- PINMUX_IPSR_MODSEL_DATA(IP8_28_26, RIF1_CLK_B, SEL_DR2_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_28_26, TS_SCK_D, SEL_TSIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP8_28_26, BPFCLK_C, SEL_DARC_2),
- PINMUX_IPSR_DATA(IP8_31_29, MSIOF0_RXD),
- PINMUX_IPSR_MODSEL_DATA(IP8_31_29, SCIF5_RXD, SEL_SCIF5_0),
- PINMUX_IPSR_MODSEL_DATA(IP8_31_29, I2C2_SCL_C, SEL_I2C02_2),
- PINMUX_IPSR_DATA(IP8_31_29, DU1_DR2),
- PINMUX_IPSR_MODSEL_DATA(IP8_31_29, RIF1_D0_B, SEL_DR2_1),
- PINMUX_IPSR_MODSEL_DATA(IP8_31_29, TS_SDEN_D, SEL_TSIF0_3),
- PINMUX_IPSR_MODSEL_DATA(IP8_31_29, FMCLK_C, SEL_DARC_2),
- PINMUX_IPSR_MODSEL_DATA(IP8_31_29, RDS_CLK, SEL_RDS_0),
-
- /*
- * From IPSR9 to IPSR10 have been removed because they does not use.
- */
-
- /* IPSR11 */
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SSI_WS5, SEL_SSI5_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SCIFA3_RXD, SEL_SCIFA3_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_2_0, I2C3_SCL_C, SEL_I2C03_2),
- PINMUX_IPSR_DATA(IP11_2_0, DU1_DOTCLKOUT0),
- PINMUX_IPSR_DATA(IP11_2_0, CAN_DEBUGOUT11),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SSI_SDATA5, SEL_SSI5_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SCIFA3_TXD, SEL_SCIFA3_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_5_3, I2C3_SDA_C, SEL_I2C03_2),
- PINMUX_IPSR_DATA(IP11_5_3, DU1_DOTCLKOUT1),
- PINMUX_IPSR_DATA(IP11_5_3, CAN_DEBUGOUT12),
- PINMUX_IPSR_MODSEL_DATA(IP11_7_6, SSI_SCK6, SEL_SSI6_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_7_6, SCIFA1_SCK_B, SEL_SCIFA1_1),
- PINMUX_IPSR_DATA(IP11_7_6, DU1_EXHSYNC_DU1_HSYNC),
- PINMUX_IPSR_DATA(IP11_7_6, CAN_DEBUGOUT13),
- PINMUX_IPSR_MODSEL_DATA(IP11_10_8, SSI_WS6, SEL_SSI6_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_10_8, SCIFA1_RXD_B, SEL_SCIFA1_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_10_8, I2C4_SCL_C, SEL_I2C04_2),
- PINMUX_IPSR_DATA(IP11_10_8, DU1_EXVSYNC_DU1_VSYNC),
- PINMUX_IPSR_DATA(IP11_10_8, CAN_DEBUGOUT14),
- PINMUX_IPSR_MODSEL_DATA(IP11_13_11, SSI_SDATA6, SEL_SSI6_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_13_11, SCIFA1_TXD_B, SEL_SCIFA1_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_13_11, I2C4_SDA_C, SEL_I2C04_2),
- PINMUX_IPSR_DATA(IP11_13_11, DU1_EXODDF_DU1_ODDF_DISP_CDE),
- PINMUX_IPSR_DATA(IP11_13_11, CAN_DEBUGOUT15),
- PINMUX_IPSR_MODSEL_DATA(IP11_15_14, SSI_SCK78, SEL_SSI7_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_15_14, SCIFA2_SCK_B, SEL_SCIFA2_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_15_14, IIC0_SDA_C, SEL_IIC00_2),
- PINMUX_IPSR_DATA(IP11_15_14, DU1_DISP),
- PINMUX_IPSR_MODSEL_DATA(IP11_17_16, SSI_WS78, SEL_SSI7_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_17_16, SCIFA2_RXD_B, SEL_SCIFA2_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_17_16, IIC0_SCL_C, SEL_IIC00_2),
- PINMUX_IPSR_DATA(IP11_17_16, DU1_CDE),
- PINMUX_IPSR_MODSEL_DATA(IP11_20_18, SSI_SDATA7, SEL_SSI7_0),
- PINMUX_IPSR_MODSEL_DATA(IP11_20_18, SCIFA2_TXD_B, SEL_SCIFA2_1),
- PINMUX_IPSR_DATA(IP11_20_18, IRQ8),
- PINMUX_IPSR_MODSEL_DATA(IP11_20_18, AUDIO_CLKA_D, SEL_ADG_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_20_18, CAN_CLK_D, SEL_CAN_3),
- PINMUX_IPSR_DATA(IP11_20_18, PCMOE_N),
- PINMUX_IPSR_DATA(IP11_23_21, SSI_SCK0129),
- PINMUX_IPSR_MODSEL_DATA(IP11_23_21, MSIOF1_RXD_B, SEL_MSI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_23_21, SCIF5_RXD_D, SEL_SCIF5_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_23_21, ADIDATA_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_23_21, AD_DI_B, SEL_ADI_1),
- PINMUX_IPSR_DATA(IP11_23_21, PCMWE_N),
- PINMUX_IPSR_DATA(IP11_26_24, SSI_WS0129),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, MSIOF1_TXD_B, SEL_MSI1_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, SCIF5_TXD_D, SEL_SCIF5_3),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, ADICS_SAMP_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_26_24, AD_DO_B, SEL_ADI_1),
- PINMUX_IPSR_DATA(IP11_29_27, SSI_SDATA0),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, MSIOF1_SCK_B, SEL_MSI1_1),
- PINMUX_IPSR_DATA(IP11_29_27, PWM0_B),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, ADICLK_B, SEL_RAD_1),
- PINMUX_IPSR_MODSEL_DATA(IP11_29_27, AD_CLK_B, SEL_ADI_1),
-
- /*
- * From IPSR12 to IPSR13 have been removed because they does not use.
- */
-};
-
-static struct pinmux_gpio pinmux_gpios[] = {
- PINMUX_GPIO_GP_ALL(),
-
- GPIO_FN(A2), GPIO_FN(WE0_N), GPIO_FN(WE1_N), GPIO_FN(DACK0),
- GPIO_FN(USB0_PWEN), GPIO_FN(USB0_OVC), GPIO_FN(USB1_PWEN),
- GPIO_FN(USB1_OVC), GPIO_FN(SD0_CLK), GPIO_FN(SD0_CMD),
- GPIO_FN(SD0_DATA0), GPIO_FN(SD0_DATA1), GPIO_FN(SD0_DATA2),
- GPIO_FN(SD0_DATA3), GPIO_FN(SD0_CD), GPIO_FN(SD0_WP),
- GPIO_FN(SD1_CLK), GPIO_FN(SD1_CMD), GPIO_FN(SD1_DATA0),
- GPIO_FN(SD1_DATA1), GPIO_FN(SD1_DATA2), GPIO_FN(SD1_DATA3),
-
- /* IPSR0 */
- GPIO_FN(SD1_CD), GPIO_FN(CAN0_RX), GPIO_FN(SD1_WP), GPIO_FN(IRQ7),
- GPIO_FN(CAN0_TX), GPIO_FN(MMC_CLK), GPIO_FN(SD2_CLK), GPIO_FN(MMC_CMD),
- GPIO_FN(SD2_CMD), GPIO_FN(MMC_D0), GPIO_FN(SD2_DATA0), GPIO_FN(MMC_D1),
- GPIO_FN(SD2_DATA1), GPIO_FN(MMC_D2), GPIO_FN(SD2_DATA2),
- GPIO_FN(MMC_D3), GPIO_FN(SD2_DATA3), GPIO_FN(MMC_D4),
- GPIO_FN(SD2_CD), GPIO_FN(MMC_D5), GPIO_FN(SD2_WP), GPIO_FN(MMC_D6),
- GPIO_FN(SCIF0_RXD), GPIO_FN(I2C2_SCL_B), GPIO_FN(CAN1_RX),
- GPIO_FN(MMC_D7), GPIO_FN(SCIF0_TXD), GPIO_FN(I2C2_SDA_B),
- GPIO_FN(CAN1_TX), GPIO_FN(D0), GPIO_FN(SCIFA3_SCK_B), GPIO_FN(IRQ4),
- GPIO_FN(D1), GPIO_FN(SCIFA3_RXD_B), GPIO_FN(D2), GPIO_FN(SCIFA3_TXD_B),
- GPIO_FN(D3), GPIO_FN(I2C3_SCL_B), GPIO_FN(SCIF5_RXD_B), GPIO_FN(D4),
- GPIO_FN(I2C3_SDA_B), GPIO_FN(SCIF5_TXD_B), GPIO_FN(D5),
- GPIO_FN(SCIF4_RXD_B), GPIO_FN(I2C0_SCL_D),
-
- /*
- * From IPSR1 to IPSR5 have been removed because they does not use.
- */
-
- /* IPSR6 */
- GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(QSTB_QHE),
- GPIO_FN(CC50_STATE28), GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE),
- GPIO_FN(QCPV_QDE), GPIO_FN(CC50_STATE29), GPIO_FN(DU0_DISP),
- GPIO_FN(QPOLA), GPIO_FN(CC50_STATE30), GPIO_FN(DU0_CDE), GPIO_FN(QPOLB),
- GPIO_FN(CC50_STATE31), GPIO_FN(VI0_CLK), GPIO_FN(AVB_RX_CLK),
- GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(AVB_RX_DV),
- GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(AVB_RXD0), GPIO_FN(VI0_DATA2_VI0_B2),
- GPIO_FN(AVB_RXD1), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(AVB_RXD2),
- GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(AVB_RXD3), GPIO_FN(VI0_DATA5_VI0_B5),
- GPIO_FN(AVB_RXD4), GPIO_FN(VI0_DATA6_VI0_B6), GPIO_FN(AVB_RXD5),
- GPIO_FN(VI0_DATA7_VI0_B7), GPIO_FN(AVB_RXD6), GPIO_FN(VI0_CLKENB),
- GPIO_FN(I2C3_SCL), GPIO_FN(SCIFA5_RXD_C), GPIO_FN(IETX_C),
- GPIO_FN(AVB_RXD7), GPIO_FN(VI0_FIELD), GPIO_FN(I2C3_SDA),
- GPIO_FN(SCIFA5_TXD_C), GPIO_FN(IECLK_C), GPIO_FN(AVB_RX_ER),
- GPIO_FN(VI0_HSYNC_N), GPIO_FN(SCIF0_RXD_B), GPIO_FN(I2C0_SCL_C),
- GPIO_FN(IERX_C), GPIO_FN(AVB_COL), GPIO_FN(VI0_VSYNC_N),
- GPIO_FN(SCIF0_TXD_B), GPIO_FN(I2C0_SDA_C), GPIO_FN(AUDIO_CLKOUT_B),
- GPIO_FN(AVB_TX_EN), GPIO_FN(ETH_MDIO), GPIO_FN(VI0_G0),
- GPIO_FN(MSIOF2_RXD_B), GPIO_FN(IIC0_SCL_D), GPIO_FN(AVB_TX_CLK),
- GPIO_FN(ADIDATA), GPIO_FN(AD_DI),
-
- /* IPSR7 */
- GPIO_FN(ETH_CRS_DV), GPIO_FN(VI0_G1), GPIO_FN(MSIOF2_TXD_B),
- GPIO_FN(IIC0_SDA_D), GPIO_FN(AVB_TXD0), GPIO_FN(ADICS_SAMP),
- GPIO_FN(AD_DO), GPIO_FN(ETH_RX_ER), GPIO_FN(VI0_G2),
- GPIO_FN(MSIOF2_SCK_B), GPIO_FN(CAN0_RX_B), GPIO_FN(AVB_TXD1),
- GPIO_FN(ADICLK), GPIO_FN(AD_CLK), GPIO_FN(ETH_RXD0), GPIO_FN(VI0_G3),
- GPIO_FN(MSIOF2_SYNC_B), GPIO_FN(CAN0_TX_B), GPIO_FN(AVB_TXD2),
- GPIO_FN(ADICHS0), GPIO_FN(AD_NCS_N), GPIO_FN(ETH_RXD1),
- GPIO_FN(VI0_G4), GPIO_FN(MSIOF2_SS1_B), GPIO_FN(SCIF4_RXD_D),
- GPIO_FN(AVB_TXD3), GPIO_FN(ADICHS1), GPIO_FN(ETH_LINK), GPIO_FN(VI0_G5),
- GPIO_FN(MSIOF2_SS2_B), GPIO_FN(SCIF4_TXD_D), GPIO_FN(AVB_TXD4),
- GPIO_FN(ADICHS2), GPIO_FN(ETH_REFCLK), GPIO_FN(VI0_G6),
- GPIO_FN(SCIF2_SCK_C), GPIO_FN(AVB_TXD5), GPIO_FN(SSI_SCK5_B),
- GPIO_FN(ETH_TXD1), GPIO_FN(VI0_G7), GPIO_FN(SCIF2_RXD_C),
- GPIO_FN(IIC1_SCL_D), GPIO_FN(AVB_TXD6), GPIO_FN(SSI_WS5_B),
- GPIO_FN(ETH_TX_EN), GPIO_FN(VI0_R0), GPIO_FN(SCIF2_TXD_C),
- GPIO_FN(IIC1_SDA_D), GPIO_FN(AVB_TXD7), GPIO_FN(SSI_SDATA5_B),
- GPIO_FN(ETH_MAGIC), GPIO_FN(VI0_R1), GPIO_FN(SCIF3_SCK_B),
- GPIO_FN(AVB_TX_ER), GPIO_FN(SSI_SCK6_B), GPIO_FN(ETH_TXD0),
- GPIO_FN(VI0_R2), GPIO_FN(SCIF3_RXD_B), GPIO_FN(I2C4_SCL_E),
- GPIO_FN(AVB_GTX_CLK), GPIO_FN(SSI_WS6_B), GPIO_FN(DREQ0_N),
- GPIO_FN(SCIFB1_RXD),
-
- /* IPSR8 */
- GPIO_FN(ETH_MDC), GPIO_FN(VI0_R3), GPIO_FN(SCIF3_TXD_B),
- GPIO_FN(I2C4_SDA_E), GPIO_FN(AVB_MDC), GPIO_FN(SSI_SDATA6_B),
- GPIO_FN(HSCIF0_HRX), GPIO_FN(VI0_R4), GPIO_FN(I2C1_SCL_C),
- GPIO_FN(AUDIO_CLKA_B), GPIO_FN(AVB_MDIO), GPIO_FN(SSI_SCK78_B),
- GPIO_FN(HSCIF0_HTX), GPIO_FN(VI0_R5), GPIO_FN(I2C1_SDA_C),
- GPIO_FN(AUDIO_CLKB_B), GPIO_FN(AVB_LINK), GPIO_FN(SSI_WS78_B),
- GPIO_FN(HSCIF0_HCTS_N), GPIO_FN(VI0_R6), GPIO_FN(SCIF0_RXD_D),
- GPIO_FN(I2C0_SCL_E), GPIO_FN(AVB_MAGIC), GPIO_FN(SSI_SDATA7_B),
- GPIO_FN(HSCIF0_HRTS_N), GPIO_FN(VI0_R7), GPIO_FN(SCIF0_TXD_D),
- GPIO_FN(I2C0_SDA_E), GPIO_FN(AVB_PHY_INT), GPIO_FN(SSI_SDATA8_B),
- GPIO_FN(HSCIF0_HSCK), GPIO_FN(SCIF_CLK_B), GPIO_FN(AVB_CRS),
- GPIO_FN(AUDIO_CLKC_B), GPIO_FN(I2C0_SCL), GPIO_FN(SCIF0_RXD_C),
- GPIO_FN(PWM5), GPIO_FN(TCLK1_B), GPIO_FN(AVB_GTXREFCLK),
- GPIO_FN(CAN1_RX_D), GPIO_FN(TPUTO0_B), GPIO_FN(I2C0_SDA),
- GPIO_FN(SCIF0_TXD_C), GPIO_FN(TPUTO0), GPIO_FN(CAN_CLK),
- GPIO_FN(DVC_MUTE), GPIO_FN(CAN1_TX_D), GPIO_FN(I2C1_SCL),
- GPIO_FN(SCIF4_RXD), GPIO_FN(PWM5_B), GPIO_FN(DU1_DR0),
- GPIO_FN(RIF1_SYNC_B), GPIO_FN(TS_SDATA_D), GPIO_FN(TPUTO1_B),
- GPIO_FN(I2C1_SDA), GPIO_FN(SCIF4_TXD), GPIO_FN(IRQ5),
- GPIO_FN(DU1_DR1), GPIO_FN(RIF1_CLK_B), GPIO_FN(TS_SCK_D),
- GPIO_FN(BPFCLK_C), GPIO_FN(MSIOF0_RXD), GPIO_FN(SCIF5_RXD),
- GPIO_FN(I2C2_SCL_C), GPIO_FN(DU1_DR2), GPIO_FN(RIF1_D0_B),
- GPIO_FN(TS_SDEN_D), GPIO_FN(FMCLK_C), GPIO_FN(RDS_CLK),
-
- /*
- * From IPSR9 to IPSR10 have been removed because they does not use.
- */
-
- /* IPSR11 */
- GPIO_FN(SSI_WS5), GPIO_FN(SCIFA3_RXD), GPIO_FN(I2C3_SCL_C),
- GPIO_FN(DU1_DOTCLKOUT0), GPIO_FN(CAN_DEBUGOUT11), GPIO_FN(SSI_SDATA5),
- GPIO_FN(SCIFA3_TXD), GPIO_FN(I2C3_SDA_C), GPIO_FN(DU1_DOTCLKOUT1),
- GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(SSI_SCK6), GPIO_FN(SCIFA1_SCK_B),
- GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(CAN_DEBUGOUT13),
- GPIO_FN(SSI_WS6), GPIO_FN(SCIFA1_RXD_B), GPIO_FN(I2C4_SCL_C),
- GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), GPIO_FN(CAN_DEBUGOUT14),
- GPIO_FN(SSI_SDATA6), GPIO_FN(SCIFA1_TXD_B), GPIO_FN(I2C4_SDA_C),
- GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE), GPIO_FN(CAN_DEBUGOUT15),
- GPIO_FN(SSI_SCK78), GPIO_FN(SCIFA2_SCK_B), GPIO_FN(IIC0_SDA_C),
- GPIO_FN(DU1_DISP), GPIO_FN(SSI_WS78), GPIO_FN(SCIFA2_RXD_B),
- GPIO_FN(IIC0_SCL_C), GPIO_FN(DU1_CDE), GPIO_FN(SSI_SDATA7),
- GPIO_FN(SCIFA2_TXD_B), GPIO_FN(IRQ8), GPIO_FN(AUDIO_CLKA_D),
- GPIO_FN(CAN_CLK_D), GPIO_FN(PCMOE_N), GPIO_FN(SSI_SCK0129),
- GPIO_FN(MSIOF1_RXD_B), GPIO_FN(SCIF5_RXD_D), GPIO_FN(ADIDATA_B),
- GPIO_FN(AD_DI_B), GPIO_FN(PCMWE_N), GPIO_FN(SSI_WS0129),
- GPIO_FN(MSIOF1_TXD_B), GPIO_FN(SCIF5_TXD_D), GPIO_FN(ADICS_SAMP_B),
- GPIO_FN(AD_DO_B), GPIO_FN(SSI_SDATA0), GPIO_FN(MSIOF1_SCK_B),
- GPIO_FN(PWM0_B), GPIO_FN(ADICLK_B), GPIO_FN(AD_CLK_B),
-
- /*
- * From IPSR12 to IPSR13 have been removed because they does not use.
- */
-};
-
-static struct pinmux_cfg_reg pinmux_config_regs[] = {
- { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
- GP_0_31_FN, FN_IP2_17_16,
- GP_0_30_FN, FN_IP2_15_14,
- GP_0_29_FN, FN_IP2_13_12,
- GP_0_28_FN, FN_IP2_11_10,
- GP_0_27_FN, FN_IP2_9_8,
- GP_0_26_FN, FN_IP2_7_6,
- GP_0_25_FN, FN_IP2_5_4,
- GP_0_24_FN, FN_IP2_3_2,
- GP_0_23_FN, FN_IP2_1_0,
- GP_0_22_FN, FN_IP1_31_30,
- GP_0_21_FN, FN_IP1_29_28,
- GP_0_20_FN, FN_IP1_27,
- GP_0_19_FN, FN_IP1_26,
- GP_0_18_FN, FN_A2,
- GP_0_17_FN, FN_IP1_24,
- GP_0_16_FN, FN_IP1_23_22,
- GP_0_15_FN, FN_IP1_21_20,
- GP_0_14_FN, FN_IP1_19_18,
- GP_0_13_FN, FN_IP1_17_15,
- GP_0_12_FN, FN_IP1_14_13,
- GP_0_11_FN, FN_IP1_12_11,
- GP_0_10_FN, FN_IP1_10_8,
- GP_0_9_FN, FN_IP1_7_6,
- GP_0_8_FN, FN_IP1_5_4,
- GP_0_7_FN, FN_IP1_3_2,
- GP_0_6_FN, FN_IP1_1_0,
- GP_0_5_FN, FN_IP0_31_30,
- GP_0_4_FN, FN_IP0_29_28,
- GP_0_3_FN, FN_IP0_27_26,
- GP_0_2_FN, FN_IP0_25,
- GP_0_1_FN, FN_IP0_24,
- GP_0_0_FN, FN_IP0_23_22, }
- },
- { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_25_FN, FN_DACK0,
- GP_1_24_FN, FN_IP7_31,
- GP_1_23_FN, FN_IP4_1_0,
- GP_1_22_FN, FN_WE1_N,
- GP_1_21_FN, FN_WE0_N,
- GP_1_20_FN, FN_IP3_31,
- GP_1_19_FN, FN_IP3_30,
- GP_1_18_FN, FN_IP3_29_27,
- GP_1_17_FN, FN_IP3_26_24,
- GP_1_16_FN, FN_IP3_23_21,
- GP_1_15_FN, FN_IP3_20_18,
- GP_1_14_FN, FN_IP3_17_15,
- GP_1_13_FN, FN_IP3_14_13,
- GP_1_12_FN, FN_IP3_12,
- GP_1_11_FN, FN_IP3_11,
- GP_1_10_FN, FN_IP3_10,
- GP_1_9_FN, FN_IP3_9_8,
- GP_1_8_FN, FN_IP3_7_6,
- GP_1_7_FN, FN_IP3_5_4,
- GP_1_6_FN, FN_IP3_3_2,
- GP_1_5_FN, FN_IP3_1_0,
- GP_1_4_FN, FN_IP2_31_30,
- GP_1_3_FN, FN_IP2_29_27,
- GP_1_2_FN, FN_IP2_26_24,
- GP_1_1_FN, FN_IP2_23_21,
- GP_1_0_FN, FN_IP2_20_18, }
- },
- { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
- GP_2_31_FN, FN_IP6_7_6,
- GP_2_30_FN, FN_IP6_5_4,
- GP_2_29_FN, FN_IP6_3_2,
- GP_2_28_FN, FN_IP6_1_0,
- GP_2_27_FN, FN_IP5_31_30,
- GP_2_26_FN, FN_IP5_29_28,
- GP_2_25_FN, FN_IP5_27_26,
- GP_2_24_FN, FN_IP5_25_24,
- GP_2_23_FN, FN_IP5_23_22,
- GP_2_22_FN, FN_IP5_21_20,
- GP_2_21_FN, FN_IP5_19_18,
- GP_2_20_FN, FN_IP5_17_16,
- GP_2_19_FN, FN_IP5_15_14,
- GP_2_18_FN, FN_IP5_13_12,
- GP_2_17_FN, FN_IP5_11_9,
- GP_2_16_FN, FN_IP5_8_6,
- GP_2_15_FN, FN_IP5_5_4,
- GP_2_14_FN, FN_IP5_3_2,
- GP_2_13_FN, FN_IP5_1_0,
- GP_2_12_FN, FN_IP4_31_30,
- GP_2_11_FN, FN_IP4_29_28,
- GP_2_10_FN, FN_IP4_27_26,
- GP_2_9_FN, FN_IP4_25_23,
- GP_2_8_FN, FN_IP4_22_20,
- GP_2_7_FN, FN_IP4_19_18,
- GP_2_6_FN, FN_IP4_17_16,
- GP_2_5_FN, FN_IP4_15_14,
- GP_2_4_FN, FN_IP4_13_12,
- GP_2_3_FN, FN_IP4_11_10,
- GP_2_2_FN, FN_IP4_9_8,
- GP_2_1_FN, FN_IP4_7_5,
- GP_2_0_FN, FN_IP4_4_2 }
- },
- { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
- GP_3_31_FN, FN_IP8_22_20,
- GP_3_30_FN, FN_IP8_19_17,
- GP_3_29_FN, FN_IP8_16_15,
- GP_3_28_FN, FN_IP8_14_12,
- GP_3_27_FN, FN_IP8_11_9,
- GP_3_26_FN, FN_IP8_8_6,
- GP_3_25_FN, FN_IP8_5_3,
- GP_3_24_FN, FN_IP8_2_0,
- GP_3_23_FN, FN_IP7_29_27,
- GP_3_22_FN, FN_IP7_26_24,
- GP_3_21_FN, FN_IP7_23_21,
- GP_3_20_FN, FN_IP7_20_18,
- GP_3_19_FN, FN_IP7_17_15,
- GP_3_18_FN, FN_IP7_14_12,
- GP_3_17_FN, FN_IP7_11_9,
- GP_3_16_FN, FN_IP7_8_6,
- GP_3_15_FN, FN_IP7_5_3,
- GP_3_14_FN, FN_IP7_2_0,
- GP_3_13_FN, FN_IP6_31_29,
- GP_3_12_FN, FN_IP6_28_26,
- GP_3_11_FN, FN_IP6_25_23,
- GP_3_10_FN, FN_IP6_22_20,
- GP_3_9_FN, FN_IP6_19_17,
- GP_3_8_FN, FN_IP6_16,
- GP_3_7_FN, FN_IP6_15,
- GP_3_6_FN, FN_IP6_14,
- GP_3_5_FN, FN_IP6_13,
- GP_3_4_FN, FN_IP6_12,
- GP_3_3_FN, FN_IP6_11,
- GP_3_2_FN, FN_IP6_10,
- GP_3_1_FN, FN_IP6_9,
- GP_3_0_FN, FN_IP6_8 }
- },
- { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
- GP_4_31_FN, FN_IP11_17_16,
- GP_4_30_FN, FN_IP11_15_14,
- GP_4_29_FN, FN_IP11_13_11,
- GP_4_28_FN, FN_IP11_10_8,
- GP_4_27_FN, FN_IP11_7_6,
- GP_4_26_FN, FN_IP11_5_3,
- GP_4_25_FN, FN_IP11_2_0,
- GP_4_24_FN, FN_IP10_31_30,
- GP_4_23_FN, FN_IP10_29_27,
- GP_4_22_FN, FN_IP10_26_24,
- GP_4_21_FN, FN_IP10_23_21,
- GP_4_20_FN, FN_IP10_20_18,
- GP_4_19_FN, FN_IP10_17_15,
- GP_4_18_FN, FN_IP10_14_12,
- GP_4_17_FN, FN_IP10_11_9,
- GP_4_16_FN, FN_IP10_8_6,
- GP_4_15_FN, FN_IP10_5_3,
- GP_4_14_FN, FN_IP10_2_0,
- GP_4_13_FN, FN_IP9_30_28,
- GP_4_12_FN, FN_IP9_27_25,
- GP_4_11_FN, FN_IP9_24_22,
- GP_4_10_FN, FN_IP9_21_19,
- GP_4_9_FN, FN_IP9_18_17,
- GP_4_8_FN, FN_IP9_16_15,
- GP_4_7_FN, FN_IP9_14_12,
- GP_4_6_FN, FN_IP9_11_9,
- GP_4_5_FN, FN_IP9_8_6,
- GP_4_4_FN, FN_IP9_5_3,
- GP_4_3_FN, FN_IP9_2_0,
- GP_4_2_FN, FN_IP8_31_29,
- GP_4_1_FN, FN_IP8_28_26,
- GP_4_0_FN, FN_IP8_25_23 }
- },
- { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_5_27_FN, FN_USB1_OVC,
- GP_5_26_FN, FN_USB1_PWEN,
- GP_5_25_FN, FN_USB0_OVC,
- GP_5_24_FN, FN_USB0_PWEN,
- GP_5_23_FN, FN_IP13_26_24,
- GP_5_22_FN, FN_IP13_23_21,
- GP_5_21_FN, FN_IP13_20_18,
- GP_5_20_FN, FN_IP13_17_15,
- GP_5_19_FN, FN_IP13_14_12,
- GP_5_18_FN, FN_IP13_11_9,
- GP_5_17_FN, FN_IP13_8_6,
- GP_5_16_FN, FN_IP13_5_3,
- GP_5_15_FN, FN_IP13_2_0,
- GP_5_14_FN, FN_IP12_29_27,
- GP_5_13_FN, FN_IP12_26_24,
- GP_5_12_FN, FN_IP12_23_21,
- GP_5_11_FN, FN_IP12_20_18,
- GP_5_10_FN, FN_IP12_17_15,
- GP_5_9_FN, FN_IP12_14_13,
- GP_5_8_FN, FN_IP12_12_11,
- GP_5_7_FN, FN_IP12_10_9,
- GP_5_6_FN, FN_IP12_8_6,
- GP_5_5_FN, FN_IP12_5_3,
- GP_5_4_FN, FN_IP12_2_0,
- GP_5_3_FN, FN_IP11_29_27,
- GP_5_2_FN, FN_IP11_26_24,
- GP_5_1_FN, FN_IP11_23_21,
- GP_5_0_FN, FN_IP11_20_18 }
- },
- { PINMUX_CFG_REG("GPSR6", 0xE606001C, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_6_25_FN, FN_IP0_21_20,
- GP_6_24_FN, FN_IP0_19_18,
- GP_6_23_FN, FN_IP0_17,
- GP_6_22_FN, FN_IP0_16,
- GP_6_21_FN, FN_IP0_15,
- GP_6_20_FN, FN_IP0_14,
- GP_6_19_FN, FN_IP0_13,
- GP_6_18_FN, FN_IP0_12,
- GP_6_17_FN, FN_IP0_11,
- GP_6_16_FN, FN_IP0_10,
- GP_6_15_FN, FN_IP0_9_8,
- GP_6_14_FN, FN_IP0_0,
- GP_6_13_FN, FN_SD1_DATA3,
- GP_6_12_FN, FN_SD1_DATA2,
- GP_6_11_FN, FN_SD1_DATA1,
- GP_6_10_FN, FN_SD1_DATA0,
- GP_6_9_FN, FN_SD1_CMD,
- GP_6_8_FN, FN_SD1_CLK,
- GP_6_7_FN, FN_SD0_WP,
- GP_6_6_FN, FN_SD0_CD,
- GP_6_5_FN, FN_SD0_DATA3,
- GP_6_4_FN, FN_SD0_DATA2,
- GP_6_3_FN, FN_SD0_DATA1,
- GP_6_2_FN, FN_SD0_DATA0,
- GP_6_1_FN, FN_SD0_CMD,
- GP_6_0_FN, FN_SD0_CLK }
- },
- { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060020, 32,
- 2, 2, 2, 1, 1, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1,
- 2, 1, 1, 1, 1, 1, 1, 1, 1) {
- /* IP0_31_30 [2] */
- FN_D5, FN_SCIF4_RXD_B, FN_I2C0_SCL_D, 0,
- /* IP0_29_28 [2] */
- FN_D4, FN_I2C3_SDA_B, FN_SCIF5_TXD_B, 0,
- /* IP0_27_26 [2] */
- FN_D3, FN_I2C3_SCL_B, FN_SCIF5_RXD_B, 0,
- /* IP0_25 [1] */
- FN_D2, FN_SCIFA3_TXD_B,
- /* IP0_24 [1] */
- FN_D1, FN_SCIFA3_RXD_B,
- /* IP0_23_22 [2] */
- FN_D0, FN_SCIFA3_SCK_B, FN_IRQ4, 0,
- /* IP0_21_20 [2] */
- FN_MMC_D7, FN_SCIF0_TXD, FN_I2C2_SDA_B, FN_CAN1_TX,
- /* IP0_19_18 [2] */
- FN_MMC_D6, FN_SCIF0_RXD, FN_I2C2_SCL_B, FN_CAN1_RX,
- /* IP0_17 [1] */
- FN_MMC_D5, FN_SD2_WP,
- /* IP0_16 [1] */
- FN_MMC_D4, FN_SD2_CD,
- /* IP0_15 [1] */
- FN_MMC_D3, FN_SD2_DATA3,
- /* IP0_14 [1] */
- FN_MMC_D2, FN_SD2_DATA2,
- /* IP0_13 [1] */
- FN_MMC_D1, FN_SD2_DATA1,
- /* IP0_12 [1] */
- FN_MMC_D0, FN_SD2_DATA0,
- /* IP0_11 [1] */
- FN_MMC_CMD, FN_SD2_CMD,
- /* IP0_10 [1] */
- FN_MMC_CLK, FN_SD2_CLK,
- /* IP0_9_8 [2] */
- FN_SD1_WP, FN_IRQ7, FN_CAN0_TX, 0,
- /* IP0_7 [1] */
- 0, 0,
- /* IP0_6 [1] */
- 0, 0,
- /* IP0_5 [1] */
- 0, 0,
- /* IP0_4 [1] */
- 0, 0,
- /* IP0_3 [1] */
- 0, 0,
- /* IP0_2 [1] */
- 0, 0,
- /* IP0_1 [1] */
- 0, 0,
- /* IP0_0 [1] */
- FN_SD1_CD, FN_CAN0_RX, }
- },
-
- /*
- * From IPSR1 to IPSR5 have been removed because they does not use.
- */
-
- { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
- 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2,
- 2, 2) {
- /* IP6_31_29 [3] */
- FN_ETH_MDIO, FN_VI0_G0, FN_MSIOF2_RXD_B, FN_IIC0_SCL_D,
- FN_AVB_TX_CLK, FN_ADIDATA, FN_AD_DI, 0,
- /* IP6_28_26 [3] */
- FN_VI0_VSYNC_N, FN_SCIF0_TXD_B, FN_I2C0_SDA_C,
- FN_AUDIO_CLKOUT_B, FN_AVB_TX_EN, 0, 0, 0,
- /* IP6_25_23 [3] */
- FN_VI0_HSYNC_N, FN_SCIF0_RXD_B, FN_I2C0_SCL_C, FN_IERX_C,
- FN_AVB_COL, 0, 0, 0,
- /* IP6_22_20 [3] */
- FN_VI0_FIELD, FN_I2C3_SDA, FN_SCIFA5_TXD_C, FN_IECLK_C,
- FN_AVB_RX_ER, 0, 0, 0,
- /* IP6_19_17 [3] */
- FN_VI0_CLKENB, FN_I2C3_SCL, FN_SCIFA5_RXD_C, FN_IETX_C,
- FN_AVB_RXD7, 0, 0, 0,
- /* IP6_16 [1] */
- FN_VI0_DATA7_VI0_B7, FN_AVB_RXD6,
- /* IP6_15 [1] */
- FN_VI0_DATA6_VI0_B6, FN_AVB_RXD5,
- /* IP6_14 [1] */
- FN_VI0_DATA5_VI0_B5, FN_AVB_RXD4,
- /* IP6_13 [1] */
- FN_VI0_DATA4_VI0_B4, FN_AVB_RXD3,
- /* IP6_12 [1] */
- FN_VI0_DATA3_VI0_B3, FN_AVB_RXD2,
- /* IP6_11 [1] */
- FN_VI0_DATA2_VI0_B2, FN_AVB_RXD1,
- /* IP6_10 [1] */
- FN_VI0_DATA1_VI0_B1, FN_AVB_RXD0,
- /* IP6_9 [1] */
- FN_VI0_DATA0_VI0_B0, FN_AVB_RX_DV,
- /* IP6_8 [1] */
- FN_VI0_CLK, FN_AVB_RX_CLK,
- /* IP6_7_6 [2] */
- FN_DU0_CDE, FN_QPOLB, FN_CC50_STATE31, 0,
- /* IP6_5_4 [2] */
- FN_DU0_DISP, FN_QPOLA, FN_CC50_STATE30, 0,
- /* IP6_3_2 [2] */
- FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CC50_STATE29,
- /* IP6_1_0 [2] */
- FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE, FN_CC50_STATE28, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
- 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
- /* IP7_31 [1] */
- FN_DREQ0_N, FN_SCIFB1_RXD,
- /* IP7_30 [1] */
- 0, 0,
- /* IP7_29_27 [3] */
- FN_ETH_TXD0, FN_VI0_R2, FN_SCIF3_RXD_B, FN_I2C4_SCL_E,
- FN_AVB_GTX_CLK, FN_SSI_WS6_B, 0, 0,
- /* IP7_26_24 [3] */
- FN_ETH_MAGIC, FN_VI0_R1, FN_SCIF3_SCK_B, FN_AVB_TX_ER,
- FN_SSI_SCK6_B, 0, 0, 0,
- /* IP7_23_21 [3] */
- FN_ETH_TX_EN, FN_VI0_R0, FN_SCIF2_TXD_C, FN_IIC1_SDA_D,
- FN_AVB_TXD7, FN_SSI_SDATA5_B, 0, 0,
- /* IP7_20_18 [3] */
- FN_ETH_TXD1, FN_VI0_G7, FN_SCIF2_RXD_C, FN_IIC1_SCL_D,
- FN_AVB_TXD6, FN_SSI_WS5_B, 0, 0,
- /* IP7_17_15 [3] */
- FN_ETH_REFCLK, FN_VI0_G6, FN_SCIF2_SCK_C, FN_AVB_TXD5,
- FN_SSI_SCK5_B, 0, 0, 0,
- /* IP7_14_12 [3] */
- FN_ETH_LINK, FN_VI0_G5, FN_MSIOF2_SS2_B, FN_SCIF4_TXD_D,
- FN_AVB_TXD4, FN_ADICHS2, 0, 0,
- /* IP7_11_9 [3] */
- FN_ETH_RXD1, FN_VI0_G4, FN_MSIOF2_SS1_B, FN_SCIF4_RXD_D,
- FN_AVB_TXD3, FN_ADICHS1, 0, 0,
- /* IP7_8_6 [3] */
- FN_ETH_RXD0, FN_VI0_G3, FN_MSIOF2_SYNC_B, FN_CAN0_TX_B,
- FN_AVB_TXD2, FN_ADICHS0, FN_AD_NCS_N, 0,
- /* IP7_5_3 [3] */
- FN_ETH_RX_ER, FN_VI0_G2, FN_MSIOF2_SCK_B, FN_CAN0_RX_B,
- FN_AVB_TXD1, FN_ADICLK, FN_AD_CLK, 0,
- /* IP7_2_0 [3] */
- FN_ETH_CRS_DV, FN_VI0_G1, FN_MSIOF2_TXD_B, FN_IIC0_SDA_D,
- FN_AVB_TXD0, FN_ADICS_SAMP, FN_AD_DO, 0, }
- },
- { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060040, 32,
- 3, 3, 3, 3, 3, 2, 3, 3, 3, 3, 3) {
- /* IP8_31_29 [3] */
- FN_MSIOF0_RXD, FN_SCIF5_RXD, FN_I2C2_SCL_C, FN_DU1_DR2,
- FN_RIF1_D0_B, FN_TS_SDEN_D, FN_FMCLK_C, FN_RDS_CLK,
- /* IP8_28_26 [3] */
- FN_I2C1_SDA, FN_SCIF4_TXD, FN_IRQ5, FN_DU1_DR1,
- FN_RIF1_CLK_B, FN_TS_SCK_D, FN_BPFCLK_C, 0,
- /* IP8_25_23 [3] */
- FN_I2C1_SCL, FN_SCIF4_RXD, FN_PWM5_B, FN_DU1_DR0,
- FN_RIF1_SYNC_B, FN_TS_SDATA_D, FN_TPUTO1_B, 0,
- /* IP8_22_20 [3] */
- FN_I2C0_SDA, FN_SCIF0_TXD_C, FN_TPUTO0, FN_CAN_CLK,
- FN_DVC_MUTE, FN_CAN1_TX_D, 0, 0,
- /* IP8_19_17 [3] */
- FN_I2C0_SCL, FN_SCIF0_RXD_C, FN_PWM5, FN_TCLK1_B,
- FN_AVB_GTXREFCLK, FN_CAN1_RX_D, FN_TPUTO0_B, 0,
- /* IP8_16_15 [2] */
- FN_HSCIF0_HSCK, FN_SCIF_CLK_B, FN_AVB_CRS, FN_AUDIO_CLKC_B,
- /* IP8_14_12 [3] */
- FN_HSCIF0_HRTS_N, FN_VI0_R7, FN_SCIF0_TXD_D, FN_I2C0_SDA_E,
- FN_AVB_PHY_INT, FN_SSI_SDATA8_B, 0, 0,
- /* IP8_11_9 [3] */
- FN_HSCIF0_HCTS_N, FN_VI0_R6, FN_SCIF0_RXD_D, FN_I2C0_SCL_E,
- FN_AVB_MAGIC, FN_SSI_SDATA7_B, 0, 0,
- /* IP8_8_6 [3] */
- FN_HSCIF0_HTX, FN_VI0_R5, FN_I2C1_SDA_C, FN_AUDIO_CLKB_B,
- FN_AVB_LINK, FN_SSI_WS78_B, 0, 0,
- /* IP8_5_3 [3] */
- FN_HSCIF0_HRX, FN_VI0_R4, FN_I2C1_SCL_C, FN_AUDIO_CLKA_B,
- FN_AVB_MDIO, FN_SSI_SCK78_B, 0, 0,
- /* IP8_2_0 [3] */
- FN_ETH_MDC, FN_VI0_R3, FN_SCIF3_TXD_B, FN_I2C4_SDA_E,
- FN_AVB_MDC, FN_SSI_SDATA6_B, 0, 0, }
- },
-
- /*
- * From IPSR9 to IPSR10 have been removed because they does not use.
- */
-
- { PINMUX_CFG_REG_VAR("IPSR11", 0xE606004C, 32,
- 2, 3, 3, 3, 3, 2, 2, 3, 3, 2, 3, 3) {
- /* IP11_31_30 [2] */
- 0, 0, 0, 0,
- /* IP11_29_27 [3] */
- FN_SSI_SDATA0, FN_MSIOF1_SCK_B, FN_PWM0_B, FN_ADICLK_B,
- FN_AD_CLK_B, 0, 0, 0,
- /* IP11_26_24 [3] */
- FN_SSI_WS0129, FN_MSIOF1_TXD_B, FN_SCIF5_TXD_D, FN_ADICS_SAMP_B,
- FN_AD_DO_B, 0, 0, 0,
- /* IP11_23_21 [3] */
- FN_SSI_SCK0129, FN_MSIOF1_RXD_B, FN_SCIF5_RXD_D, FN_ADIDATA_B,
- FN_AD_DI_B, FN_PCMWE_N, 0, 0,
- /* IP11_20_18 [3] */
- FN_SSI_SDATA7, FN_SCIFA2_TXD_B, FN_IRQ8, FN_AUDIO_CLKA_D,
- FN_CAN_CLK_D, FN_PCMOE_N, 0, 0,
- /* IP11_17_16 [2] */
- FN_SSI_WS78, FN_SCIFA2_RXD_B, FN_IIC0_SCL_C, FN_DU1_CDE,
- /* IP11_15_14 [2] */
- FN_SSI_SCK78, FN_SCIFA2_SCK_B, FN_IIC0_SDA_C, FN_DU1_DISP,
- /* IP11_13_11 [3] */
- FN_SSI_SDATA6, FN_SCIFA1_TXD_B, FN_I2C4_SDA_C,
- FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_CAN_DEBUGOUT15, 0, 0, 0,
- /* IP11_10_8 [3] */
- FN_SSI_WS6, FN_SCIFA1_RXD_B, FN_I2C4_SCL_C,
- FN_DU1_EXVSYNC_DU1_VSYNC, FN_CAN_DEBUGOUT14, 0, 0, 0,
- /* IP11_7_6 [2] */
- FN_SSI_SCK6, FN_SCIFA1_SCK_B, FN_DU1_EXHSYNC_DU1_HSYNC,
- FN_CAN_DEBUGOUT13,
- /* IP11_5_3 [3] */
- FN_SSI_SDATA5, FN_SCIFA3_TXD, FN_I2C3_SDA_C, FN_DU1_DOTCLKOUT1,
- FN_CAN_DEBUGOUT12, 0, 0, 0,
- /* IP11_2_0 [3] */
- FN_SSI_WS5, FN_SCIFA3_RXD, FN_I2C3_SCL_C, FN_DU1_DOTCLKOUT0,
- FN_CAN_DEBUGOUT11, 0, 0, 0, }
- },
-
- /*
- * From IPSR12 to IPSR13 have been removed because they does not use.
- */
-
- { PINMUX_CFG_REG_VAR("MOD_SEL", 0xE6060090, 32,
- 2, 1, 2, 3, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3,
- 2, 1) {
- /* SEL_ADG [2] */
- FN_SEL_ADG_0, FN_SEL_ADG_1, FN_SEL_ADG_2, FN_SEL_ADG_3,
- /* SEL_ADI [1] */
- FN_SEL_ADI_0, FN_SEL_ADI_1,
- /* SEL_CAN [2] */
- FN_SEL_CAN_0, FN_SEL_CAN_1, FN_SEL_CAN_2, FN_SEL_CAN_3,
- /* SEL_DARC [3] */
- FN_SEL_DARC_0, FN_SEL_DARC_1, FN_SEL_DARC_2, FN_SEL_DARC_3,
- FN_SEL_DARC_4, 0, 0, 0,
- /* SEL_DR0 [1] */
- FN_SEL_DR0_0, FN_SEL_DR0_1,
- /* SEL_DR1 [1] */
- FN_SEL_DR1_0, FN_SEL_DR1_1,
- /* SEL_DR2 [1] */
- FN_SEL_DR2_0, FN_SEL_DR2_1,
- /* SEL_DR3 [1] */
- FN_SEL_DR3_0, FN_SEL_DR3_1,
- /* SEL_ETH [1] */
- FN_SEL_ETH_0, FN_SEL_ETH_1,
- /* SLE_FSN [1] */
- FN_SEL_FSN_0, FN_SEL_FSN_1,
- /* SEL_IC200 [3] */
- FN_SEL_I2C00_0, FN_SEL_I2C00_1, FN_SEL_I2C00_2, FN_SEL_I2C00_3,
- FN_SEL_I2C00_4, 0, 0, 0,
- /* SEL_I2C01 [3] */
- FN_SEL_I2C01_0, FN_SEL_I2C01_1, FN_SEL_I2C01_2, FN_SEL_I2C01_3,
- FN_SEL_I2C01_4, 0, 0, 0,
- /* SEL_I2C02 [3] */
- FN_SEL_I2C02_0, FN_SEL_I2C02_1, FN_SEL_I2C02_2, FN_SEL_I2C02_3,
- FN_SEL_I2C02_4, 0, 0, 0,
- /* SEL_I2C03 [3] */
- FN_SEL_I2C03_0, FN_SEL_I2C03_1, FN_SEL_I2C03_2, FN_SEL_I2C03_3,
- FN_SEL_I2C03_4, 0, 0, 0,
- /* SEL_I2C04 [3] */
- FN_SEL_I2C04_0, FN_SEL_I2C04_1, FN_SEL_I2C04_2, FN_SEL_I2C04_3,
- FN_SEL_I2C04_4, 0, 0, 0,
- /* SEL_IIC00 [2] */
- FN_SEL_IIC00_0, FN_SEL_IIC00_1, FN_SEL_IIC00_2, FN_SEL_IIC00_3,
- /* SEL_AVB [1] */
- FN_SEL_AVB_0, FN_SEL_AVB_1, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060094, 32,
- 2, 2, 1, 1, 1, 1, 1, 1, 2, 2, 1, 1, 2, 2, 1, 1,
- 2, 2, 2, 1, 1, 2) {
- /* SEL_IEB [2] */
- FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2, 0,
- /* SEL_IIC0 [2] */
- FN_SEL_IIC01_0, FN_SEL_IIC01_1, FN_SEL_IIC01_2, FN_SEL_IIC01_3,
- /* SEL_LBS [1] */
- FN_SEL_LBS_0, FN_SEL_LBS_1,
- /* SEL_MSI1 [1] */
- FN_SEL_MSI1_0, FN_SEL_MSI1_1,
- /* SEL_MSI2 [1] */
- FN_SEL_MSI2_0, FN_SEL_MSI2_1,
- /* SEL_RAD [1] */
- FN_SEL_RAD_0, FN_SEL_RAD_1,
- /* SEL_RCN [1] */
- FN_SEL_RCN_0, FN_SEL_RCN_1,
- /* SEL_RSP [1] */
- FN_SEL_RSP_0, FN_SEL_RSP_1,
- /* SEL_SCIFA0 [2] */
- FN_SEL_SCIFA0_0, FN_SEL_SCIFA0_1, FN_SEL_SCIFA0_2,
- FN_SEL_SCIFA0_3,
- /* SEL_SCIFA1 [2] */
- FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, 0,
- /* SEL_SCIFA2 [1] */
- FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1,
- /* SEL_SCIFA3 [1] */
- FN_SEL_SCIFA3_0, FN_SEL_SCIFA3_1,
- /* SEL_SCIFA4 [2] */
- FN_SEL_SCIFA4_0, FN_SEL_SCIFA4_1, FN_SEL_SCIFA4_2,
- FN_SEL_SCIFA4_3,
- /* SEL_SCIFA5 [2] */
- FN_SEL_SCIFA5_0, FN_SEL_SCIFA5_1, FN_SEL_SCIFA5_2,
- FN_SEL_SCIFA5_3,
- /* SEL_SPDM [1] */
- FN_SEL_SPDM_0, FN_SEL_SPDM_1,
- /* SEL_TMU [1] */
- FN_SEL_TMU_0, FN_SEL_TMU_1,
- /* SEL_TSIF0 [2] */
- FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
- /* SEL_CAN0 [2] */
- FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
- /* SEL_CAN1 [2] */
- FN_SEL_CAN1_0, FN_SEL_CAN1_1, FN_SEL_CAN1_2, FN_SEL_CAN1_3,
- /* SEL_HSCIF0 [1] */
- FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,
- /* SEL_HSCIF1 [1] */
- FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
- /* SEL_RDS [2] */
- FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2, FN_SEL_RDS_3, }
- },
- { PINMUX_CFG_REG_VAR("MOD_SEL3", 0xE6060098, 32,
- 2, 2, 2, 1, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {
- /* SEL_SCIF0 [2] */
- FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
- /* SEL_SCIF1 [2] */
- FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, 0,
- /* SEL_SCIF2 [2] */
- FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, 0,
- /* SEL_SCIF3 [1] */
- FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
- /* SEL_SCIF4 [3] */
- FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
- FN_SEL_SCIF4_4, 0, 0, 0,
- /* SEL_SCIF5 [2] */
- FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
- /* SEL_SSI1 [1] */
- FN_SEL_SSI1_0, FN_SEL_SSI1_1,
- /* SEL_SSI2 [1] */
- FN_SEL_SSI2_0, FN_SEL_SSI2_1,
- /* SEL_SSI4 [1] */
- FN_SEL_SSI4_0, FN_SEL_SSI4_1,
- /* SEL_SSI5 [1] */
- FN_SEL_SSI5_0, FN_SEL_SSI5_1,
- /* SEL_SSI6 [1] */
- FN_SEL_SSI6_0, FN_SEL_SSI6_1,
- /* SEL_SSI7 [1] */
- FN_SEL_SSI7_0, FN_SEL_SSI7_1,
- /* SEL_SSI8 [1] */
- FN_SEL_SSI8_0, FN_SEL_SSI8_1,
- /* SEL_SSI9 [1] */
- FN_SEL_SSI9_0, FN_SEL_SSI9_1,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0,
- /* RESEVED [1] */
- 0, 0, }
- },
- { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
- { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_1_25_IN, GP_1_25_OUT,
- GP_1_24_IN, GP_1_24_OUT,
- GP_1_23_IN, GP_1_23_OUT,
- GP_1_22_IN, GP_1_22_OUT,
- GP_1_21_IN, GP_1_21_OUT,
- GP_1_20_IN, GP_1_20_OUT,
- GP_1_19_IN, GP_1_19_OUT,
- GP_1_18_IN, GP_1_18_OUT,
- GP_1_17_IN, GP_1_17_OUT,
- GP_1_16_IN, GP_1_16_OUT,
- GP_1_15_IN, GP_1_15_OUT,
- GP_1_14_IN, GP_1_14_OUT,
- GP_1_13_IN, GP_1_13_OUT,
- GP_1_12_IN, GP_1_12_OUT,
- GP_1_11_IN, GP_1_11_OUT,
- GP_1_10_IN, GP_1_10_OUT,
- GP_1_9_IN, GP_1_9_OUT,
- GP_1_8_IN, GP_1_8_OUT,
- GP_1_7_IN, GP_1_7_OUT,
- GP_1_6_IN, GP_1_6_OUT,
- GP_1_5_IN, GP_1_5_OUT,
- GP_1_4_IN, GP_1_4_OUT,
- GP_1_3_IN, GP_1_3_OUT,
- GP_1_2_IN, GP_1_2_OUT,
- GP_1_1_IN, GP_1_1_OUT,
- GP_1_0_IN, GP_1_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { GP_INOUTSEL(2) } },
- { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
- { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
- { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_5_27_IN, GP_5_27_OUT,
- GP_5_26_IN, GP_5_26_OUT,
- GP_5_25_IN, GP_5_25_OUT,
- GP_5_24_IN, GP_5_24_OUT,
- GP_5_23_IN, GP_5_23_OUT,
- GP_5_22_IN, GP_5_22_OUT,
- GP_5_21_IN, GP_5_21_OUT,
- GP_5_20_IN, GP_5_20_OUT,
- GP_5_19_IN, GP_5_19_OUT,
- GP_5_18_IN, GP_5_18_OUT,
- GP_5_17_IN, GP_5_17_OUT,
- GP_5_16_IN, GP_5_16_OUT,
- GP_5_15_IN, GP_5_15_OUT,
- GP_5_14_IN, GP_5_14_OUT,
- GP_5_13_IN, GP_5_13_OUT,
- GP_5_12_IN, GP_5_12_OUT,
- GP_5_11_IN, GP_5_11_OUT,
- GP_5_10_IN, GP_5_10_OUT,
- GP_5_9_IN, GP_5_9_OUT,
- GP_5_8_IN, GP_5_8_OUT,
- GP_5_7_IN, GP_5_7_OUT,
- GP_5_6_IN, GP_5_6_OUT,
- GP_5_5_IN, GP_5_5_OUT,
- GP_5_4_IN, GP_5_4_OUT,
- GP_5_3_IN, GP_5_3_OUT,
- GP_5_2_IN, GP_5_2_OUT,
- GP_5_1_IN, GP_5_1_OUT,
- GP_5_0_IN, GP_5_0_OUT, }
- },
- { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- 0, 0,
- GP_6_25_IN, GP_6_25_OUT,
- GP_6_24_IN, GP_6_24_OUT,
- GP_6_23_IN, GP_6_23_OUT,
- GP_6_22_IN, GP_6_22_OUT,
- GP_6_21_IN, GP_6_21_OUT,
- GP_6_20_IN, GP_6_20_OUT,
- GP_6_19_IN, GP_6_19_OUT,
- GP_6_18_IN, GP_6_18_OUT,
- GP_6_17_IN, GP_6_17_OUT,
- GP_6_16_IN, GP_6_16_OUT,
- GP_6_15_IN, GP_6_15_OUT,
- GP_6_14_IN, GP_6_14_OUT,
- GP_6_13_IN, GP_6_13_OUT,
- GP_6_12_IN, GP_6_12_OUT,
- GP_6_11_IN, GP_6_11_OUT,
- GP_6_10_IN, GP_6_10_OUT,
- GP_6_9_IN, GP_6_9_OUT,
- GP_6_8_IN, GP_6_8_OUT,
- GP_6_7_IN, GP_6_7_OUT,
- GP_6_6_IN, GP_6_6_OUT,
- GP_6_5_IN, GP_6_5_OUT,
- GP_6_4_IN, GP_6_4_OUT,
- GP_6_3_IN, GP_6_3_OUT,
- GP_6_2_IN, GP_6_2_OUT,
- GP_6_1_IN, GP_6_1_OUT,
- GP_6_0_IN, GP_6_0_OUT, }
- },
- { },
-};
-
-static struct pinmux_data_reg pinmux_data_regs[] = {
- { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
- { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
- 0, 0, 0, 0,
- 0, 0, GP_1_25_DATA, GP_1_24_DATA,
- GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
- GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
- GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
- GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
- GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
- GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
- },
- { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { GP_INDT(2) } },
- { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
- { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
- { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
- 0, 0, 0, 0,
- GP_5_27_DATA, GP_5_26_DATA, GP_5_25_DATA, GP_5_24_DATA,
- GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,
- GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,
- GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
- GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
- GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
- GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
- },
- { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
- 0, 0, 0, 0,
- 0, 0, GP_6_25_DATA, GP_6_24_DATA,
- GP_6_23_DATA, GP_6_22_DATA, GP_6_21_DATA, GP_6_20_DATA,
- GP_6_19_DATA, GP_6_18_DATA, GP_6_17_DATA, GP_6_16_DATA,
- GP_6_15_DATA, GP_6_14_DATA, GP_6_13_DATA, GP_6_12_DATA,
- GP_6_11_DATA, GP_6_10_DATA, GP_6_9_DATA, GP_6_8_DATA,
- GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
- GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
- },
- { },
-};
-
-static struct pinmux_info r8a7794_pinmux_info = {
- .name = "r8a7794_pfc",
-
- .unlock_reg = 0xe6060000, /* PMMR */
-
- .reserved_id = PINMUX_RESERVED,
- .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
- .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
- .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
- .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
- .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
-
- .first_gpio = GPIO_GP_0_0,
- .last_gpio = GPIO_FN_AD_CLK_B,
-
- .gpios = pinmux_gpios,
- .cfg_regs = pinmux_config_regs,
- .data_regs = pinmux_data_regs,
-
- .gpio_data = pinmux_data,
- .gpio_data_size = ARRAY_SIZE(pinmux_data),
-};
-
-void r8a7794_pinmux_init(void)
-{
- register_pinmux(&r8a7794_pinmux_info);
-}
diff --git a/board/renesas/blanche/Makefile b/board/renesas/blanche/Makefile
index bdbfb29..21986af 100644
--- a/board/renesas/blanche/Makefile
+++ b/board/renesas/blanche/Makefile
@@ -6,4 +6,4 @@
# SPDX-License-Identifier: GPL-2.0
#
-obj-y := blanche.o qos.o ../rcar-common/common.o
+obj-y := blanche.o qos.o
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index fb1c939..7d48d0f 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -7,114 +7,40 @@
*/
#include <common.h>
-#include <malloc.h>
-#include <netdev.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/rcar-mstp.h>
+#include <asm/arch/rmobile.h>
+#include <asm/arch/sh_sdhi.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <asm/mach-types.h>
+#include <asm/processor.h>
#include <dm.h>
#include <dm/platform_data/serial_sh.h>
#include <environment.h>
-#include <asm/processor.h>
-#include <asm/mach-types.h>
-#include <asm/io.h>
+#include <i2c.h>
#include <linux/errno.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/gpio.h>
-#include <asm/arch/rmobile.h>
-#include <asm/arch/rcar-mstp.h>
-#include <asm/arch/mmc.h>
-#include <asm/arch/sh_sdhi.h>
+#include <malloc.h>
#include <miiphy.h>
-#include <i2c.h>
#include <mmc.h>
+#include <netdev.h>
#include "qos.h"
DECLARE_GLOBAL_DATA_PTR;
-struct pin_db {
- u32 addr; /* register address */
- u32 mask; /* mask value */
- u32 val; /* setting value */
-};
-
-#define PMMR 0xE6060000
-#define GPSR0 0xE6060004
-#define GPSR1 0xE6060008
-#define GPSR4 0xE6060014
-#define GPSR5 0xE6060018
-#define GPSR6 0xE606001C
-#define GPSR7 0xE6060020
-#define GPSR8 0xE6060024
-#define GPSR9 0xE6060028
-#define GPSR10 0xE606002C
-#define GPSR11 0xE6060030
-#define IPSR6 0xE6060058
-#define PUPR2 0xE6060108
-#define PUPR3 0xE606010C
-#define PUPR4 0xE6060110
-#define PUPR5 0xE6060114
-#define PUPR7 0xE606011C
-#define PUPR9 0xE6060124
-#define PUPR10 0xE6060128
-#define PUPR11 0xE606012C
-
#define CPG_PLL1CR 0xE6150028
#define CPG_PLL3CR 0xE61500DC
-#define SetREG(x) \
- writel((readl((x)->addr) & ~((x)->mask)) | ((x)->val), (x)->addr)
+#define TMU0_MSTP125 BIT(25)
+#define QSPI_MSTP917 BIT(17)
-#define SetGuardREG(x) \
-{ \
- u32 val; \
- val = (readl((x)->addr) & ~((x)->mask)) | ((x)->val); \
- writel(~val, PMMR); \
- writel(val, (x)->addr); \
-}
-
-struct pin_db pin_guard[] = {
- { GPSR0, 0xFFFFFFFF, 0x0BFFFFFF },
- { GPSR1, 0xFFFFFFFF, 0x002FFFFF },
- { GPSR4, 0xFFFFFFFF, 0x00000FFF },
- { GPSR5, 0xFFFFFFFF, 0x00010FFF },
- { GPSR6, 0xFFFFFFFF, 0x00010FFF },
- { GPSR7, 0xFFFFFFFF, 0x00010FFF },
- { GPSR8, 0xFFFFFFFF, 0x00010FFF },
- { GPSR9, 0xFFFFFFFF, 0x00010FFF },
- { GPSR10, 0xFFFFFFFF, 0x04006000 },
- { GPSR11, 0xFFFFFFFF, 0x303FEFE0 },
- { IPSR6, 0xFFFFFFFF, 0x0002000E },
+struct reg_config {
+ u16 off;
+ u32 val;
};
-struct pin_db pin_tbl[] = {
- { PUPR2, 0xFFFFFFFF, 0x00000000 },
- { PUPR3, 0xFFFFFFFF, 0x0803FF40 },
- { PUPR4, 0xFFFFFFFF, 0x0000FFFF },
- { PUPR5, 0xFFFFFFFF, 0x00010FFF },
- { PUPR7, 0xFFFFFFFF, 0x0001AFFF },
- { PUPR9, 0xFFFFFFFF, 0x0001CFFF },
- { PUPR10, 0xFFFFFFFF, 0xC0438001 },
- { PUPR11, 0xFFFFFFFF, 0x0FC00007 },
-};
-
-void pin_init(void)
-{
- struct pin_db *db;
-
- for (db = pin_guard; db < &pin_guard[sizeof(pin_guard)/sizeof(struct pin_db)]; db++) {
- SetGuardREG(db);
- }
- for (db = pin_tbl; db < &pin_tbl[sizeof(pin_tbl) /sizeof(struct pin_db)]; db++) {
- SetREG(db);
- }
-}
-
-#define s_init_wait(cnt) \
- ({ \
- volatile u32 i = 0x10000 * cnt; \
- while (i > 0) \
- i--; \
- })
-
-void s_init(void)
+static void blanche_init_sys(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
@@ -129,299 +55,277 @@
/* Watchdog init */
writel(0xA5A5A500, &rwdt->rwtcsra);
writel(0xA5A5A500, &swdt->swtcsra);
-
- /* QoS(Quality-of-Service) Init */
- qos_init();
+}
- /* SCIF Init */
- pin_init();
+static void blanche_init_pfc(void)
+{
+ static const struct reg_config pfc_with_unlock[] = {
+ { 0x0004, 0x0bffffff },
+ { 0x0008, 0x002fffff },
+ { 0x0014, 0x00000fff },
+ { 0x0018, 0x00010fff },
+ { 0x001c, 0x00010fff },
+ { 0x0020, 0x00010fff },
+ { 0x0024, 0x00010fff },
+ { 0x0028, 0x00010fff },
+ { 0x002c, 0x04006000 },
+ { 0x0030, 0x303fefe0 },
+ { 0x0058, 0x0002000e },
+ };
-#if defined(CONFIG_MTD_NOR_FLASH)
- struct rcar_lbsc *lbsc = (struct rcar_lbsc *)LBSC_BASE;
- struct rcar_dbsc3 *dbsc3_0 = (struct rcar_dbsc3 *)DBSC3_0_BASE;
+ static const struct reg_config pfc_without_unlock[] = {
+ { 0x0108, 0x00000000 },
+ { 0x010c, 0x0803FF40 },
+ { 0x0110, 0x0000FFFF },
+ { 0x0114, 0x00010FFF },
+ { 0x011c, 0x0001AFFF },
+ { 0x0124, 0x0001CFFF },
+ { 0x0128, 0xC0438001 },
+ { 0x012c, 0x0FC00007 },
+ };
- /* LBSC */
- writel(0x00000020, &lbsc->cs0ctrl);
- writel(0x00000020, &lbsc->cs1ctrl);
- writel(0x00002020, &lbsc->ecs0ctrl);
- writel(0x00002020, &lbsc->ecs1ctrl);
+ static const u32 pfc_base = 0xe6060000;
- writel(0x2A103320, &lbsc->cswcr0);
- writel(0x2A103320, &lbsc->cswcr1);
- writel(0x19102110, &lbsc->ecswcr0);
- writel(0x19102110, &lbsc->ecswcr1);
+ unsigned int i;
- /* DBSC3 */
- s_init_wait(10);
+ for (i = 0; i < ARRAY_SIZE(pfc_with_unlock); i++) {
+ writel(~pfc_with_unlock[i].val, pfc_base);
+ writel(pfc_with_unlock[i].val,
+ pfc_base | pfc_with_unlock[i].off);
+ }
- writel(0x0000A55A, &dbsc3_0->dbpdlck);
+ for (i = 0; i < ARRAY_SIZE(pfc_without_unlock); i++)
+ writel(pfc_without_unlock[i].val,
+ pfc_base | pfc_without_unlock[i].off);
+}
- writel(0x21000000, &dbsc3_0->dbcmd); /* opc=RstH (RESET => H) */
- writel(0x11000000, &dbsc3_0->dbcmd); /* opc=PDXt(CKE=H) */
- writel(0x10000000, &dbsc3_0->dbcmd); /* opc=PDEn(CKE=L) */
+static void blanche_init_lbsc(void)
+{
+ static const struct reg_config lbsc_config[] = {
+ { 0x00, 0x00000020 },
+ { 0x08, 0x00002020 },
+ { 0x30, 0x2a103320 },
+ { 0x38, 0x19102110 },
+ };
- /* Stop Auto-Calibration */
- writel(0x00000001, &dbsc3_0->dbpdrga);
- writel(0x80000000, &dbsc3_0->dbpdrgd);
+ static const u32 lbsc_base = 0xfec00200;
- writel(0x00000004, &dbsc3_0->dbpdrga);
- while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001);
+ unsigned int i;
- /* PLLCR: PLL Control Register */
- writel(0x00000006, &dbsc3_0->dbpdrga);
- writel(0x0001C000, &dbsc3_0->dbpdrgd); // > DDR1440
+ for (i = 0; i < ARRAY_SIZE(lbsc_config); i++) {
+ writel(lbsc_config[i].val,
+ lbsc_base | lbsc_config[i].off);
+ writel(lbsc_config[i].val,
+ lbsc_base | (lbsc_config[i].off + 4));
+ }
+}
- /* DXCCR: DATX8 Common Configuration Register */
- writel(0x0000000F, &dbsc3_0->dbpdrga);
- writel(0x00181EE4, &dbsc3_0->dbpdrgd);
+#if defined(CONFIG_MTD_NOR_FLASH)
+static void dbsc_wait(u16 reg)
+{
+ static const u32 dbsc3_0_base = DBSC3_0_BASE;
- /* DSGCR :DDR System General Configuration Register */
- writel(0x00000010, &dbsc3_0->dbpdrga);
- writel(0xF00464DB, &dbsc3_0->dbpdrgd);
+ while (!(readl(dbsc3_0_base + reg) & BIT(0)))
+ ;
+}
- writel(0x00000061, &dbsc3_0->dbpdrga);
- writel(0x0000008D, &dbsc3_0->dbpdrgd);
+static void blanche_init_dbsc(void)
+{
+ static const struct reg_config dbsc_config1[] = {
+ { 0x0280, 0x0000a55a },
+ { 0x0018, 0x21000000 },
+ { 0x0018, 0x11000000 },
+ { 0x0018, 0x10000000 },
+ { 0x0290, 0x00000001 },
+ { 0x02a0, 0x80000000 },
+ { 0x0290, 0x00000004 },
+ };
- /* Re-Execute ZQ calibration */
- writel(0x00000001, &dbsc3_0->dbpdrga);
- writel(0x00000073, &dbsc3_0->dbpdrgd);
+ static const struct reg_config dbsc_config2[] = {
+ { 0x0290, 0x00000006 },
+ { 0x02a0, 0x0001c000 },
+ };
- writel(0x00000007, &dbsc3_0->dbkind);
- writel(0x0F030A02, &dbsc3_0->dbconf0);
- writel(0x00000001, &dbsc3_0->dbphytype);
- writel(0x00000000, &dbsc3_0->dbbl);
+ static const struct reg_config dbsc_config4[] = {
+ { 0x0290, 0x0000000f },
+ { 0x02a0, 0x00181ee4 },
+ { 0x0290, 0x00000010 },
+ { 0x02a0, 0xf00464db },
+ { 0x0290, 0x00000061 },
+ { 0x02a0, 0x0000008d },
+ { 0x0290, 0x00000001 },
+ { 0x02a0, 0x00000073 },
+ { 0x0020, 0x00000007 },
+ { 0x0024, 0x0f030a02 },
+ { 0x0030, 0x00000001 },
+ { 0x00b0, 0x00000000 },
+ { 0x0040, 0x0000000b },
+ { 0x0044, 0x00000008 },
+ { 0x0048, 0x00000000 },
+ { 0x0050, 0x0000000b },
+ { 0x0054, 0x000c000b },
+ { 0x0058, 0x00000027 },
+ { 0x005c, 0x0000001c },
+ { 0x0060, 0x00000006 },
+ { 0x0064, 0x00000020 },
+ { 0x0068, 0x00000008 },
+ { 0x006c, 0x0000000c },
+ { 0x0070, 0x00000009 },
+ { 0x0074, 0x00000012 },
+ { 0x0078, 0x000000d0 },
+ { 0x007c, 0x00140005 },
+ { 0x0080, 0x00050004 },
+ { 0x0084, 0x70233005 },
+ { 0x0088, 0x000c0000 },
+ { 0x008c, 0x00000300 },
+ { 0x0090, 0x00000040 },
+ { 0x0100, 0x00000001 },
+ { 0x00c0, 0x00020001 },
+ { 0x00c8, 0x20082004 },
+ { 0x0380, 0x00020002 },
+ { 0x0390, 0x0000001f },
+ };
- writel(0x0000000B, &dbsc3_0->dbtr0); // tCL=11
- writel(0x00000008, &dbsc3_0->dbtr1); // tCWL=8
- writel(0x00000000, &dbsc3_0->dbtr2); // tAL=0
- writel(0x0000000B, &dbsc3_0->dbtr3); // tRCD=11
- writel(0x000C000B, &dbsc3_0->dbtr4); // tRPA=12,tRP=11
- writel(0x00000027, &dbsc3_0->dbtr5); // tRC = 39
- writel(0x0000001C, &dbsc3_0->dbtr6); // tRAS = 28
- writel(0x00000006, &dbsc3_0->dbtr7); // tRRD = 6
- writel(0x00000020, &dbsc3_0->dbtr8); // tRFAW = 32
- writel(0x00000008, &dbsc3_0->dbtr9); // tRDPR = 8
- writel(0x0000000C, &dbsc3_0->dbtr10); // tWR = 12
- writel(0x00000009, &dbsc3_0->dbtr11); // tRDWR = 9
- writel(0x00000012, &dbsc3_0->dbtr12); // tWRRD = 18
- writel(0x000000D0, &dbsc3_0->dbtr13); // tRFC = 208
- writel(0x00140005, &dbsc3_0->dbtr14);
- writel(0x00050004, &dbsc3_0->dbtr15);
- writel(0x70233005, &dbsc3_0->dbtr16); /* DQL = 35, WDQL = 5 */
- writel(0x000C0000, &dbsc3_0->dbtr17);
- writel(0x00000300, &dbsc3_0->dbtr18);
- writel(0x00000040, &dbsc3_0->dbtr19);
- writel(0x00000001, &dbsc3_0->dbrnk0);
- writel(0x00020001, &dbsc3_0->dbadj0);
- writel(0x20082004, &dbsc3_0->dbadj2); /* blanche QoS rev0.1 */
- writel(0x00020002, &dbsc3_0->dbwt0cnf0); /* 1600 */
- writel(0x0000001F, &dbsc3_0->dbwt0cnf4);
+ static const struct reg_config dbsc_config5[] = {
+ { 0x0244, 0x00000011 },
+ { 0x0290, 0x00000003 },
+ { 0x02a0, 0x0300c4e1 },
+ { 0x0290, 0x00000023 },
+ { 0x02a0, 0x00fcdb60 },
+ { 0x0290, 0x00000011 },
+ { 0x02a0, 0x1000040b },
+ { 0x0290, 0x00000012 },
+ { 0x02a0, 0x9d9cbb66 },
+ { 0x0290, 0x00000013 },
+ { 0x02a0, 0x1a868400 },
+ { 0x0290, 0x00000014 },
+ { 0x02a0, 0x300214d8 },
+ { 0x0290, 0x00000015 },
+ { 0x02a0, 0x00000d70 },
+ { 0x0290, 0x00000016 },
+ { 0x02a0, 0x00000004 },
+ { 0x0290, 0x00000017 },
+ { 0x02a0, 0x00000018 },
+ { 0x0290, 0x0000001a },
+ { 0x02a0, 0x910035c7 },
+ { 0x0290, 0x00000004 },
+ };
- while ((readl(&dbsc3_0->dbdfistat) & 0x00000001) != 0x00000001);
- writel(0x00000011, &dbsc3_0->dbdficnt);
+ static const struct reg_config dbsc_config6[] = {
+ { 0x0290, 0x00000001 },
+ { 0x02a0, 0x00000181 },
+ { 0x0018, 0x11000000 },
+ { 0x0290, 0x00000004 },
+ };
- /* PGCR1 :PHY General Configuration Register 1 */
- writel(0x00000003, &dbsc3_0->dbpdrga);
- writel(0x0300C4E1, &dbsc3_0->dbpdrgd); /* DDR3 */
+ static const struct reg_config dbsc_config7[] = {
+ { 0x0290, 0x00000001 },
+ { 0x02a0, 0x0000fe01 },
+ { 0x0304, 0x00000000 },
+ { 0x00f4, 0x01004c20 },
+ { 0x00f8, 0x014000aa },
+ { 0x00e0, 0x00000140 },
+ { 0x00e4, 0x00081860 },
+ { 0x00e8, 0x00010000 },
+ { 0x0290, 0x00000004 },
+ };
- /* PGCR2: PHY General Configuration Registers 2 */
- writel(0x00000023, &dbsc3_0->dbpdrga);
- writel(0x00FCDB60, &dbsc3_0->dbpdrgd);
+ static const struct reg_config dbsc_config8[] = {
+ { 0x0014, 0x00000001 },
+ { 0x0010, 0x00000001 },
+ { 0x0280, 0x00000000 },
+ };
- writel(0x00000011, &dbsc3_0->dbpdrga);
- writel(0x1000040B, &dbsc3_0->dbpdrgd);
+ static const u32 dbsc3_0_base = DBSC3_0_BASE;
+ unsigned int i;
- /* DTPR0 :DRAM Timing Parameters Register 0 */
- writel(0x00000012, &dbsc3_0->dbpdrga);
- writel(0x9D9CBB66, &dbsc3_0->dbpdrgd);
+ for (i = 0; i < ARRAY_SIZE(dbsc_config1); i++)
+ writel(dbsc_config1[i].val, dbsc3_0_base | dbsc_config1[i].off);
- /* DTPR1 :DRAM Timing Parameters Register 1 */
- writel(0x00000013, &dbsc3_0->dbpdrga);
- writel(0x1A868400, &dbsc3_0->dbpdrgd);
+ dbsc_wait(0x2a0);
- /* DTPR2 ::DRAM Timing Parameters Register 2 */
- writel(0x00000014, &dbsc3_0->dbpdrga);
- writel(0x300214D8, &dbsc3_0->dbpdrgd);
+ for (i = 0; i < ARRAY_SIZE(dbsc_config2); i++)
+ writel(dbsc_config2[i].val, dbsc3_0_base | dbsc_config2[i].off);
- /* MR0 :Mode Register 0 */
- writel(0x00000015, &dbsc3_0->dbpdrga);
- writel(0x00000D70, &dbsc3_0->dbpdrgd);
+ for (i = 0; i < ARRAY_SIZE(dbsc_config4); i++)
+ writel(dbsc_config4[i].val, dbsc3_0_base | dbsc_config4[i].off);
- /* MR1 :Mode Register 1 */
- writel(0x00000016, &dbsc3_0->dbpdrga);
- writel(0x00000004, &dbsc3_0->dbpdrgd); /* DRAM Drv 40ohm */
+ dbsc_wait(0x240);
- /* MR2 :Mode Register 2 */
- writel(0x00000017, &dbsc3_0->dbpdrga);
- writel(0x00000018, &dbsc3_0->dbpdrgd); /* CWL=8 */
+ for (i = 0; i < ARRAY_SIZE(dbsc_config5); i++)
+ writel(dbsc_config5[i].val, dbsc3_0_base | dbsc_config5[i].off);
- /* VREF(ZQCAL) */
- writel(0x0000001A, &dbsc3_0->dbpdrga);
- writel(0x910035C7, &dbsc3_0->dbpdrgd);
+ dbsc_wait(0x2a0);
- /* PGSR0 :PHY General Status Registers 0 */
- writel(0x00000004, &dbsc3_0->dbpdrga);
- while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001);
+ for (i = 0; i < ARRAY_SIZE(dbsc_config6); i++)
+ writel(dbsc_config6[i].val, dbsc3_0_base | dbsc_config6[i].off);
- /* DRAM Init (set MRx etc) */
- writel(0x00000001, &dbsc3_0->dbpdrga);
- writel(0x00000181, &dbsc3_0->dbpdrgd);
+ dbsc_wait(0x2a0);
- /* CKE = H */
- writel(0x11000000, &dbsc3_0->dbcmd); /* opc=PDXt(CKE=H) */
+ for (i = 0; i < ARRAY_SIZE(dbsc_config7); i++)
+ writel(dbsc_config7[i].val, dbsc3_0_base | dbsc_config7[i].off);
- /* PGSR0 :PHY General Status Registers 0 */
- writel(0x00000004, &dbsc3_0->dbpdrga);
- while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001);
+ dbsc_wait(0x2a0);
- /* RAM ACC Training */
- writel(0x00000001, &dbsc3_0->dbpdrga);
- writel(0x0000FE01, &dbsc3_0->dbpdrgd);
+ for (i = 0; i < ARRAY_SIZE(dbsc_config8); i++)
+ writel(dbsc_config8[i].val, dbsc3_0_base | dbsc_config8[i].off);
- /* Bus control 0 */
- writel(0x00000000, &dbsc3_0->dbbs0cnt1);
- /* DDR3 Calibration set */
- writel(0x01004C20, &dbsc3_0->dbcalcnf);
- /* DDR3 Calibration timing */
- writel(0x014000AA, &dbsc3_0->dbcaltr);
- /* Refresh */
- writel(0x00000140, &dbsc3_0->dbrfcnf0);
- writel(0x00081860, &dbsc3_0->dbrfcnf1);
- writel(0x00010000, &dbsc3_0->dbrfcnf2);
+}
- /* PGSR0 :PHY General Status Registers 0 */
- writel(0x00000004, &dbsc3_0->dbpdrga);
- while ((readl(&dbsc3_0->dbpdrgd) & 0x00000001) != 0x00000001);
+static void s_init_wait(volatile unsigned int cnt)
+{
+ volatile u32 i = cnt * 0x10000;
- /* Enable Auto-Refresh */
- writel(0x00000001, &dbsc3_0->dbrfen);
- /* Permit DDR-Access */
- writel(0x00000001, &dbsc3_0->dbacen);
+ while (i-- > 0)
+ ;
+}
+#endif
- /* This locks the access to the PHY unit registers */
- writel(0x00000000, &dbsc3_0->dbpdlck);
+void s_init(void)
+{
+ blanche_init_sys();
+ qos_init();
+ blanche_init_pfc();
+ blanche_init_lbsc();
+#if defined(CONFIG_MTD_NOR_FLASH)
+ s_init_wait(10);
+ blanche_init_dbsc();
#endif /* CONFIG_MTD_NOR_FLASH */
-
}
-#define TMU0_MSTP125 (1 << 25)
-#define SCIF0_MSTP721 (1 << 21)
-#define SDHI0_MSTP314 (1 << 14)
-#define QSPI_MSTP917 (1 << 17)
-
int board_early_init_f(void)
{
/* TMU0 */
mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
- /* SCIF0 */
- mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721);
- /* SDHI0 */
- mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SDHI0_MSTP314);
/* QSPI */
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917);
return 0;
}
-DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
- /* Init PFC controller */
- r8a7792_pinmux_init();
-
- gpio_request(GPIO_FN_D0, NULL);
- gpio_request(GPIO_FN_D1, NULL);
- gpio_request(GPIO_FN_D2, NULL);
- gpio_request(GPIO_FN_D3, NULL);
- gpio_request(GPIO_FN_D4, NULL);
- gpio_request(GPIO_FN_D5, NULL);
- gpio_request(GPIO_FN_D6, NULL);
- gpio_request(GPIO_FN_D7, NULL);
- gpio_request(GPIO_FN_D8, NULL);
- gpio_request(GPIO_FN_D9, NULL);
- gpio_request(GPIO_FN_D10, NULL);
- gpio_request(GPIO_FN_D11, NULL);
- gpio_request(GPIO_FN_D12, NULL);
- gpio_request(GPIO_FN_D13, NULL);
- gpio_request(GPIO_FN_D14, NULL);
- gpio_request(GPIO_FN_D15, NULL);
- gpio_request(GPIO_FN_A0, NULL);
- gpio_request(GPIO_FN_A1, NULL);
- gpio_request(GPIO_FN_A2, NULL);
- gpio_request(GPIO_FN_A3, NULL);
- gpio_request(GPIO_FN_A4, NULL);
- gpio_request(GPIO_FN_A5, NULL);
- gpio_request(GPIO_FN_A6, NULL);
- gpio_request(GPIO_FN_A7, NULL);
- gpio_request(GPIO_FN_A8, NULL);
- gpio_request(GPIO_FN_A9, NULL);
- gpio_request(GPIO_FN_A10, NULL);
- gpio_request(GPIO_FN_A11, NULL);
- gpio_request(GPIO_FN_A12, NULL);
- gpio_request(GPIO_FN_A13, NULL);
- gpio_request(GPIO_FN_A14, NULL);
- gpio_request(GPIO_FN_A15, NULL);
- gpio_request(GPIO_FN_A16, NULL);
- gpio_request(GPIO_FN_A17, NULL);
- gpio_request(GPIO_FN_A18, NULL);
- gpio_request(GPIO_FN_A19, NULL);
-#if !defined(CONFIG_MTD_NOR_FLASH)
- gpio_request(GPIO_FN_MOSI_IO0, NULL);
- gpio_request(GPIO_FN_MISO_IO1, NULL);
- gpio_request(GPIO_FN_IO2, NULL);
- gpio_request(GPIO_FN_IO3, NULL);
- gpio_request(GPIO_FN_SPCLK, NULL);
- gpio_request(GPIO_FN_SSL, NULL);
-#else /* CONFIG_MTD_NOR_FLASH */
- gpio_request(GPIO_FN_A20, NULL);
- gpio_request(GPIO_FN_A21, NULL);
- gpio_request(GPIO_FN_A22, NULL);
- gpio_request(GPIO_FN_A23, NULL);
- gpio_request(GPIO_FN_A24, NULL);
- gpio_request(GPIO_FN_A25, NULL);
-#endif /* CONFIG_MTD_NOR_FLASH */
-
- gpio_request(GPIO_FN_CS1_A26, NULL);
- gpio_request(GPIO_FN_EX_CS0, NULL);
- gpio_request(GPIO_FN_EX_CS1, NULL);
- gpio_request(GPIO_FN_BS, NULL);
- gpio_request(GPIO_FN_RD, NULL);
- gpio_request(GPIO_FN_WE0, NULL);
- gpio_request(GPIO_FN_WE1, NULL);
- gpio_request(GPIO_FN_EX_WAIT0, NULL);
- gpio_request(GPIO_FN_IRQ0, NULL);
- gpio_request(GPIO_FN_IRQ2, NULL);
- gpio_request(GPIO_FN_IRQ3, NULL);
- gpio_request(GPIO_FN_CS0, NULL);
-
- /* Init timer */
- timer_init();
-
return 0;
}
-/*
- Added for BLANCHE(R-CarV2H board)
-*/
+/* Added for BLANCHE(R-CarV2H board) */
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_SMC911X
-#define STR_ENV_ETHADDR "ethaddr"
-
struct eth_device *dev;
uchar eth_addr[6];
rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
- if (!eth_env_get_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
+ if (!eth_env_get_enetaddr("ethaddr", eth_addr)) {
dev = eth_get_dev_by_index(0);
if (dev) {
- eth_env_set_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
+ eth_env_set_enetaddr("ethaddr", dev->enetaddr);
} else {
printf("blanche: Couldn't get eth device\n");
rc = -1;
@@ -433,36 +337,17 @@
return rc;
}
-int board_mmc_init(bd_t *bis)
+int dram_init(void)
{
- int ret = -ENODEV;
-
-#ifdef CONFIG_SH_SDHI
- gpio_request(GPIO_FN_SD0_DAT0, NULL);
- gpio_request(GPIO_FN_SD0_DAT1, NULL);
- gpio_request(GPIO_FN_SD0_DAT2, NULL);
- gpio_request(GPIO_FN_SD0_DAT3, NULL);
- gpio_request(GPIO_FN_SD0_CLK, NULL);
- gpio_request(GPIO_FN_SD0_CMD, NULL);
- gpio_request(GPIO_FN_SD0_CD, NULL);
+ if (fdtdec_setup_memory_size() != 0)
+ return -EINVAL;
- gpio_request(GPIO_GP_11_12, NULL);
- gpio_direction_output(GPIO_GP_11_12, 1); /* power on */
-
-
- ret = sh_sdhi_init(CONFIG_SYS_SH_SDHI0_BASE, 0,
- SH_SDHI_QUIRK_16BIT_BUF);
-
- if (ret)
- return ret;
-#endif
- return ret;
+ return 0;
}
-int dram_init(void)
+int dram_init_banksize(void)
{
- gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
- gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+ fdtdec_setup_memory_banksize();
return 0;
}
@@ -470,15 +355,3 @@
void reset_cpu(ulong addr)
{
}
-
-static const struct sh_serial_platdata serial_platdata = {
- .base = SCIF0_BASE,
- .type = PORT_SCIF,
- .clk = 14745600,
- .clk_mode = EXT_CLK,
-};
-
-U_BOOT_DEVICE(blanche_serials) = {
- .name = "serial_sh",
- .platdata = &serial_platdata,
-};
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index bd5fcca..a71c2a5 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -1,26 +1,49 @@
CONFIG_ARM=y
+CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x00000000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche"
CONFIG_R8A7792=y
CONFIG_TARGET_BLANCHE=y
CONFIG_DEFAULT_DEVICE_TREE="r8a7792-blanche-u-boot"
+CONFIG_FIT=y
+CONFIG_BOOTDELAY=3
CONFIG_VERSION_VARIABLE=y
+CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_SDRAM=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_USB=y
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_TIME=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_FAT=y
CONFIG_OF_CONTROL=y
+CONFIG_OF_EMBED=y
CONFIG_ENV_IS_IN_FLASH=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_CLK=y
+CONFIG_CLK_RENESAS=y
+CONFIG_DM_GPIO=y
+CONFIG_RCAR_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_IIC=y
+CONFIG_DM_MMC=y
+CONFIG_SH_MMCIF=y
+CONFIG_RENESAS_SDHI=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_BAR=y
@@ -28,5 +51,20 @@
CONFIG_NETDEVICES=y
CONFIG_SMC911X=y
CONFIG_SMC911X_BASE=0x18000000
-CONFIG_BAUDRATE=38400
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_PCI_RCAR_GEN2=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_PINCTRL_PFC=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
CONFIG_SCIF_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SH_QSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_PCI=y
+CONFIG_USB_STORAGE=y
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 901b34e..70083bc 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -54,6 +54,7 @@
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_DM_MMC=y
CONFIG_SH_MMCIF=y
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index c163e82..a1c4e5c 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -54,6 +54,7 @@
CONFIG_DM_GPIO=y
CONFIG_RCAR_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_RCAR_I2C=y
CONFIG_SYS_I2C_RCAR_IIC=y
CONFIG_DM_MMC=y
CONFIG_SH_MMCIF=y
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 7fb201d..5eceab9 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -339,6 +339,12 @@
OMAP24xx Slave speed channel 0
endif
+config SYS_I2C_RCAR_I2C
+ bool "Renesas RCar I2C driver"
+ depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
+ help
+ Support for Renesas RCar I2C controller.
+
config SYS_I2C_RCAR_IIC
bool "Renesas RCar Gen3 IIC driver"
depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index e8bb632..8bb3c18 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -28,7 +28,7 @@
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
-obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
+obj-$(CONFIG_SYS_I2C_RCAR_I2C) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR_IIC) += rcar_iic.o
obj-$(CONFIG_SYS_I2C_ROCKCHIP) += rk_i2c.o
obj-$(CONFIG_SYS_I2C_S3C24X0) += s3c24x0_i2c.o exynos_hs_i2c.o
diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c
index a2627dc..8d87c73 100644
--- a/drivers/i2c/rcar_i2c.c
+++ b/drivers/i2c/rcar_i2c.c
@@ -1,292 +1,353 @@
-// SPDX-License-Identifier: GPL-2.0
+// SPDX-License-Identifier: GPL-2.0+
/*
* drivers/i2c/rcar_i2c.c
*
- * Copyright (C) 2013 Renesas Electronics Corporation
- * Copyright (C) 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*
- * NOTE: This driver should be converted to driver model before June 2017.
- * Please see doc/driver-model/i2c-howto.txt for instructions.
+ * Clock configuration based on Linux i2c-rcar.c:
+ * Copyright (C) 2014-15 Wolfram Sang <wsa@sang-engineering.com>
+ * Copyright (C) 2011-2015 Renesas Electronics Corporation
+ * Copyright (C) 2012-14 Renesas Solutions Corp.
+ * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
*/
#include <common.h>
+#include <clk.h>
+#include <dm.h>
#include <i2c.h>
#include <asm/io.h>
+#include <wait_bit.h>
-DECLARE_GLOBAL_DATA_PTR;
+#define RCAR_I2C_ICSCR 0x00
+#define RCAR_I2C_ICMCR 0x04
+#define RCAR_I2C_ICMCR_MDBS BIT(7)
+#define RCAR_I2C_ICMCR_FSCL BIT(6)
+#define RCAR_I2C_ICMCR_FSDA BIT(5)
+#define RCAR_I2C_ICMCR_OBPC BIT(4)
+#define RCAR_I2C_ICMCR_MIE BIT(3)
+#define RCAR_I2C_ICMCR_TSBE BIT(2)
+#define RCAR_I2C_ICMCR_FSB BIT(1)
+#define RCAR_I2C_ICMCR_ESG BIT(0)
+#define RCAR_I2C_ICSSR 0x08
+#define RCAR_I2C_ICMSR 0x0c
+#define RCAR_I2C_ICMSR_MASK 0x7f
+#define RCAR_I2C_ICMSR_MNR BIT(6)
+#define RCAR_I2C_ICMSR_MAL BIT(5)
+#define RCAR_I2C_ICMSR_MST BIT(4)
+#define RCAR_I2C_ICMSR_MDE BIT(3)
+#define RCAR_I2C_ICMSR_MDT BIT(2)
+#define RCAR_I2C_ICMSR_MDR BIT(1)
+#define RCAR_I2C_ICMSR_MAT BIT(0)
+#define RCAR_I2C_ICSIER 0x10
+#define RCAR_I2C_ICMIER 0x14
+#define RCAR_I2C_ICCCR 0x18
+#define RCAR_I2C_ICCCR_SCGD_OFF 3
+#define RCAR_I2C_ICSAR 0x1c
+#define RCAR_I2C_ICMAR 0x20
+#define RCAR_I2C_ICRXD_ICTXD 0x24
-struct rcar_i2c {
- u32 icscr;
- u32 icmcr;
- u32 icssr;
- u32 icmsr;
- u32 icsier;
- u32 icmier;
- u32 icccr;
- u32 icsar;
- u32 icmar;
- u32 icrxdtxd;
- u32 icccr2;
- u32 icmpr;
- u32 ichpr;
- u32 iclpr;
+struct rcar_i2c_priv {
+ void __iomem *base;
+ struct clk clk;
+ u32 intdelay;
+ u32 icccr;
};
-#define MCR_MDBS 0x80 /* non-fifo mode switch */
-#define MCR_FSCL 0x40 /* override SCL pin */
-#define MCR_FSDA 0x20 /* override SDA pin */
-#define MCR_OBPC 0x10 /* override pins */
-#define MCR_MIE 0x08 /* master if enable */
-#define MCR_TSBE 0x04
-#define MCR_FSB 0x02 /* force stop bit */
-#define MCR_ESG 0x01 /* en startbit gen. */
-
-#define MSR_MASK 0x7f
-#define MSR_MNR 0x40 /* nack received */
-#define MSR_MAL 0x20 /* arbitration lost */
-#define MSR_MST 0x10 /* sent a stop */
-#define MSR_MDE 0x08
-#define MSR_MDT 0x04
-#define MSR_MDR 0x02
-#define MSR_MAT 0x01 /* slave addr xfer done */
-
-static const struct rcar_i2c *i2c_dev[CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS] = {
- (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C0_BASE,
- (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C1_BASE,
- (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C2_BASE,
- (struct rcar_i2c *)CONFIG_SYS_RCAR_I2C3_BASE,
-};
-
-static void rcar_i2c_raw_rw_common(struct rcar_i2c *dev, u8 chip, uint addr)
+static int rcar_i2c_finish(struct udevice *dev)
{
- /* set slave address */
- writel(chip << 1, &dev->icmar);
- /* set register address */
- writel(addr, &dev->icrxdtxd);
- /* clear status */
- writel(0, &dev->icmsr);
- /* start master send */
- writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr);
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ int ret;
- while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDE))
- != (MSR_MAT | MSR_MDE))
- udelay(10);
+ ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, RCAR_I2C_ICMSR_MST,
+ true, 10, true);
- /* clear ESG */
- writel(MCR_MDBS | MCR_MIE, &dev->icmcr);
- /* start SCLclk */
- writel(~(MSR_MAT | MSR_MDE), &dev->icmsr);
+ writel(0, priv->base + RCAR_I2C_ICSSR);
+ writel(0, priv->base + RCAR_I2C_ICMSR);
+ writel(0, priv->base + RCAR_I2C_ICMCR);
- while (!(readl(&dev->icmsr) & MSR_MDE))
- udelay(10);
+ return ret;
}
-static void rcar_i2c_raw_rw_finish(struct rcar_i2c *dev)
+static void rcar_i2c_recover(struct udevice *dev)
{
- while (!(readl(&dev->icmsr) & MSR_MST))
- udelay(10);
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ u32 mcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_OBPC;
+ u32 mcra = mcr | RCAR_I2C_ICMCR_FSDA;
+ int i;
+
+ /* Send 9 SCL pulses */
+ for (i = 0; i < 9; i++) {
+ writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR);
+ udelay(5);
+ writel(mcra, priv->base + RCAR_I2C_ICMCR);
+ udelay(5);
+ }
- writel(0, &dev->icmcr);
+ /* Send stop condition */
+ udelay(5);
+ writel(mcra, priv->base + RCAR_I2C_ICMCR);
+ udelay(5);
+ writel(mcr, priv->base + RCAR_I2C_ICMCR);
+ udelay(5);
+ writel(mcr | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR);
+ udelay(5);
+ writel(mcra | RCAR_I2C_ICMCR_FSCL, priv->base + RCAR_I2C_ICMCR);
+ udelay(5);
}
-static int
-rcar_i2c_raw_write(struct rcar_i2c *dev, u8 chip, uint addr, u8 *val, int size)
+static int rcar_i2c_set_addr(struct udevice *dev, u8 chip, u8 read)
{
- rcar_i2c_raw_rw_common(dev, chip, addr);
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ u32 mask = RCAR_I2C_ICMSR_MAT |
+ (read ? RCAR_I2C_ICMSR_MDR : RCAR_I2C_ICMSR_MDE);
+ u32 val;
+ int ret;
+
+ writel(0, priv->base + RCAR_I2C_ICMIER);
+ writel(RCAR_I2C_ICMCR_MDBS, priv->base + RCAR_I2C_ICMCR);
+ writel(0, priv->base + RCAR_I2C_ICMSR);
+ writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
- /* set send date */
- writel(*val, &dev->icrxdtxd);
- /* start SCLclk */
- writel(~MSR_MDE, &dev->icmsr);
+ ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMCR,
+ RCAR_I2C_ICMCR_FSDA, false, 2, true);
+ if (ret) {
+ rcar_i2c_recover(dev);
+ val = readl(priv->base + RCAR_I2C_ICMSR);
+ if (val & RCAR_I2C_ICMCR_FSDA) {
+ dev_err(dev, "Bus busy, aborting\n");
+ return ret;
+ }
+ }
- while (!(readl(&dev->icmsr) & MSR_MDE))
- udelay(10);
+ writel((chip << 1) | read, priv->base + RCAR_I2C_ICMAR);
+ writel(0, priv->base + RCAR_I2C_ICMSR);
+ writel(RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE | RCAR_I2C_ICMCR_ESG,
+ priv->base + RCAR_I2C_ICMCR);
- /* set stop condition */
- writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr);
- /* start SCLclk */
- writel(~MSR_MDE, &dev->icmsr);
+ ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR, mask,
+ true, 100, true);
+ if (ret)
+ return ret;
- rcar_i2c_raw_rw_finish(dev);
+ /* Check NAK */
+ if (readl(priv->base + RCAR_I2C_ICMSR) & RCAR_I2C_ICMSR_MNR)
+ return -EREMOTEIO;
return 0;
}
-static u8
-rcar_i2c_raw_read(struct rcar_i2c *dev, u8 chip, uint addr)
+static int rcar_i2c_read_common(struct udevice *dev, struct i2c_msg *msg)
{
- u8 ret;
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE;
+ int i, ret = -EREMOTEIO;
- rcar_i2c_raw_rw_common(dev, chip, addr);
+ ret = rcar_i2c_set_addr(dev, msg->addr, 1);
+ if (ret)
+ return ret;
- /* set slave address, receive */
- writel((chip << 1) | 1, &dev->icmar);
- /* start master receive */
- writel(MCR_MDBS | MCR_MIE | MCR_ESG, &dev->icmcr);
- /* clear status */
- writel(0, &dev->icmsr);
+ for (i = 0; i < msg->len; i++) {
+ if (msg->len - 1 == i)
+ icmcr |= RCAR_I2C_ICMCR_FSB;
- while ((readl(&dev->icmsr) & (MSR_MAT | MSR_MDR))
- != (MSR_MAT | MSR_MDR))
- udelay(10);
+ writel(icmcr, priv->base + RCAR_I2C_ICMCR);
+ writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR);
- /* clear ESG */
- writel(MCR_MDBS | MCR_MIE, &dev->icmcr);
- /* prepare stop condition */
- writel(MCR_MDBS | MCR_MIE | MCR_FSB, &dev->icmcr);
- /* start SCLclk */
- writel(~(MSR_MAT | MSR_MDR), &dev->icmsr);
+ ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR,
+ RCAR_I2C_ICMSR_MDR, true, 100, true);
+ if (ret)
+ return ret;
- while (!(readl(&dev->icmsr) & MSR_MDR))
- udelay(10);
-
- /* get receive data */
- ret = (u8)readl(&dev->icrxdtxd);
- /* start SCLclk */
- writel(~MSR_MDR, &dev->icmsr);
+ msg->buf[i] = readl(priv->base + RCAR_I2C_ICRXD_ICTXD) & 0xff;
+ }
- rcar_i2c_raw_rw_finish(dev);
+ writel(~RCAR_I2C_ICMSR_MDR, priv->base + RCAR_I2C_ICMSR);
- return ret;
+ return rcar_i2c_finish(dev);
}
-/*
- * SCL = iicck / (20 + SCGD * 8 + F[(ticf + tr + intd) * iicck])
- * iicck : I2C internal clock < 20 MHz
- * ticf : I2C SCL falling time: 35 ns
- * tr : I2C SCL rising time: 200 ns
- * intd : LSI internal delay: I2C0: 50 ns I2C1-3: 5
- * F[n] : n rounded up to an integer
- */
-static u32 rcar_clock_gen(int i2c_no, u32 bus_speed)
+static int rcar_i2c_write_common(struct udevice *dev, struct i2c_msg *msg)
{
- u32 iicck, f, scl, scgd;
- u32 intd = 5;
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ u32 icmcr = RCAR_I2C_ICMCR_MDBS | RCAR_I2C_ICMCR_MIE;
+ int i, ret = -EREMOTEIO;
- int bit = 0, cdf_width = 3;
- for (bit = 0; bit < (1 << cdf_width); bit++) {
- iicck = CONFIG_HP_CLK_FREQ / (1 + bit);
- if (iicck < 20000000)
- break;
- }
+ ret = rcar_i2c_set_addr(dev, msg->addr, 0);
+ if (ret)
+ return ret;
- if (bit > (1 << cdf_width)) {
- puts("rcar-i2c: Can not get CDF\n");
- return 0;
+ for (i = 0; i < msg->len; i++) {
+ writel(msg->buf[i], priv->base + RCAR_I2C_ICRXD_ICTXD);
+ writel(icmcr, priv->base + RCAR_I2C_ICMCR);
+ writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR);
+
+ ret = wait_for_bit_le32(priv->base + RCAR_I2C_ICMSR,
+ RCAR_I2C_ICMSR_MDE, true, 100, true);
+ if (ret)
+ return ret;
}
- if (i2c_no == 0)
- intd = 50;
+ writel(~RCAR_I2C_ICMSR_MDE, priv->base + RCAR_I2C_ICMSR);
+ icmcr |= RCAR_I2C_ICMCR_FSB;
+ writel(icmcr, priv->base + RCAR_I2C_ICMCR);
- f = (35 + 200 + intd) * (iicck / 1000000000);
+ return rcar_i2c_finish(dev);
+}
- for (scgd = 0; scgd < 0x40; scgd++) {
- scl = iicck / (20 + (scgd * 8) + f);
- if (scl <= bus_speed)
- break;
- }
+static int rcar_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
+{
+ int ret;
- if (scgd > 0x40) {
- puts("rcar-i2c: Can not get SDGB\n");
- return 0;
- }
+ for (; nmsgs > 0; nmsgs--, msg++) {
+ if (msg->flags & I2C_M_RD)
+ ret = rcar_i2c_read_common(dev, msg);
+ else
+ ret = rcar_i2c_write_common(dev, msg);
- debug("%s: scl: %d\n", __func__, scl);
- debug("%s: bit %x\n", __func__, bit);
- debug("%s: scgd %x\n", __func__, scgd);
- debug("%s: iccr %x\n", __func__, (scgd << (cdf_width) | bit));
+ if (ret)
+ return -EREMOTEIO;
+ }
- return scgd << (cdf_width) | bit;
+ return ret;
}
-static void
-rcar_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
+static int rcar_i2c_probe_chip(struct udevice *dev, uint addr, uint flags)
{
- struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
- u32 icccr = 0;
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ /* Ignore address 0, slave address */
+ if (addr == 0)
+ return -EINVAL;
+
+ ret = rcar_i2c_set_addr(dev, addr, 1);
+ writel(0, priv->base + RCAR_I2C_ICMSR);
+ return ret;
+}
- /* No i2c support prior to relocation */
- if (!(gd->flags & GD_FLG_RELOC))
- return;
+static int rcar_i2c_set_speed(struct udevice *dev, uint bus_freq_hz)
+{
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ u32 scgd, cdf, round, ick, sum, scl;
+ unsigned long rate;
/*
- * reset slave mode.
- * slave mode is not used on this driver
+ * calculate SCL clock
+ * see
+ * ICCCR
+ *
+ * ick = clkp / (1 + CDF)
+ * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick])
+ *
+ * ick : I2C internal clock < 20 MHz
+ * ticf : I2C SCL falling time
+ * tr : I2C SCL rising time
+ * intd : LSI internal delay
+ * clkp : peripheral_clk
+ * F[] : integer up-valuation
*/
- writel(0, &dev->icsier);
- writel(0, &dev->icsar);
- writel(0, &dev->icscr);
- writel(0, &dev->icssr);
+ rate = clk_get_rate(&priv->clk);
+ cdf = rate / 20000000;
+ if (cdf >= 8) {
+ dev_err(dev, "Input clock %lu too high\n", rate);
+ return -EIO;
+ }
+ ick = rate / (cdf + 1);
- /* reset master mode */
- writel(0, &dev->icmier);
- writel(0, &dev->icmcr);
- writel(0, &dev->icmsr);
- writel(0, &dev->icmar);
+ /*
+ * it is impossible to calculate large scale
+ * number on u32. separate it
+ *
+ * F[(ticf + tr + intd) * ick] with sum = (ticf + tr + intd)
+ * = F[sum * ick / 1000000000]
+ * = F[(ick / 1000000) * sum / 1000]
+ */
+ sum = 35 + 200 + priv->intdelay;
+ round = (ick + 500000) / 1000000 * sum;
+ round = (round + 500) / 1000;
- icccr = rcar_clock_gen(adap->hwadapnr, adap->speed);
- if (icccr == 0)
- puts("I2C: Init failed\n");
- else
- writel(icccr, &dev->icccr);
-}
+ /*
+ * SCL = ick / (20 + SCGD * 8 + F[(ticf + tr + intd) * ick])
+ *
+ * Calculation result (= SCL) should be less than
+ * bus_speed for hardware safety
+ *
+ * We could use something along the lines of
+ * div = ick / (bus_speed + 1) + 1;
+ * scgd = (div - 20 - round + 7) / 8;
+ * scl = ick / (20 + (scgd * 8) + round);
+ * (not fully verified) but that would get pretty involved
+ */
+ for (scgd = 0; scgd < 0x40; scgd++) {
+ scl = ick / (20 + (scgd * 8) + round);
+ if (scl <= bus_freq_hz)
+ goto scgd_find;
+ }
+ dev_err(dev, "it is impossible to calculate best SCL\n");
+ return -EIO;
-static int rcar_i2c_read(struct i2c_adapter *adap, uint8_t chip,
- uint addr, int alen, u8 *data, int len)
-{
- struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
- int i;
+scgd_find:
+ dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n",
+ scl, bus_freq_hz, clk_get_rate(&priv->clk), round, cdf, scgd);
- for (i = 0; i < len; i++)
- data[i] = rcar_i2c_raw_read(dev, chip, addr + i);
+ priv->icccr = (scgd << RCAR_I2C_ICCCR_SCGD_OFF) | cdf;
+ writel(priv->icccr, priv->base + RCAR_I2C_ICCCR);
return 0;
}
-static int rcar_i2c_write(struct i2c_adapter *adap, uint8_t chip, uint addr,
- int alen, u8 *data, int len)
+static int rcar_i2c_probe(struct udevice *dev)
{
- struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
- return rcar_i2c_raw_write(dev, chip, addr, data, len);
-}
+ struct rcar_i2c_priv *priv = dev_get_priv(dev);
+ int ret;
-static int
-rcar_i2c_probe(struct i2c_adapter *adap, u8 dev)
-{
- return rcar_i2c_read(adap, dev, 0, 0, NULL, 0);
-}
+ priv->base = dev_read_addr_ptr(dev);
+ priv->intdelay = dev_read_u32_default(dev,
+ "i2c-scl-internal-delay-ns", 5);
-static unsigned int rcar_i2c_set_bus_speed(struct i2c_adapter *adap,
- unsigned int speed)
-{
- struct rcar_i2c *dev = (struct rcar_i2c *)i2c_dev[adap->hwadapnr];
- u32 icccr;
- int ret = 0;
+ ret = clk_get_by_index(dev, 0, &priv->clk);
+ if (ret)
+ return ret;
- rcar_i2c_raw_rw_finish(dev);
+ ret = clk_enable(&priv->clk);
+ if (ret)
+ return ret;
- icccr = rcar_clock_gen(adap->hwadapnr, speed);
- if (icccr == 0) {
- puts("I2C: Init failed\n");
- ret = -1;
- } else {
- writel(icccr, &dev->icccr);
- }
+ /* reset slave mode */
+ writel(0, priv->base + RCAR_I2C_ICSIER);
+ writel(0, priv->base + RCAR_I2C_ICSAR);
+ writel(0, priv->base + RCAR_I2C_ICSCR);
+ writel(0, priv->base + RCAR_I2C_ICSSR);
+
+ /* reset master mode */
+ writel(0, priv->base + RCAR_I2C_ICMIER);
+ writel(0, priv->base + RCAR_I2C_ICMCR);
+ writel(0, priv->base + RCAR_I2C_ICMSR);
+ writel(0, priv->base + RCAR_I2C_ICMAR);
+
+ ret = rcar_i2c_set_speed(dev, 100000);
+ if (ret)
+ clk_disable(&priv->clk);
+
return ret;
}
-/*
- * Register RCAR i2c adapters
- */
-U_BOOT_I2C_ADAP_COMPLETE(rcar_0, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
- rcar_i2c_write, rcar_i2c_set_bus_speed,
- CONFIG_SYS_RCAR_I2C0_SPEED, 0, 0)
-U_BOOT_I2C_ADAP_COMPLETE(rcar_1, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
- rcar_i2c_write, rcar_i2c_set_bus_speed,
- CONFIG_SYS_RCAR_I2C1_SPEED, 0, 1)
-U_BOOT_I2C_ADAP_COMPLETE(rcar_2, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
- rcar_i2c_write, rcar_i2c_set_bus_speed,
- CONFIG_SYS_RCAR_I2C2_SPEED, 0, 2)
-U_BOOT_I2C_ADAP_COMPLETE(rcar_3, rcar_i2c_init, rcar_i2c_probe, rcar_i2c_read,
- rcar_i2c_write, rcar_i2c_set_bus_speed,
- CONFIG_SYS_RCAR_I2C3_SPEED, 0, 3)
+static const struct dm_i2c_ops rcar_i2c_ops = {
+ .xfer = rcar_i2c_xfer,
+ .probe_chip = rcar_i2c_probe_chip,
+ .set_bus_speed = rcar_i2c_set_speed,
+};
+
+static const struct udevice_id rcar_i2c_ids[] = {
+ { .compatible = "renesas,rcar-gen2-i2c" },
+ { }
+};
+
+U_BOOT_DRIVER(i2c_rcar) = {
+ .name = "i2c_rcar",
+ .id = UCLASS_I2C,
+ .of_match = rcar_i2c_ids,
+ .probe = rcar_i2c_probe,
+ .priv_auto_alloc_size = sizeof(struct rcar_i2c_priv),
+ .ops = &rcar_i2c_ops,
+};
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index 8ff82d3..6df0e9b 100644
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -12,9 +12,9 @@
#include "rcar-gen2-common.h"
/* STACK */
-#define CONFIG_SYS_INIT_SP_ADDR 0xE817FFFC
-#define STACK_AREA_SIZE 0xC000
-#define LOW_LEVEL_MERAM_STACK \
+#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
+#define STACK_AREA_SIZE 0x00100000
+#define LOW_LEVEL_MERAM_STACK \
(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
/* MEMORY */
@@ -22,12 +22,6 @@
#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
-/* SCIF */
-#define CONFIG_CONS_SCIF0
-
-#define CONFIG_SYS_MEMTEST_START (RCAR_GEN2_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 504 * 1024 * 1024)
-
#undef CONFIG_SYS_MEMTEST_SCRATCH
#undef CONFIG_SYS_LOADS_BAUD_CHANGE
@@ -55,7 +49,6 @@
#undef CONFIG_CMD_SPI
#endif
-
/* Board Clock */
#define RMOBILE_XTAL_CLK 20000000u
#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
@@ -73,21 +66,4 @@
#define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN)
#endif
-/* Module stop status bits */
-/* INTC-RT */
-#define CONFIG_SMSTP0_ENA 0x00400000
-/* SDHI0 */
-#define CONFIG_SMSTP3_ENA 0x00004000
-/* INTC-SYS, IRQC */
-#define CONFIG_SMSTP4_ENA 0x00000180
-/* SCIF0 */
-#define CONFIG_SMSTP7_ENA 0x00200000
-/* QSPI */
-#define CONFIG_SMSTP9_ENA 0x00020000
-/* SYS-DMAC0 */
-#define CONFIG_RMSTP2_ENA 0x00080000
-
-/* SDHI */
-#define CONFIG_SH_SDHI_FREQ 97500000
-
#endif /* __BLANCHE_H */