xilinx: versal-net: Add mini eMMC 5.1 configuration

Add support for Versal NET mini eMMC 5.1 configuration. Add device tree
and defconfig.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230614121351.21521-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5975f80..b13b26b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -416,6 +416,7 @@
 	xilinx-versal-virt.dtb
 dtb-$(CONFIG_ARCH_VERSAL_NET) += \
 	versal-net-mini.dtb \
+	versal-net-mini-emmc.dtb \
 	versal-net-mini-ospi-single.dtb \
 	versal-net-mini-qspi-single.dtb \
 	xilinx-versal-net-virt.dtb
diff --git a/arch/arm/dts/versal-net-mini-emmc.dts b/arch/arm/dts/versal-net-mini-emmc.dts
new file mode 100644
index 0000000..8a864ba
--- /dev/null
+++ b/arch/arm/dts/versal-net-mini-emmc.dts
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal NET Mini eMMC Configuration
+ *
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
+ *
+ * Michal Simek <michal.simek@amd.com>
+ * Ashok Reddy Soma <ashok.reddy.soma@amd.com>
+ */
+
+/dts-v1/;
+
+/ {
+	compatible = "xlnx,versal-net-mini";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	model = "Xilinx Versal NET MINI eMMC";
+
+	aliases {
+		serial0 = &dcc;
+		mmc0 = &sdhci1;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0 0 0 0x20000000>;
+	};
+
+	clk200: clk200 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <200000000>;
+	};
+
+	dcc: dcc {
+		compatible = "arm,dcc";
+		status = "okay";
+		bootph-all;
+	};
+
+	amba: amba {
+		bootph-all;
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		sdhci1: sdhci@f1050000 {
+			compatible = "xlnx,versal-net-emmc";
+			status = "okay";
+			non-removable;
+			disable-wp;
+			bus-width = <8>;
+			reg = <0 0xf1050000 0 0x10000>;
+			clock-names = "clk_xin", "clk_ahb";
+			clocks = <&clk200>, <&clk200>;
+			xlnx,mio-bank = <0>;
+		};
+	};
+};