arch/arm/dts/k3-j721e-r5-common-proc-board.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
 */

/dts-v1/;

#include "k3-j721e-common-proc-board.dts"
#include "k3-j721e-ddr-evm-lp4-4266.dtsi"
#include "k3-j721e-ddr.dtsi"
#include "k3-j721e-common-proc-board-u-boot.dtsi"

#include "k3-j721e-r5.dtsi"

&wkup_i2c0 {
	bootph-pre-ram;
	tps659413a: tps659413a@48 {
		reg = <0x48>;
		compatible = "ti,tps659413";
		bootph-pre-ram;
		pinctrl-names = "default";
		pinctrl-0 = <&wkup_i2c0_pins_default>;
		clock-frequency = <400000>;

		regulators: regulators {
			bootph-pre-ram;
			buck12_reg: buck12 {
				/*VDD_CPU*/
				regulator-name = "buck12";
				regulator-min-microvolt = <600000>;
				regulator-max-microvolt = <900000>;
				regulator-always-on;
				regulator-boot-on;
				bootph-pre-ram;
			};
		};

		esm: esm {
			compatible = "ti,tps659413-esm";
			bootph-pre-ram;
		};
	};
};

&mcu_uart0_pins_default {
	bootph-pre-ram;
};

&wkup_vtm0 {
	vdd-supply-2 = <&buck12_reg>;
	bootph-pre-ram;
};

&ospi0 {
	/* Address change for data region (32-bit) */
	reg = <0x0 0x47040000 0x0 0x100>,
	      <0x0 0x50000000 0x0 0x8000000>;
};

&ospi1 {
	/* Address change for data region (32-bit) */
	reg = <0x0 0x47050000 0x0 0x100>,
	      <0x0 0x58000000 0x0 0x8000000>;
};

&fss {
	/* enable ranges missing from the FSS node */
	ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>,
	         <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
};