| // SPDX-License-Identifier: GPL-2.0 |
| * dts file for Xilinx Versal Mini OSPI Configuration |
| * (C) Copyright 2018-2019, Xilinx, Inc. |
| * Siva Durga Prasad <siva.durga.prasad.paladugu@amd.com>> |
| * Michal Simek <michal.simek@amd.com> |
| compatible = "xlnx,versal"; |
| model = "Xilinx Versal MINI OSPI"; |
| compatible = "fixed-clock"; |
| clock-frequency = <125000000>; |
| compatible = "simple-bus"; |
| compatible = "cadence,qspi", "cdns,qspi-nor"; |
| reg = <0 0xf1010000 0 0x10000 0 0xc0000000 0 0x20000000>; |
| clock-names = "ref_clk", "pclk"; |
| clocks = <&clk125 &clk125>; |
| cdns,trigger-address = <0xc0000000>; |
| compatible = "n25q512a", "micron,m25p80", |
| spi-max-frequency = <20000000>; |
| stdout-path = "serial0:115200"; |
| reg = <0x0 0xfffc0000 0x0 0x40000>; |